Symposium O: Materials, Processes, and Reliability for Advanced Interconnects for Micro- and Nanoelectronics
Symposium Support
Air Liquide
Air Products
Applied Materials Inc
GLOBALFOUNDRIES
IBM Almaden Research Center
JSR Micro Inc
Tokyo Electron America
Materials, Processes, and Reliability for Advanced Interconnects for Micro- and Nanoelectronics
April 26 - 29, 2011
Chairs
Geraud Dubois
|
|
IBM Almaden Research Center
|
Mikhail Baklanov
|
|
IMEC
|
Christian Dussarrat
|
|
Air Liquide
|
Terukazu Kokubo
|
|
JSR Tsukuba Research Laboratories
|
Shinichi Ogawa
|
|
National Institute of Advanced
Industrial Science and Technology
|
* Invited paper
SESSION O1: Low-k Materials I
Chairs: Griselda Bonilla and Geraud Dubois
Tuesday Morning, April 26, 2011
Room 3000 (Moscone West)
8:15 AM *O1.1
Development of Ultralow-k pSiCOH Dielectrics and Implementation in Interconnect Technology. Alfred Grill1, Stephen M. Gates1 and E.Todd Ryan2; 1IBM -T.J. Watson Research Center, Yorktown Heights, New York; 2GLOBALFOUNDRIES, Albany, New York.
8:45 AM *O1.2
Ultra Low-k Materials Based on Self-assembled Organic Polymers. Marianna Pantouvaki1, Larry Zhao2, Craig Huffman1, Kris Vanstreels1, Patrick Verdonck1, Yukiharu Ono3, Michio Nakajima3, Koji Nakatani3, Gerald P. Beyer1 and Mikhail R. Baklanov1; 1Imec, Leuven, Belgium; 2Intel, Leuven, Belgium; 3Sumitomo Bakelite Co, Ltd, Yokohama, Japan.
9:15 AM O1.3
Molecularly Reinforced Sol-gel Glasses with Improved Pore-size Distribution. Willi Volksen1, Geraud Dubois1, Theo Frot1, Teddie Magbitang1, Phil Rice1, Leslie Krupp1, Sebastian Engelmann2, Robert Bruce2, Sampath Purushothaman2, Hisashi Nakagawa3, Manabu Sekiguchi3 and Terukazu Kokubo3; 1IBM Almaden Research Center, San Jose, California; 2IBM T.J., Watson Research Center, Yorktown Heights, New York; 3JSR Tsukuba Research Labs, Tsukuba, Ibaraki, Japan.
9:30 AM O1.4
New Designs of Hydrophobic and Mesostructured Ultra Low k Materials with Isolated Mesopores. Anthony Grunenwald1, André Ayral1, Pierre Antoine Albouy2, Vincent Rouessac1, Patrice Gergaud4, Christophe Licitra4, David Jauffres3, Marc Verdier3, Aziz Zenasni4 and Vincent Jousseaume4; 1European Membrane Institute, Montpellier, France; 2Laboratoire de Physique des Solides, Orsay, France; 3SIMAP-INPG, Grenoble, France; 4CEA-LETI-MINATEC Campus, grenoble, France.
9:45 AM O1.5
Spin-on-dielectric Process for Nanoscale High Aspect Ratio Trenches for Device Isolation. Suresh Regonda1, Eungjae Park2, Lisa S. Spurgin1, Wenchuang Hu1, Hyunjin Kim2, Jaehyun Kim2, Moon J. Kim1 and Jiyoung Kim1; 1Electrical Engineering, University of Texas at Dallas, Richardson, Texas; 2Dongjin Semichem, Hwaseong-SI, Gyeonggi-Do, Korea, Republic of.
10:00 AM BREAK
10:30 AM *O1.6
Molecular Structure and Design of Ultra-low-k Hybrid Glasses. Reinhold Dauskardt1, Mark Oliver1 and Geraud Dubois2; 1Stanford University, Stanford, California; 2IBM Almaden, Almaden, California.
11:00 AM O1.7
Atomic-scale Modeling of the Mechanical Behavior of Ultra-low-dielectric-constant Mesoporous Amorphous Silicate Films. Rauf Gungor1, James J. Watkins2 and Dimitrios Maroudas1; 1Chemical Engineering, University of Massachusetts, Amherst, Massachusetts; 2Polymer Science and Engineering, University of Massachusetts, Amherst, Massachusetts.
11:15 AM O1.8
Molecular Design of High-stiffness ULK Glasses for Mechanically Robust Interconnects. Mark Oliver1, Geraud Dubois2,1, Theo Frot2, Mark Sherwood2 and Reinhold H. Dauskardt1; 1Stanford University, Stanford, California; 2IBM Almaden Research Center, San Jose, California.
11:30 AM O1.9
High Toughness and Moisture-insensitive Hydrogenated Amorphous Silicon Carbide Dielectric Films. Yusuke Matsuda1, Sean W. King2, Jeff Biefield2 and Reinhold H. Dauskardt1; 1Stanford University, Stanford, California; 2Intel Corporation, Hillsboro, Oregon.
SESSION O2: Low-k Materials II
Chair: Willi Volksen
Tuesday Afternoon, April 26, 2011
Room 3000 (Moscone West)
1:45 PM *O2.1
Cryoplasma Processing: A New Avenue for Low Damage Integration of Low-k Dielectrics. Francesca Iacopi1, Syusaku Mori1, Hitoshi Muneoka1, Sven Stauss1, Kazuo Terashima1, Philip M. Rice2, Lisa Krupp2 and Geraud Dubois2,3; 1Advanced Materials Science, University of Tokyo, Kashiwa, Japan; 2IBM Almaden Research Center, San Jose, California; Dept. of Materials Science and Engineering, Stanford University, Stanford, California.
2:15 PM O2.2
He Plasma Pretreatment Effects on O2-Plasma Induced Damage of Nanoporous Organosilicate Glass Film. Swayambhu P. Behera1, Qing Wang2 and Jeffry A. Kelber1; 1University of North Texas, Denton, Texas; 2Northeastern University, Shenyang, China.
2:30 PM O2.3
Optimized N2/H2 Plasma Process to Simultaneously Clean ILD and CMP Cu Surfaces. Xin Liu1, Sandeep Gill1, Fu Tang1, Robert J. Nemanich1 and Sean King2; 1Physics, Arizona State University, Tempe, Arizona; 2Portland Technology Development, Intel Corporation, Hillsboro, Oregon.
2:45 PM O2.4
Evaluation of Ultra-thin Layer Fabricated by Wet-process as a Pore-seal for Porous Low-k Films. Shoko S. Ono1, Kazuo Kohmura1, Hirofumi Tanaka1, Yasuhisa Kayaba2 and Takamaro Kikkawa2; 1R&D Center, Mitsui Chemicals, Inc., Sodegaura, Chiba, Japan; 2Research Institute for Nanodevice and Bio Systems, Hiroshima University, Higashi-Hiroshima, Hiroshima, Japan.
3:00 PM BREAK
SESSION O3: Integration I
Chair: Mikhail Baklanov
Tuesday Afternoon, April 26, 2011
Room 3000 (Moscone West)
3:30 PM O3.1
Optimizing Stressor Film Deposition Sequence in Polish Rate Order for Best Planarization. John Zhang1, Changyong Xiao2, Jay Strane3, Rajasekhar Venigalla3, Laertis Economikos3, Lindsey Hall1, Jie Chen2, Derek Stoll3, Jin Wallner3, Haoren Zhuang4, Paul Ferreira1, Walter Kleemier1, Cindy Goldberg1, Yongsik Moon2, Connie Truong3, John Sudijono2, Xiaomeng Chen3 and Ron Sampson1; 1STMicroelectronics, Hopewell Junction, New York; 2GlobalFoundries, Hopewell Junction, New York; 3IBM Semiconductor Research and Development Center (SRDC), Hopewell Junction, New York; 4Infineon Technologies, Hopewell Junction, New York.
3:45 PM O3.2
Effect of Chemical Solutions and Surface Wettability on the Stability of Advanced Porous Low-k Materials. Quoc Toan Le1, Anne Bertha2, Marcel Lux1, Guy Vereecke1 and Herbert Struyf1; 1IMEC, Leuven, Belgium; 2University of Antwerp, Antwerp, Belgium.
4:00 PM O3.3
Fluid Flow Characteristics in Chemical Mechanical Polishing. Lucy Nolan and Kenneth C. Cadien; Department of Chemical and Materials Engineering, University of Alberta, Edmonton, Alberta, Canada.
SESSION O4: Integration II
Chair: Mikhail Baklanov
Wednesday Morning, April 27, 2011
Room 3000 (Moscone West)
8:30 AM *O4.1
Low-k Integration Using Metallic Hard Masks. Joubert Olivier1, Maxime Darnon1, Nicolas Posseme2, Thierry Chevolleau1 and Thibault David2; 1LTM, CNRS, Grenoble, France; 2CEA-LETI, CEA, Grenoble, France.
9:00 AM O4.2
A Less Damaging Patterning Regime for a Successful Integration of Ultra Low-k Materials in Modern Nanoelectronic Devices. Sven Zimmermann1, Nicole Ahner1, Tobias Fischer2, Matthias Schaller3, Stefan E. Schulz1,2 and Thomas Gessner1,2; 1Back-end of Line, Fraunhofer ENAS, Chemnitz, Saxony, Germany; 2Center for Microtechnologies, Chemnitz University of Technology, Chemnitz, Saxony, Germany; 3GLOBALFOUNDRIES, Dresden, Saxony, Germany.
9:15 AM O4.3
Post Porosity Plasma Protection: A New ULK Friendly Integration Approach. Theo Frot1, Teddie Magbitang1, Robert L. Bruce2, Sampath Purushothaman2, Willi Volksen1 and Geraud Dubois1; 1IBM, San Jose, California; 2IBM, Yorktown Heights, New York.
9:30 AM *O4.4
Defects in Low-k Insulators: ESR Analysis and Relationship to Electron Injection. Afanas'ev V. Valeri1, Keunen Koen1, Jivanescu Mihaela1, Stesmans Andre1, Tokei Zsolt2, Baklanov Mikhail2 and Beyer Gerald2; 1Department of Physics and Astronomy, University of Leuven, Leuven, Belgium; 2IMEC, Leuven, Belgium.
10:00 AM BREAK
SESSION O5: Reliability
Chair: Francesca Iacopi
Wednesday Morning, April 27, 2011
Room 3000 (Moscone West)
10:30 AM *O5.1
Impact of Dielectric Materials on Semiconductor BEOL Reliability. Griselda Bonilla1, Thomas M. Shaw1, Xiao H. Liu1, Chao-Kun Hu1, Eric Liniger1, Stephan Cohen1, Hosadurga Shobha2 and Christopher J. Penny2; 1IBM TJ Watson Research Center, Yorktown Heights, New York; 2IBM at Albany Nanotech- Center for Semiconductor Research, Albany, New York.
11:00 AM O5.2
Interface Adhesion and Related Device Properties of Ultra-thin Cu Diffusion Barrier and High-k / Metal Gate Films. Ryan P. Birringer and Reinhold H. Dauskardt; Materials Science and Engineering, Stanford University, Stanford, California.
11:15 AM O5.3
The Effect of Thermal Stress on Cu-migration-induced Inter-metal-dielectric Breakdown. Sung-Yup Jung1, Han-Wool Yeon1, Yoo-Yong Lee1, Jungwoo Pyun2 and Young-Chang Joo1; 1Department of Materials Science and Enginnering, Seoul National University, Seoul, Korea, Republic of; 2Product Quality Assurance Team, Memory Division, Samsung Electronics Co., Hwasung-City, Gyeonggi-Do, Korea, Republic of.
11:30 AM O5.4
Reliability Characterization of Copper Vias in Silicon by Thermal Imaging Technique. Shila Alavi, Kazuaki Yazawa, Glenn Alers, James Christofferson, Bjorn Vermeersch and Ali Shakouri; Electrical Engineering, UCSC, Santa Cruz, California.
SESSION O6: Metallization I
Chairs: Geraud Dubois and Christian Dussarrat
Wednesday Afternoon, April 27, 2011
Room 3000 (Moscone West)
1:30 PM *O6.1
Possibilities of CVD Mn Oxide as a Diffusion Barrier Layer for Advanced LSI Interconnections. Junichi Koike, Dept. of Materials Science, Tohoku University, Sendai, Miyagi, Japan.
2:00 PM O6.2
32nm Node Highly Reliable Cu/Low-k Integration Technology with CuMn Doped Seed. Shaoning Yao1, Vincent Mcgahay1, Matthew Angyal1, Andrew Simon1, Cathryn J. Christiansen2, Baozhen Li2, Tom C. Lee2, Fen Chen2, Paul S. McLaughlin1, Oluwafemi Ogunsola1 and Stephan Grunow1; 1IBM, Hopewell junction, New York; 2IBM Micorelectronics Division, Essex Junction, Vermont.
2:15 PM O6.3
Amorphous Ta-N as a Diffusion Barrier for Cu Metallization. Neda Dalili, Qi Liu and Douglas G. Ivey; Chemical and Materials Engineering, University of Alberta, Edmonton, Alberta, Canada.
2:30 PM O6.4
Structural and Barrier Properties of a Manganese Oxide Layer Formed by Chemical Vapor Deposition. Nguyen Mai Phuong1, Kenji Matsumoto2, Kaoru Maekawa2 and Junichi Koike1; 1Material Science, Tohoku University, Sendai, Miyagi, Japan; 2Technology Development Center, Tokyo Electron Ltd., Nirasaki, Japan.
2:45 PM O6.5
Bottom-up Filling of Surfactant Catalyzed Chemical Vapor Deposition (CVD) of Copper and Copper-manganese Alloy in Narrow Trenches. Yeung Au, Youbo Lin and Roy G. Gordon; Department of Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts.
3:00 PM BREAK
3:30 PM *O6.6
Microstructure-based Statistical Model on Cap Layer Effects for Electromigration in Cu Interconnects Beyond the 45nm Node. Lijuan Zhang1, Linjun Cao1, Paul S. Ho1, Oliver Aubel2 and Christian Hennesthal2; 1Laboratory for Interconnect and Packaging, Microelectronics Research Center, The University of Texas at Austin, Austin, Texas; 2Dresden Module One LLC & Co., GLOBALFOUNDRIES, Dresden, Germany.
4:00 PM O6.7
Atomic Layer Deposition of Novel RuAlO Thin Films for Seedless Copper Electroplating Applications. Taehoon Cheon1, Sang-Hyeok Choi1, Soo-Hyun Kim1, Sunjung Kim2 and Kye-Sun Park2; 1School of Materials Science and Engineering, Yeungnam University, Gyeongsan-si, Gyeongsangbuk-do, Korea, Republic of; 2School of Materials Science and Engineering, University of Ulsan, Ulsan, Korea, Republic of.
4:30 PM O6.8
Atomic Layer Deposition (ALD) of Ru Thin Films using a Novel Zero Metal Valent Ru(0) Metallorganic Precursor and Application to the Seed Layer for Cu Electroplating. Sanghyuk Choi1, Taehoon Cheon1, Kwang Deok Lee2, Jung Woo Park2 and Soo-Hyun Kim1; 1Materials Science and Engineering, Yeongnam Univ., Gyeongsan-si, Gyeongbuk, Korea, Republic of; 2Thin Film Material Team, Hansol Chemical, Seoul, Korea, Republic of.
SESSION O7: Metallization II
Chair: Christian Dussarrat
Thursday Morning, April 28, 2011
Room 3000 (Moscone West)
9:00 AM O7.1
Impurity Incorporation and Microstructural Evolution in Electrochemically Deposited Copper. Michael Rizzolo, Hamed Parvaneh, Steven Novak, Eric Lifshin and Kathleen Dunn; University at Albany- College of Nanoscale Science and Engineering, Albany, New York.
9:15 AM O7.2
Characterization of Texture, Grain Boundaries and Local Stresses in Nano Copper Interconnects by D-STEM, Stereology and Finite Element Modeling. Jai G. Kameswaran1, Shreyas Rajasekhara1, Amith Darbal2, Gregory S. Rohrer2, Katayun Barmak2 and Paulo Ferreira1; 1Materials Science and Engineering, University of Texas at Austin, Austin, Texas; 2Materials Research Science and Engineering Center, Carnegie Mellon University, Pittsburgh, Pennsylvania.
9:30 AM O7.3
The Effect of Dissolution of Copper in Acidic Electrolyte on the Formation of Nanotwin in Copper Electrodeposition. Sungho Seo1, Sanghyun Jin2 and Bongyoung Yoo1,2; 1Bionano Technology, Hanyang University, Ansan-si, Gyeonggi-do, Korea, Republic of; 2Materials Engineering, Hanyang University, Ansan-si, Gyeonggi-do, Korea, Republic of.
9:45 AM O7.4
Resistivity Increase due to Electron Scattering at Surfaces and Grain Boundaries in Metal Thin Films and Nanowires. Jasmeet Chawla and Daniel Gall; Materials Science and Engineering, Rensselaer Polytechnic Institute, Troy, New York.
10:00 AM BREAK
10:30 AM O7.5
The Surface Chemistry of Atomic Layer Deposition (ALD) Processes for Cu Metal Film Growth. Qiang Ma and Francisco Zaera; University of California, Riverside, California.
10:45 AM O7.6
Formation of Electrical Percolation During the Early Stages of Tungsten-CVD Growth on Titanium Nitride. Avraham Rozenblat1,2, Shai Haimson1, Yosi Shacham-Diamand2 and Dror Horvitz1; 1Micron Semiconductors Israel Ltd., Qiryat Gat, Israel; 2Physical Electronics, Tel Aviv University, Tel Aviv 69978, Israel.
11:00 AM O7.7
Electrical and Structural Properties of Ultrathin Polycrystalline and Epitaxial TiN Films Grown by Reactive Magnetron Sputtering. Fridrik Magnus1, Arni S. Ingason1,2, Sveinn Olafsson1 and Jon T. Gudmundsson1,3; 1Science Institute, University of Iceland, Reykjavik, Iceland; 2Thin Film Physics Division, IFM-Materials Physics, Linkoping University, Linkoping, Sweden; 3UM-SJTU Joint Institute, Shanghai Jiao Tong University, Shanghai, China.
11:15 AM O7.8
Seedless Copper Electroplating on Ta from a "Single" Electrolytic Bath. David Starosvetsky, Nina Sezin and Yair Ein-Eli; Materials Engineering, Technion-Israel Institute of Technology, Haifa, Israel.
SESSION O8: 3D Packaging
Chair: Francesca Iacopi
Thursday Afternoon, April 28, 2011
Room 3000 (Moscone West)
1:30 PM *O8.1
Sub-micron Scale Local Strength Evaluation for LSI Interconnect Structures. Shoji Kamiya1,5, Nobuyuki Shishido1,5, Hisashi Sato1,5, Masahiro Nishida1,5, Chen Chuangton1, Masaki Omiya2,5, Tomoji Nakamura3, Takashi Suzuki3, Takeshi Nokuo4,5 and Tadahiro Nagasawa4,5; 1Nagoya Institute of Technology, Nagoya, Aichi, Japan; 2Keio University, Yokohama, Kanagawa, Japan; 3Fujitsu Laboratories Limited, Atsugi, Kanagawa, Japan; 4JEOL Limited, Akishima, Tokyo, Japan; 5JST CREST, Chiyoda-ku, Tokyo, Japan.
2:00 PM O8.2
Probing the Mechanics and Reliability of Multilayer Microelectronic Interconnect Structures. Alexander Hsing1, Andrew Kearney2, Vivian Ryan3 and Reinhold Dauskardt1; 1Stanford University, Stanford, California; 2Cisco Systems, San Jose, California; 3GLOBALFOUNDRIES, Inc., Albany, California.
2:15 PM O8.3
Mechanical Stress Measurements in Cu Through-silicon via (TSV) Samples Using In Situ Synchrotron X-ray Microdiffraction for 3-D Integration. Arief S. Budiman1, Hae-A-Seul Shin2, Byoung-Joon Kim2, Sung-Hwan Hwang2, H. Son3, M. Suh3, Q. Chung3, K. Byun3, Nobumichi Tamura4, Martin Kunz4 and Young-Chang Joo2; 1Center for Integrated Nanotechnologies (CINT), Los Alamos National Laboratory (LANL), Los Alamos, New Mexico; 2Department of Materials Science and Engineering, Seoul National University (SNU), Seoul, Korea, Republic of; 3PKG Development Group, R&D Division, Hynix Semiconductor, Inc., Seoul, Korea, Republic of; 4Advanced Light Source (ALS), Lawrence Berkeley Nationa Laboratory(LBNL), Berkeley, California.
2:30 PM O8.4
Evolution of Damage during Thermal Cycling and Relation between Mechanical Stress and Microstructure in through Silicon via for 3D Integration. Hae-A-Seul Shin1, Arief Budiman2, Byoung-Joon Kim1, Sung-Hwan Hwang1, Ho-Young Son3, Min-Suk Suh3, Qwan-Ho Chung3, Kwang-Yoo Byun3, Nobumichi Tamura4, Martin Kunz4 and Young-Chang Joo1; 1Materials Science and Engineering, Seoul National University, Seoul, Korea, Republic of; 2Center for Integrated Nanotechnologies, Los Alamos National Laboratory, Los Alamos, New Mexico; 3Research & Development Division, Hynix Semiconductor Inc., Icheon, Korea, Republic of; 4Advanced Light Source (ALS), Lawrence Berkeley National Laboratory, Berkeley, California.
2:45 PM O8.5
Micro-bump Impact on Reliability and Performance in Through-silicon Via Stacks. Aditya P. Karmarkar1 and Xiaopeng Xu2; 1Synopsys (India) Private Limited, Hyderabad, Andhra Pradesh, India; 2Synopsys, Inc., Mountain View, California.
3:00 PM BREAK
3:30 PM O8.6
Out-of-Plane Catalyst Rotation in Metal-assisted Chemical Etching for Complex 3D Nano-scale to Micron-scale Manufacturing. Owen Hildreth and C. P. Wong; Georgia Institute of Technology, Atlanta, Georgia.
3:45 PM O8.7
Cu-contamination-induced Degradation of nMOSFET Characteristics in 3D-Integrated Device under Thermal and Electric Field Stress. Han-Wool Yeon1, Sung-Yup Jung1, Jungwoo Pyun2, Hyungwook Kim2, Dohyun Baek2 and Young-Chang Joo1; 1Department of Materials Science and Engineering, Seoul National University, Seoul, Korea, Republic of; 2Product Quality Assurance Team, Memory Division, Samsung Electronics Co., Hwasung City, Gyeonggi-Do, Korea, Republic of.
4:00 PM O8.8
ABstract Withdrawn
4:15 PM O8.9
Tailoring the Crystallographic Texture and Electrical Properties of Inkjet-printed Interconnects for Use in Microelectronics. Romain Cauchois1,2, Mohamed Saadaoui2, Karim Inal2, Beatrice Dubois-Bonvalot1 and Jean-Christophe Fidalgo1; 1Innovation and Manufacturing Technologies Department, Gemalto, Gemenos, France; 2Microelectronics Center of Provence, Ecole Nationale Supérieure des Mines de Saint-Etienne, Gardanne, France.
SESSION O9: Poster Session
Chairs: Geraud Dubois and Francesca Iacopi
Thursday Evening, April 28, 2011
8:00 PM
Salon Level (Marriott)
O9.1
Specific Contact Resistance of Ti/Ni/Au Ohmic Contacts on n-type SiC Membranes. N. F. Mohd Nasir, A. S. Holland, G. K. Reeves and P. W. Leech; Electrical and Computer Engineering, RMIT, Melbourne, Victoria, Australia.
O9.2
Abstract Withdrawn
O9.3
Abstract Withdrawn
O9.4
Electrical Properties and Magnetic Response of Co2Si1-xGex Nanowires. Chun-I Tsai1, Chiu-Yen Wang1, Jianshi Tang2, Kang L. Wang2 and Lih-Juann Chen1; 1Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu, Taiwan; 2Department of Electrical Engineering, University of California,, Los Angeles, California.
O9.5
Polymer Brush as a Facile Dielectric Surface Treatment for High-performance, Stable, Soluble Acene-based Transistors. Jeong Ho Cho, Department of Organic Materials and Fiber Engineering, Soongsil University, Seoul, Korea, Republic of.
O9.6
Immobilization of Nanoparticles for Fabrication of Surface Microstructures for Wide-viewing Liquid Crystal Displays. Seung Chul Park, Jun-Hee Na and Sin-Doo Lee; Electrical Engineering, Seoul National University, Seoul, Korea, Republic of.
O9.7
Formation of NiSi/Si/NiSi Nanowire Heterostructures by Nickel Nanoparticles. Chun-Wei Huang, Chun-Wen Wang, Cheng-Lun Hsin, Shih-Ying Yu and Wen-Wei Wu; Material Science and Engineering, National Chiao Tung University, Hsinchu, Taiwan.
O9.8
Patterning Organic Fluorescent Molecules with SAM Patterns. Qiong Wu, Juanyuan Hao, Weifeng Wang, Shoulei Shi and Nan Lu; Jilin University, Changchun, China.
O9.9
Monolithic Optical Sensor System Constructed with a Photodiode and a Si Nanowires-FET on a Plastic Substrate. Kiyeol Kwak1, Kyoungah Cho1 and Sangsig Kim1,2; 1Department of Electrical Engineering, Korea University, Seoul, Korea, Republic of; 2Department of Nanosemiconductor Engineering, Korea University, Seoul, Korea, Republic of.
O9.10
Room Temperature Ink-jet Printed, Carbon Nanotube Networks for High Frequency Flexible Electronics. Sebastien Pacchini1,2, Veronique Conedera1,2, Fabien Mesnilgrente1,2, Norbert Fabre1,2, Emmanuel -. Flahaut3, Fabio Coccetti1,2, Mircea Dragoman4 and Robert Plana1,2; 1CNRS-LAAS, Toulouse, Haute Garonne, France; 2Université de Toulouse, Toulouse, France; 3CIRIMAT, UMR CNRS, Toulouse, France; 4Univ. Bucharest, Toulouse, France.
O9.11
Advanced Electron-beam Lithography Process for Silicon Nanodot Arrays Fabrication with Terabit Density. Min-Hyun Lee, Hyun-Mi Kim, Seoung-Yong Cho, Kipil Lim and Ki-Bum Kim; Materials Science and Engineering, Seoul National University, Seoul, Korea, Republic of.
O9.12
Bond Coordination and Percolation in low-k SiC:H Thin Films as Determined by Fourier Transform Infrared Spectroscopy. Sean King1 and Jeff Bielefeld2; 1Portland Technology Development, Intel Corporation, Hillsboro, Oregon; 2Components Research, Intel Corporation, Hillsboro, Oregon.
O9.13
Nano-sized Induced Low Temperature Alloying in Binary and Ternary Noble Alloy Systems. Tzu-Hsuan Kao1, In-Gann Chen1, Jenn-Ming Song2 and Teng-Yuan Dong3; 1Materials Science and Engineering, National Cheng Kung University, Tainan, Taiwan; 2Materials Science and Engineering, National Dong Hwa University, Hualien, Taiwan; 3Chemistry, National Sun Yat-Sen University, Kaohsiung, Taiwan.
O9.14
Periodic Mesoporous Organosilica as Low-dielectric-constant Materials Part 2: Hydrophobicity. Wendong Wang1, Daniel Grozea2, Sandeep Kohli2, Douglas Perovic3 and Geoffrey Ozin1; 1Chemistry, University of Toronto, Toronto, Ontario, Canada; 2Materials Science and Engineering, University of Toronto, Toronto, Ontario, Canada; 3Chemistry, Colorado State University, Fort Collins, Colorado.
O9.15
Thermal Stability of Electro-plating Ag Film on Plasma-treated TiN Film. Chao-An Jong1, Wen-Fa Wu1, Chia-Wei Ho2 and Ren-Jei Chung2; 1National nano Device Laboratories, Hsinchu, Taiwan; 2Institute of Chemical Engineering, National Taipei University of Technology, Taipei, Taiwan.
O9.16
Ozone Treatment on Nanoporous Ultralow Dielectric Materials to Optimize Their Mechanical and Dielectrical Properties. Il-Yong Kang, Bo-Ra Shin and Hee-Woo Rhee; Chemical & Biomolecular Enginnering, Sogang university, Seoul, Korea, Republic of.
O9.17
Copper-based Nanowires for Advanced Interconnect Application. ChingYen Lin1 and Tri-Rung Yew2; 1Materials Science and Engineering, National Tsing Hua University, Hsinchu city, Taiwan; 2Materials Science and Engineering, National Tsing Hua University, Hsinchu city, Taiwan.
O9.18
Effects of Supercritical Fluid Treatments on Carbon Nanotubes while Ultra-sonication. Jin-Hyuk Choi and Young-Soo Seo; Nanotechnology and Advanced Materials Engineering, Sejong University, Seoul, Korea, Republic of.
O9.19
Novel Device Development Using the Confined Silicidation Effect. Jurriaan Schmitz1, Rob A. M. Wolters1,2 and Erik Faber1; 1MESA+ Institute for Nanotechnology, University of Twente, Enschede, Netherlands; 2NXP Semiconductors, Eindhoven, Netherlands.
O9.20
High Oxide-to-poly Si Removal Selectivity Ceria Slurry for Poly Si Stop Chemical Mechanical Planarization (CMP) in Multi-level Cell (MLC) NAND Flash Memory below 51nm. Gwang Seob Yoon1, Ye-Hwan Kim2 and Ungyu Paik3,1,2; 1Department of Nanoscale Semiconductor Engineering, Hanyang University, Seoul, Korea, Republic of; 2Department of Materials Science & Engineering, Hanyang University, Seoul, Korea, Republic of; 3WCU Department of Energy Engineering, Hanyang University, Seoul, Korea, Republic of.
O9.21
Consecutive Sputter-deposition of Cu alloy/Cu Alloy Oxide Structures from Single Cu Alloy Target, and Its Application as Source/Drain Electrodes for a-Si:H TFTs. Junho Lee1, Chiyoung Lee1, Jaegab Lee1, Heejung Yang2, Wonjoon Ho2, Juyoung Jeong2 and Do-Hoi Koo2; 1School of Advanced Materials Engineering, Kookmin Univ, Seoul, Korea, Republic of; 2Panel Defect Engineering Technology Team, LG Display Co.Ltd., Seoul, Korea, Republic of.
O9.22
Photovoltaic and Electrical Properties of Carbon Nanotube Monolayer of Langmuir-Blodgett Films. Azin Fahimi, Chiara Bo, Izabela Jurewicz, David Faux and Alan Dalton; Physics, University of Surrey, Sutton, United Kingdom.
O9.23
Abstract Withdrawn
O9.24
ALD of Metallic Cobalt Films Using a Metal Carbonyl Precursor and Dimethylhydrazine. Jinhee Kwon1, Mark Saly2, Ravindra K. Kanjolia2 and Yves J. Chabal1; 1the University of Texas at Dallas, Richardson, Texas; 2SAFC, Haverhill, Massachusetts.
O9.25
Effects of Ti Precursors and Gas Reactants on TiN Plasma Enhanced Atomic Layer Deposition for Next Generation Capacitor Electrode Applications. Sunghyeon Park1,2, Taejoo Park1, Prasanna Sivasubramani1, Jiyoung Kim1, Kyungjoon Kim2, Young Im2, Changhee Ko3 and Julien Gatineau3; 1Department of Materials Science & Engineering, University of Texas at Dallas, Richardson, Texas; 2K.C.Tech Co., Ltd., Anseong-si, Gyeonggi-do, Korea, Republic of; 3K.K. Air Liquide Laboratories, Tsukuba, Ibaraki, Japan.
O9.26
Fabrication of Ultra Low-k Dielectric Materials: A Combination of Mesoporous Silica and Airgap Structures. Nicholas R. Hendricks, Kenneth R. Carter and James J. Watkins; Polymer Science and Engineering, University of Massachusetts Amherst, Amherst, Massachusetts.
O9.27
Development of Electrochemical Copper Deposition Screening Methodologies for Next Generation Additive Selection. Kevin Ryan1, Kathleen Dunn1 and Jobert van Eisden2; 1College of Nanoscale Science and Engineering, SUNY Albany, Albany, New York; 2Atotech USA, Albany, New York.
O9.28
Electron-beam Lithography for Magnetic Bit Patterned Media Recording Suitable for Areal Densities Above 1 Terabit/in2. Beomseop Lee1, Nissim Amos1, Sakhrat Khizroev1 and Dmitri Litvinov2; 1EE, UC-Riverside, Riverside, California; 2University of Houston, Houston, Texas.
SESSION O10: Emerging Technologies
Chairs: Sean King and Shinichi Ogawa
Friday Morning, April 29, 2011
Room 3000 (Moscone West)
8:45 AM *O10.1
Optical Interconnect Technologies Based on Silicon Photonics. Wim Bogaerts1, Dries Van Thourhout1, Philippe Absil2, Shankar Kumar Selvaraja1, Pieter Dumon1, Hui Yu1, Joris Van Campenhout2, Thijs Spuessens1 and Roel Baets1; 1Information Technology, imec - Ghent University, Gent, Belgium; 2Process Technology, imec v.z.w., Leuven, Belgium.
9:15 AM O10.2
Vertically Aligned Carbon Nanotubes as Flip Chip Interconnects. Dunlin Tan and Beng Kang Tay; School of Electrical & Electronic Engineering, Nanyang Technological University, Singapore, Singapore.
9:30 AM O10.3
Silicide Materials for Aligned Carbon Nanotube Synthesis in Interconnect Applications. Can Zhang, Feng Yan, Guofang Zhong, Bernhard C. Bayer, Bingan Chen, Stephan Hofmann and John Robertson; University of Cambridge, Cambridge, United Kingdom.
9:45 AM O10.4
Comparison of Electrical Characteristics of Multilayer Graphene and Multiwalled Carbon Nanotubes for Interconnect Applications. Neha Kulshrestha1, Abhishek Misra2, Reeti Bajpai1, Kiran S. Hazra1, Soumyendu Roy1 and Devi Shankar Misra1; 1Physics, Indian Institute Of Technology Bombay, Mumbai, 400076, India; 2Electrical Engineering, Indian Institute Of Technology Bombay, Mumbai, Maharashtra, India.
10:00 AM BREAK
10:30 AM O10.5
Emerging Materials for Nanoscale Interconnects. Cengiz S. Ozkan, Ali Guvenc, Jian Lin, Miro Penchev, Jiebin Zhong and Mihri Ozkan; Mechanical Engineering, University of California at Riverside, Riverside, California.
10:45 AM O10.6
Stretchable Silicon Integrated Circuits with Graphene Interconnects. Won Ho Lee, Material Science and Engineering, Sungkyunkwan University, Suwon, Korea, Republic of.
11:00 AM O10.7
E-beam Deposited Tungsten Contacts for Nanocarbon Interconnect Test Devices. Nobuhiko Kanzaki, Shusaku Maeda, Patrick Whilhite, Toshishige Yamada and Cary Y. Yang; Santa Clara Univ., Santa Clara, California.
11:15 AM O10.8
A Simple Patterning Method of Solution-Processed ZnO Thin Film for the Flexible Transparent Thin Film Transistor. Kyongjun Kim, Si Yoon Park, Seung-Chul Yew, Ji hyun Lee, Sungyun Chung, Hanju Jo and Youn Sang Kim; Department of Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Suwon-si, Gyeonggi-do, Korea, Republic of.
Back To Top