Program - Symposium D: Nanocontacts–Emerging Materials and Processing for Ohmicity and Rectification

The nonlinear Poisson’s equation along with the electron and hole continuity equations are simultaneously solved by fixed point iterative method in one dimension to obtain the potential inside the semiconductor bulk near the metal semiconductor interface. After potential calculation the electron and hole current densities are calculated to obtain total current at various forward bias. Simulations were performed for different inverse layer thickness and doping concentrations at different temperatures. The barrier height (BH) and ideality factor obtained by fitting of simulated current voltage (I-V) data into thermionic emission diffusion (TED) current equation shows that the BH increases initially with the increase in inverse layer thickness and then attains an almost constant value beyond certain thickness. On increasing inverse layer doing concentration the BH starts increasing at low thickness and becomes constant thereafter. Thus the BH attains maximum saturation value at relatively lower thickness for highly doped surface layer than for the less doped surface layer. However, the maximum saturation value of BH with large inverse surface layer is same for all doping concentrations. The variation of derived ideality factor of the diode with inverse surface layer thickness was also studied. The ideality factor start increasing with increase in inverse layer thickness and attains a maximum value at a particular thickness and thereafter it starts decreasing and finally approach almost unity for larger inverse layer thicknesses at which the barrier height attains maximum saturation value. The maximum ideality factor occurs at thickness for which the barrier height values starts rising. It is observed from the inverse layer thickness and doping concentration dependence of BH and ideality factor that for large inverse layer thickness the BH attains a maximum value with unity ideality factor. Thus depending on the layer thickness and its doping concentration there are two regimes, namely, the non-ideal regime corresponding to lesser inverse layer thickness and/or its doping concentration and the ideal regime corresponding to large inverse layer thickness and/or its doping concentration. The temperature dependence of the BH and ideality factor of the Schottky diodes with inverse doped surface layer were also studied by numerical simulation at low temperatures. It is observed that for diode in non-ideal regime the BH found to decrease and ideality factor increases with decrease in temperature. However, in ideal regime the Schottky diode BH increases linearly with decrease in temperature with unity ideality factor at all temperatures. The overall barrier enhancement as a function of inverse layer thickness was found to occur from 0.71V to 0.92V. Further barrier height enhancement as a function of temperature is observed for 120nm thickness for which it is found to increase from 0.92V at 300K to 1.18V at 40K with decrease in temperature.

Investigation of low-frequency noise in Schottky barriers based nanoscale Field-effect Transistors (SB-FETs) is of prime importance due to its large amplitude in emerging bottom-up devices. In addition, noise can give additional information on the charge transport mechanisms. Here, we study the 1/f noise in nanoscale silicon-on-insulator SB-FETs which we consider as a test bed because of an excellent process control of the gate oxide interface and flexible engineering to control SB height Φ through dopant segregation. First, we propose an analytic model for 1/f noise in SB-diodes and SB-FETs. We consider that noise is related to a voltage fluctuation across the SB, which can be obtained analytically from Richardson expression for thermoionic emission. The contribution of two fluctuators in series (SB and a serial resistance or FET channel) is then considered to get an equation valid for low SB heights. Second, SB diodes and SB-FETs were studied through DC current, 1/f noise and shot noise measurements. Barrier heights as low as 80 and 50 meV (for N- and P- type respectively and estimated independently through temperature dependence measurements) are achieved using dopant segregation. We show that even for very small Φ<0.1 eV, the contribution from the SB to the noise is not negligible even if the current is dominated by the channel resistance. In addition, there is an exponential decay of normalized noise with Vd, which is in perfect agreement with the proposed model. Transistor channel length Lg has been varied from 30 nm to 1 µm. Noise dependence with Lg at Vd = 0.2 V is very different for N- and P- type segregated SB-FETs (independent on Lg and following 1/Lg, respectively). 50 meV can be considered as a maximum barrier height for low impact of SB on the noise when Vd >> 0 V. Tuning Φ by technological means such as dopant segregation tends to reduce the noise amplitude, although additional generation-recombination and trapping noise is noticed at small Vd for P-type devices. In agreement with SOI-SBFETs experimental results, the proposed analytic model can be considered for any diffusive SB FET including nanowires, graphene sheets and carbon nanotubes devices. It could be used either for noise amplitude comparison, interfacial quality and SB height evaluation. N.Clement, G. Larrieu and E. Dubois, « Low-Frequency noise in Schottky barriers based Nanoscale Field-Effect Transistors » IEEE Trans.El.Dev., in press. TED-.2011.2169676

Molecular spintronics, the combination of chemistry potential to the spin degree of freedom provided by spintronics, is considered to be more than an alternative to conventional spintronics with inorganic materials. Unconventional properties and strong potentialities offered by the flexibility, chemical engineering and low production costs of molecules, add to the opportunity that spin lifetime could be enhanced by several orders of magnitude compared with inorganic materials. Very recently it has been highlighted that the metal/molecule hybridization could strongly influence interfacial spin properties going from spin polarization enhancement to its sign control in spintronics devices [1]. A very promising direction is going towards new spintronics devices based on tailored thin organic layers such as SAMs, ultrathin polymerand organic semiconductor films. However, one of the major obstacles to be faced is the possible presence of topographic heterogeneities and electrical defects in the organic barrier. This limits the reliability and reproducibility of the devices and results in a lack of control of the metal-molecule interfaces eventually hampering the proper study of transport in wide-area devices. In this contest nanocontacts become indispensable to allow a deeper investigation on the metal-molecule interface properties. We developed the idea of nanoindentation lithography as a highly versatile and easily adaptable technique allowing the realization of nanojunctions based on the different organic barriers. During nanoindentation a conducting AFM tip is used to notch a nanohole into a previously deposited mask resist. The originality of the process relies on the real-time monitoring of the indentation process through a tip–sample resistance measurement which allows controlling the indentation depth and the contact area with sub-nm precision [2]. Different types of Ferromagnet/Organic/Ferromagnet spintronics nanodevices can be realized: ones where the nanocontact is first elaborated, enlarged by the exposition of the sample to an additional plasma treatment and then filled with the desired organic layer; others where the nanohole is directly dug through the masking resist and into the organics leaving just a thin layer. The top electrode is finally deposited onto the organic layer to complete the device. The nanometric size of the contact (ø=10nm) reduces heterogeneities and allows us to explore the local properties of the junction. We will demonstrate the versatility and potential of our technique showing transport characterization for three types of organic tunnel junctions: thin polymer films, aliphathic SAMs and small molecules organic semiconductors. We will especially focus on SAMs based devices for which a significant TMR effect is measured and found to be exceptionally robust with bias voltage up to 2V. M.G. thanks EU-FP7 HINTS project. [1] C. Barraud et al.Nature Phys.2010,6,615 [2] K. Bouzehouane et al.Nano Lett.2003,3,1599

Two types of interfaces can be formed between metals and graphene depending on the strength of the metal-graphene interaction: weak (metal physisorption) and strong (metal chemisorption) interfaces.1,2 “Physisorption” interfaces (e.g., with Al, Ag, Cu, Ir, Pt and Au) are characterized by a larger metal-carbon distance (>3 Å) with some charge transfer between metal and graphene (i.e. doping of graphene) that maintains its overall π-band dispersion. “Chemisorption” interfaces (e.g. with Ni, Co, Pd, and Ti) are characterized by a smaller metal-carbon distance (<2.5 Å) and strong orbital hybridization between metal-d and carbon-pz orbitals, resulting in the destruction of the graphene’s π-band dispersion around the Dirac point. Consequently, metals like Ni, Co, Pd, and Ti are commonly used as electrode materials because they form stable contacts due to their strong chemical interaction with graphene, although the graphene electronic properties are essentially destroyed. The issue therefore is to keep graphene’s intrinsic π bandstructure by using weakly interacting metals while enhancing the interface stability. In this work, we propose to use sandwiched metal/graphene/metal structures, using weakly interacting metals. The structures thus fabricated are characterized mainly by Raman and x-ray photoelectron spectroscopy (XPS). Large graphene sheets are grown by chemical vapor deposition (CVD) of gaseous methane on copper foils.3 Both Raman and XPS are used to identify the doping level and interface binding energy change before and after the formation of the sandwich structures. These structures make it possible not only to adjust the doping levels in graphene by selecting a combination of appropriate metals, but also to form stable contacts with graphene with metal films on top and bottom. Density functional theory (DFT) calculations are carried out to provide an atomic level understanding of the electronic properties of sandwiched metal-graphene-metal structures. We find that the increased interface binding strength of sandwiched structures arises from an increased interface electron repulsion effect by metal contacts at both sides of graphene. This work suggests that sandwiched structures provide a means to optimize the metal-graphene contact for device applications. [1] Giovannetti et al. Phys. Rev. Lett. 101, 026803 (2008). [2] Gong et al. J. Appl. Phys. 108, 123711 (2010). [3] Li, et al. Science 324, 1312-1314 (2009).

For modern third generation solar cells and optoelectronic devices, conventional contacts made of metallic and alloys can no longer satisfy device requirements in the nanoscale range. As the thickness is decreased, ultra-thin metal films become discontinuous, thus their optical and electrical properties drastically change and so does their functionality. The coverage reduction leads to island formation and local microstructure variations. Therefore, the understanding of optical and electrical properties of metallic nano-layers thinner than a critical thickness is extremely important. We are reporting on layers of high purity Al and Ag sputter-deposited in high vacuum chamber on prime mirror polished silicon wafers. Emphasis are put on the properties of sputtered Al and Ag films with thickness in the coalescence range. Sputtered Al, with aimed uniform film thinner than 10 nm, showed by FE-SEM scattered fragments on the silicon surface. The formation of nano-sized Al islands starts at film thicknesses above 10 nm, which defines a critical thickness for coalescence of sputtered nano-particles. Depth profile of a 38nm thick Al layer exhibits roughness higher than that of the initial silicon wafer, which suggests a continuous involvement of Al nanoparticles during the film growth, even after full coalescence. Al film reflectance appeared to decreases with the thickness to reach its minimum at 50nm, then increases and peaks at 80 nm, and ultimately decays linearly as the film thickness increases. We believe that reduction of the reflectance at early stages of film formation is due to an increased scattering of the incident light by small islands formed at the initial sputtering stage. As the deposition proceeds, the reflectance increases and reaches its maximum when the inter-island regions are totally filled. With further deposition, the reflectance slowly decreases. A strong dependence of ultra-thin Al film electrical resistivity on thickness was found. The resistivity dramatically increases as the thickness (<50nm) decreases due to the discontinuity of the grown Al islands/grains. Non-conventional conduction mode occurs between those metallic nano-particles to enable current transmission from one islands to its neighbors. Beyond 50 nm film thickness, the resistivity becomes almost stable with a value of 6.1×10^-8 Ω-m, which is still higher than the resistivity of the bulk Al (i.e., 2.8×10^-8 Ω-m). The change in the conduction mode is suggested to be a determining factor for the observed conductivity transition. We found that discontinuous Ag layer produces strong fluorescence due to an oxidized phase. AFM imaging of annealed Ag ultra-thin layers showed islands formed on the silicon surface, these appeared well separated from each other. Such nanosized features offer the potential of absorption enhancement via surface plasmon modes. Raman spectroscopy has shown Ag related lines much higher than that of the Si line.

Recent observations of chemically induced hot electron flow over Schottky barriers in planar metal-semiconductor nanostructures provide interesting possibilities for electrolyte-free conversion of chemical energy into electricity and ultra-fast biomimetic sensing applications. Meanwhile, the short-lived nature of the hot electrons in metals imposes special requirements for the Schottky contact morphology, material selection, physical and chemical properties explained in this presentation. Thermal and chemical resilience of the Schottky contact properties and electrical continuity of the wide-area nanometer thickness cathodes play an important role for the potential practical applications. An efficient hot electron harvester must utilize a wide bandgap semiconductor anode, and therefore a fabrication procedure is required to produce both a sharp barrier layer and a diffusive Ohmic contact layer on the same semiconducting wafer; that alone imposes a remarkable challenge. The presentation involves discussion of the relevant theoretical guidelines, practical methods and techniques leading for high quality Pt/GaP/Sn, Pt/SiC/Ag, Rh/SiC/Ag and other Schottky nanodiodes, and prospects of their practical utilization.

Germanium (Ge) is one of possible candidates to replace silicon (Si) as the channel material in complementally metal-oxide-semiconductor (CMOS) technology due to its high electron and hole mobility.[1] However, Fermi-level pining (FLP) effect at metal/Ge interfaces is a critical issue, disturbing the development of high-performance CMOS devices with metallic source and drain contacts.[2] In order to solve this issue, it is important to understand the origin of FLP at metal/Ge junctions. Although it has so far been considered that the origin of FLP is metal induced gap states (MIGSs)[3], we have obtained some results which can not be explained only by MIGSs.[4]
In this paper, we fabricated Fe₃Si/Ge(111) Schottky diodes with atomically matched interfaces with a size (S) of ~10⁶ and ~1 μm², and measured their electrical properties at low temperatures. We found that the diodes with S = ~1 μm² show the two different current-voltage (I-V) characteristics at 100 K, i.e., Ohmic behavior and rectifying behavior. On the other hand, almost all diodes with S = ~10⁶ μm² showed nearly Ohmic behavior at 100 K. This S dependence cannot be explained by MIGSs. Assuming Poisson distribution, we can regard the S dependence as a result of the influence of the number of defects at the interface between Fe₃Si and Ge(111). In short, we infer that the number of the interfacial defects depends on S. When S is ~10⁶ μm², there are some interfacial defects at the Fe₃Si/Ge(111) interface. When S is reduced to ~1 μm², we can encounter two different interfaces, the strong contribution with defects and almost no contribution with ones. From these considerations, we can also infer that the Ohmic and rectifying behavior are arising from the defective and high-quality interfaces, respectively. Therefore, FLP at metal/Ge interfaces can be explained by the extrinsic mechanism.[5] For discussing the formation of the Schottky barrier at metal/Ge interfaces, one should distinguish between intrinsic and extrinsic mechanisms.
K.K and S.Y. acknowledge JSPS Research Fellowships for Young Scientists. This work was partly supported by Industrial Technology Research Grant Program from NEDO and Grant-in-Aid for Young Scientists (A) from JSPS. [1] C. H. Lee et al., IEDM Tech. Dig., 416 (2010). [2] A. Dimoulas, A. Toriumi, and S. E. Mohney, MRS bulletin 34, 522 (2009). [3] T. Nishimura et al., Appl. Phys. Exp. 1, 051406 (2008). [4] K. Yamane et al., Appl. Phys. Lett. 96, 162104 (2010). [5] K. Kasahara et al., Phys. Rev. B (in press).

The four-point resistance, R, of electrodeposited gold nanowires was measured in situ through a laser zone annealing process. A stage and sample attached to a piezoelectric motor translated the nanowire over a 532nm, confocal laser spot at rates as low as 7nm/s. These nanowires were synthesized at height of 20nm and at varying widths (from 76nm to 274nm) using an electrodeposition method known as Lithographically Patterned Nanowire Electrodeposition (LPNE). The resulting resistivity of one such wire measured a reduction of 60% from its initial resistance of 2.5x10-7Ωm to 1.1x10-7Ωm. Transmission electron microscopy (TEM) was used to analyze the change in the internal grain structure and measure the large increase in the in-plane grain diameters (from 27±14nm as-grown state to 90±31nm post annealed condition). The average grain growth diameter was limited to the wire width as the wire neared a complete bamboo structure. The sharp heating profile of the concentrated laser spot could be observed in TEM micrographs as a distinct boundary in the grain structure between annealed and as-grown sections. Theoretical values of resistivities were calculated with grain diameters using analytical models primarily considering grain boundary and surface scattering. The agreement between experimental results and these calculations illustrated that significant contribution to the enhanced conductivity was primarily the reduction of grain boundary density. The improved performance was obtained without suffering instability along the wire, namely grain boundary grooving or wire discontinuity observed in bulk thermal annealing. This zone annealing technique is of interest in improving the microstructure and conductivity of interconnects without the introduction of high thermal energy.

ZnO nanowires (NWs) synthesized by bottom-up method can be used for electronic devices such as field effect transistors, light emitting diodes, and sensors. Conventional methods for the alignment and integration of NWs have been dielectrophoresis, an external magnetic-field and so on. However, when they were aligned onto the electrodes, mechanical and electrical contacts between NWs and electrodes were not stable due to incomplete bonding and weak adhesion based on Van der Waals force. Therefore, post-processes such as focused ion beam deposition or selective electrodeposition were needed to enhance the mechanical and electrical contacts, which increases the complexity and cost of manufacturing process. In this paper, we present a novel process based on two-step transfer printing of nanowires on the metal electrodes with low melting temperatures, which allows robust bonding of nanowires onto metal electrodes without the need of additional bonding processes. The procedure of thermocompression bonding is as follows: In the first transfer step, ZnO NWs randomly grown on Si substrate by CVD method were transferred to intermediate Si/SiO2 substrate. In this process, we used contact printing method where normal and shear forces were applied to the intermediate substrate to form parallelly aligned ZnO NWs. In the second transfer step, parallelly aligned ZnO NWs on intermediate substrate was pressed against target substrate with metal electrodes by thermocompression at P=5 bar and T=100°C for 5 minutes. After intermediate substrate was removed from the target substrate, we could observe that ZnO NWs were successfully aligned and formed a robust bonding on metal electrodes. We used double layer metal (Au/In and Cu/In) having low melting temperature because they are softened at elevated temperature (~100°C). ZnO NWs can be easily embedded into metal electrodes with low pressure (~5 bar) since the metal electrodes are mechanically soft. Consequently, ZnO NWs and metal electrodes are bonded with high mechanical strength. Mechanical strength of ZnO NW – metal electrode bonding was measured by applying lateral force microscopy (LFM) at center of ZnO NWs. It could be observed that ZnO NWs were broken before the failure of NW-electrode joints, proving the mechanical robustness of bonding. We could also find that the bonding between metal electrodes and ZnO NWs form a stable Ohmic contact property from electrical measurement. In summary, we demonstrated a novel method for the alignment and robust bonding of NWs onto metal electrodes by using two-step transfer printing technique. Mechanically robust bonding and stable ohmic contact between NWs and metal electrodes could be achieved by this high-speed and low-temperature process. We believe that this method will be very useful for the large-area fabrication of NW-based electrical devices such as field effect transistors, light emitting diodes, and sensors.

Introducing organic molecules in electronics is limited by the ability to connect them electrically to the outside world. This involves the formation of top metal overlayers on the organic surfaces. This is not a trivial task because most known methods to make such contacts are likely to damage the molecules [1]. Understanding the atomic and molecular level interaction of metal atoms with organic surfaces is becoming increasingly important as the number of applications involving metal−organic interfaces grows. The design of silicon/alkyl layer/metal junctions for the formation of optimal top metal contacts requires the knowledge of the mechanistic and energetic aspects of the interactions of metal atoms with the modified surface. This involves a) the interaction of the metal with the terminal groups of the organic layer, b) the diffusion of metal atoms through the organic layer and c) the reactions of metal atoms with the silicon surface atoms. The diffusion through the monolayer and the metal catalyzed breakage of Si−C bonds must be avoided to obtain high quality junctions. In this work we developed a complete mechanistic and energetic picture of all the processes involved in the formation of silicon/alkyl layer/metal junctions. Our results are in agreement with the available experimental observations and provide detailed information on the reaction pathways and energy barriers involved in the formation of the junction. We performed a comprehensive density functional theory investigation to identity the reaction pathways of all the processes involved [2]. The diffusion of gold atoms through the alkyl layer was compared for two systems: compact alkyl monolayers on Si(111) and compact alkanethiol monolayers on Au(111). In the absence of a reactive terminal group, gold atoms penetrate through the monolayers with small energy barriers. However, the presence of thiol terminal groups introduces a high energy barrier which blocks the diffusion of metals into the monolayer. On the alkylated Si(111) surface, the diffusion barriers increase in the order Ag < Au < Cu and correlate with the stability of metal−thiolate complexes whereas the barriers for the formation of metal silicides increase in the order Cu < Au < Ag in correlation with the increasing metallic radii. The reactivity of gold clusters with functionalized Si(111) surfaces was also investigated. Metal silicide formation can only be avoided by a compact monolayer terminated by a reactive functional group. The mechanistic and energetic picture obtained in this work contributes to understand the factors that influence the quality of top metal contacts during the formation of silicon/organic layer/metal junctions. [1] H. Haick and D. Cahen, Prog. Surf. Sci., 2008, 83, 217-261 [2] M. F. Juarez, F. A. Soria, E. M. Patrito, P. Paredes-Olivera. Phys. Chem. Chem. Phys. 2011, DOI: 10.1039/c1cp22360g

TiO₂ is the most intensively investigated class of materials for the applications of photocatalysts' support and photoanodes of solar cells and water splitting. Among them, nanotubular structures of TiO₂ are even more interesting due to their 1 dimensional morphology as a direct pathway of the photo-induced charge carriers. For the applications, local characterizations of the nanometer scale contacts and charge separation and transport behavior through 1D nanomaterials are of paramount importance. Here, we present nanoscale electrical as well as photoelectric properties of TiO₂ nanotubes (TNTs) by the modified scanning probe microscopy (SPM). SPM is an ideal tool for the local electric characterization. It could be addressed the phenomena of the trapped and/or injected charges on the nanoscale functional materials. In this presentation, two examples are to be discussed: 1) Light-induced charge separation on nanostructures of Au/TiO₂ nanotubes(TNTs) characterized by modified electrostatic force microscopy (EFM), and 2) Nanometer scale Schottky contact at anatase TiO₂ nanotubes/Pt interfaces. Schottky interfaces at both distal ends of the nanotube, the ideality factor and Schottky barrier height are obtained based on thermionic emission theory, revealing the enhanced tunneling. The reduced effective Schottky barrier heights are in the range of 0.28 to 0.43 eV.

Nanoelectromechanical systems (NEMS) switches have been identified by the International Technology Roadmap for Semiconductors as a possible "beyond CMOS" technology. However, the reliability of the contact interface is currently a key challenge for the commercialization of these devices. The adhesiveness of conventional metallic contact materials in combination with the nanoscale dimensions of NEMS switches results in failure through permanent adhesion of the contact interface. In addition, many non-adhesive contact materials are reactive and can form insulating tribolayers after many switching cycles. This motivates the need for contact materials that are highly conductive, chemically inert, minimally adhesive, and amenable to CMOS fabrication processes. Platinum silicide is a promising candidate material that may satisfy these complex demands. In this work, we show for the first time that the surface chemical composition of platinum silicide (PtxSi) formed through amorphous silicon (a-Si) and platinum (Pt) diffusion may be tuned by changing the amount of a-Si available during silicidation. This gives direct control over the selection of highly conductive and chemically inert Pt-rich variants, or low-adhesion Si-rich forms. PtxSi is a promising next-generation switch contact material because it possesses metallic conductivity, is compatible with current CMOS fabrication, is chemically inert, and can be used for the etchant-free in-situ release of freestanding NEMS switches. However, successful integration of platinum silicide contacts into many NEMS switch architectures requires the use of a-Si rather than the more heavily studied single-crystalline silicon-based (sc-Si) PtxSi. Little is known about the growth sequence, growth kinetics, growth rates, and resulting chemical composition of the PtxSi formed using a-Si. In the present study, PtxSi was synthesized by annealing a 40-nm a-Si layer on a 70-nm Pt layer and a 100-nm Pt layer on a sc-Si wafer using both rapid thermal (RTA) and high vacuum (HV) annealing. Diffusion of Pt from the a-Si/Pt bilayer into the sc-Si carrier wafer was prevented through the use of an aluminum nitride diffusion barrier - a topology similar to that employed in some current micro/nano-scale switches. Differences in the formation behavior of the resulting silicides were then characterized using in-situ and ex-situ X-ray photoelectron spectroscopy. a-Si was shown to form a Pt-rich silicide (Pt3Si) in comparison to the PtSi and Pt2Si stoichiometries usually found in sc-Si/Pt silicidation. This Pt-rich stoichiometry is believed to be the result of using a thin a-Si layer - essentially robbing the silicidation process of sufficient Si for full conversion to Pt2Si or PtSi. This suggests that the thickness of thin a-Si on Pt has a direct impact on the stoichiometry and may be tuned to confer properties associated with either Pt-rich (high conductivity and inertness) or Si-rich (low adhesion) compositions.

Electron-beam-induced deposition (EBID) of tungsten (W) has been demonstrated to yield substantial improvement in the contact resistance between carbon nanomaterials and their metal electrodes [1]. EBID could provide a lower-cost alternative to Ion-Beam Induced Deposition (IBID) schemes such as focus-ion beam (FIB), and has the ability to produce structures with high positional accuracy. Additionally, FIB has the risk of damaging the on-chip devices because of its high beam energy, resulting in the implantation of gallium from the ion beam which could lead to alteration of device properties. Therefore, we have developed an EBID technique for W deposition using a variable-pressure scanning electron microscope (VP-SEM). In this technique, the source gas (WF6) is delivered via a specially designed gas injection system (GIS) [2] and guided by the focused electron beam to yield deposition on a selected target at a lower energy than FIB. We have performed surface analysis of the deposited areas using energy-dispersive x-ray spectroscopy (EDS), and compared them with depositions performed by FIB using W(CO)6 on similar structures. Additionally, in order to assess the viability of this technique, we have performed a series of experiments to determine the localization of W in the area surrounding the deposits. We find that for EBID, the W content in the deposited area is generally higher than that for IBID. A detailed analysis of W composition between the electrode contacts reveals that the EBID depositions are fairly localized at the electrodes, though there is evidence that trace amounts of W are present along the length of the nanocarbon interconnect. This small lateral spread of W in the EBID is probably a result of secondary electron induced deposition, or through other migration paths such as atomic W diffusion subsequent to dissociation from the WF6 molecule. The extent of the impact of this lateral spread of W deposits on the electrical properties of the nanocarbon interconnects will be discussed. [1] Shusaku Maeda, Patrick Wilhite, Nobuhiko Kanzaki, Toshishige Yamada, and C. Y. Yang, AIP Advances 1, 022102 (2011). [2] D. C. Joy and P. D. Rack, Microscopy and Microanalysis 11, 816 (2005).

Rapid progress has recently been made in the quantitative analysis of electrical conductance of metal/molecule/metal junctions through the development of a mechanically controllable break junction (MCBJ) method. However, experimental studies on the single molecular junctions have been focused on a charge transport and have not made use of spin degree of freedom. Theoretical studies have predicted that single molecule is useful for the transport and generation of spin-polarized electrical current [1]. Recently Schmaus et al. have reported that the magnetoresistance (MR) of single molecular junctions reaches several tens of % using scanning tunneling microscope [2]. We also have succeeded in measuring the MR of the single molecular junctions by using the MCBJ method [3]. In this study we found that molecular junctions showed anomalous giant MR (GMR) at room temperature. We used A thin Si plate as a substrate. Au/Cr electrodes were prepared by conventional photolithography. Au and Ni layers were prepared by electrochemical deposition on Au/Cr electrodes to form a contact of Ni electrodes. A droplet of mesitylene containing 1 mM benzenedithiol (BDT) was then placed on the Ni electrodes to modify the electrodes. The Ni contact is broken by bending the substrate. When the molecular junction is formed, plateau is observed in the current transient. We conducted MR measurement of single molecular junctions by applying external magnetic field in Ar atmosphere at room temperature. When the magnetic field was changed from H = -2000 Oe to H = 2000 Oe, the resistance reached maximum around H = 300 Oe. MR of Ni/BDT/Ni junctions. The typical MR ratio was tens of %. Since the tunnel junction without the molecule showed only a few % of negative MR, we can attribute the origin of MR to the Ni/BDT/Ni junctions. [1] L. Bogani and W. Wernsdorfer, Nature Mater. 7, 179 (2008). [2] S. Schmaus et al., Nat. Nanotechnol. 6, 185 (2011). [3] R. Yamada et al., Appl. Phys. Lett. 98, 053110 (2011).

Silicides have been widely studied and used for the low-resistance contacts, gate electrodes and local interconnections in metal–oxide–semiconductor field effect transistors (MOSFET) for decades. Although nickel silicide (NiSi) offers lower resistivity, the greater thermodynamic stability of cobalt disilicide (CoSi2) makes it more suitable for structures which high processing temperatures are needed. Traditionally, CoSi2 has been prepared by annealing of sputtered or evaporated cobalt films on silicon substrates. Industry is moving towards 3D transistors to continue the pace of technology advancement, however, cobalt films made by physical vapor deposition methods (sputtering or evaporation) are non-conformal over the complex 3D architectures and thus fail to meet the challenge. In this presentation, we will demonstrate the formation of CoSi2 by in-situ annealing of highly-conformal cobalt nitride films inside holes with aspect ratios over 30 to 1. The cobalt nitride films are prepared by chemical vapor deposition (CVD) using a cobalt amidinate precursor and a reactant mixture of NH3 and H2 at low substrate temperatures. We studied the reaction of cobalt nitride films with silicon under different annealing conditions. Morphological stability and interfacial smoothness are crucial for application of cobalt disilicide as a material for contacts, gates or local interconnects. We developed a method to measure the roughness of CoSi2/Si interfaces by selective backside etching followed by atomic force microscopy. Using this method, we optimized the deposition and processing conditions to make smooth interfaces between CoSi2 and various crystalline orientations of silicon.

Nanowires are attracting a growing interest in the semiconductor industry due to their numerous potential applications including field-effect transistors, elementary logic gates and light-emitting diodes. It has also been demonstrated that nanowires could be used as Josephson elements in superconducting devices. Indium arsenide (InAs) nanowires are of special interest as InAs can form Schottky-barrier-free contacts with metals. However a native oxide layer is known to form easily on InAs nanowires and thus must be removed prior to metallization to achieve highly transparent contacts. While most of the studies involving InAs nanowires report the use of a wet etching process to treat the nanowires before deposition of the contacts, there have been few reports of the sputter-cleaning process and no quantitative comparison between the two techniques. Here we present a systematic comparative study of the contact resistance between InAs nanowires and metals following the use of (a) a wet etching process or (b) a sputter cleaning process. The InAs nanowires are grown via molecular beam epitaxy on Si (111) substrates without the use of metal catalysts. They have a diameter between 50 and 100nm and an average length of 3µm. HRTEM measurements show that the structure of the nanowires is a mixture of hexagonal and cubic phases. The metallic contacts are attached to the nanowires by using an electron-beam lithography process. From field-effect measurements, we have established that the InAs nanowires are n-type and that their mobility at room temperature lies between 100cm² V^-1s^-1 and 600cm² V^-1s^-1. Before the contact metallization, the InAs nanowires are treated either by wet etching or by argon milling. In the wet etching process, the contact area of the InAs nanowires is etched and passivated by an ammonium polysulfide solution. Different dilution levels of the solution and exposure times are investigated. In the sputter cleaning process, the InAs nanowires are milled by argon-ion sputtering with a voltage of 200V. Nanowires treated by either of these two processes exhibit lower contact resistances by up to three orders of magnitude compared with untreated nanowires . While both processes exhibit similar values of optimized contact resistance, the use of argon milling tends to give more systematic results with a smaller sample-to-sample variance. Its use is also simpler as the metallic deposition can be done in-situ following the milling. We have also examined the influence of the material used for the drain and source electrodes (Cr/Au, Ni/Au, Ti/Au or Nb/Au) and the stability of the contacts as a function of storage time in vacuum or air.

Non-Ohmic contacts to Ge pose a significant challenge to future high performance CMOS and low thermal budget selector devices for cross-point memories.[1] Low resistance n-type Ohmic contacts are more difficult to achieve due to large Schottky barrier heights (0.49-0.64 eV) [1] resulting from Fermi level (E_F) pinning near the valence band and low dopant activation levels.[1,2] A thin, insulating dielectric between the metal and Ge layers unpins E_F but the high tunneling resistance of the dielectric layer limits the contact resistance.[2] Recently, a high-doped Si interfacial layer having good conduction band alignment with Ge has been used to realize low resistance Ohmic contacts to n-Ge.[1] In this work we demonstrate n-type ZnO as another suitable interfacial semiconductor layer that can form Ohmic contacts on n-Ge due to a negative (-0.1 eV) conduction band offset at the ZnO/Ge interface, low E_F pinning for metal contacts on ZnO, and high doping levels that can be realized at metal/ZnO interfaces.[3] Thin ZnO layers (0.7-2.1 nm) were deposited on HF:DI cleaned n-Ge (1e17 cm^-3) substrates using RF sputtering. X-ray diffraction on thick lpayers confirms the deposition of crystalline, c-axis oriented ZnO (0002). Hall and sheet resistance measurements show that the ZnO films are low-doped (1e17 cm^-3). Metal contacts were formed using Ti/Au e-beam evaporation and backside metallization was done using Al. I-V characteristics of as-deposited contacts show a strong dependence on ZnO thickness. Thin ZnO (0.7nm) gives a significant increase in forward (10x) and reverse-bias (100x) currents due to the low (0.3 eV) barrier of the unpinned Ti/ZnO interface [4] as compared to the pinned 0.54 eV barrier of the control Au/Ti/n-Ge sample. However, the current decreases with increasing ZnO thickness due to significant tunneling resistance from the depletion width of the low-doped ZnO layer. Annealing the Au/Ti/ZnO/n-Ge contacts at 400 °C for 60s gives nearly identical, Ohmic I-V characteristics that are independent of ZnO thickness. This can be attributed to the formation of a highly doped ZnO layer at the Ti/ZnO interface due to accumulation of oxygen vacancies during anneal.[5] The increased doping reduces the thickness of the depletion tunneling barrier at the Ti/ZnO interface resulting in Ohmic contacts that are lower in resistance than the as-deposited devices. Additionally, the tunneling depletion width, and hence the I-V curves, are nearly independent of ZnO thickness for the highly doped interface. The Ohmic I-Vs on annealed Au/Ti/ZnO/n-Ge contacts show 500x higher current densities at low bias (± 0.1 V) versus control Au/Ti/n-Ge devices. This project was funded with a research grant from Applied Materials, Inc., USA. References: 1] K. Martens et al., APL 98, 013504 (2011) 2] D. Lee et al., APL 96, 052514 (2010) 3] L. J. Brillson et al., JAP 109, 121301 (2011) 4] C. A. Mead, Sol. St. Elect. 9, 1023 (1966) 5] K. Vanheusden et al., APL 68, 403 (1996)

In-situ imaging and characterization of ohmic contact formation mechanism between metal nanoparticles and semiconductor micro/nanoscale wires/pillars is important for several emerging device applications. We describe an experiment to interface and characterize Ag nanoparticle aggregates that are self-assembled and plastically deformable on Au film deposited on glass substrate. The electrical characterization is done using an electrical nanoprobe attached to a nano-manipulator inside a scanning electron microscope (SEM). Electrical current-voltage (I-V) measurements are made between the electrical nanoprobe in contact with the nanoparticle and the Au film. The Ag nanoparticles have diameters ranging between ~600-800nm and are self-assembled on a thiolated 100nm Au film. Application of contact force via the nanoprobe even after substantial particle deformation reveals initially only a small non-linear current. Upon current annealing through Joule heating, significant improvement in the electrical contact at the AgNP/substrate interface was observed. This is most likely based on the particle bonding to the substrate after passing a high current. The need for such an annealing step might be critical in forming good ohmic contacts at ambient conditions during transfer printing of semiconductor micro/nanopillars.