Block copolymers are often used as architecture-directing agents during the assembly of periodic mesoporous organosilicas (PMOs). Here, I will describe new architecture-directing agents based on poly(N,N-dimethylacrylamide)-block-poly(styrene) block copolymers (BCPs) that allow PMOs to be generated with independently tunable porosity up to ~64% for pore sizes of 10-25 nm. In our investigation, we identified a universal packing limit of ~64 vol% for spherical BCP porogens in the assembled films. Beyond this limit, porogen packing after thermal processing and, in turn, pore structure showed significant deviations away from simple close-packed lattices. We were able to gain insight into this order-disorder transition above the BCP packing limit using both scattering techniques and high resolution STEM tomography. Notably, and as a result of their well-formed architectures and high porosity, our PMOs gave dielectric constants of 1.2 and 1.5 above and below BCP packing limits, respectively, indicating new avenues for these materials as low-k dielectrics.

Considerable effort has gone towards developing PE-CVD organosilicate (OCS) materials for ultra-low-k (ULK) dielectric constant materials. Dielectric constants of 2.0 and lower can be achieved adding nanoporosity into the glass. It is well known that nanoporosity degrades the mechanical properties of these materials resulting in inherently fragile behavior with fracture energies below 5 J/m² . Additionally, the elastic stiffness decays considerably with reduced dielectric constant. A significant outstanding issue with respect to underlying thermomechanical behavior, however, is the possibility of elastic asymmetry in the material. Accurate experimental techniques to characterize the elastic modulus of thin dielectric films have generally been lacking: nanoindentation provides a measure in compression but suffers from film densification and substrate effects; tension measurements are almost non-existent; and surface acoustic wave (SAW) experiments convolute tension and compression behavior, hence eliminating the detection of any possible asymmetric elastic behavior. However, the existence of asymmetrical elastic behavior would have significant effects on thermomechanical stresses and reliability. To address this challenge, we have developed computational tools to generate a highly accurate molecular model of nanoporous ULK organosilicates. Using NPT molecular dynamic simulations to implement simulated annealing, we obtain the global energy minimum of the high-dimensional configuration space. With a low energy structure, we simulate the bulk modulus under both compressive and tensile hydrostatic pressure. Surprisingly, we report the first indication that ULK nanoporous organosilicates display asymmetric elastic behavior, a rare property for any molecular material. We explore the effects of nanoporosity volume fraction and glass composition. This important result provides insight into the underlying thermomechanical behavior of ULK nanoporous organosilicate glasses and ultimately their reliability as a microelectronic interconnect.

Microelectronic technology is currently studying possibility of introduction of low-k materials with a dielectric constant smaller than 2.5 to sub 10 nm technology nodes. However, their implementation meets considerable difficulties because the porous low-k dielectric films are damaged during plasma processes. The active species of plasma diffuse into pores and modify the pore walls. As a result, the low-k materials become hydrophilic and the k-value increases due to the moisture adsorption. A cryogenic etching method that protects the surface of porous low-k dielectrics against significant plasma-induced damage has recently been developed. When the etching takes place at low temperatures, the reactants and etch by-products condense in the pores and protect it against the penetration of active radicals. The main issue is to develop a standard approach for selection of chemical reagents capable to condense and operate at predetermined temperatures. In this paper we present a theoretical analysis of condensation of selected gases at low temperatures. We developed a method and a program that allow recalculating the adsorption isotherms of toluene or other vapors at room temperature to low temperature adsorption isobars of selected chemical compounds. This method was applied for C₆F₆, C₄F₈ for the temperature range from (-200C) to (-700C) and several constant pressures suitable for plasma ignition in CCP and ICP chambers. The data calculated for 100mTorr and 10mTorr compared with experimental data. We found similarity between the calculated and experimental results and proved that this method helps quickly and qualitatively obtains the adsorption isobars of selected gases before the making the etch experiments and the developed program can be efficiently used for selection of chemical compounds for cryogenic etching at the defined temperature range. This method and software also allow to determine polarisability and refractive indices of selected condensates.

Pore filling has emerged as a promising strategy for the protection of ultra-low-κ dielectrics (ULK) against plasma-induced damage [1-3]. In this work we use polymers with a wide range of molecular weights (10³ - 10⁶ g/mol) to create filled ULK materials, leading to uniform penetration, a high level of fill (~100%), and confinement of polymer chains to dimensions far smaller than their bulk radius of gyration. This confinement alters the conformations and inter-molecular interactions of the polymer phase, resulting in novel fracture behavior that has important implications for the reliability of pore-filled ULK materials.
Despite its promise as a processing technique, the effects of pore filling on the mechanical properties, fracture strength, and reliability of these backfilled ULK materials remain poorly understood. We show that the mechanical and fracture properties of a nanoporous ULK matrix can be considerably improved by filling the porosity with a polymeric second phase. Importantly, the degree of toughening increases significantly with the polymer molecular weight, and is also found to depend on processing conditions. We show that the mechanism for toughening is based on the pullout of individual confined polymer chains from the ULK matrix, distinct from the more common entanglement-based mechanisms seen in bulk polymers. This mechanism is quantified with a model that describes the nanomechanical processes occurring on the length scale of individual pores.
Nanoindentation measurements demonstrate that pore filling with confined polymers also improves mechanical properties such as Young&’s modulus and hardness. Furthermore, we present subcritical crack growth measurements that highlight the mixed effects of pore filling on the moisture-assisted cracking of ULK materials. This study provides new insight into the mechanical behavior of pore-filled ULK materials and suggests potential routes for increasing the cohesive strength of materials where the traditional bulk toughening mechanisms may be absent.
[1] T. Frot, W. Volksen, S. Purushothaman, R. Bruce, G. Dubois, Adv. Mater. 2011, 23, 2828-32.
[2] T. Frot, W. Volksen, S. Purushothaman, RL. Bruce, T. Magbitang, DC Miller, VR. Deline, G. Dubois, Adv. Funct. Mater. 2012, 22, 3043-3050.
[3] W. Volksen, K. Lionti, T. Magbitang, G. Dubois, Scripta Mater., 2014, 74, 19-24

Controlling the nanoscale mechano-thermo-chemical integrity and properties of heterointerfaces are crucial for diverse applications in nanoelectronics, e.g., gate metallization, multilevel interconnect scheme, device packaging, and solid-state thermoelectric refrigeration. This talk will describe the use of molecular nanolayers to tailor chemical, mechanical, thermal, and electronic, properties of metal-dielectric and metal-thermoelectric heterointerfaces, and to directly access nanoscale property enhancement mechanisms. The results were obtained from a combination of diffusion studies, fracture tests, electron spectroscopy and microscopy, pump-probe laser thermoreflectance spectroscopy and first-principles theoretical calculations. I will demonstrate the diffusion barrier properties of organic nanolayers, and their attributes to result in several-fold increases in fracture toughness of non-adherent metal-dielectric interfaces. Terminal moieties and water-repelling moieties in the backbone of the molecules forming the nanolayer strongly impact interfacial diffusion and phase formation behavior. Interfacial toughening mechanisms include strong bonding of the nanolayer termini with the non-sticking materials and molecular decomposition into an inorganic layer. These attributes can be adapted to toughen metal-polymer interfaces, e.g., through catalytic activation of molecular moieties and bonding with metals, and tune the interfacial thermal conductance over a wide range by altering the strength of interfacial bonds. In addition to discussing the interfacial thermal conductance-adhesion energy nexus and property enhancement mechanisms, I will highlight the utility of using nanomolecular layers to access atomistic details of nanoscopic interfacial phenomena via macro-experiments.
References:Nature Materials 12, 118 (2013); Nature 447, 299 (2007); Phys. Rev. B. 83, 035412 (2011); Appl. Phys. Lett. 102, 093117 (2013); Appl. Phys. Lett. 105, 081601 (2014); Appl. Phys. Lett. 99, 133103 (2011); Appl. Phys. Lett. 99, 133101 (2011); ACS Appl. Mater. Interf. 2(5), 1275-1280 (2010); J. Appl. Phys. 108, 034317 (2010); J. Phys. Chem. Lett. 1, 336-340 (2010); Appl. Phys. Lett. 96, 143121 (2010); J. Appl. Phys. 106, 054502 (2009); Appl. Phys. Lett. 94, 093502 (2009).

#12288; Carbon-based nanostructures such as carbon nanotubes (CNTs), carbon nanofibers (CNFs), and graphene are candidate materials for next-generation integrated circuit technologies due to their tolerance to electromigration and excellent electrical, thermal, and mechanical properties [1]. However, the key performance-limiting factor remains the high contact resistance at the interface with metal electrodes [2]. High contact resistance inhibits downward device scaling, and is particularly problematic in the nanoscale as in case of vertical CNT in contact with a horizontal metal surface [1, 2]. To mitigate the high contact resistances between these materials and their electrodes, contact metallization becomes the key performance-determining process in functionalizing these materials for potential applications as interconnects in advanced technology nodes.
#12288; We have designed and fabricated CNT vias with widths from 150 nm to 30 nm and measured their current-voltage (I-V) characteristics [3]. Metallization of via top contacts is performed using a point-and-shoot electron-beam induced deposition of tungsten (EBID-W) technique [4]. The deposition conditions are varied to minimize the contact resistance between CNT and W. To extend our previous work on EBID [5], the SEM electron optics is adjusted to achieve e-beam spot sizes down to 50 nm ' 50 nm for W deposition. Results on test devices with deposited W top contacts show resistance reductions similar to those achieved with only current annealing and without contact metallization. However, to avoid increasing the thermal budget in chip fabrication, the use of EBID-W for via top contact metallization would be preferable.
[1] 2013 International Technology Roadmap for Semiconductors, available online at www.itrs.net.
[2] P. Wilhite, A.A. Vyas, J. Tan, J. Tan, T. Yamada, P. Wang, J. Park, and C.Y. Yang, “Metal-nanocarbon contacts,” Semiconductor Science and Technology 29, 054006 (16pp), 2014.
[3] C. Zhou, A.A. Vyas, P. Wilhite, P. Wang, M. Chan, and C.Y. Yang, “Resistance Determination for Sub-100nm Carbon Nanotube Vias,” submitted for publication.
[4] S.J. Randolph, J.D. Fowlkes, and P.D. Rack, “Focused, nanoscale electron-beam-induced deposition and etching,” Critical Reviews in Solid State and Materials Sciences 31, 55-89, 2006.
[5] P. Wilhite, H.S. Uh, N. Kanzaki, P. Wang, A. Vyas, S. Maeda, T. Yamada, and C.Y. Yang, “Electron-beam and ion-beam-induced deposited tungsten contacts for carbon nanofiber interconnects,” Nanotechnology 25, 375702 (8pp), 2014.

As the minimum feature size in integrated circuits (IC) continues to shrink, current interconnect materials such as copper (Cu) and tungsten (W) are rapidly approaching their scaling limit due to increasing resistivity and inability to withstand high current densities. Nanocarbons such as carbon nanotubes (CNTs) and graphene are promising materials due to their higher current capacities resulting from strong C-C sp² bonding. CNT has been investigated extensively as a candidate for on-chip vias due to its excellent current capacity and filling ability in high aspect-ratio structures [1], and graphene or multi-layer graphene (MLG) as a two-dimensional material has been studied for possible use in horizontal interconnects [2]. However, there are still numerous technical challenges to overcome before nanocarbons can be utilized in future IC technologies. For CNT vias, one of the key challenges is to achieve low contact resistance between CNT and metal electrodes [3]. By choosing graphene as the horizontal interconnect and the growth substrate for vertically aligned CNTs, low contact resistance resulting from a well-matched interface is possible through the covalently bonded graphene-CNT hybrid structure, thus achieving an all-carbon interconnect architecture.
The potential of all-carbon interconnection is demonstrated by successful growth of CNT on graphene presented here. First, single-layer to few-layer graphene is grown by annealing a Ni thin film in H₂/CH₄ ambient inside a low-pressure PECVD chamber. Then the graphene layer is transferred onto an insulating substrate, prior to deposition of a Fe catalyst film. A thin layer of Al₂O₃ is deposited on the Fe film to stabilize agglomeration in order to achieve uniform CNT density. CNTs are then grown in the same PECVD system. The effects of substrate material, Fe thickness, and stabilizing layer on CNT areal density, average diameter, and electrical properties are investigated. In general, thinner catalyst film results in smaller CNT diameters and higher densities. Highly uniform vertically aligned CNTs on graphene are obtained, providing the core structure for all-carbon interconnects. Besides excellent electrical properties, such all-carbon structure makes sub-30 nm contact areas possible between CNT vias and a planar interconnect network in advanced technology nodes.
[1] C. J. Zhou, A. A. Vyas, P. Wang, M. Chan, and C. Y. Yang, IEEE International Conference on Electron Devices and Solid-State Circuits, Chengdu, China (June 2014).
[2] K.-J. Lee, A. P. Chandrakasan, and J. Kong, IEEE Electron Device Letters 32, 4, 557 (2011).
[3] P. Wilhite, A. A. Vyas, J. Tan, J. Tan, T. Yamada, P. Wang, J. Park, and C.Y. Yang, Semicon. Sci. Technol. 29, 054006 (2014).

The underlying cause of the polygranular copper microstructure in narrow damascene lines has remained unknown despite multiple attempts to explain an exact mechanism. This work, starting with the Cu seed layer, provides a cradle to grave model for this microstructural transformation specifying differences in the seed layer texture induced by trench geometry as the origin of new driving forces which cause rapid Cu recrystallization in narrow lines.
The seed layer is known to dramatically influence the microstructural transformation of blanket Cu films. This knowledge, however, was difficult to extrapolate to Cu in patterns since the microstructure of the seed layer on patterned substrates was previously unknown. This work uses transmission electron microscopy (TEM)to bridge this gap by examining the seed layer on patterned substrates. We found that the microstructure of the seed on narrow lines differs from the seed on wide lines. The Cu seed on wide lines had a textured, continuous polycrystalline structure similar to blanket films on the field between lines, trench sidewalls, and trench bottoms. The Cu seed on narrow lines also has a textured polycrystalline structure on the field between narrow lines, but differed substantially on other surfaces. In particular, while the trench bottom was still polycrystalline, it showed no preferred crystallographic orientation. Further, the Cu seed on the sidewall of narrow lines had an untextured, irregular heterogeneous structure with isolated grains embedded in an amorphous Cu matrix. Based on this analysis it was hypothesized that the lack of texture, and crystallinity of the seed layer in the narrow lines, led to a high energy structure after plating which in turn could cause rapid trench initiated recrystallization.
Consistent with this hypothesis, a time lapse TEM analysis of the transforming Cu in narrow lines, starting ~1 hour after plating found 1) large subsurface grains growing from the narrow trenches. 2) While the grains inside the lines are larger than the expected as-plated grains, there is only moderate change in grain size inside narrow lines even after 1 week, indicating that the transformation inside the trenches is almost complete in less than an hour, significantly faster that the overburden. 3) The fully transformed grains in the trenches have remarkably few dislocations, whereas the fully transformed grains in the overburden contain many defects, suggesting that the transformation process in narrow lines is a recrystallization process driven by reduction of crystalline defects, whereas the overburden undergoes traditional grain growth.
These results indicate that in narrow lines there is a rapid initiation of recrystallization inside the lines which nucleates randomly and outpaces the surface initiated grain growth in the overburden. With this knowledge, strategies for growing more bamboo like grains will be discussed in terms of crystallographic engineering of the seed layer.

We report the interdiffusion of Cu/Ni layer stacks deposited in supercritical carbon dioxide (scCO2) using a new non-fluorinated Cu(I) amidinate precursor. The Cu(I) amidinate precursor was found to disperse well in an acetone/CO2 mixed solution together with H2 as the reducing agent, at very lower temperature (140 °C) than typical values reported for Cu(II)(hfac)2 and Cu(II)(dibm)2. At 140 °C for 60 min deposition, inter- diffusion was predominant which further improved the adhesion strength of Cu/Ni stack interface.

Tailoring the electrical contact properties of metal-thermoelectric materials interfaces is important to realize high-efficiency solid-state refrigeration for many applications such as cooling hotspots in nanoelectronics devices and solar cells. This is because the energy conversion efficiency of thermoelectric devices fabricated from materials with high thermoelectric figures of merit is often limited by poor electrical transport across metal-thermoelectric interfaces. Here, we report a tenfold increase in electrical contact conductivity Σ_c upon introducing a molecular monolayer of 1,8-octanedithiol (ODT) monolayer or 1,3-mercaptopropyltrimethoxysilane (MPTMS) at Cu-Bi₂Te₃ interfaces. For Ni-Bi₂Te₃ interfaces, introducing an ODT monolayer decreases Σ_c by 20% while MPTMS results in a threefold Σ_c increase. Our observations for ODT-modified interfaces are attributable to differences in interfacial bonding and phase formation at the two interfaces. Rutherford backscattering spectroscopy and X-ray diffraction reveals that ODT inhibits interfacial mixing and curtails interfacial Cu₂Te formation. Electron spectroscopy of ODT-modified interfaces reveals that the thiol termini of ODT bond more strongly to Cu than Ni. Based upon similar correlations for MPTMS we present a phenomenological model describing the contact conductivity in terms of the chemical bonding and phase formation at metal-thermoelectric interfaces. Our findings show that nanomolecular monolayers could offer new possibilities for devising metallization schemes for efficient thermoelectric devices.

Moving towards advanced technology nodes of 10, 7, 5nm and beyond, significant material changes are required in order to overcome the interconnect challenges. Innovations are required in the conductor and dielectric materials as well as layout. On one hand, for the past few technology generations, the same type of materials have been reused and served as the workhorse for realizing ever more complex chips in an arena of multiple patterning and shrinking dimensions. On the other hand interconnect parasitics increasingly affect device performance and hence limit the overall technology progress. Time has come for changing our approach. In this talk it will be illustrated which type of materials, methods and approaches are emerging in order to tackle the challenges lying ahead. While aggressive dimensional shrinking remains relevant, emerging materials and processes options, such as for example Mn-based barriers, self assembled monolayers, electroless deposition and carbon based approaches show promise. The implementation of these options has to ensure that interconnect figures of merits for speed, power, noise, bandwidth density and reliability are improved with respect to currently available technologies.

Next generation interconnect layers will need a wide variety of carefully crafted dielectric materials. There are three separate material classes that need to be explored: (1) strong, highly porous interlayer dielectric (ILD) structures having low dielectric constant (k) values, (2) materials that can infiltrate or seal the surface of the porous ILDs, and (3) a range of materials with tunable etch properties.
To address the first material class, we will discuss a strong and chemically stable spin-on material developed at Intel that has a tunable porosity between 0% to 60% volume with corresponding k-values ranging between 3.4 to 1.6. The mechanical properties of this film are stronger than typical PECVD films at matched porosity. We will show how structure can lead to further improvement in the mechanical properties. Finite element modeling was used to accurately model two different porous network systems; further calculations predict which types of structures can give the most mechanical benefit. Selected recent advances will be shown.
Highly porous ILD networks are challenging to integrate on their own because the film needs to be chemically and mechanically preserved throughout the chip manufacturing process. The second material class addresses this need by enabling reversible infiltration, and/or surface sealing, of the porous ILD network.
The third class of materials is currently the least mature and is needed to enable advanced integration schemes. Specifically, there are situations where only one of multiple exposed materials needs to be etched with selectivity greater than 20:1. Etch selectivity values for typical materials (e.g., oxides, nitrides, carbides, amorphous silicon, metal hard masks, and carbon hardmasks) are currently not sufficient. Development of new synthetic materials and/or etch processes that are compatible with current materials are desired to enable next generation integration.

Materials with good mechanical properties and low k dielectric constants are of paramount interest for the next generation of electronics, since for the needed increases in clock frequency.low-k materials are a crucial ingredient.It is very difficult to achieve dielectric constants below k = 2 with conventional polymers. Here, we focus on a novel, highly tunable class of materials, metal-organic frameworks (MOFs). MOFs are highly porous hybrid materials consisting of organic linkers connected to inorganic metal (or metal/oxo) clusters. Due to their crystalline, highly ordered, and porous structures, this class of solids exhibits a number of highly interesting properties, including very attractive mechanical properties. The Young&’s modulus of a particular MOF, HKUST-1, amounts to 9.3 GPa[1] Because of the very low mass density of MOFs, the static dielectric constants k is very small and can drop to values far below 2.[3]
We have introduced a novel method to grow thin films of this exciting new class of porous solids by liquid phase epitaxy (LPE) [2], referred to here as surface-anchored metal-organic frameworks (SURMOFs). The suitability of SURMOFs for investigating solid state elastic and mechanical properties, as well as optical, electrical and electrochemical [4] properties has recently been demonstrated.[5]
References
[1] S. Bundschuh, O. Kraft, H.K. Arslan, H. Gliemann, P.G. Weidler and Ch. Wöll, Appl. Phys. Lett. 101. 101910 (2012)
[2] O. Shekhah, H. Wang, S. Kowarik, F. Schreiber, M. Paulus, M. Tolan, C. Sternemann, F. Evers, D. Zacher, R. A. Fischer, Ch. Wöll, J. Am. Chem. Soc. 129, 15118 (2007).
[3] E.Redel, Z. Wang, S.Walheim, J.Liu, H.Gliemann, Ch.Wöll, Applied Physics Letters, 103, 091903 (2013)
[4] V. Mugnaini, M. Tsotsalas, F. Bebensee, S. Grosjean, A. Shahnas, S. Bräse, J. Lahann, M. Buck, C.
Chem. Comm., 50, 11129-11131 (2014)
[5] H. Gliemann und Ch. Wöll, Materials Today, 15, 110-116 (2012)

The continuous miniaturization of future integrated circuits (ICs) poses increasing technological challenges for today's nanoscale material property characterization. This is because, in addition to dimensional metrology, material property measurements (e.g. mechanical, electrical, magnetic etc.) were identified as necessary control parameters to achieve the nanoscale material integration and functionality required in the next generations of ICs. It is thus most convincing to demonstrate reliable quantitative mechanical property measurements on specimens of comparable dimensions and structure with those used in fabrication.
In this work, we used contact-resonance atomic force microscopy (CR-AFM) to determine the effect of various fabrication processes on the elastic properties of thin films and narrow patterned lines of low-k dielectric materials. CR-AFM classifies as one of the most versatile AFM-based techniques for nanoscale elastic modulus measurements, with applications to various composites, thin films, and nanostructures. We used load-dependent CR-AFM to detail the change in the elastic properties of porous SiOC:H blanket films at a few important processing stages: SiOC:H with porogen incorporated, porous (porogen-free) SiOC:H, and polymer-filled SiOC:H. While the first two stages are routinely used in today's technology to define porous structures with reduced dielectric constant, the polymer filled structure is a relatively new protective strategy to increase the mechanical stiffness of porous materials during processing. The measurements were used to assess the effect of fabrication processes (UV and ash cures and pore filling) on the elastic modulus of these films and deconvolute the contributions of the constituents to the elastic modulus of each film. Furthermore, the elastic moduli of filled and unfilled porous films were modeled and compared to probe the efficacy of pore filling and analyze the structure-property relationship of these materials. On patterned SiOC:H lines (width from 25 nm to 90 nm), we used intermittent CR-AFM (ICR-AFM) to map the depth and width dependencies of material stiffness into tomographic cross-sections over regions of interest. In these measurements, we demonstrated that, at a spatial resolution of 5 nm, ICR-AFM provides advanced scanning probe capabilities for quantitative 3D mechanical characterization of nanoscale structures.
G. Stan and R. S. Gates, Nanotechnology 25, 245702 (2014).
G. Stan, R. S. Gates, P. Kavuri, J. Torres, D. Michalak, C. Ege, J. Bielefeld, and S. W. King, Appl. Phys. Lett. 105, 152906 (2014).

Integration of porous low dielectric constant (k) materials constitutes a major roadblock in the reliable manufacturing of back end of the line (BEOL) wiring for advanced technology nodes [1]. In particular, the low-k materials increasing porosity leads to excessive plasma damage during integration, as the industry adapts procedures developed for dense and microporous insulators to mesoporous materials [2]. Currently, ultra low-k (ULK) materials (k<2.4) cannot be integrated at the most aggressive pitch.
To mitigate plasma damage, we developed and previously reported the P4 (Post Porosity Plasma Protection) integration scheme that takes advantage of the increasing porosity and protects the ULK during BEOL integration [3,4,5,6]. This strategy consists of protecting the fully cured porous ULK material by filling the pores with a sacrificial agent then integrating an apparently non-porous dielectric. The pore filler is finally removed after integration via thermal means, fully restoring the initial properties.
The P4 efficacy was already demonstrated on a wide range of spin-on and PECVD materials: plasma damage is mitigated by the limited physical interactions between the different plasma species and the ULK due to pore-filling. However, unlike ions and free radicals that are known for causing this kind of damage, the interactions between the less energetic v-UV photons and ULK materials are different and not yet fully understood. Therefore, we decided to investigate the protective effect of the P4 against v-UV radiation only on a highly porous k=2.0 low-k material. Fluorocarbon based and oxygen based plasmas mimicking real etching and ashing steps (respectively) during ULK processing were employed. In this presentation, modifications imparted to the ULK upon different plasma or v-UV only exposures as a function of pore filling will be described and discussed. Altogether, the results demonstrate an excellent v-UV resistance of the filler, making the P4 a promising strategy against v-UV damage.
[1] W. Volksen, R. D. Miller, G. Dubois, Chem. Rev. 2010, 110, 56-110.
[2] K. Lionti, W. Volksen, T, Magbitang, M. Darnon, G. Dubois, ECS J. Solid State Sci Technol, 2015, in press.
[3] T. Frot, W. Volksen, S. Purushothaman, R. Bruce, G. Dubois, Adv. Mater. 2011, 23, 2828-2832.
[4] T. Frot, W. Volksen, T. Magbitang, S. Purushothaman, R. Bruce, S. Cohen, M. Lofaro, G. Dubois, Future Fab Intl 2011, 39, 67.
[5] T. Frot, W. Volksen, S. Purushothaman, R. Bruce, T. Magbitang, D. Miller, V. Deline, G. Dubois, Adv. Funct. Mater. 2012, 22, 3043-3050.
[6] W. Volksen, K. Lionti, T. Magbitang, G. Dubois, Scripta Mater. 2014, 74, 19-24.

Trap states in low-k dielectric films are likely causes of leakage and breakdown. An atomic scale study of these trap states is performed using Dynamic Tunneling Force Microscopy (DTFM) [1]. Two-dimensional mapping of the trap state distribution is performed, revealing each trap state within ~ 1 nm of the surface in low-k dielectric films in ultra-high vacuum. The energy level and depth of each state is measured by differentially subtracting DTFM images acquired at different applied voltages and height. The measured volume density of these trap states near the surface is typically near 10¹⁹/cm³. These results are compared with time dependent dielectric breakdown measurements on the same films. Efforts are on-going to determine whether the near surface trap state density is similar to that of the bulk.
[1] R. Wang, S. W. King, and C. C. Williams, “ Atomic scale trap state characterization by dynamic tunneling force microscopy, “Appl. Phys. Lett. 105, 052903 (2014).

To understand the physical processes by which electrical stress causes electrical breakdown in dielectric films, an atomic scale study of individual trap states before and after electrical stress has been performed using Dynamic Tunneling Force Microscopy (DTFM) [1] and conductive Atomic Force Microscopy (c-AFM). DTFM provides images of the trap state locations in the dielectric surface while the c-AFM images provide images of the local current leakage. Local electrical stress is applied to the dielectric film by a voltage biased AFM probe tip. Individual trap states are observed to both appear and disappear after electrical stressing (> 10 MV/cm) in both DTFM and c-AFM images in ultra-high vacuum. A comparison between DTFM and c-AFM images acquired in the same region of the dielectric sample shows that the location of the trap states measured by DTFM is not well correlated with locations of higher current leakage.
[1] R. Wang, S. W. King, and C. C. Williams, “ Atomic scale trap state characterization by dynamic tunneling force microscopy, “ Appl. Phys. Lett. 105, 052903 (2014).

While interconnects are scaled down, many investigations were realized to achieve ultra-low k materials with a dielectric constant lower than 2.5. After modifying chemical composition, the introduction of porosity inside the thin film was studied over the past years. Several strategies were proposed and a porogen approach by Plasma Enhanced Chemical Vapor Deposition (PECVD) was finally chosen in the microelectronic industry.
This approach is based on the co-deposition of an organosilicon precursor and an organic one. The first creates a silicon matrix while the second one creates organic moieties which are removed after an adequate post-treatment to create porosity. Ultra Low dielectric constant thin films are obtained by increasing organic porogen loading and so the film porosity. However, the porogen approach by PECVD presents some limitations. These limitations are related to the percolation of rigidity of low-k matrix for high porogen loading and porogen residues formation. After a critical porogen ratio, the matrix shrinkage observed during the porogen removal treatment induces the loss of the created porosity. Consequently, a maximum porosity of approximatively 50% can be obtained [1].
In order to overcome this porosity limitation, an attractive alternative approach is to use a foaming process, a well-known technique already used to produce microcellular polymers. In this technique, the porosity is created during a post-deposition step by generation of gas in the film, then nucleation and growth of gas bubbles. When this gas generation occurs, a thin film swelling and a refractive index decrease are observed, assessing the formation of porosity.
In this work, foaming of different SiOCH thin films deposited by PECVD is studied. Several sets of conditions were considered which includes the choice of chemical precursor, deposition temperature, annealing conditions (temperature, duration, UV assisted or not). It is shown that the foaming process is highly dependent on the SiOCH thin films properties, especially on the carbon content and the initial skeleton crosslinking. The use of a barrier layer deposited on top of the SiOCH film is also necessary to maximize the creation of porosity, enhancing the effect of the thin film modification. Then, the porous SiOCH thin films are studied using Fourier Transformed Infrared spectroscopy, Ellipsometry, Ellipso-porosimetry and electrical characterizations.
This work shows that the foaming of low-k allows reaching higher porosity than those obtained by a PECVD porogen approach. The mechanisms and limitations for the creation of porosity in SiOCH thin films are discussed.
[1] V. Jousseaume et al. "Ultra low-k by CVD: deposition and curing", Advanced Interconnects for ULSI Technology edited by M.R. Baklanov, P.S. Ho et E. Zschech, Wiley (2012), pp 35-78.

A major challenge facing the semiconductor industry is the development of new low-dielectric-constant (low-k) materials for metal interconnects to mitigate the issues surrounding resistance-capacitance (RC) delays as dimensionality is reduced. Such materials include not only bulk inter-/intra-layer dielectrics (ILDs), but also more specialized layers such as Cu diffusion barriers, etch stop layers, and hard masks. Traditional materials for these purposes have been derived from the Si family; however, it is becoming increasingly challenging to tailor these to meet all of the integration requirements, particularly maintaining mechanical and chemical resilience as k is lowered. Amorphous hydrogenated boron carbide (a-B_xC:H_y) is a very intriguing replacement candidate. As a semi-insulating low-density covalent solid with one of the lowest possible average atomic numbers, Z (H = 1, B = 3, C = 4), a-B_xC:H_y is expected to feature a low dielectric constant, while also inheriting the appealing properties of crystalline BC, which include extreme hardness, as well as thermal and chemical robustness. We have completed a series of design-of-experiment-based a-B_xC:H_y film growths, culminating in the growth and characterization of upwards of 100 films, with the goal of optimizing these toward diffusion barrier/etch stop applications (i.e., slightly higher k than ILDs, but with commensurately higher mechanical and chemical figures of merit). We describe an a-B_xC:H_y material composition with dielectric constant (<3.5), leakage current (<10^-8 A/cm² at 2 MV/cm), and mechanical properties (hardness >10 GPa) that meet or surpass those of Si-based materials currently being used for these applications. Further, we demonstrate its suitability for diffusion barrier/etch stop applications through X-ray-diffraction-based Cu diffusion barrier studies, as well as wet and dry etch rate determinations.

CVD polymerization represents the intersection of all-dry and scalable microfabrication technology with the chemistry of functional and responsive organic materials. Unique applications enabled by CVD polymers derive from the ability to avoid high substrate temperatures and solvents. Thus CVD polymers are compatible with flexible substrates and roll-to-roll processing. In a single step, vapor-phase monomers undergo selective reactions to produce high purity and durable polymeric layers. Like atomic layer deposition (ALD), CVD polymer deposition can produce coverage which is conformal, pinhole free, and ultrathin (<20 nm thick), the essential requirements for integration into next generation 3D devices and nanostructured devices. The durability of the CVD polymers can be enhanced through in situ grafting to the substrate and crosslinking within the film. Over 70 different CVD polymers have been synthesized, spanning the range of dielectrics, semiconductors and conductors. Some CVD polymer films exhibit responsive behavior, such as a thickness change or change in surface energy, when exposed to an external stimuli such as humidity, temperature, or light. Examples of unique photovoltaics, batteries, ultracapacitors, biosensors, and responsive optical devices fabricated with CVD polymers will be presented. Additionally, use of the CVD polymer process to achieve room temperature passivation of silicon and high resolution lithography will be discussed.

Future nodes below 16 nm requires interlayer dielectric whose dielectric constant is lower than 2.0. In order to deliver a reduction in dielectric constant, porous low-k film is indispensable and widely studied. However, porous low-k film is sensitive to process-induced stimuli caused by plasma and metallization process, because of the continuous porous structure. Therefore, the pores must be sealed to prevent diffusion of those species. Considerable efforts have been devoted to the development of pore seal layer or metal barrier which suppresses the diffusion of metals into porous low-k film and to tailor the interface between porous low-k films and those thin layers.
We have developed pore sealants which forms ultra-thin (< 3 nm-thick ) layer on top of the surface of porous low-k while the refractive index of the bottom part of the porous low-k is kept which shows that the pore sealant does not diffuse into pores. In this talk, we focus on the formation of the pore seal layer on the surface of porous low-k . The factors which determine thickness of pore seal layer, minimum thickness for sufficient pore seal property and so on will be discussed.

The development of a cheap, flexible, and reliable packaging and barrier film technology is critical for the integration and commercialization of flexible photovoltaics and organic electronics devices. A promising emerging barrier technology utilizes multiple layers of alternating organic and inorganic laminates that is amenable to roll-to-roll processing while maintaining the desired ultra-low diffusion barrier properties. In operation, the barrier films are subject to effects such as stress cycling, diurnal temperature cycling, moisture and chemical erosion, and UV degradation. The organic to inorganic interfaces are highly susceptible to damage from these degradation sources and delamination often initiates at, and propagates along, these interfaces. This limits the operational lifetime of the barrier film and the device. We demonstrate a novel method to increase the adhesion strength of the organic to inorganic interface in a model system of poly (methyl methacrylate) (PMMA) and silicon oxide through interfacial patterning. An array of nanoscale patterns is etched into the PMMA through the use of nanosphere lithography. A thin layer of silicon oxide is conformally deposited onto the patterned PMMA through plasma enhanced chemical vapor deposition. The patterned interface leverages mechanical adhesion effects and exhibit an order of magnitude increase in adhesion energy (from ~2 J/m² to ~20 J/m²) over that of a non-patterned interface. The dimensions and aspect ratios of the interfacial features determine the delamination mode and the corresponding adhesion energy. Through XPS, AFM and other surface characterization studies, we show that interfacial structuring can control the delamination pathway to access or avoid the organic to inorganic interface. Through degradation studies, we show that the structuring offers increased adhesion after broadband UV-A and UV-B exposure. By engineering interfacial structures, we can increase the adhesion and durability of organic to inorganic laminate systems.

High process temperature over 400 #8451; leads to spiking and intermixing of the metal contacts at the interface, which can threaten their long-term reliability. Since the use of diffusion barrier can suppress the creation of trap centers resulted from metal diffusion and reaction of the metals with the underlying semiconductor, an effort is underway on developing novel materials to enhance their the barrier properties. Among promising materials, graphene is an excellent candidate for a diffusion barrier due to its outstanding thermal and chemical stability, and impermeability. It has been reported that the grain size of graphene was one of the main factors to determine its diffusion barrier performance, where the size of graphene grain decreased as increasing its defect density.
We used graphene films grown by chemical vapor deposition method on Cu-foil. We investigated the diffusion barrier performance of defective graphene by annealing as-prepared samples under Ar condition for a min at temperatures ranging from 300 to 500 #8451;. The defects in graphene films were introduced by UV irradiation. And the defect density in graphene was controlled by varying the UV irradiation time. The optical, electrical and diffusion barrier properties of UV-treated and subsequently annealed graphene layers were investigated using 4-point probe measurement, optical transmittance measurement, scanning electron microscopy and micro-Raman spectroscopy to obtain the information of the effects of the defects on the performance of the graphene. The details of the results will be presented at the conference.

With the increasing complexity of functions in digital circuit, flexibility and energy-efficiency play important roles in addressing future computing systems. However, scaling transistors to single-nanometer regime are plagued with many challenges of gate leakage, mobility degradation and variations as well as a NRE cost. Soon, scaling will face the limits, requiring alternative devices to enhance the chip performance. BEOL devices are new functional devices embedded in Cu-BEOL and strong candidates potentially improving the chip performance without the CMOS scaling.
Atom switch is an electrochemical resistive-change device categorized in the BEOL devices. The electrochemical phenomenon is based on electrolysis of the Cu electrode to produce a precipitation of Cu at the Ru electrode, which realizing a high ON/OFF current ratio and replacing the TMG. Previously, we reported a replacement of the SRAM-based switch with atom switch integrated in Cu-BEOL.
In this talk, the developed technologies are reviewed and the opportunities and challenges of the BEOL devices including atom switch are discussed especially for low-power programmable logic applications.
Acknowledgement This work was performed as “Ultra-Low Voltage Device Project" funded and supported by METI and NEDO. A part of the device processing was operated by AIST, Japan.

Recently, flexible polymer solar cells (PSCs)s fabricated on plastic substrate/indium-tin-oxide (ITO) films have attracted much interest. However, there have been distinct problems such as high water permeation rate of plastic film and brittleness of transparent ITO electrode. These problems can be solved by employing a top-illmuniated structure with a reflective metal bottom electrode on the plastic substrate. In the top-illumination configuration, the light incomes from the top transparent electrode and absorbed in the active layer. The small band-gap polymer (PTB7), however, has a small absorption coefficient (α ~ 6 x 10³ cm^-1 at lambda; = 500 nm), leading to insufficient light absorption. Therefore, the light trapping method is turned out to be crucial component. Although several works have succeeded to demonstrate the light trapping in PSCs with nano-patterns, the drawbacks such as a short-circuiting and complicated processing steps are still remained. Here, we will demonstrate a highly efficient and flexible top-illuminated inverted PSCs with the microcavity structure.
As a reflective eletrode, Silver (Ag) is essential due to high reflectivity. However, Ag reflector suffers from the many problems to be applied in bottom reflective electrode in solution-processed organic electronics. In particular, a few nanometer poly-imine (PEIE) layer cannot be act as a cathode interlayer because the electron-rich Ag layer doesn&’t interact with PEIE, resulting in little interfacial dipole. The surface treatment such as UV-ozone can enhance the wettability of PEIE, but the destructive chemical oxidation of Ag reflector degrades the electrical and optical properties.
In this work, the advantages of the ITO interlayer, deposited on Ag reflector, were used to produce a significantly enhanced efficiency of top-illuminated inverted solar cells. Since the UVO treatment produces the negatively charged oxygen ions on the ITO surface, the PEIE layer was successfully coated on Ag/ITO and strong interfacial dipole is formed without damaging the surface morphology or optical reflectance. This interfacial dipole reduces the work function (3.73 eV) of cathode for use in bottom reflective electrode of inverted PSCs. Simultaneously, the strong light absorption was achieved by employing the ITO layer between Ag reflector and transparent top electrode, leading to the cavity resonance. We optimized micro-cavity structure by FDTD simulation and demonstrated the highest PCE of 6.9% in the top-illuminated inverted PSCs. Moreover, the Ag/ITO reflector exhibits the extremely flexible nature. No change in sheet resistance (0.2 Omega;/sq) was found even after 50,000 bending cycles.
We believe this proposed reflector structure gives a general guideline for demonstrating the chemically robust and mechanically flexible reflector in a highly efficient optoelectronics such as organic light-emitting diodes, polymer solar cells and perovskite solar cells.

Micro- or nanotransfer printing is a powerful tool to manufacture patterned and hence discontinuous thin film devices. On the other hand, the preparation of continuous large-area electrodes by transfer printing has not been reported. Generally, a discontinuity on the nanoscale is required for the successful transfer printing of large-area electrodes. The investigated silver films are formed by physical vapor deposition (PVD) or electro-less deposition (ELD) on an elastomeric PDMS stamp.
We observed that a better nanoscale continuity (lower resistance) leads to a decrease of the successfully transfer printed fraction of the film. In fact, successfully printed PVD films always contain cracks in the nanoscale and ELD printed films show particles that are interrupted by nanoscale voids. The nanoscale discontinuity increases the sheet resistance of transferred films compared to ideal continuous films. On the other hand, the nanoscale discontinuity makes the film slightly stretchable and all successfully transfer-printed films had been stretchable on the stamp before. In general, the nano-voids of ELD silver appear to enable a better stretchability compared to nano-cracks of PVD films, which results in a better transfer printing behavior.
Technologically the transfer of a solution processed ELD silver film appears very promising, as it enables room-temperature processing at atmosphere without the need for any further treatment of the electrode. Hence it is cost-efficient and readily adopted in roll-to-roll fabrication. Moreover, as transfer printing separates film formation from film deposition, harmful chemicals won&’t destroy sensitive subjacent layers (e.g. in an organic device). Based on these findings, we demonstrate transfer printed ELD silver films as top- electrodes for organic solar cells, which reached 85% of the power conversion efficiency compared to the reference devices with vacuum deposited silver electrodes.

Pollution-free conversion of freely available solar energy into electric power or chemical fuels through photoelectrochemical (PEC) cells has attracted intensive attention of researchers and engineers around the globe. Semiconductor nanostructures have been studied extensively in recent years for PEC cells due to their distinctive properties and promise to offer superior PEC performance. The main requirement of the PEC industry is to find semiconductor materials with the capability of efficient and cost effective conversion of sunlight to H₂ by splitting water. Therefore, considering the general requirements for efficient PEC water splitting, InGaN appears to be ideal with a bandgap energy tunable through the whole solar spectrum upon In composition, a large absorption coefficient, high carrier mobility, and good corrosion resistance.
Here we have demonstrated that epitaxial InN quantum dots (QDs) more than double the photoelectrochemical (PEC) water splitting efficiency of an In_0.54Ga_0.46N photoelectrode. The InN/In_0.54Ga_0.46N-QDs-photoelectrode reveals a maximum incident-photon-to-current-conversion efficiency (IPCE) of up to 56 % at a wavelength of 600 nm with hydrogen generation rate of 133 µmol h^-1 cm^-2 at zero applied voltage under white light illumination of a 1000 W Xenon arc lamp. The bare In_0.54Ga_0.46N-layer-photoelectrode reveals a much lower IPCE of 24% with H₂ generation rate of 59 µmol h^-1 cm^-2.
The photoelectrochemical (PEC) cell based on epitaxial InN/InGaN QDs utilizes the excellent PEC properties of InGaN together with the high surface charge density of the InN QDs for enhanced water splitting and hydrogen generation. The high density of positively charged surface donor states facilitates the oxidation of O_2- (oxygen-producing half reaction), i.e., the transfer of electrons to the working electrode. Still, the bandgap energy of the InGaN layer is sufficiently high to drive the redox reaction in the presence of photo-excited electrons and holes under illumination. This is attributed to the zero-dimensional electronic properties of the QDs: The number of positively charged donors accommodated on each InN QD is 40 - 90. Due to the discrete density of states and the Pauli Exclusion Principle the QDs are not accumulating a similar amount of electrons and the donors are not uniformly compensated. This leaves a local positive net charge which actively promotes the electron transfer. Notably, graphene also acts and is used as an electron acceptor and transporter to enhance the PEC activity comparably.
The InN/InGaN-QDs-PEC cell exhibits excellent photocurrent density, high incident-photon-to-current-conversion efficiency (IPCE), and a large hydrogen generation rate, much superior to the PEC cell based on bare a InGaN layer. Our InN/InGaN-QDs-PEC cell has full potential to compete and even outperform other reported PEC cells.

On the advent of flexible devices, developing thin and flexible lithium-ion batteries (FLB) becomes a requisite for full flexible electronic application. Here, we contrived a co-planar type thin and flexible Lithium ion battery by using the design concept of interdigitated electrodes. Whereas a conventional LIB has its components in layer by layer structures, the co-planar type lithium ion battery has the interdigitated structure of positive and negative electrodes on the same plane without a separator, which possibly leads to a thinner battery thickness and stress relieved electrode structure. Unlike previous co-planar type microbatteries, we fabricated pouch cell type batteries with large scale interdigitated electrode structures (~ mm dimension scale) using conventional electrode materials. Our electrochemical tests showed the areal energy density of the co-planar type lithium ion battery of ~ 0.26 mAh/cm² and the specific capacity of cathode of ~ 90 mAh/g after the cycle test up to 300, which successfully demonstrated the feasibility of a co-planar design pouch cell LIB with the interdigitated electrodes. Furthermore, our mechanical bending test results showed that the co-planar-type battery is mechanically stable during 4000 bending cycles with a bending radius of 1/8 inch.

We have presented a development of low temperature-curable epoxy-based electrically conductive pastes for flexible substrates. Electrically conductive pastes are composed of a novolac epoxy resin and a trimodal metallic mixture of micron-sized silver flakes, silver microspheres, and silver nanoparticles, followed by curing of epoxy resin at relatively low temperatures. The conductive silver fillers made the pastes electrically conductive due to their metal-to-metal bonding, whereas the epoxy resins used for an improvement of a processability and adhesion between the metal surface and conductive pastes. Silver nanoparticles were also used as a supplementary filler to improve the metallurgical adhesion between conductor traces into the epoxy matrix. In this study, our strategy is to add reactive silver precursors to form the good metallic network of the conductive materials and reduce curing temperatures of the conductive pastes. As a result, we found that volume resistivity and electric conductivity of our epoxy-based conducting pastes containing the reactive silver precursors exhibited high values of 2.5 X 10^-5 #8486;middot;cm and 4.0 X 10⁴ S/cm, respectively, even at a low curing temperature of 150 °C. The resulting high conductivity may be used for a fabrication of various electronic devices, which require low temperature process.

Low temperature processable silver nanowire/titanic oxide nanofiber composite thin films were prepared by using peroxo-polytitanic (PPT) acid gel and silver nanowire (AgNW) solution. For the practical use of the AgNWs in optoelectronic devices and for the replacement of the conventional ITO films, the optical and electrical characteristics are the main two issues to the AgNW thin films. To increase of conducting property of the AgNWs, the connection between AgNWs played an important role in electrical performance of AgNW thin films. Herein, the PPT acid gel was applied as the precursor for the formation of titanium oxide (TiO_x) nanofibers. The as-prepared TiO_x nanofiber solution was then used to fuse the AgNWs into efficient conductive networks without any high temperature treatment. The average transmittance for the AgNW/TiO_x composite films is ~ 92%. Compared with bare AgNWs, the AgNW/TiO_x composite nanofiber thin films possessed better thermal properties which derived from the effects of TiO_x coating layer. The AgNW/TiO_x composite thin films showed a stable sheet resistance of ~ 20 Omega;/sq which comparable to general ITO electrodes and increased until the operating temperature higher than 300 °C. Also, the AgNW thin films were fragmented after thermal annealing at 250 °C whereas the network of AgNW/TiO_x composite thin films remains complete under the annealing temperature of 400 °C. In summary, we believe that such convenient, cost-effective and low temperature processable silver nanowire/titanic oxide nanofiber composite thin films has immense potential use in future electronic devices.

Electrodeposition is a commonly used method to fabricate components used in electronic devices. However, problems, such as formation of defects in the electrodeposited materials, are crucial problems when the devices are miniturized. Co is a commonly used material in electronic devices, such as random-access memory. Eliminating defects in the electrodeposited Co is more critical when demand of higher memory density is needed. In previous studies, an electrodeposition method with SCE (EP-SCE) was found to be effective in removing defects formed in the electrodeposited materials. In addition, effects of surface smoothening and grain refinement are observed. However, Co material fabricated by EP-SCE has not been well studied. In this study, effects of the surfactants used and the SCE on particles growth of the Co films by EP-SCE was investigated.
Co films with a thickness of about 70 µm were electrodeposited on pure Cu (99.99%) substrates, which is the cathode electrode. Pure Pt (99.99%) was used as the anode electrode. Both substrates have dimensions in 10mm*20mm*0.5mm. The electrodeposited Co films were obtained from an additive-free cobalt sulfate and cobalt chlorate bath. Composition of the bath was CoSO₄#12539;6H₂O 300 g/L, CoCl₂#12539;6H₂O 45 g/L and H₃BO₃ 40 g/L. The deposition temperature was 313K, and pressure was 15 MPa. Current density was 4A/dm². A scanning electron microscope (SEM) was used to observed surface of the films.
For the Co films obtained from the electrodeposition at ambient pressure and without the surfactant, hemi-spherical shaped and size-uniform particles were observed by SEM. After adding the surfactants, polyoxythylene lauvyl ether (C₁₂H₂₅(OCH₂)₁₅OH), into the bath, morphology of the particles were still hemi-spherical with uniform size, but average diameter of the particles sharply decreased from roughly 12 µm to 6 µm. We suggested the effect is caused by adsorption of the surfactant on surface of the cathode. When EP-SCE at 15MPa was used, shape of the particles changed. Ridge-liked morphology was observed, and growing orientation of the particles was perpendicular to the substrate surface. This morphology is difference from the results obtained from Ni EP-SCE. Further study is required to clarify the mechanism causing this phenomenon.

Wearable device is an advanced technology that can be applied in various fields. One of the challenging points in wearable device is deposition of metallic materials on the textile. There are many deposition methods such as sputtering and chemical vapor deposition. Among them, electroless plating is one of the most promising methods. Therefore, study on fabrication of fiber coated with metallic materials by electroless deposition has attracted much attention. However, there are still some problems needed to be improved in electroless plating. First, a pretreatment process is usually needed, and the pretreatment process is performed with toxic substance. In this case, the toxicity raises concerns for practical use of the fibber in clothing. Second, the fibers can be damaged or even lost because the strong acid used in the pretreatment. Third, adherence of the metal coating on the fiber needs to be improved.
In a previous study, we have proposed an electroless plating method with supercritical CO₂, which includes a supercritical CO₂ catalyzation (SCC) step and a electroless plating step in supercritical CO₂ emulsified electrolyte (ELP-SCE), to improve coverage and adherence of Ni on a Kapton® polyimide film. We believe the SCC and ELP-SCE can also be applied in deposition of Ni-P on textile of polyamide to solve the problems of the toxic chemicals used in the pretreatment and improve adhesion of the Ni-P coating on the textile.
The textile used in this study is Nylon 6,6 fiber. No pretreatment was conducted in this study. The catalyzation was either in conventional method with a PdCl₂/SnCl₂ mixture solution or the SCC with bis (2,4-pentandionato)-palladium. The catalyzation temperature was 353 K, and the pressure for SCC is 15 MPa. After the catalyzation step, either conventional electroless plating (ELP-CONV) or ELP-SCE were performed. The reaction temperature was 353 K for both plating method, and pressure of 15 MPa was used for ELP-SCE. Surface of the Ni-P coatings was observed by an optical microscope and a scanning electron microscope (SEM).
The Ni-P coating by conventional catalyzation and ELP-CONV had many pin-holes. Size of some of the pin-holes was larger than diameter of the fiber. The Ni-P coating by SCC and ELP-CONV showed uniform coverage with no pin-hole on each fiber. However, cracking was observed on the coating. This is an indication of poor adhesion between the coating and the fiber. On the other hand, a uniform coating on the surface of each fiber was obtained by combining SCC and ELP-SCE. These results show the fiber is uniformly impregnated with the Pd catalysts by SCC, and ELP-SCE is effective in minimizing stress accumulated during the plating process and improve adhesion of the Ni-P layer on the fiber. Thus, the proposed method, SCC combined with ELP-SCE, is effective to metallize the surface of Nylon 6,6 fiber and increase functionality of the textiles.

Using Ag nanowires with high aspect ratio is key to fabrication of highly transparent and conductive Ag nanowire films. To control the aspect ratio of Ag nanowires, a series of researches concerning molar ratio of reaction agents, temperature, reaction time, stirring rate and control agent have been conducted for last few decades. Based on these results, some groups modified synthesis protocols and found the way to synthesize very long silver nanowires (>100mu;m), and showed higher conductivity and lower sheet resistance compared to the previous works that used CNT, graphene and copper nanowires as a conductive material. However, in that these films show high haze values over 5%, it is hard to see clear images comparable to ITO film whose haze value is approximately 2%. Therefore, for the fabrication of Ag nanowire films with low haze as well as high transparency and conductivity, it is necessary to synthesize Ag nanowires with thin diameters (~50 nm) as well as high aspect ratios. Although, up to now, there has been many researches on finding experimental conditions for the synthesis of silver nanowires, few study has been done for the synthesis of high performance silver nanowires. In a typical experiment, 50 mL of 0.2 M Glycerol solution of PVP was prepared at 160 #8451; and 5 mg of NaCl was added into the solution. For a parametric study, AgNO3 molar concentration (in a range of 0.022-.0132 M), NaCl molar concentration (in a range of 0.34-10.2 mM), PVP molecular weight (in a range of 29,000-1,300,000) were modulated with other parameters fixed. We found that to reduce the diameter of silver nanowire and maintain high aspect ratios, low AgNO3 molar concentration, balance between AgNO3 and NaCl molar concentration as well as proper selection of PVP molecular weights (MWs) were crucial. From SEM image measurement, synthesized silver nanowires showed 48 nm as an average diameter and aspect ratio of 500. Through Meyer Rod Coating method, we fabricate transparent conducting films with low haze value, 2%, and showed high transparency and low sheet resistance, 95% and 50 ohm/square, respectively, which highly exceed industrial requirements and surpass the performance of typical ITO films. One of the advantage of approach is that we suggests a simple fabrication method of high performance TCF(Transparent Conductive Film), without adopting expensive and cumbersome procedure such as 'Doping', CVD and so on.

Recently, the trends of developing for high performance electronic devices such as smart phones and flexible displays focus on small and lightweight exhibiting multi-functional and high thermal resisting properties. To meet these requirements, the copper clad laminate (CCL) substrate of printed circuit boards(PCBs) should have low coefficient of temperature expansion (CTE), high modulus and high thermal conductivity of materials. Especially, the CTE is very important in PCBs that mount large chip packages due to the shearing of the solder balls. The stresses or distortions induced as the PCB expands at a different rate compared to the ceramic package can tear off a chip package.
In this study, we developed an electro-deposited iron-nickel(Fe-Ni) alloy sheets having low thermal expansion and high modulus for CCL applications. The Fe-Ni alloy is well known that it has a very low CTE at room temperature compared to other metallic materials. The machineability of the Fe-Ni alloy is very similar to stainless steels. And, it does not suffer from stress corrosion cracking. These thermal and mechanical characteristics including low CTE of the Fe-Ni alloys are suitable for the metallic materials of the CCL ground and power planes of PCBs.
We fabricated and characterized the Fe-Ni alloy sheets of 10~50mu;m thickness on stainless steel or copper foil substrate by electro-forming method from sulfamate nickel bath, which contained additions of iron chloride, saccharin, and boric acid. The electro-deposition process was carried out at the temperature of 60#8451; and the current density of 60mA/cm². The characteristics of the electro-deposited Fe-Ni alloy sheets were optimized by adjusting the temperature, current density, stirring speed, and composition ratios of nickel sulfamate solutions and additional chemicals.
The actual electro-deposited sheet size was 470mm #8569;370mm. The composition of the Fe-Ni alloy sheets can be controlled from 42% to 46% of nickel ratio, measuring by X-ray fluorescence(XRF) analysis. The simultaneous electro-deposition of iron and nickel exhibits the phenomenon of anomalous codeposition. The CTE of these sheets was 5.0 ~ 7.0 ppm/#8451; between 30 ~ 220#8451; measuring by thermo mechanical analysis(TMA). The Young&’s modulus of these sheets was 92 GPa at the thickness of 30mu;m. These results are comparable to those of the Fe-Ni alloy sheets fabricated by conventional rolling method.
From the results, the compatibility of low CTE and high modulus of Fe-Ni alloy sheets avoids the warpage and distortion of CCLs. Next, we will apply the Fe-Ni alloy sheet to CCL ground and power planes and evaluate the characteristics of the CCL with the Fe-Ni alloy.

Diamond is a widely known material for its many excellent properties (e.g., high thermal conductivity, high break down voltage, transparency, chemical intertness and bio-compatability). A B-doped diamond is an excellent p-type material for solar cell usage. Due to some specific properties (e.g., large chemical inertness, very high carrier mobility for both electron and holes, and high transparency), it is considered as one of the strongest candidates for photovoltic electric generation. However, in order to implement the usage of diamond in solar energy applications, properties like the i) electrochemical window, ii) possibility for interfacial charge transfer, and iii) stability of functionalized surface, have to be further studied and optimized.
In the present investigation, the adsorption of different dye molecules onto H-terminated diamond (111) surfaces, have been theoretically studied using Density Functional Theory (DFT) calculations under periodic boundary conditions. The diamond surfaces were B-doped in order to make them p-type semi-conducting. The choice of dyes was based on the match between the electronic structures of these H-terminated B-doped diamond surfaces, and the respective dye molecules. The dye molecules in the present study included C₂₀H₁₃NO₃S₄ (A), C₃₅H₃₇NO₂S₃ (B), C₃₄H₃₈OS₂(C), C₃₂H₃₆OS₂(D), and C₃₁H₃₅S₃Br(E). These dyes differ in the various functional groups, which have the role as electron acceptors. The main goal with the present study was thereby to investigate and compare the photovoltaic efficiency of the various dyes when attached to B-doped and H-terminated diamond (111) surfaces. Of a special interest was to study the i) absorption spectra of the dye, ii) degree of electron transfer over the diamond//dye interface, iii) electron transfer rate, iv) electron-hole recombination, and v) diamond//dye bond strength.
The calculated absortion spectra for in principle all of the different dyes were shown to be located in the most intense part of the sunlight spectrum. For the E dye, the spectrum were more positioned towards the UV light range. The usage of a combination of these different dyes would, hence, be an optimal choice in order to improve the light harvesting in a photovoltaic process. Furthermore, the calculations identified the LUMO's for the B, C, and D dyes to be positioned on the upper end of the molecules, which also will be the position of the electron acceptor when being excited by light. For the dyes A and E, there were though certain extentions of the LUMOs to the lower end of the molecules (i.e., towards the diamond surface), which will also increase the electron-hole recombination rates.
Calculation of electron transfer was to ensure that the HOMO of these dyes were positioned at a lower energy compared to the upper edge of the valence band of the B-doped diamond surface. Moreover, all dyes were found to bind with strong C-C covalent bonds to the diamond (111) surface.

An idealized structure of graphene presents numerous extraordinary material properties, including high electrical and thermal conductivity, flexible but high thermo-chemical stability, extremely large surface area. The performance of dye-sensitized solar cell (DSC) can be improved by balancing the electrical conductivityand electrocatalytic activity of the counter electrode. The nitrogen doped graphene was used as a counter electrode of DSC.
Anionic surfactant modified graphene oxide and cyanmide precursor is used for the production of graphene-carbon nitride (G-CN) composites. The addition of cyanamide solution in graphene oxide dispersion with continuous ultra-sonication facilitated the electrostatic interaction between the negatively charged graphene oxide with cyanamide.
The composite of nitrogen doped graphene and Au nanoparticle was effective to tune their electronic characteristics surface structure and local chemical features, and increased the photo-conversion efficiency of DSCs, The nitrogen doped graphene/Au nanoparticle counter electrode showed a conversion efficiency as high as 5.40 %, a value which is 20% higher than the nitrogen-doped grarphene only and its comparable photo conversion efficiency to Pt electrode shows the possibility of Pt-free graphene based electrode in DSC applications.

As an example of modern technology, transparent conductors have been regarded as an extremely important component in optoelectronics applications such as solar cells, OLED displays, and touch panels. The most common material for transparent conductors is ITO, which has become a market leader due to its high transparency in thin film. However, its brittle ceramic properties and expensive vacuum deposition process are limitations to its further progress. Recently, carbon based materials are intensively investigated as a good candidate for flexible electronics but with limited mechanical and electrical performances. Metal is still the best material for electronics with great electrical properties but with poor transparency and mechanical performance. Here, we developed a novel hybrid approach using commercial polyurethane film and AgNW - to demonstrate a high performance, very large area transparent and stretchable conductor by a simple, low temperature, solution processible nanowire deposition. First, we have developed and synthesized anneal free AgNWs to reduce damage on polymer substrate. Previously, one of challenges for utilizing AgNWs on polymer substrates was thermal annealing which cause polymer‘s melting. Through the various synthesis conditions control, anneal free AgNWs have successfully synthesized. In addition, we adopted solvolysis and re-condensation to enhance adhesion between nanostructures and substrates. Furthermore, through the solvolysis of polymer, surface roughness of electrodes which combined AgNWs have been dramatically decreased. This interesting result can be directly applied to organic devices such as OLED, OPV which required smooth surface for thin film devices. Electrical conductivity of transparent electrodes (over 85% transparency) have been measured on strain conditions (0~30%). We found that fabricated stretchable electrodes combined AgNWs have superior transparency and conductivity for optoelectronic devices. Further, we demonstrated highly flexible and stretchable metal conductor for transparent devices which is composed on polyurethane substrate. The highly flexible and transparent metal conductors can be mounted on any non-planar surfaces and applied for various opto-electronics and ultimately for future wearable electronics.

Transparent electrodes have been regarded as key component in optoelectronics applications including organic light-emitting diodes (OLEDs), touch panel, solar cells and wearable displays. The 1D silver nanowires (AgNWs) have emerged as candidate for the alternative of ITO due to their high conductivity and flexibility. However, the random assembly of AgNWs in traditional solution process has limited the further development of AgNW-based transparent electrodes. Here we demonstrate a cost-effective and one-step approach to aligned AgNW arrays by using a solution-based, nano-patterned polydimethylsiloxane (PDMS) assisted printing technique. With one and two step alignment process, unidirectional and rectangular AgNW arrays were produced over large area regardless of the substrate types. The degree of alignment was determined by the regulation of coating condition including coating speed, contact pressure and NW densities. As a result, exceptional performance (17.8 ohm/sq at 96.7% transmittance at 550 nm wavelength), which is about 4 times lower than those of randomly oriented AgNW networks, was achieved for transparent electrode based on aligned AgNW networks. In addition, aligned AgNW networks possess high stability against mechanical bending and stretching tests, where the conductivity was maintained without significant change in resistance even during 1000 bending test. High-performance transparent electrodes based on aligned AgNW networks would be widely used in various optoelectronics applications.

Stretchable and transparent electrodes are necessary for the applications in stretchable and wearable displays and solar cells on curved or foldable surfaces. Traditional fabrication approaches are mostly focused on random networks of carbon nanotubes and metal nanowires, in which limited deformability, contact resistance, and light scattering issues deteriorate their performance. In this study, we presented a template-guided self-assembly approach for the integration of carbon nanotubes into two-dimensional (2D) rhombic nanomesh films, where the deformation of rhombic structure accommodates the strain, greatly improving the stretchability. In addition, the regular 2D nanomesh patterns greatly reduce the contact resistance and light scattering. Our rhombic carbon nanotube nanomesh films exhibited significantly lower sheet resistance (~10 times) at a similar optical transmittance (78%), greater stretchability (~8 times less resistance increase at 30% strain), and better mechanical durability (~42 times less resistance increase after 500 stretching cycles at a strain of 30%) than those of random-network carbon nanotube films. We expect that our approach can be generalized to employ other high-quality carbon nanotubes and metal nanowires to greatly improve the properties of transparent and stretchable electrode. This work presents a new technology platform for the fabrication of transparent and stretchable electrodes.

Electrochromic devices, which dynamically change colour under applied potential, are widely studied for use in energy-efficient smart windows. To improve the viability of smart windows, many researchers are utilizing nanomaterials, which can provide electrochromic devices with improved colouration efficiencies, faster switching times, longer cycle lives, and potentially reduced costs. We report the synthesis of nanostructured tungsten trioxide (WO₃) particles and nanowires. Their electrochromic characteristics will be measured and studied. The thin layers with nanostructured materials were coated with room temperature, solution-processed method. Electrochromic devices were fabricated with various kind of electrolyte, which can be optimized to obtain higher performances.

The discovery and implementation of new amorphous materials in modern day nano-electronic and integrated circuits, specifically low-κ interlayer dielectric and etch stop/diffusion barrier materials, is an essential step to the continuation of Moore&’s law and strengthening its pathway into an undefined future. One such new amorphous material of potential interest for these and other applications is amorphous hydrogenated boron carbide (a-B_xC:H_y). Due to strong covalent bonding, high bond stiffness, and low atomic polarizability, a-B_xC:H_y is anticipated to exhibit a unique combination of low dielectric permittivity and high thermal and mechanical properties. However, due to a unique B₁₂ icosahedral network bonding, relatively little is known regarding the actual structure-property relationships in a-B_xC:H_y materials that could enable this unique combination of properties to be achieved. Therefore, a detailed experimental investigation of the full spectrum of material properties (electrical, thermal, mechanical, and optical) has been performed utilizing plasma-enhanced chemically vapor deposited (PECVD) a-B_xC:H_y thin films.
To establish an initial set of structure-property relationships, an empirical power law model was used to correlate the dielectric constant, optical disorder, electrical current density, and Young&’s modulus to the mass density of the PECVD a-B_xC:H_y thin films. This scaling theory analysis revealed the existence of critical thresholds in mass density and exponential dependencies above, below, and near the observed critical points that were consistent with those predicted by bond percolation (BP) and topological constraint theories (TCT) for amorphous systems. The application of the BP and TCT theories in turn allowed the a-B_xC:H_y structure-property relationships to be extended to the average bond coordination, dimensionality (fractal and Euclidean), and radial distribution function of the a-B_xC:H_y icosahedra-hydrocarbon network. Using the developed scaling relations and detailed structure-property relationships, we demonstrate the ability to tune the material properties of a-B_xC:H_y for low-κ interlayer dielectric applications and achieve a unique combination of low dielectric permittivity (κ ~ 3) with high Young&’s modulus (>60 GPa).

Transparent electrode is a key component in a variety of optoelectronic devices, there is a recent worldwide trend of extending that desirable transparency to non-optoelectronic devices, such as transparent batteries, transparent sensors, transparent capacitors. Indium tin oxide (ITO) is currently the most extensively used transparent electrodes due to its excellent optical transparency and high electrical conductivity. There are, however, some critical drawbacks associated with ITO related to its high cost, chemical stability and brittleness. Here we propose a highly transparent metallic network as gate electrodes, fabricating by a self-forming cracked polymer template, for the first time in organic thin film transistors (OTFT) where Parylene-C (500 nm) and DNTT (50 nm) are employed as gate dielectric and semiconductor, respectively. By applying multiple layers of metallic network as gate electrodes, the obtained OTFT showed a high mobility of 0.291 cm²V^-1s^-1, on/off ratio of 2.28 x 10⁶, and sub-threshold swing of 285 mV/dec, which is comparable to that of conventional transparent ITO gate control device (mobility of 0.295 cm²V^-1s^-1 , on/off ratio of 4.97 x 10⁷, and sub-threshold swing of 210 mV/dec). Such a performance is made possible due to high transmittance (~80%) and low sheet resistance (~10 ohm/sq) of the Ag microwire network. The performances of the devices under different silver network density and dimensions are investigated. The current device provides a new approach to replace ITO in diverse thin film devices, especially in organic thin film transistors and memory devices.

Printed electronics has been in the spotlight as a potential technology in the next generation for green manufacturing. Green technology is becoming ever more significant in industrial applications. In this manner, printed electronics are a source of technological breakthroughs that are eco-friendly, low-cost, and scalable [1].
In this study, we present a double-sided silver printing technology for advanced printed electronics applications. Using this technology, a flexible printed circuit board (FPCB) was fabricated using a hybrid printing technique that includes roll-to-roll (R2R) direct gravure printing and via-hole filling processes.
We performed experiments using an R2R large-scale mass-production system and demonstrated that these techniques could be applied in industry. A novel process that includes front- and back-side printing on a polyimide film was investigated. The gravure-printed silver electrode was formed on a sheet and laser drilled for high accuracy with a diameter of 50-500 mu;m. Laser-drilled double-sided electrodes filled with low-viscosity silver ink were used to make interconnections between the front- and the back-side electrodes. Further, to enhance the conductivity of the printed circuit, a chemical copper plating process was utilized. The resistance of the interconnected part showed a few differences (compared with the resistance before the via-filling and the copper plating process at 1-75 mOmega;), which we considered as an excellent result taking into account the initial resistance. To determine the mechanical stability, a reliability test was conducted using cyclic motion equipment. The FPCB showed good electrical properties over 100,000 cycles.
The results obtained in this study suggest that the proposed R2R double-sided printing technology is viable in a mass-production system. To the best of our knowledge, this is the first study to suggest such applicability.
Extending this research, we successfully demonstrated other double-sided printed electronic applications such as a back-gate organic thin film transistor and a back-side heater device for use in gas sensors. The R2R process was partially adopted for the fabrication of these devices, and other printing processes were used (spin coating, screen printing, etc.). This study has significance because such R2R processed double-sided printing logic can be integrated with all future process improvements in various printed applications.
References
1. J. Perelaer, et al., Journal of Materials Chemistry, vol. 20, pp. 8446-8453, 2010.
Acknowledgements
This work was supported by the Global Leading Technology Program of the Office of Strategic R&D Planning (OSP) funded by the Ministry of Commerce, Industry and Energy, Republic of Korea (10042421), and by the Leading Foreign Research Institute Recruitment Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT & Future Planning (MSIP) (grant number: 2010-00525).

For transparent conducting electrodes in optoelectronic devices, electrical sheet resistance and optical transmittance are two of the main criteria. Recently, metal nanowires are demonstrated to be a promising type of transparent conducting electrode for its low sheet resistance and high transmittance. Herein we incorporate the mesoscale metal wire concept (1-5 mu;m in diameter) into metal nanowire transparent conducting electrode and demonstrate at least one order of magnitude reduction in sheet resistance at a given transmittance. We realize experimentally a hybrid of mesoscale and nanoscale metal nanowires with unprecedented excellent performance: sheet resistance of 0.36 Omega;sq^-1 and transmittance of92%. In addition, the mesoscale metal wires are applied to a wide range of transparent conducting electrodes including conducting polymers and oxides with improvement up to several orders of magnitude. The metal mesowires can be synthesized by electrospinning methods and their general applicability opens up exciting opportunities for many transparent conducting electrode applications.

Transparent conducting electrode (TCEs) is generally dominated by indium tin oxide film, but the scarcity and high price of indium have always been an issue. Copper nanowire (CuNW) networks are one of the most promising candidates to replace indium tin oxide films as the premier transparent conducting electrode (TCEs) due to its high sheet resistance (R_s) -transmittance (T) performance, superior mechanical flexibility and low lost. However, the chemical activity of CuNWs causes a substantial increase in the R_s after thermal oxidation or chemical corrosion, which may undermine its applicability. In this work, we utilize atomic layer deposition (ALD) to coat a passivation layer onto electrospun copper nanowires and remarkably enhance their durability. The passivation layer is composed of 20-nm-thick aluminum-doped zinc oxide (AZO) for the inner layer and 1-nm-thick aluminum oxide for the outer layer. Without changing the optical transmittance, the passivated CuNW TCE shows an resistance increase of only 10% after thermal oxidation at 160 °C in dry air and 80 °C in humid air with 80% relative humidity, whereas the bare CuNWs quickly become insulating. In addition, the coating and baking of the acidic PEDOT:PSS layer increases the R_s of bare CuNW by 6 orders of magnitude, while the passivated CuNWs show an 18% increase. Our work demonstrates that this ALD method can greatly enhance the reliability of CuNW TCE and thus provide a practical solution for the degradation problem of metal nanowire TCEs.

A continuous roll-to-roll microcontact printing (MCP) platform promises large-area nanoscale patterning with significantly improved throughput and a great variety of applications, e.g. precision patterning of metals, bio-molecules, colloidal nanocrystals, etc. Compared with nanoimprint lithography, MCP does not require a thermal imprinting step (which limits the speed and material choices), but instead, extreme precision with multi-axis positioning and misalignment correction capabilities for large area adaptation. In this work, we exploit a flexure-based mechanism that enables continuous MCP with ultrasensitive (0.05N) force control. The fully automated roll-to-roll platform is coupled with a new backfilling MCP chemistry optimized for high-speed patterning of gold and silver. Optical gratings with hundred nanometers line-width at various locations on a 4-inch plastic substrate are fabricated at a speed of 60 cm/min. Our work represents the first example of roll-to-roll MCP with high reproducibility, wafer scale production capability at nanometer resolution. The precision roll-to-roll platform can be readily applied to other material systems such as quantum dots and bio-molecules.

Flexible electronics has emerged as a standalone field and matured over past decades offering the unique possibility to adjust the shape of devices at will after their fabrication. Flexible devices strongly benefited from the recent developments of organic as well as inorganic electronics, which are prepared using printing and/or thin film technologies.
To complete the family (transistors, displays, sensors, RFID tags, organic solar cells etc.), there are strong activities towards the fabrication of flexible magnetic field sensorics.^[1-3] By now, high performance magnetic sensorics relying on the giant magnetoresistive (GMR) effect are prepared exclusively using expensive and complex thin film fabrication technologies.^[3] While the most straightforward solution would be to print magnetic sensing elements at pre-defined locations on flexible circuitry.
To assure applicability of the printed GMR sensors, they should provide stable response in the consumer temperature range from 0°C up to +85°C, which require careful optimization of the polymeric binder solution with respect to the thermal expansion coefficient. Furthermore, accounting for the relatively small amplification coefficient of available printable and flexible transistors, the GMR in the range of several tens of percent under moderate magnetic fields of about 0.5 T, provided by flexible rubber based NdFeB permanent magnets, needs to be demonstrated. Indeed, printable and flexible amplifiers exhibit a DC gain as high as 50 dB and could be coupled with printable magnetoelectronics possessing MR ratios of at least 30%.
Here, we demonstrate the very first high performance printable magnetic field sensorics applicable for flexible electronics. Remarkably, after printing, the GMR sensor elements reveal up to 37% change of the electrical resistance in the magnetic field with a maximal sensitivity of 0.93 T-1 in a field of 130 mT. Furthermore, the developed magneto-sensors are fully operational in the temperature range from -10°C up to +95°C, which fulfills the stringent thermal stability requirements of consumer electronics.^[4]
With this performance, printed magnetoelectronic devices could be applied as passive components responding to a magnetic field for flexible electronics. Indeed, the output signal of the sensors can be conditioned using available printed and flexible active electronics. In combination with flexible and printable active electronics as well as wireless communication modules, the high performance magnetic field sensorics enables realization of complex platforms capable of detecting and responding to an external magnetic field. This feature is of great interest to realize smart packaging and energy efficient magnetic field driven switches.
References:
[1] D. Karnaushenko et al., Adv. Mater. 2012, 24, 4518.
[2] D. Makarov et al., ChemPhysChem (Concept)2013, 14, 1771.
[3] M. Melzer et al., Adv. Mater.2012, 24, 6468.
[4] D. Karnaushenko et al., Adv. Mater.2014 {Accepted}

Organic thin films were deposited inside a hollow space substrate with newly designed thermal evaporation heads. To avoid the development of new measurement systems to characterize the deposited layers, an organic light emitting diode was created as a proof of concept. Nevertheless, this deposition technique enables the fabrication of various organic and inorganic devices into curved and hollow substrates.
The organic films are deposited via various shower heads which have been manufactured and tested for a stable and homogeneous deposition. The main principal used is an increase of differential pressure, to decrease the mean free path of the molecules to induce at least one collision per evaporated molecule. When the base pressure is increased further it is possible to deposit a homogeneous film but with an insufficient density that would require additional thermal treatment. After various optimizations it was possible to coat a spherical flask with organic material. Possible materials need to have a vacuum sublimation temperature of no more than 300 °C. Otherwise the prolonged exposure with the heated shower head destroys the already deposited organic film.
The transparent anode was deposited using ITO plasma sputtering or a thin gold layer. The cathode is a plain metal electrode deposited through thermal evaporation. The heating of the metal pebbles just takes about 2-5 seconds and does not affect the organic films.
We have successfully shown a functional organic light emitting diode inside a hollow space substrate with a diameter of 60 mm.

Thermoelectric refrigeration is attractive for solid-state cooling of hot spots in emerging nanoelectronics device packaging. However, the cooling efficiency of devices fabricated even from high figure-of-merit thermoelectric materials such as pnictogen chalcogenides is often limited by lack of control over electrical and thermal transport across metal-thermoelectric interfaces. Here, we report the electrical and thermal contact conductivities (Σ_c and Γ_c) for two model pnictogen chalcogenides metallized with Cu, Ni, Ti and Ta, and reveal their relationships with interfacial diffusion and phase formation. Rutherford backscattering spectroscopy and X-ray diffraction measurements show that metal diffusion and interfacial telluride formation with n-Bi₂Te₃ and p-Sb₂Te₃ influence both Σ_c and Γ_c. Unlike Γ_c, Σ_c is sensitive to the type of majority carriers in the thermoelectric material. Cu metallization yields the highest Γ_c and the lowest Σ_c, correlating with maximal metal diffusion and copper telluride formation. Ni diffuses less and yields the highest Σ_c with Sb₂Te₃ due to p-type nickel telluride formation, which diminishes Σ_c improvement with n-Bi₂Te₃ interfaces. Ta and Ti contacts yield the lowest properties similar to that in Ni-metallized structures. The 10-fold higher Σ_c across Ni- and Ta-metallized Sb₂Te₃ interfaces than that seen across Bi₂Te₃ contacted with the same metals is attributed to the formation of a p-type metal telluride interfacial region. Our results suggest that a two-layer metallization scheme may be needed for obtaining optimal interfacial transport properties. Our measurements a provide framework for designing thermoelectric device metallization for realizing high solid-state cooling efficiencies.

The growth of amorphous hydrogenated boron carbide (a-B_xC:H_y) by plasma-enhanced vapor deposition from carborane-based precursors produces a unique semi-insulating material of interest for several electronic applications, including low-k interlayer dielectrics and low-k etch stops and/or copper diffusion barriers. Amorphous hydrogenated boron carbide grown from a single-source ortho-carborane (C₂B₁₀H₁₂) precursor with argon process gas has demonstrated extremely promising properties, including a low dielectric constant (k < 3.5), low leakage current (J_L < 10^-8 A/cm² at 2 MV/cm), and very good mechanical properties (hardness, H > 5 GPa). Recent experiments have hinted that the addition of different reactive or process gases (e.g., methane) during film growth can have a substantial influence on thin-film structure and properties. Herein we will discuss the influence of alternative carborane-based process chemistries, including the addition of methane and hydrogen reactive gases, on the growth of a-B_xC:H_y films for low-k dielectric applications. We will compare plasma chemistry through the analysis of optical emission spectroscopy, local physical structure through techniques including solid-state nuclear magnetic resonance spectroscopy and infrared spectroscopy, and their relationship to relevant material properties including band gap, index of refraction, dielectric constant, and electrical resistivity.

Tuning the effective work function phi; of metal contacts to high-dielectric permittivity gate oxides such as hafnia is important to align the metal Fermi level with n- and p-doped Si in metal/gate/Si stacks. Here, we demonstrate that the effective work function of Au at Au-HfO₂ interfaces can be tuned in the 0 le; phi;_Au le; 0.5 eV range by introducing a mercaptan-terminated organophosphate molecular nanolayer (MNL). Variable angle X-ray photoelectron spectroscopy indicates that all the MNLs form monolayers via phosphonic acid termini tethering onto HfO₂ and mercaptan moieties anchoring onto Au surfaces. Ultraviolet photoelectric spectroscopy measurements of the change in vacuum level of MNL-functionalized Au and HfO₂ surfaces, and Au/MNL/HfO₂ structures, allow us to deduce the contributions of each interface to the overall work function shift Δphi;_Au. We find that the S-Au bonds at the MNL-Au interface have a greater influence on phi;_Au than the combined effects of bonding at the MNL-HfO₂ interface and the intrinsic dipole moments of the molecules. Additionally, altering the organophosphonate molecular length results in a lower Δphi;_Au on the Au/MNL/HfO₂ interfaces than that seen on MNL-modified free Au and HfO₂ surfaces. Based upon these results, we describe an empirical model to describe the contributions of molecular bonding, orientation and MNL morphology on Δphi;_Au at the Au-HfO₂ interface.

Highly conductive metallic structures are indispensable components of many electronic devices, serving as interconnects in smart packaging and sensors, antennas in RFID tags, current collecting grids in photovoltaic cells and shunting lines or bus bars in large area organic light emitting diodes. Printing these patterns using metal-based conductive inks and pastes is an especially attractive approach, since it operates at ambient pressure, avoiding the necessity for expensive vacuum deposition. The process can be applied on an industrial scale, since it is fast and compatible with high-volume roll-to-roll production processes. In order to remove solvents, degrade stabilizers and establish a highly conductive percolating network between the metal particles, a post-deposition treatment is usually necessary after printing. However, since it requires exposure to elevated temperatures, a number of alternative methods have been recently developed #8210; most notably photonic flash sintering, which is both faster and more efficient, allowing higher processing speeds at reduced energy consumption. Regardless of the specific sintering process used, a highly densified, well-connected microstructure with as few grain boundaries and pores as possible is highly desired. Optimising the ink composition and sintering conditions to achieve this goal can be a labour intensive and time consuming process. In this contribution, we report on a strategy that allows monitoring the sintering process and extracting information about the electrical conductivity, densification and grain growth in real time at a rate of up to 10 Hz. This is achieved by continuously measuring the electrical and thermal properties of a test line of the ink under investigation and evaluating the results using an electrical conductivity model. Using this approach, different sintering conditions and ink formulations can be tested and compared for their efficiency in a fast and convenient manner, ultimately identifying the most suitable combination of materials and processing conditions for process specifications dictated by an envisioned application.

As a next generation display, organic materials-based display, especially, polymer light-emitting diodes (PLEDs) have took centre stage due to their practicality and functionality such as light-weight and ultra-thin device architecture as well as solution-processability that brings cost reduction. Indium tin oxides (ITOs) which have remarkably low sheet resistance and high transparency are the most widely used transparent electrodes as a pathway of the emitted light. However, their problems containing mechanical brittleness and the scarcity of indium resources have brought many efforts of finding new alternatives for ITOs.
Various transparent electrodes have been emerged to replace ITO electrode, such as graphene, carbon nanotubes (CNTs), and networks of metallic nanowires. Among them, silver nanowire (AgNW) electrodes have attracted for its low sheet resistance and high transmittance which are very close to the ITOs, and its mechanical flexibility. However, AgNW networks formed on the flexible substrate are restricted in their application, especially for organic thin-film devices, due to their inherent poor surface roughness which leads to short-circuit across the devices. Thus, most of the researches that utilize a bare AgNWs electrode which means AgNWs networks randomly dispersed on the substrates without additional treatment to flatten the rough characteristics have been limited to organic photovoltaic cells where thick active layer more than 200 nm is necessary for the enlarged light absorption. Zeng et al. reported a method of improving the morphological characteristics of the AgNW networks by burying them in the polymer matrix, and Yu et al. demonstrated AgNW electrode having smooth surface realized by utilizing transparent and cross-linkable polymer. However, the previous works require cumbersome steps for the fabrication of organic thin-film devices based on the AgNW electrodes.
Here, we demonstrate highly efficient PLEDs based on flexible AgNW bottom electrodes realized by implementing pre-bias conditioning treatment on the devices. Fluctuating features of electrical current become stabilized and the devices performances are improved in the resulted PLEDs after running them once in reverse bias (0 to - 20V). After conducting reverse bias conditioning treatment, interestingly, the leakage currents that flows without emitting of light before the device is turned on, were stabilized, and the stabilization of leakage current was accompanied by improved maximum power efficiency up to 6.0 lm W^-1 at 3.5 V while comparing 3.5 lm W^-1 at 7.5 V for the reference. We investigated the nature behind current stabilization induced by pre-bias conditioning, revealing that reverse bias conditioning made some features of AgNWs related to the leakage currents melted away and sequentially led to surface flattening of the AgNW networks that was considered as a crucial factor for the stable operation of the devices.

Materials with increasingly lower values of dielectric permittivity (i.e. low-k) are needed to prevent capacitive signal delays and power loss in both advanced nano-electronic metal interconnects and transistor devices as Moore&’s law dimensional scaling continues for the foreseeable future. However, the roadmap for implementing new increasingly lower-k materials set by the International Technology Roadmap for Semiconductors (ITRS) has been delayed numerous times over due to the difficulties of integrating such materials. Many of these challenges relate to the mixed organic-inorganic silicate composition of typical low-k materials and their susceptibility to loss of the organic component and subsequent dissolution of the inorganic silicate component in downstream plasma and aqueous HF based processes, respectively. One possible solution to this problem would be to replace the inorganic component of the low-k material with another material more resistant to aqueous HF based chemistries. Aluminum oxide (Al₂O₃) is one such inorganic dielectric which is known to exhibit a low dissolution rate in HF chemistries along with excellent electrical, thermal, and mechanical properties. Unfortunately, the reported dielectric constant for Al₂O₃ is quite high at 7 - 10. However, the dielectric constant should be amenable to reduction through the incorporation of organic constituents and microporosity.
In this regard, we have investigated as potential low-k materials hybrid organic-inorganic aluminate thin films deposited by atomic layer deposition (ALD) using trimethylaluminum and various linear and aromatic carboxylic organic acids. While pure ALD aluminum oxide (Al₂O₃) was found to exhibit a relatively high dielectric constant of 6 - 7, the hybrid organic-inorganic aluminates investigated in this study exhibited substantially reduced dielectric constant values of 2.5 - 5 while still exhibiting reasonable Young&’s modulus and hardness values of 5 - 40 GPa and 0.7 - 2 GPa, respectively. As with traditional low-k materials, the reductions in dielectric and mechanical properties for these hybrid aluminates corresponded with the introduction of some microporosity with positronium annihilation lifetime spectroscopy measurements indicating porosities of 5 - 16% and pore sizes of 0.6 - 0.7 nm. These properties suggest the suitability of hybrid aluminates as potential low-k dielectric materials for nanoelectronic applications and provide motivation for more detailed studies of the survivability of these materials in typical plasma and aqueous interconnect fabrication processes.

Flexible Plastic substrate such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate (PC) and polyimide (PI) have received attention to substrate in flexible displays. Among them, transparent PI is the promising candidate for next-generation display windows due to its excellent mechanical, physical, chemical properties and thermal stability. Nevertheless, it&’s relatively low transmittance which is smaller than glass is the key factor to successfully replace conventional display windows.
Recently, surface texturing and textured coating have received attraction to improve the transmittance of transparent flexible substrates, because of the unique optical property of suppressing the unwanted surface reflection losses. However, surface texturing cause diffuse transmission of light, i.e., a significant haze, which results blurred displays. Since high transmittance and haze have trade-off relationship, understanding light behavior in patterned structure is necessary to eliminate this trade-off, i.e., achieving high transmittance and low haze.
Rigorous coupled-wave analysis (RCWA) simulation tells us it is possible to make high transmittance and low haze with sub-wavelength nanostructures. The optimized nanostructure on PI film was found by RCWA simulation and this structure was realized by laser interference lithography (LIL), which guarantee nearly perfect periodicity in sub-wavelength scale and be well-matched with calculated results. The designed structure showed a remarkable enhancement in the light transmission to 97% compared with bare PI film (89%) and optical clarity in the wavelength range 400-700 nm. Furthermore, the nanostructure was not be damaged by bending larger than 5000 times, that is, very suitable for transparent flexible substrates.

Ultralow-k porous pSiCOH dielectrics deposited by PECVD have been integrated in ULSI interconnects since the 45 nm node. At this node, a material with a dielectric constant of k=2.4 has been successfully integrated at the 2X metallization levels. The scaled dimensions of subsequent nodes required the increase of k to 2.55 for maintaining the reliability of the interconnects. However, a dielectric with a lower k is needed for reducing the escalating parasitics resulting from continuous scaling of the dimensions from node to node.
The porous ulk films are currently prepared by a subtractive method, depositing the films from a mixture of skeleton and porogen precursors, and exposing the deposited films to a UV cure. The so-called ‘dense&’ SiCOH dielectrics (k=3.0 - 2.7) used in the industry are fabricated by PECVD from a single precursor, such as octamethylcyclotetrasiloxane (OMCTS). We modified the PECVD conditions for this same precursor, and exposed the deposited films to UV curing, to develop pSiCOH dielectrics with k ge; 2.4. By avoiding the use of an additional porogen precursor, the new, advanced pSiCOH films are characterized by pore sizes smaller than other dielectrics with k = 2.55. The new films contain a relatively high carbon content, with a significant fraction of it in Si-CH₂-Si bridging matrix bonds, that together with the small pore sizes, makes them resistant to processing induced damage (PID). The low leakage and high breakdown voltage in combination with the high PID resistance result in reliable integrated interconnect structures with pSiCOH k=2.4, having time dependent dielectric breakdown (TDDB) characteristics superior to those obtained with the current pSiCOH films with higher k=2.55. This indicates that the advanced pSiCOH films with k=2.4 and fabricated from OMCTS are strong candidates for interconnect dielectrics for sub-10 nm nodes.
This work was performed by the Research Alliance Teams at various IBM Research and Development Facilities.

The industry continues to work on the integration of low-k interlayer dielectrics (ILD) in order to lower interconnect delay. The momentum to implement these films has slowed in recent years due to the challenges of working with porous thin films. Low-k ILDs (k~2.0) exhibit 40-50% porosity with an interconnected pore network. The increased porosity can lead to damage and increased roughness during patterning, and can allow precursor penetration during the metal barrier deposition. These challenges are currently reducing interconnect reliability and inhibiting combined capacitance and resistance scaling.
To mitigate the problems of integrating a porous ILD, we have utilized the approach of pore stuffing. In this process, a sacrificial material is infiltrated into the pores of a fully cured ILD. The resultant film is non-porous with increased mechanical properties. The benefits of a non-porous material are utilized during both patterning and metallization. Once the metallization process is complete the sacrificial material is removed to restore the properties of the low-k ILD.
In this paper, we will discuss the challenges of finding a pore stuffing material that can fill the pores of the ILD, remain in place during dual damascene processing and can then be removed from the low-k ILD post metallization and CMP. In addition, we will show how pore stuffing improves trench profiles, and how it prevents metal penetration during barrier deposition. Finally the successful implementation of this process will be demonstrated and integrated capacitance improvement will be presented.

Although electronic devices based on wide band gap semiconductors (WBG, e.g. GaN and SiC) are eminently suitable at high temperatures and in harsh environments, these properties cannot be fully taken advantage of without an appropriate metallization. High-temperature electrical- and morphological-stability of interconnect is critical for electronic systems based WBG semiconductors. In this context, Ag is found to have several interesting properties. On the other hand, Cu is dominant interconnect in conventional integrated circuit electronics. We have therefore investigated the thermal stability of both Ag and Cu films with Ta and TaN films as diffusion barriers and/or surface-capping layers.
Our investigation of Ag films with either Ta or TaN diffusion barrier layers shows stability in sheet resistance upon annealing up to 600 °C. However, degradation of the Ag/Ta and Ag/TaN films occurs at 750 and 700 °C, respectively, mainly as a result of void formation and Ag agglomeration. Copper films with either Ta or TaN diffusion barrier layers show clear differences in the behavior of the two barriers. In the Cu/Ta sample, Ta starts to diffuse up to the surface after annealing at 600 °C. These Ta atoms have probably diffused to the Cu surface via fast-diffusing grain boundaries in the Cu film. At the surface, they have most likely formed a Ta_xO_y layer after having reacted with residual oxygen in the annealing furnace. The Cu out-diffusion should thus be regarded as reaction driven. In the Cu/TaN sample, no diffusion was observed. For both Cu samples with either Ta or TaN diffusion barrier, the sheet resistance stays stable up to 800 °C.
Sandwiching Ag #64257;lms between Ta and/or TaN layers is found to electrically and morphologically stabilize the Ag metallization up to 800 °C, compared to 600 °C for uncapped films. However, the barrier layer plays a key role and TaN is found to be superior to Ta, resulting in the best achieved stability, whereas the difference between Ta and TaN caps is negligible. The β-to-α phase transition in the underlying Ta barrier layer is identified as the major cause responsible for the morphological instability observed above 600 °C. It is shown that this phase transition can be avoided using a stacked Ta/TaN barrier. No observable Ta diffusion in Ag is found.
The cap/Cu/barrier stack shows an appreciable increase in sheet resistance above 600 °C for the asymmetric combinations Ta/Cu/TaN and TaN/Cu/Ta. This degradation is shown to be closely related to a substantial diffusion of Ta across the Cu film and on to the TaN layer, where Ta₂N forms. The symmetrical combinations Ta/Cu/Ta and TaN/Cu/TaN show only small changes in sheet resistance even after anneals at 800 °C. A less pronounced Ta diffusion into the Cu film is found for the Ta/Cu/Ta combination.
Investigation of Ta diffusion and segregation in the Ag and Cu grain boundaries is underway. Their influences on electromigration in Ag and Cu are being studied.

The presence of weak Cu-oxides has detrimental implications for the adhesion, moisture sensitivity, stress- and electro-migration of Cu bondlines in advanced packaging, often leading to premature device failure. To lower costs, packaging technologies must rely solely on organics for bonding and barrier functions but face severe challenges inhibiting Cu migration especially as scaling necessitates finer pitch and line spacings. Multi-process and multi-layer barrier solutions exist; the cost to implement those solutions on packaging is, however, prohibitive.
We report on a novel low-cost, single-step sol-gel synthesis route capable of reducing the weak Cu-oxide while simultaneously depositing a high-performance hybrid film, which act both as an adhesion layer at the Cu/epoxy interface as well as a barrier film that prevents moisture degradation and Cu stress- and electro-migration. We formulated our sol-gel composition and process, and achieved a threefold increase in interfacial adhesion with a graded hybrid film ~110 nm thick. This result has important implications. First, this is a single-step process without the pre-removal of the native Cu-oxide which is immediately formed upon exposure of copper to air, implying a cost-efficient solution for industrial incorporation. Second, an increased interfacial adhesion implies a higher bond density at the Cu/epoxy interface, leading to reduced Cu stress- and electro-migration. X-ray photoelectron spectroscopy (XPS) depth profiling of the film showed a reduction, if not complete elimination, of the native Cu-oxide during film deposition. Furthermore, moisture assisted debonding kinetics at the interface is also found to be markedly reduced compared to the case of direct Cu-epoxy bonding, due to the shielding of the moisture sensitive part of the molecular network (Si-O bonds) by moisture-insensitive components (Zr-O and C-C bonds). Lastly, this low-cost single-step processing route is consistent with emerging 3D packaging technologies.

It is commonly established that 3D integration is a key technology for current and future system-on-chip (SoC) manufacturing. The potential applications panel is very wide, extending from mobile and wearable electronic goods to very high-performance servers and micro-servers and automotive products thus requiring multiple designs and specifications. Typically, the TSV integration appears to become one of the key modules for 3D integration and especially for metal considerations.
The size and aspect ratio of the TSV vary from very large diameters for TSV last integration including low cost barrier/seed layer and copper liner deposition for WLP and sensors integration to very aggressive Mid-TSV structures with very high aspect ratio for large silicon interposers and multiple technologies partitioning. On one hand, large interposer size will require thicker silicon thickness to control the stress induced bowing of the substrate during process and flip chip while on the other hand, TSV diameter will have to be lowered to increase connection density while keeping actual silicon thickness for wafer handling. In both case, higher aspect ratio will be required.
The presentation will describe the challenges and solutions proposed for the different process steps involved for which, actual technological solutions are reaching their limits.
This starts by the deposition of a barrier to copper diffusion that needs to be conformal, efficient at various temperatures and current densities while keeping acceptable integration cost. TiN MOCVD deposition , in this objective, can be considered as an attractive solution and will be presented. Copper seed appears a critical process because of natural lack of step coverage of widely used PVD solutions. Alternative technologies must be evaluated for next product generation such as CVD deposition or electrochemical seeds. The copper filling is also to be assessed in term of manufacturing cost, throughput, reliability and extendibility of actual chemistries to higher form factor (> 15:1 aspect ratio). New generation of TSV fill chemistries are proposed and will be discussed.
At least, one of the critical aspect for TSV evaluation and integration is the difficulty to characterize deposited films in 3D structures and specifically on TSV sidewalls that are the most active parts of the Via as most characterization methods are designed for planar structures. New methodologies will be described and discussed. The principal aspects described will be the structure, efficiency of barrier films as well as stress impact of fully filled TSV on surrounding silicon that need to be controlled to lower the Keep Away Zone (KAZ) to increase TSV density.
At least, integration results of >10:1 aspect ratio TSV will be presented and discussed.

The drive to scale down line widths in the back end of the line (BEOL), is impeded by the persistent polygranular microstructure in copper which introduces more diffusion pathways for copper atoms and which leads to faster electromigration failure times. To improve interconnect reliability a capping layer was added to the copper at the dielectric interface to reduce interface diffusion, but they do not address the grain boundary (GB) diffusion. Aluminum, Silver, and Manganese have been looked at to slow down grain boundary diffusion by increasing the activation energy, but are not well understood and there are many conflicting reports as to their efficacy.
One difficulty in improving interconnect performance through alloying is a lack of information regarding segregation interactions at grain boundaries and interfaces when minute concentrations are introduced into the copper lattice. Historically, solute was expected to pin GBs, increase resistivity, and reduce diffusivity by GB “stuffing”. More recent studies on GB complexions suggest a more complicated relationship, which can explain these results as well as cases where segregation increases mobility or enhances diffusion. To apply complexion analysis in technologically relevant alloy systems, we have developed recipes for co-electrodeposition of dilute copper alloys including Cu(Ag), Cu(Sn) and Cu(Co). Secondary Ion Mass Spectrometry (SIMS) was used to analyze the incorporation of solute.
Atomic imaging in a scanning transmission electron microscope (STEM) with concurrent electron energy loss spectroscopy (EELS) are used to visualize structure, quantify segregation and investigate bonding changes induced by solute at grain boundaries and interfaces in polygranular copper films. By understanding these interactions and pathways of alloying solutes in copper microstructures, we can more accurately predict alloying behavior and how they inhibit or promote grain boundary diffusion. Understanding how these alloys interact with grain boundary diffusion pathways and interfaces will enable grain boundary and interface engineering solutions to obstacles faced by semiconductor manufacturers as more aggressive feature sizes are pursued.

The adhesion of polymeric materials to inorganic substrates is of critical importance to the reliability of flip chips, emerging 3D packaging, and flexible multilayer device technologies. A ubiquitous challenge for such packaging technologies includes the delamination of an underfill epoxy from an inorganically passivated substrate which can lead to severance of interconnect lines and an increase in residual and thermomechanical stresses. The synergistic effects of mechanical loads due to thermal expansion mismatch or flexing, temperature cycling, and moisture can weaken the adhesion of these polymer-silicon interfaces. As a result, the underfill epoxy tends to fail adhesively with significantly lower fracture energy compared to the cohesive fracture energy of the epoxy layer.
We demonstrate that the introduction of a compositionally and functionally graded hybrid adhesion layer at the interface between an epoxy and a passivated inroganic substrate can greatly increase the adhesion energy of the interface. We leverage various processing techniques such as dip coating, spray coating, and spin coating in order to deposit these compositionally-graded layers. We show that deposition from a heterogeneous solution presents an innovative strategy to deposit films with unique properties. These may be unobtainable with classical synthesis routes because of the independent nano length-scale control of both the bulk and interfacial properties of these materials. In order to improve the scalability of this system, we developed graded spray coating techniques to precisely control the deposition of the precursors and obtain compositionally-graded layers with optimized adhesion. This result presents a promising large-scale industry-relevant solution to improve the reliability of modern multilayer devices.

The limitation of improving the semiconductor device performances is miniaturization. Current 3D TSV technology has overcome the limitation of miniaturization. It has novel advantages which are greater density at the same area, high performance by its shorter signal line, lower power consumption, and so on. Main method to form a silicon TSV production is DRIE with going through the Bosch process by its fast process time, easy to make high aspect ratio pattern and so on. But this process makes rough surface such like scallop on via sidewall, so it can effect to deposit seed, barrier and via filling process. And stress is integrated at the peak of sidewall, via filling Cu is creaked or peeled off at the contact part. Thus creates the problem of increasing the leakage current. In this study, to solve this problem, the Layer-by-Layer flexible materials deposition was used to flatten via walls. LbL layer is formed by stacking with PAH (polyallylamine hydrochloride) and PSS (polystyrene sulfonate) on the rough via wall of the TSV. As increasing the thickness by forming multiple layers of PAH and PSS layers, the roughness of the rough surface over the scallop in via pattern with a high aspect ratio is decreased. Using Finite Element analysis with ANSYS, sidewall damages are measured as the post annealing temperature is increased. The comparison between smooth or rough sidewall surfaces, low stress was measured in LbL smooth surface.

The burgeoning market for flexible electronics is fueling a critical need for non-planar, shape-conforming and space-efficient circuit architectures. 3D printing (3DP) could provide this long-sought control over circuit geometries. We pattern highly conductive interconnects by combining direct ink writing with pulsed infrared, inline laser sintering (ILS). These features can be routed arbitrarily in free-space, enabling the creation of freestanding micron-resolution helices and meandering interconnects. We can modulate their conductivity by varying the laser power and pulse duration during printing. ILS-3DP offers unprecedented control over 3D interconnect geometries and performance.

Metal nanowire transparent conducting electrodes (TCEs) have been widely developed for their promising sheet resistance-transmittance performance, excellent mechanical flexibility, and facile synthesis method. How to lower the sheet resistance (R_s) without compromising optical transmittance (T) is one of the key issues in enhancing the performance. Solution-synthesized metal nanowires can be dispersed in organic solvent, so they can be processed by many roll-to-roll-compatible coating method such as electrospraying and rod-coating. However, the requirement of post annealing to fuse the junction limits the choice of the underlying substrate, and the finite length of nanowire often results in isolated nanowires which become defects in the transparent conducting film. Here we combined electrospinning and electroless deposition to synthesize interconnected, ultra-long metal nanowire networks. By reducing both the amount and the resistance of junctions, our electrolessly deposited metal electrospun nanowire transparent electrodes exhibit excellent performance. For both silver and copper nanowire networks, the sheet resistance-transmittance performances reach as high as (10 Omega;/sq, 90%), which is by far the best performance among all wet-chemistry synthesized metal nanowire TCEs. The bending tests suggest our electrolessly deposited metal nanowire TCEs are high flexible, and we also synthesize a 11-cm large sample to demonstrate it scalability. Besides its scalability, this method is performed under ambient temperature and pressure, so there is no requirement for heat-resistant flexible substrate. We believe our novel approach can open new opportunities for flexible electronics and roll-to-roll large-scale manufacturing.

The flexible transparent electrode has been studied to employ wearable electronics (e.g. display, solar cells and touch screen panel). Conventionally, the indium tin oxide (ITO) has been widely used for transparent electrode. However, the roll to roll process for mass production cannot be applied to production of ITO, because of its brittle characteristics. To solve these problems, the mesh patterns using Ag nano ink were developed using various printing technique such as gravure, reverse off-set and ink-jet printing.
In this work, the mesh pattern using Ag nano ink was printed on PET substrate by reverse off-set printing system. The printed Ag mesh patterns were sintered using in-house flash light sintering system at room temperature and under ambient condition. The effect of flash light irradiation conditions (e.g. light energy, pulse duration and pulse number) was investigated using the in-situ sheet resistance measurement during the flash light sintering process. The microstructure of the sintered Ag mesh patterns and the thickness and width of Ag pattern lines were observed using a scanning electron microscope (SEM), and confocal microscope. Also, optical characterization such as transmittance and haze was analyzed using spectrophotometer. Finally, highly transparent Ag mesh pattern with low sheet resistance could be obtained through the optimized flash light sintering condition without damage to the PET substrate.

We report a comprehensive simulation and experimental study on the optical and electronic properties of uniform and ordered copper nanomeshes (Cu NMs) to determine their performance for transparent conductors. Our study includes simulations to determine the role of propagating modes in transmission and experiments that demonstrate a scalable, facile microsphere-based method to fabricate NMs on rigid quartz and flexible polyethylene terephthalate substrates. The fabrication method allows for precise control over NM morphology with near-perfect uniformity and long-range order over large areas on rigid substrates. Our Cu NMs demonstrate 80% diffuse transmission at 17 Omega;/square on quartz, which is comparable to indium tin oxide. We also performed durability experiments that demonstrate these Cu NMs are robust from bending, heating, and abrasion.

As an alternative to the traditional indium tin oxide transparent electrode, solution-processed metal nanowire thin film has been a promising candidate due to its high electrical conductivity and flexibility. However, high contact resistance between the nanowires remains a major challenge to improving the performance. Until now, additional processing steps such as joule heating, mechanical pressing, heating and plasmonic welding have been presented to follow the deposition process. Here, we have investigated a one-step process of welding and deposition of nanowires on flexible film. An electric field-assisted spraying method newly developed in this study generates finely charged droplets at high flow rate and induce Joule heating and welding at junctions within the nanowire network without post-processing steps, which is why it is named as the self-welding process. The silver nanowire thin film could be uniformly deposited evenly on a large area substrate, and concurrently carry out spontaneous self-welding between the nanowire network. The transparent electrode of the silver nanowire prepared by the concurrent deposition and the self-welding process could have highly uniform and low sheet resistance.

We demonstrate scalability and application versatility of oxidative chemical vapor deposition (oCVD) as a method for fabrication of conductive polymer thin films. oCVD is a solvent-free method which yields high-quality conformal films applicable to almost any substrate, including paper and textiles. Excellent functionality of the films combined with the low deposition temperature and mild vacuum requirements make this technique suitable for various applications, particularly where standard vapor- and solution-based deposition techniques deliver poor results.
We fabricate transparent conductive poly(3,4-ethylenedioxythiophene) (PEDOT) films across large-area substrates. PEDOT films, deposited in a custom-built roll-to-roll (R2R) reactor, retain the same chemical structure and electronic properties as those deposited in a small-scale reactor, as shown by Fourier Transform Infrared Spectroscopy and conductivity measurements. The elevated substrate temperature leads to conductivities up to 180 S cm^-1 for 100 °C, an order of magnitude increase from depositions at 45 °C. The corresponding transmittance of the highly conductive films is ~93%. Work is in progress to increase the conductivity values further, including the use of higher substrate temperatures and post-deposition doping. Conductivities >1000 S cm^-1 can be achieved using these mechanisms.
Furthermore, we demonstrate excellent material&’s uniformity of the oCVD PEDOT films across an area of approximately 8.5 x 13” (~21.5 x 33 cm), and at the substrate temperature of 100°C. Conductivity deviation of only 10% is achieved for stationary substrates with the lateral deviation of only 5.5 %, rendering the technique suitable for R2R operation. Large-area conductive polymer films are deposited on A4-size transparent foils and paper, for the first time illustrating potential for large-scale application of oCVD PEDOT in organic solar cells or organic light-emitting displays. The estimated price of the PEDOT films, 0.2-1.0 $/m², is comparable to PEDOT:PSS and significantly lower than ITO. Deposition in a continuous R2R mode is currently under investigation.
Finally, we utilize conformal and substrate-independent nature of oCVD to fabricate conductive textiles via patterned deposition of PEDOT on cotton/spandex T-shirts. The coatings have high-quality conformal character, as shown by Scanning Electron Microscopy and Energy-Dispersive X-ray Spectroscopy analysis. The textile conductivities >30 S cm^-1 are among the highest reported for PEDOT-based vapor- or solution-based imprinting methods. At the same time the textile exhibits excellent mechanical durability demonstrated through extensive twisting, stretching, and washing in water. Such functionality combined with deposition versatility opens up novel opportunities for integration of organic electronics into everyday life.
This work was supported by Eni SpA under the Eni-MIT Alliance Solar Frontiers Program.

Transparent conductive strain sensors with large stretching and bending capabilities are sought for wearable electronics and biosensors in direct contact with human tissue for a variety of medical and bionic applications. A few proof-of-concept demonstrations have been recently developed based on the concept of percolation networks of short conductive fibers such as inorganic nanowires and carbon nanotubes. These prototypes were fabricated by drop-casting or spin-coating of expensive nanostructures dispersed in solutions. Their performance is usually limited by the lack of control on the nanostructure order that causes large local variations and performance hysteresis. Here we report a new route to manufacturing transparent large-strain sensors from downsizing traditional metallic wires, and precisely depositing them on soft polymer films. Compared to randomly deposited nanostructures, these devices offer higher electrical and mechanical performance owing to their continuous length, and could enable a scalable cost-efficient manufacturing process.
We fabricate continuous metal wires with sub-micron diameter and continuous length by a modified wire drawing process. Commercially available 25 micron diameter palladium wires are encapsulated in a silica capillary, heated by a CO₂ laser, and then drawn at high speeds of up to 0.3 m/s to form a centimeter-long silica-coated palladium fiber with diameter down to 200 nm. Bare palladium nanowires were obtained after hydrofluoric acid etching. The wire size and continuity can be precisely controlled by varying the parameters in the process. During the laser-assisted drawing process, the metal forms bamboo-like grain structure, in which individual crystals span the majority of the cross section of the wires. Both SEM and TEM imaging confirm this chained structure with a fine nanocrystalline shell near the boundary and negligible surface roughness. The choice of palladium is driven by matching its relative softening and melting temperature to silica glass. By using the different glass compositions we are expanding this work to other metallic wires including copper and aluminum.
The electrical and mechanical properties of the as-drawn palladium wires were investigated. The as-pulled palladium wires exhibit a high conductivity of 5.57E6 S/m and a fracture strain of 2.9%. By measuring the electrical resistance of the as-pulled wires during tensile testing, the gauge factor, defined as the specific resistance change to mechanical strain ratio, is determined to be 1.13, which is similar to the bulk scale properties. The wires can be easily transferred and encapsulated in a PDMS thin film. Moreover, by pre-staining the PDMS before transfer, the wires form in-plane wavy buckles that allow the accommodation of higher strains. Finally, by studying the relative effects of PDMS surface deformation, wire elastic buckling, and slip, we reveal the limiting mechanisms of performance of flexible conductive electrodes.

In view of initial progress in hybrid organic/inorganic devices, it is highly desirable to achieve efficient basic devices, such as Schottky diodes and p-n junction diode based on ZnO and organic semiconductors to optimize the technology for inorganic/organic hybrid devices. ZnO as the inorganic part in hybrid devices offer several advantages such as (i) devices in which ITO is used as transparent conducting electrode, can be replaced with highly conducting transparent ZnO (CTZO), (ii) efficiency and stability of organic based optoelectronic and photovoltaic devices can be enhanced substantially using semiconducting and highly conducting ZnO (iii) as grown and doped ZnO with group III impurities are always n-type, but it is impossible to obtain stable p-type ZnO, so ZnO based p-n homojunctions are difficult to achieve whereas p-type organic semiconductor are abundant, so rectifying p-organic/n-ZnO based p-n heterojunction would be a potential device for future applications. Here we show how (i) ZnO used as n-type layer, (ii) CTZO as electrode, and (iii) metal (Cu, Zn, Co) phtahlocyanines (MePcs) as p-type organic layers in ZnO/MePc based inorganic/organic hybrid devices.
The minimum resistivity of the order of 10^-4 Omega;-cm has been obtained in ZnO doped with group III (Al, Ga, In) elements. Doped CTZO film has been be further used as Schottky contact in MePc based Schottky diode. The capacitance-voltage (C-V) characteristics of Al/MePc/Au and CTZO/MePc/Au Schottky diodes show similar built-in-potential (V_bi) of 0.98 V which is close to the difference in work function of Au (5.2 eV) and Al or CTZO (4.2 eV) establishing that CTZO behaves as metal electrode with similar work function to that of Al. Almost similar value of acceptor concentration (~10¹⁵ cm^-3) in CuPc has been obtained from C-V characteristics of Al/MePc/Au and CTZO/MePc/Au Schottky diodes. These observations indicate the absence of interface states at metal/organic interface in MePc based Schottky diodes.
Further, we have fabricated ZnO and MePcs based hybrid p-n junction diodes using CTZO film as bottom electrode and Au as top electrode. The CTZO and Au serve as Ohmic contact for CTZO/ZnO and Au/MePc interfaces respectively. The rectification ratio obtained in our devices is the order of 10⁴ and the current density of 0.6 mA /cm² at 3V. The V_bi of hybrid diode has been found to be 0.65V, obtained independently by two different methods, from 1/C²vs. V plot (0.65V) and from the position of peak due V_bi in C-V characteristics. This value of V_biis close to the value obtained by the difference between the work functions of the inorganic and organic semiconductors. Therefore, it has been established that the V_bi for organic Schottky diode depends on the difference of the work functions of the Schottky metal contact, while the V_bi of hybrid p-n junction is determined by the difference between the work functions of the inorganic and organic semiconductors.

Recently, transparent conductive electrodes are widely used for touch screens, active-matrix LCDs, solar cell and wearable electronics. The transparent electrodes were made of indium tin oxide (ITO), fluorine doped tin oxide (FTO), graphene, carbon nanotube (CNT) and silver nanowire. The silver nanowires among them had been studied because of the lowest sheet resistance (< 10- 20 Omega;/sq) at 80% transparency, which is higher than other materials.
In this work, the silver nanowire inks with hydroxypropyl methylcellulose (HPMC) binders were coated on polyethylene terephthalate (PET) substrate and welded via flash light combined with ultra violet-A (UV-A) light irradiation to achieve highly conductive transparent electrode. The coated silver nanowire films on PET substrate were firmly welded at room temperature and under ambient conditions using an in-house flash light sintering system and UV light. The effects of HPMC binder weight fraction for silver nanowire ink and the combined light system (flash light and UV-A light) irradiation conditions (light energy and pulse duration) were optimized and their effects on the silver nanowires and HPMC binders were studied. For reliability test of the welded silver nanowire transparent conductive films, the bending characteristics were analyzed using bending fatigue tester. Surfaces of the welded silver nanowire films were analyzed using a scanning electron microscope (SEM). Also, optical characterization such as transmittance and haze were measured using spectrophotometer. From the study, highly conductive and transparent silver nanowire film with high reliability could be obtained via complex light welding process at room temperature and under ambient conditions.

The doping of organic electronic materials is accomplished by either oxidation (p-doping) or reduction (n-doping) of a pi-conjugated host. The low ionization potentials of highly reducing n-dopants and host radical anions makes n-doping a much greater challenge than p-doping. However, many modern electronics such as transistors, complementary circuits, light-emitting diodes, photovoltaics, and thermoelectrics either require or benefit from both n- and p-type conduction. It is a long-standing goal of the organic electronics community to mass produce devices by exploiting modern-printing processes. In the present work, this goal was advanced by the introduction of new solution-processable n-dopants and high-conductivity n-doped materials for use in electronic inks.
Previously, we discovered that hydride-reduced benzimidazolium compounds (DMBI-H) dope PC61BM by hydride transfer. Following this study, a new class of dopants based on benzimidazoline dimers ((DMBI)2) were developed to eliminate the dependence of the doping reaction on the hydrogenation thermodynamics of the host. Here we report on the synthesis, characterization, and doping mechanisms of (DMBI)2 compounds, and their use to form the doped state in various acceptors. The reaction rates, polaron intensities, Fermi level shifts, film morphologies, and conductivities of several acceptors doped by either (2-Cyc-DMBI)2 or the hydride dopant analog 2-Cyc-DMBI-H were compared to better understand the connection between the microscopic dopant structure and the bulk properties of the solutions and films. We also developed several new n-dopable conjugated polymers that give higher conductivities when n-doped by (2-Cyc-DMBI)2 than what has been described in literature for solution n-doped polymers. A careful study of the energetic and structural factors that influence the n-doping of these new polymers will direct the design of even higher conductivity n-type printable electronic materials.

Micro manipulation technique of a dielectric object is required for the micro fabrication of three-dimensional devices, for example deposition of a micro optical element such as micro lens and micro LED, and repairing of individual defects of devices. In micro manipulation, the adhesional force is dominant since it is proportional to the first power of the object size, whereas the gravitational force is proportional to the third power. Adhesional phenomena can therefore be used to hold the object. A repulsive force, however, is also necessary to detach the object from the manipulator. The electrostatic force has been shown to be effective as a repulsive force for micro manipulation. A method using a single probe has been studied for a micro manipulation technique. The manipulation system consists of three elements: a conductive probe as a manipulator, a conductive plate as a substrate, and a dielectric particle as the target object for manipulation. In our past study, picking up/placing of the dielectric particles were demonstrated by applying a rectangular pulse voltage between the probe and the plate. It was suggested that weak surface conductivity of the dielectric particle affects its behavior. However, the success rate of the picking up/placing operation was 42% and further improvements are required based on the quantitative analysis and measurements. In this study, for the highly-reliable picking up/placing operation, we determine the duration and voltage magnitude of the pulse voltage. In order to understand the mechanism of the particle&’s behavior, a physical model with surface Coulomb force and adhesional force is proposed. “Detachment time”, defined as the time between the voltage rising and the detachment, and “return time”, defined as the time between the voltage rising and the return, are focused for the analysis and measurements. By applying the pulse voltage of which duration is between the “detachment time” and “return time”, the particle is picked up/placed. Theoretical analysis based on the balance between surface Coulomb force and adhesional force shows the prediction of the “detachment time” and “return time”. The theoretical prediction is verified by the experimental measurements of the “detachment time” and “return time” of soda-lime glass particles with radius of 20mu;m and 40mu;m. Based on the analysis and measurements, “Success/Failure diagram” for the picking up/placing operation is described with the pulse duration and voltage magnitude as the main parameters. This diagram is experimentally confirmed by the manipulation result of soda-lime glass particles with radius of 20mu;m and 40mu;m. This “Success/Failure diagram” indicates the optimal pulse voltage parameters for the micro manipulation.

For the fabrication an organic thin film transistor (OTFT) array on plastic film by printing technique were required to make fine patterns, less than 10 #61676;m width. We already success to fabricate the OTFT arrays on plastic film by microcontact printing technique and reverse off-set printing technique. The source and drain electrodes of OTFT printed by microcontact printing an reverse off-set printing have 5 #61676;m line width and 5 #61676;m channel distance by using silver nano-particle ink. The narrowest line width was 500 nm by microcontact print, which has improved inking process.
Single micrometer line width is enough to fabricate the OTFT arrays. To control the pattern thickness and to improve the overlay precision are essential to manufacture the OTFT by printing technique. We will introduce the fine printing processes, which are improved and developed based on microcontact printing technique for manufacturing the OTFT.

The emergence of metal nano-inks opened new opportunities for the fabrication of electronics on large-areas. These inks can be printed on flexible substrates like plastic, paper, textile, etc. Recently, the additive printing technique by inkjet was increasingly adopted because it allows minimal material waste and fast prototyping. One of the relevant challenges for the use of metal nano-ink on flexible substrates is the post-processing step. This step requires usually heating temperatures above 150°C which makes the processing of inks on flexible and temperature-sensitive substrates very challenging.
In this work, the photonic flash method (PulseForge 3200 by Novacentrix) is used for selective sintering of inkjet-printed silver nano-ink on 125 µm thick Kapton substrate. The process uses broadband flash lamps to heat the ink without damaging the underneath substrate. A special setup for rapid and in-situ electrical resistance measurement under flash-light is constructed. We show that the initial square electrical resistance of few Ohms can be rapidly decreased down to 120 m#8486;/sq by using optimal exposure energy density of 2 -3 J/cm² and of about 20 applied pulses. This energy is tuned by adjusting both the pulse duration in the range of 25 to 60 µs and the applied voltage from 300 to 400 volts. We show also that tuning of exposure energy must be realized taking into account the effect of pulse frequency. Indeed, the increase of the frequency results in heat accumulation within the sample and a high temperature can be reached in a few ms. For undamaged sample, frequencies between 1.2 and 2.2 kHz were used thus resulting in a total optimized processing time of 20 ms.
In parallel, microstructure evolution of photonic sintered samples under optimal exposure energy and different pulse frequencies (0.8 to 2.2 kHz) was studied by high-resolution X-ray diffraction. The crystallite size evolution is investigated using Warren-Averbach method on {200} and {400} peaks. The analysis shows that the liquid-like printed silver layer exhibits mean initial crystallite size of about 15 nm which was also confirmed by TEM. The increase of pulse frequency results in rapid drop of electrical resistance. This process is shown to desorb lattice defects and to increase the crystallite size up to 32 nm. Further increase of pulse frequency leads to larger crystallite but the sample exhibits damage and interfacial delamination. SEM and HR-TEM analysis have clearly confirmed that the sintering process is realized without grain growth and only local inter-particles contact increases (necking). The decrease of electrical resistance is explained by the enhancement of surface diffusion and the increase of the neck-size up to 25 nm.
These results confirm the benefits of using millisecond photonic flash method for sintering metal nano-ink on flexible substrate. This process can be used for further integration and fabrication of printed electronics in Roll to Roll equipment.

Solution-processed metal nanowire-based systems offer high transparency, conductivity, and flexibility, making them ideal electrodes for energy devices and flexible electronics. However, fully realizing the green potential of metal nanowires requires the development of low cost additive patterning techniques. Here we will discuss the direct patterning of silver nanowire-based inks using gravure printing, an industrially proven method with high resolution and throughput. Optimizing ink parameters and contact pressure has allowed us to pattern transparent conductive (R_S as low as 40 Omega;/#9744;, T_opt > 90%) electrodes on both plastic (PEN) and flexible Willow glass substrates. Using gravure cell sizes as small as 60 mu;m yields printed line widths as low as 100 mu;m at printing speeds of 1 m/s.
The rheology and adhesion of the nanowires is enhanced by co-dispersing silver nanowires and Indium Zinc Oxide (IZO) sol-gel precursors (Zn(Oshy;₂CCH₃)₂, In(O₂CCH₃)₂) in a mixture of 2-methoxyethanol and monoethanolamine. This chemistry increases viscosity relative to pure nanowire dispersions and alleviates printing artifacts (streaks and residue) attributed to blading of 1D silver nanowires (15 mu;m length x 30 nm diameter). After a low temperature (125°C), UV-assisted drying process, the IZO matrix appears to encapsulate the silver wires, preventing significant conductivity degradation during heating to 400°C (samples on Willow Glass). Furthermore, the sol-gel composites have lower surface roughness (R_Q ~ 5nm) relative to films of pure silver wires (R_Q ~ 28nm), making the composite inks potentially suitable for printed electrodes in structures such as transparent oxide TFTs. To our knowledge, this is the first report of roll-based patterning of conductive nanowire-mesh electrodes and a first demonstration of a printable metal nanowire / metal oxide composite ink.

Over the past few years, copper nano-ink based flexible electronics has experienced an enormous breakthrough for the development of efficient, scalable, and rational processing techniques. In this work, copper nanowires were successfully synthesized by the ethylenediamine reduction of copper (I) chloride salt. The fabricated copper nanowires were characterized by using UV-visible absorption spectroscopy, transmission electron microscopy (TEM), small area electron diffraction (SAED) and X-ray diffraction (XRD) techniques. The copper nanowires ink was printed on a flexible polyethylene terephthalate (PET) substrate using a bar-coater printing system. The printed copper nanowires ink was sintered at room temperature and under ambient conditions using a flash light from a xenon lamp using an in-house flash light sintering system. The effects of several flash light irradiation conditions (irradiation energy, pulse number, on-time, and off-time) and the effects of the amount of poly(N-vinylpyrrolidone), the diameter of the Cu nanowires and the length of the Cu nanowires in the Cu nanowires-ink were studied. For the study, a Wheatstone bridge electrical circuit was also devised and the electrical resistance changes of the copper nanowires-ink were recorded during the sintering process. The transmittance of the copper nanowires film was measured using spectrophotometer. From the study, highly conductive and transparent copper nanowires film was obtained through the flash light sintering process.

Metal nanoparticles are widely used for the printing of conductive metallic films. Generally, these particles consist of silver or gold, which are unfortunately very expensive relative to base metals, such as copper. However, copper and other base metals oxidize upon sintering in air and require either inert or reducing environments to sinter into conductive films. In this work, we show than silver use can be dramatically reduced by using copper/silver alloy particles, while still provided excellent oxidative resistance. We have synthesized alloyed nanoparticles of silver and copper to investigate the extent of oxidation of copper in these systems and the conductivity of films formed from these nanoparticles. In this work, we describe the novel synthesis of copper, silver alloyed particles through the co-reduction of copper and silver salts. We analyze the effects of different reducing agents, salts, temperatures, and ligand systems on the formation of the nanoparticles and their sintering into conductive films. We demonstrate that particles with as little as 20% silver content suppress the oxidation of the copper during sintering. Furthermore, we demonstrate alloyed particles sintered in air at 175 C, that have 30% the bulk conductivity of the bulk metal. Similarly formed pure copper systems show extensive oxidation and yield non-conductive films when sintered in air. This work demonstrates the utility of alloyed systems to suppress oxidation in the sintering of base metal particles, allowing for a substantial reduction in cost associated with the printing of conductive metal features.

This seminar details Ag and Cu reactive inks that print solid metals instead of particle clusters. Traditional metal inks consist of metal particles suspended in a solvent, leaving behind a cluster of metal particles once printed. These clusters typically posses poor electrical, thermal, and mechanical properties relative to bulk counterparts and require a high-temperature sintering step to approach bulk materials. Reactive inks bypass the issues associated with traditional particle-based inks and have the ability to directly print metals with new bulk material properties at low temperature and without any high-temperature sintering steps. Instead of printing particles, reactive inks print chemical reactions that precipitate metal once the solvent evaporates. Selecting the correct chemical reaction, ink composition, and substrate temperature enables us to print a solid, monolithic metal structure with material properties approaching bulk properties without the high temperature-sintering step seen in traditional metal inks.
The impact of ink chemistry, ink composition, printing parameters, substrate material, and substrate temperature on printed metal morphology, metal purity, and electrical resistivity are detailed. This parameter study was used to optimize ink chemistry with are target print temperature of less than 100 #730;C for Ag and Cu. Metal morphology was optimized base upon Scanning Electron Microscopy (SEM) images, metal purity was quantified using Fourier Transform Infrared (FTIR) spectroscopy and X-ray Photoelectron Spectroscopy (XPS), and resistivity was characterized using four-point probe measurements.
The low print temperatures and excellent material properties of reactive inks will improve device performance of flexibility electronics and thin-film photovolatics while also eliminating the energy consumption required for sintering traditional metal inks.

Inkjet technology is a direct patterning technique to deposit functional materials with high precision and accuracy. This deposition technology is often used to manufacture conductive electrodes for different active and passive electronic devices on flexible foils. It is an up-scalable process in terms of printing devices from low (via. Sheet-to-Sheet platform) to high (via. Roll-to-Roll platform) quantities. For manufacturing of these conductive electrodes and hence electronic devices through the R2R platform, a suitable post-treatment/curing methodology is very much desired.
In this work, focus is concentrated on the curing methodology using the Infra-red radiation for both the inkjet-printed conductive electrodes and insulator layer, for completing a “proof of concept” Metal-Insulator-Metal (MIM) electronic device structure over the R2R platform. A conductive silver nano-particle and a polymeric dielectric ink are used to print the top and bottom conductive electrodes, with a middle insulator layer for the MIM device structure respectively. It is observed that not only the printed silver electrode layers (both top and bottom) can be cured with the help of the Infra-red radiation, but also the insulator layer. Additionally, the same MIM device structure is cured with the conventional curing methodology which in this case is thermal curing using a convection oven. This curing procedure for the printed functional layers is generally performed for the sheet-to-sheet manufacturing process.
The conductive electrodes are then electrically characterized by measuring the sheet resistance (on the foil and dielectric layer) as a function of the un-conventional Infra-red radiation and conventional oven curing methodologies. The cured layers for both the conductive electrodes and the insulator layer are morphologically analyzed for the layer thickness and homogeneity. The electrical performance of the cured insulator in form of the obtained capacitance from the MIM passive device is compared for the two mentioned curing methodologies.

Direct-write processes such as direct-write assembly, micropen, inkjet, and laser-induced forward transfer (LIFT) have become increasingly popular as interest in printable electronics and maskless patterning has grown. Compared to conventional lithography, these additive manufacturing processes are inexpensive, environmentally friendly, and well suited for rapid prototyping. While most direct-write processes are confined to two-dimensional patterning and cannot handle materials with high viscosity (particularly ink jet), skillful implementation of LIFT can transcend both constraints. Transfer of three dimensional pixels (known as voxels) has recently been demonstrated with the LIFT technique using high viscosity Ag nanopaste to fabricate freestanding interconnects, complex voxel shapes, and high-aspect-ratio structures. At the same time, pursuit of additive manufacturing techniques for RF applications such as waveguides and radio-frequency identification tags has been less successful due to the difficulties in reliably synthesizing high quality transmission lines. We have investigated the effect of variations in ink thickness, laser fluence and donor-receiver substrate distance on the LIFT process for high viscosity Ag nanopaste. By transferring 50x50 µm² voxels with thicknesses between 0.8 and 8.7 µm at different laser fluences, we are able to systematically determine a thickness-fluence regime for successful transfer that widens with increasing voxel thickness. We go on to use these lessons to enable congruent transfer of square voxels with dimensions spanning 3 orders of magnitude: 5x5 µm, 50x50 µm, and 500x500 µm. Finally, we fabricated a series of coplanar waveguides by using laser-printed silver lines as the central transmission line with losses below 0.5 dB/mm from 1-10 GHz. In this talk, we will discuss the experimental parameters in LIFT process of silver nanopaste and present low loss coplanar waveguides fabricated by different geometries of silver lines.
This work was supported by the Office of Naval Research (ONR) through the Naval Research Laboratory basic research program.

A primary challenge for a designing of flexible and stretchable devices is to prevent the mechanical failure of the metallic electrodes and interconnects integrated on polymeric substrates under mechanical deformation, e.g., tension, compression, and bending. Herein, we firstly demonstrated that the irradiation of e-beam could significantly improve the mechanical stability of Cu film deposited on polyimide (PI) substrate. The 100nm thick Cu film was deposited on the PI substrate by thermal evaporation and then directly irradiated by low power of e-beam using the scanning electron microscope (SEM). When we applied a tensile strain of 30 %, the e-beam irradiated Cu film on the PI substrate did not exhibit any significant damage, whereas the pristine Cu films did form channeling cracks or delamination. Furthermore, the resistance of the irradiated Cu film increases much less than that of pristine Cu film at a strain of 30%. The mechanical stability was possibly improved due to the enhancement of adhesion between Cu and PI by e-beam irradiation. We believe that our new finding will open up a new facile method to enhance the reliability of metal interconnects and electrodes in the flexible and stretchable devices.

Developing the ability to 3D print various classes of materials possessing distinct properties could enable the freeform generation of active electronics in unique functional, interwoven architectures. Achieving seamless integration of diverse materials with 3D printing is a significant challenge which requires overcoming discrepancies in material properties in addition to ensuring that all the materials are compatible with the 3D printing process. Indeed, to date, 3D printing has been limited to specific plastics, passive conductors, and a few biological materials. Here we show that diverse classes of materials can be 3D printed and fully integrated into device components with active properties. Specifically, we demonstrate the seamless interweaving of five different materials, including: 1) emissive semiconducting inorganic nanoparticles, 2) an elastomeric matrix, 3) organic polymers as charge transport layers, 4) solid and liquid metal leads, and 5) a UV-adhesive transparent substrate layer. As a proof of concept for demonstrating the integrated functionality of these materials, we 3D printed quantum dot-based light-emitting diodes (QD-LEDs) that exhibit pure and tunable color emission properties. By further incorporating the 3D scanning of surface topologies, we demonstrate the ability to conformally print devices onto curvilinear surfaces, such as contact lenses. Finally, we show that novel architectures which are not easily achieved using standard microfabrication techniques can be constructed, which we demonstrate by 3D printing a 2 × 2 × 2 cube of encapsulated LEDs, in which every component of the cube and electronics are 3D printed. Overall, these results suggest that 3D printing is more versatile than has been demonstrated to date and is capable of integrating many distinct classes of materials.

One of the main challenges facing the integration of metals as gate electrodes in advanced MOS devices is control over the Fermi level position at the metal/dielectric interface. In this study we demonstrate the ability to tune the effective work function (EWF) of W-based electrodes by process modifications of the atomic layer deposited (ALD) films. Tungsten carbo-nitrides (WCxNy) were deposited via plasma-assisted and/or thermal ALD processes using organometallic precursors to produce fluorine-free tungsten (FFW) thin films. The process modifications enabled us to control the stoichiometry of the WC_xN_y films. Deposition in hydrogen plasma (without nitrogen based reactant) resulted in a stoichiometry of WC_0.4 with primarily W-C chemical bonding, as determined by x-ray photoelectron spectroscopy (XPS). These films yielded a relatively low EWF of 4.2 ± 0.1eV. The introduction of nitrogen reactant to the plasma or the thermal ALD deposition resulted in a stoichiometry of WN_0.6-0.8 with predominantly W-N chemical bonding. These films produced a high EWF of 4.7 ± 0.1 eV. All films were continuous, nano-crystalline, with thicknesses of ~3-4 nm and crystal size of ~2nm.