2018 MRS Spring Meeting

Call for Papers

Late Breaking Abstract Submission Closed
January 11, 2018 (11:59 pm ET)

Symposium EP01—Materials for Beyond the Roadmap Devices in Logic, Memory and Power

The continued scaling of silicon MOSFETs for logic, and of DRAM and Flash memories has already required the use for finFETS, high-k dielectrics and SiGe stressors. There is presently active research on new device concepts such as tunnel FETs, negative capacitance gate FETs and spin torque devices. Further progress requires new materials. For future MOSFET logic devices, novel channel materials such as SiGe, Ge and III-V semiconductors are being developed. Broken-gap semiconductor heterostructures, and 2-dimensional semiconductors such as the transition metal dichalcogenides (TMDs), and CMOS compatible ferroelectrics based on HfO2 and ZrO2 are under development. Future non-volatile memory includes phase change memories and resistive random access memories. This symposium will emphasize not only the advances in materials but also the new device structures that are required for the new materials to provide substantial improvements in device performance.

Topics will include:

  • High-k dielectrics and passivation schemes for SiGe, Ge, III-V, GaN, and transition metal dichalcogenide channels
  • Steep-slope devices: including tunnel FETs, TMD heterostructure FETs, and negative capacitance ferroelectric gates
  • Steep slope switches using FETs using the Metal-insulator transition, and NEMs based switches
  • Transition metal dichalcogenides (TMDs); their CVD, characterisation, defect passivation and improvement of their metal contacts.
  • Engineering of band offsets, dielectric behavior, work function control and their modelling
  • Gate-stack materials and interfaces for future switches and memory
  • Materials, mechanisms and materials modelling for emerging memories, including resistive RAM, phase change RAM and STT-RAM
  • 3D transistors and fabrication techniques for three dimensional devices
  • Contact engineering for nanoscale devices (FinFETs) and for low dimensional materials
  • Surface pretreatments and cleaning of non-Si channel materials
  • Power MOSFETs and GaN passivation
  • Electrical reliability of nanoscale devices and its modeling

Invited Speakers:

  • Hiroaki Arimura (imec, Belgium)
  • Jane P Chang (University of California, Los Angeles, USA)
  • Kevin J Chen (Hong Kong University of Science and Technology, Hong Kong)
  • Andrea Corrion (HRL Laboratories, USA)
  • Xiangfeng Duan (University of California, Los Angeles, USA)
  • David Geohegan (Oak Ridge National Laboratory, USA)
  • Xiao Gong (National University of Singapore, Singapore)
  • Chris Hinkle (University of Texas at Dallas, USA)
  • Cheol Seong Hwang (Seoul National University, Republic of Korea)
  • Shoji Ikeda (Tohoku University, Japan)
  • Adrian Ionescu (École Polytechnique Fédérale de Lausanne, Switzerland)
  • Ali Javey (University of California, Berkeley, USA)
  • Jeehwan Kim (Massachusetts Institute of Technology, USA)
  • Jorg Muller (Fraunhofer IPMS, Germany)
  • Nirmal Ramaswamy (Micron Technology, Inc., USA)
  • Akira Toriumi (Tokyo University, Japan)
  • Lars Wernersson (Lund University, Sweden)
  • Peide Ye (Purdue University, USA)

Symposium Organizers

John Robertson
Cambridge University
United Kingdom
44-1223748331, jr@eng.cam.ac.uk

Jesus del Alamo
Massachusetts Institute of Technology
Electrical Engineering
617-253-4764, alamo@mit.edu

Andrew Kummel
University of California, San Diego
Chemistry and Biochemistry
858-534-3368, akummel@ucsd.edu

Masaaki Niwa
Tohoku University
Electrical Engineering

Keywords for Abstract Submission

2D, dielectric, memory, semiconductor