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Call for Papers

Symposium ED9—Advanced Interconnects for Logic and Memory Applications—Materials, Processes and Integration

Advances in conventional interconnect technology have been slowed in recent years due to the struggle with ultra-low k ILD integration and the challenges of continued metal barrier scaling. However, novel patterning and integration schemes have shown the need for a variety of new metal and dielectric materials that are either fillable, highly conformal, or selectively deposited. These new demands require advances in surface engineering, precursor development, and process technology for material deposition and cure. This symposium will focus on both continued advances in conventional interconnect technology and emerging areas. Topics will include advances in ILD materials and integration, novel etch stop and hardmask materials, fillable dielectrics, advanced metallization materials and processes, selective deposition and the use of BEOL materials to build novel switches and non-volatile memory devices.

Topics will include:

  • Next Generation ILD Materials New spin-on, sol-gel, and PECVD precursors; ULK synthesis and characterization; Porogens, porosity characterization, pore sealing and stuffing; Synthesis and characterization of ILD films with controlled porosity; Interface engineering: Surface treatments and controlled deposition layers to enhance adhesion and nucleation; ULK mechanical properties; Alternate curing of ULK; Advances in integration and patterning
  • Novel Etch Stop and Hardmask Materials New spin-on, ALD, and PECVD precursors; Low k etch stop materials; Materials with unique etch selectivity; Barrier properties; Mechanical strength and adhesion
  • Metallization for Advanced Interconnects Advances in CVD, PVD, ALD, electrochemical and electroless deposition; Advances in liner, Cu seed, and fill technologies; Advanced BEOL integration; Metal resistivity modeling; Alternative approaches for the tightest pitch layer; Barrier free metallization; RIE plasma processing, planarization, and cleaning technologies
  • Fillable Dielectrics Spin-on, Flowable CVD and ALD materials; Bottom up fill approaches; Advanced cure technology; Replacement ILD Integration
  • Selective Deposition Processes Deposition of Metal on Metal, Metal on Dielectric, Dielectric on Dielectric, Dielectric on Metal; Directed assembly technology; Selective surface modification for ALD and SAM deposition
  • BEOL Switches and Non Volatile Memory Use of BEOL interconnect materials to build novel devices; Device design, electrical testing and reliability
  • Alternative to Cu/ULK interconnects Air gap; Carbon-based interconnects; Optical interconnects; Nano-interconnects, including nanocontacts; Molecular self-assembling technologies

Invited Speakers:

  • Yves Chabal (University of Texas at Dallas, USA)
  • Claire Fenouillet (CEA/LETI, France)
  • Michelle Paquette (University of Missouri - Kansas City, USA)
  • Todd Ryan (GlobalFoundries Inc., USA)
  • Philip Wong (Stanford University, USA)
  • Chen Wu (IMEC, Belgium)
  • Larry Zhao (LAM Research, USA)

Symposium Organizers

Jeffery D. Bielefeld
Intel Corporation
Components Research
USA

Mikhail Baklanov
North China University of Technology (NCUT)
China
32-486-63-88-80, m_baklanov@hotmail.com

Vincent Jousseaume
CEA-LETI
Minatec Campus
France

Eiichi Kondoh
University of Yamanashi
Japan
81-55-220-8472, kondoh@yamanashi.ac.jp