Symposium EM11 : Wide-Bandgap Materials for Energy Efficiency—Power Electronics and Solid-State Lighting

As the demand for more energy efficient electronics increases, GaN has emerged as an attractive candidate material for high-voltage power management applications. The most promising device structure at the moment is that of a metal-insulator-semiconductor high-electron mobility transistor (MIS-HEMT) in which a gate oxide is placed between the gate metal and the AlGaN/GaN heterostructure of a HEMT. This is an attractive device architecture because of its high current, high breakdown voltage and low gate leakage current, all desirable attributes for power transistors. A concern with this new device technology is reliability and instability under prolonged high-field and high-temperature conditions. In particular, issues associated with the gate oxide have not been studied in the better established GaN HEMTs and bring in new concerns. Understanding sources of instability and reliability associated with the gate oxide is the goal of the present research.

The physical mechanisms responsible for bias stress instability (BTI) in GaN MIS-HEMTs are poorly understood. This is because of their complex gate stack structure with multiple interfaces and many trapping sites. In order to isolate the role of the gate oxide and its interface in BTI, we are studying a simpler GaN MOSFET structure in which the gate oxide is placed directly on top of the GaN channel. Even in this case, GaN substrate trapping complicates the interpretation of the results. Our research reveals the importance of electron trapping and detrapping inside the oxide as well as trap state generation at or near the oxide/semiconductor interface. Separately, we are studying time-dependent dielectric breakdown (TDDB) in GaN MIS-HEMTs, a catastrophic condition that arises after prolonged high-voltage gate bias stress. We have developed an experimental methodology to characterize TDDB through time-dependent current-voltage and capacitance-voltage measurements. Our techniques isolate different roles of threshold voltage shift, oxide trap formation and trapping, interface state generation, stress-induced leakage current (SILC), and eventual oxide breakdown. Out of this research, a classical signature for TDDB in GaN MIS-HEMTs emerges with evidence of progressive breakdown that supports the percolation model of defects.

These studies should be instrumental in understanding the complex instability and reliability issues of GaN MIS-HEMTs for power electronics applications.

This paper reviews the most relevant dielectric-related trapping mechanisms in GaN-based transistors with MIS-type and p-GaN type gate. Metal-insulator-semiconductor (MIS) devices with partially-recessed gate have been submitted to pulsed and constant voltage stress, with the aim of evaluating the impact of charge trapping processes on the dynamic properties of the devices and on the negative-bias threshold instabilities (NBTI) induced by negative gate bias. Three different dielectrics were considered for this investigation: SiN deposited by rapid thermal chemical vapour deposition (RTCVD), SiN deposited by plasma enhanced atomic layer deposition (PE-ALD), and Al₂O₃ deposited by atomic layer deposition (ALD). In addition, we investigate the failure processes of GaN-based HEMTs with p-type gate submitted to long-term stress tests. The results obtained within this paper are critically compared to previous literature reports, to provide a more complete view of the state-of-the-art.

GaN has been employed for high temperature, high power, high voltage and high frequency devices due to its wide band gap, excellent electron mobility and high breakdown electric field[1]. But achieving a dielectric with low interfacial defect density on GaN, high permittivity and low leakage current still remains challenging. Previously, we have shown that a defect-free interface can be achieved by growing lattice matched epitaxial lanthanum oxide (La₂O₃) on GaAs (111) using atomic layer deposition (ALD)[2]. However, there is no binary metal oxide has a suitable lattice constant, band gap, and conduction band offset for passivating the GaN(0001) surface and serving as an effective dielectric.
In this work, we demonstrate for the first time that an epitaxial Mg_xCa_1-xO film can be deposited on GaN by ALD. By adjusting the ratio between the Mg and Ca concentrations in the film, a lattice matched Mg_xCa_1-xO/GaN(0001) interface can be achieved with low interfacial defect density. High resolution XRD has shown that the lattice parameter of this ternary oxide obeys Vegard’s Law. Cross-sectional TEM shows an atomically sharp interface, confirming the high quality of the epitaxy. The valence band offset between Mg_xCa_1-xO and GaN was measured to be ~1 eV and thus the conduction band offset is ~3eV assuming the oxide band gap is ~7.4eV. Therefore both the band gap and band offset of Mg_xCa_1-xO are suitable as gate dielectric for GaN device applications. High temperature capacitance-voltage characterization shows that the film with composition Mg_0.25Ca_0.75O has the lowest density of interfacial defects. With this optimal oxide composition, a Mg_0.25Ca_0.75O/AlGaN/GaN MOS-HEMT device was fabricated. An ultra-high on/off ratio of 10¹¹ and a near ideal subthreshold swing of 62 mV/dec were achieved with this device. Thus we believe epitaxial Mg_xCa_1-xO films on GaN can be applied for the future high-power and high-frequency applications.


[1] S. Dimitrijev, J. Han, H. A. Moghadam, and A. Aminbeidokhti, “Power-switching applications beyond silicon: Status and future prospects of SiC and GaN devices,” MRS Bull., vol. 40, no. 05, pp. 399–405, 2015.
[2] X. Wang, L. Dong, J. Zhang, Y. Liu, P. D. Ye, and R. G. Gordon, “Heteroepitaxy of La2O3 and La2−xYxO3 on GaAs (111)A by Atomic Layer Deposition: Achieving Low Interface Trap Density,” Nano Lett., no. 111, 2013.

Understanding degradation of AlGaN/GaN high electron mobility transistors (HEMTs) is critical for enabling optimal performance and reliability of these devices. Mechanical strain is believed to be a critical degradation mechanism based on finite element simulations and experimental observations of cracks and pitting in the devices. However, there is a lack of experimental techniques capable of measuring mechanical strains in AlGaN/GaN HEMTs. In this work, we present atomic force microscope (AFM) measurements of thermomechanical and inverse-piezoelectric (IPE) deformation in periodically biased AlGaN/GaN HEMTs. Periodic applied bias induces periodic Joule heating and an associated periodic thermomechanical surface deformation, which the AFM cantilever tracks with sub-picometer precision. Periodic applied bias also induces measurable periodic IPE deformation. This technique is able to measure deformation in regions of the device with sub-micron features, including near the metallic gate, which is inaccessible by Raman microscopy. We investigate devices with a range of operating conditions: drain-source voltage, V_DS, of 0 to 50 V, gate-source voltage, V_GS, of -10 to 1 V, drain-source power of 0 to 6 W/mm, and frequency of 30 – 400 kHz. To study thermomechanical behavior, we open the channel and apply periodic V_DS. As V_DS increases, deformation decreases, especially near the gate and on the source side of the channel. We present an electro-thermo-mechanical finite element model which agrees well with and aids interpretation of the measurements. The model reveals that as V_DS increases, the hotspot moves away from the gate and toward the drain, leading to decreased gate temperature rise and decreased thermomechanical deformation, especially near the gate and source. The model also reveals that tensile thermal stress develops in the AlGaN layer near the drain-side edge of the gate due to a large mismatch of thermal expansion coefficients between the metallic gate and the AlGaN layer. This is important because the total stress is a combination of IPE, intrinsic, and thermal stresses. IPE and intrinsic stress in the AlGaN layer are both believed to be tensile. Therefore, tensile thermal stress will increase the total stress and may accelerate device degradation. This indicates that the gate temperature (and associated thermal strain mismatch with the AlGaN layer) is more important for thermal stress than the maximum device temperature. As the hotspot moves away from the gate for increasing V_DS, the gate temperature decreases, leading to 55% greater tensile thermal stress for V_DS = 10 V than for V_DS = 48 V for the same device power. To study IPE deformation, we set V_DS = 0 V to prevent heating and apply periodic V_GS. The measurements indicate that IPE deformation above the gate is 1.5 pm/V above pinch-off voltage and < 0.5 pm/V below pinch-off voltage. We conclude with a discussion of the implications of our experimental results on device degradation.

Recently, GaN-based transistors have been expected to be used in the low voltage applications such as DC/DC converters. For the switching devices, normally-off operation is strongly required from the viewpoint of safety. In order to obtain the normally-off characteristic, on-resistance (R_on) has been sacrificed and normally-off GaN HFETs show higher R_on. Thus, decreasing R_on, especially decreasing contact resistance (R_c) is a critical issue for these devices.
We have proposed a normally-off GaN HFET with p-type NiO gate for reduction of R_on by decreasing device dimensions [1]. The p-type NiO gate is successfully fabricated and normally-off operation is also realized with a threshold voltage (V_th) of 0.8 V. Although R_on is reduced by downscaling with introducing NiO gate, R_c becomes the main part of R_on in the limitation of downscaling. Then, we introduce a novel fabrication technique for source and drain electrodes to reduce R_c. In this technique, a heavily doped n⁺⁺-GaN layer regrown by MOCVD is introduced using Ge as a dopant [2]. A carrier concentration of up to 1 x 10²⁰ cm^-3 is achieved. Using this layer for source and drain electrodes, the total R_c is markedly reduced to 0.25 Ωmm. From these novel techniques, the fabricated GaN HFET with the 350 nm NiO gate exhibits a low R_on of 0.95 Ωmm, a maximum drain current of 1.1 A/mm, and a peak transconductance of 490 mS/mm, maintaining normally-off operation. These excellent results will contribute to the marked increase of conversion efficiency in switching devices.

[1] A. Suzuki, Y. Yamada, H. Tanaka, H. Ueno, N. Otsuka, Y. Anda, T. Ueda, T. Tanaka, and D.Ueda, Proc. Workshop on Compound Semiconductor Device and ICs, 2013, p. 77.

[2] A. Suzuki, S. Choe, Y. Yamada, S. Nagai, M. Hiraiwa, N. Otsuka, and D. Ueda, IEDM Tech. Dig., 2014, p. 275.

With the emergence of novel high power applications such as the automotive market, the development of a new generation of power devices operating well above 1 kV with high efficiencies is needed. Alternatives to existing Silicon (Si) technology have to be found since Si power devices are thermally limited and show high specific on-resistance at those operating voltages. GaN’s wide band-gap semiconductor properties and the compatibility with silicon technology lead to high expectations in low-cost power electronics with breakthrough performance, especially for high voltage DC-DC converters. However, this technology still suffers from the limitation of the silicon substrate since the breakdown occurs when the electric field reaches the silicon for large gate to drain spacing. In order to overcome this limitation, we have developed a process in which the Si substrate is locally removed near the high electric field region. This allowed us to achieve state-of-the-art 3-terminal lateral breakdown voltage GaN-on-Si transistors above 3000 V while delivering low specific on-resistance. These devices still shows lateral breakdown voltages well-above 2 kV at 600 K.
In order to make this approach viable for high power applications, high thermal dissipation has to be ensured and the substrate needs to be grounded. An integrated thermal management based on thick PVD AlN is being implemented into the trenches, which is expected to maintain the outstanding breakdown voltage properties. In this presentation, first results corresponding to the development of this technology will be depicted.

Even though the majority of development efforts for high power and high frequency applications have focused on
AlGaN/GaN High Electron Mobility Transistors, InxAl1-xN shows promise as a candidate material for the gate
barrier and polarization charge-inducing layer because of its wide bandgap, high spontaneous polarization charge,
and lattice-matching to GaN [1]. The advances in epitaxial growth of HEMTs on silicon substrates have enabled
both improved economic efficiencies and technical functionalities. However, the growth of InAlN by MOCVD is
challenging as the optimal conditions for AlN and InN growth are substantially different, and potential incorporation
of Ga into the film compromises the sharp interfaces required in HEMT structures encompassing AlInN. It has been
reported that both 2DEG density and mobility degrade as a result of the parasitic formation of a GaN layer at the
InAlN/AlN interface [2].
This paper reports on InAlN films and InAlN/GaN HEMT structures epitaxially grown on 150 mm <111> Si, using
Veeco’s Propel� single wafer MOCVD system. The TurbodiscÒ, vertical rotating disk reactor encompasses the
core reaction and high velocity laminar flow characteristics of its predecessor batch systems, thus enabling stable,
repeatable operation, long PM cycles, and direct, model-based process scale up. Moreover, it incorporates advanced
features for alkyl/hydride flow distribution and temperature uniformity, which translate into excellent uniformity in
epitaxial layer thickness, alloy composition, and doping profile across the wafer. [3]
Material quality was studied by growing InAlN films, 100 nm thick, with indium content of 17% on Si substrates
using a simplified stress compliance AlN/GaN buffer structure. Smooth surfaces with root mean square (rms)
roughness of 0.68 nm were observed in a 5x5 μm2 AFM scan. X-ray Diffraction analysis shows well defined layer
peaks and fringes, indicating good structural quality and abrupt layer interfaces. Thickness uniformity of InAlN is
0.87% for a 7-point XRD measurement across the 150 mm wafer. SIMS analysis confirms the uniform In depth
profile and the presence of abrupt layer interfaces. Negligible Ga (< 100 ppm, atomic) incorporation was detected in
the InAlN bulk film. Film sheet resistance of 230�/�, charge of 2.1×1013/cm2, and mobility of 1270 cm2/V.s were
measured on a prototypical InAlN/GaN HEMT structure comprising a 10 nm-thick, 17% In, InAlN barrier.
References
[1] J. Kuzmik, IEEE Electron Device Lett. Vol. 22, No. 11, pp. 510 (2001);
[2] Lin Zhou, et al, Phys. Status Solidi C 7, No. 10, 2436-2439 (2010);
[3] Jie Su, et al, Phys. Status Solidi A 213, No. 4, 856–860 (2016).

Today, 40% of the energy in the United States is consumed as electric energy. Power electronics, which are used to efficiently convert, control, and process the flow of electric power, play a significant and growing role in the delivery of this electricity. It has been estimated that as much as 80% of electricity could pass through power electronics between generation and consumption by 2030 [1]. Therefore, advances in power electronics promise enormous energy efficiency gains. A key element of any power electronic system is the semiconductor power switching device which determines the frequencies and power levels at which a power electronic system may operate. A Significant portion of the power losses in power electronic converters is dissipated in their power semiconductor devices. Silicon (Si) has been the semiconductor material of choice for power devices for quite some time, due to cost, ease of processing, and the vast amount of information available about its material properties. Si devices are, however, reaching their operational limits in blocking voltage capability, operation temperature, and switching frequency due to the intrinsic material properties of Si. Wide bandgap (WBG) power semiconductors, such as gallium nitride (GaN), silicon carbide (SiC), and diamond, are an attractive emerging alternative to Si in many applications. Power converters based on WBG devices can achieve both higher efficiency and higher gravimetric and volumetric power conversion densities. However, high cost and challenging fabrication of practical devices remain important barriers to the widespread adoption of WBG devices. In 2014, ARPA-E launched a program entitled SWITCHES (Strategies for Wide Bandgap, Inexpensive Transistors for Controlling High-Efficiency Systems) to catalyze the development of WBG devices using new fabrication innovations and/or new device architectures. This paper gives an overview of the technical progress to date in the SWITCHES program. The performance of various high voltage and high current rectifiers and transistors in the GaN, SiC, and diamond material systems is discussed. Material and processing challenges and reliability concerns for wide-bandgap power devices are also described. A glimpse into the future trends in device development and commercialization is offered.

It is undeniable that wide badgap materials will be the face of next generation electronics offering solutions never thought of before. The roadmap beyond Si in power electronics, introduced by Silicon carbide and Gallium nitride, is now expanding further with wider bandgap materials like Gallium Oxide [1], Aluminum (Gallium) Nitride [2] and Diamond [3] technologies gaining maturity. Higher blocking electric field definitely sets up wider bandgap semiconductors for operations between tens of kilowatts to megawatts rage. Medium power GaN HEMTs supporting applications up to 10KW have shown the pathway to commercialization. While GaN based diodes have already established the capability to block multiple KVs[4], transistors still fall short of delivering blocking voltages as predicted by GaN’s materials limit and reliable normally off single chip solutions. Although reducing the overall cost of the chip continue to impede market penetration, one can surely rely on the examples set by lateral GaN devices, to extend the roadmap using vertical GaN and ultimately diamond based devices.
Our recent success achieved with vertical GaN devices, viz. CAVETs[5], demonstrating over 500V blocking capability (complying with the drift layer design) suggests that with improvement in bulk GaN substrates these vertical devices will be competitive with SiC devices. Our predictive models [6] based on experimentally calibrated simulation tools, clearly show the manifestation of higher electron mobility [7] in bulk GaN in lower power losses in switches compared to its SiC counterparts. For example a 1.2KV GaN vertical JFET incurs significantly less switching loss compared to its SiC equivalent since the gate charge is reduced by 50%.
A very important feature of the GaN based power devices is realized when these devices are run ‘hotter’, thereby simplifying or eliminating cumbersome cooling techniques at the system level. Our recent study on contact metallurgy [8] creates a very promising landscape where the contacts are experimentally proven to sustain temperatures over 400^oC.
Finally, the promise of the ultimate power electronics lies in diamond. The outstanding material properties in diamonds are best utilized in devices designed to support over 1KV, at the very least. Some of our recent results present an encouraging future of diamond power electronics demonstrating bipolar action and high blocking voltages suitable for KV operations.
M. Higashiwaki, et.al Phys. Status Solidi A Physica Status Solidi (a) 211, (2014)
R. Dalmau, et al. Journal of The Electrochemical Society J. Electrochem. Soc. 158, (2011)
M. Dutta, et al. IEEE Electron Device Lett. 37, (2016)
A. Armstrong, et al. Electronics Letters 52, 1170 (2016)
S. Chowdhury et al. IEEE Trans. Electron Devices, 60, 3060 (2013)
D. Ji et al. IEEE Trans. Electron Devices 62, 2571 (2015).
P. Kruszewski et al., Int. Workshop Nitride Semiconductor (IWN) (2014)
S. Zhao, et al., Journal of Elec Materi 45, 2087 (2015).

For fabricating n-channel power-switching MOSFETs as well as high breakdown voltage junction diodes based on GaN, the site-controlled fabrication of p-type GaN of controlled hole concentrations is indispensable. For this purpose, Mg ion-implantation with subsequent annealing is an attractive process, because Mg concentration ([Mg]) and its depth profile can be controlled by the multiple-energy implantation method. However, there have been few reported results on p-type conductivity of Mg-implanted GaN, and the relation between the point defects generated by the implantation and photoluminescence (PL) spectra is scarcely known [1]. In this presentation, the defect species detected using the positron annihilation method [1] and PL spectra are correlated for ion-implanted and epitaxial Mg-doped GaN.

Mg⁺-ions were implanted into 4-μm-thick unintentionally doped (UID) GaN epilayers, creating box profiles of [Mg] at 1×10¹⁷, 1×10¹⁸, and 1×10¹⁹ cm^-3. For comparison, 1-µm-thick Mg-doped epilayers of similar [Mg] being 5×10¹⁷, 2×10¹⁸, and 4×10¹⁹ cm^-3 were grown on the 4-µm-thick UID GaN by MOVPE. For all samples, c-plane freestanding GaN substrates grown by HVPE was used as a substrate, in order to get rid of extrinsic effects originating from threading dislocations. All the samples were annealed at 1300 °C for 5 minutes with N₂ gas atmosphere at 1 atm. The static and temporal PL measurements were carried out between 10 and 300 K.

A broad ultraviolet luminescence (UVL) band with the peak at 3.28 eV was observed in all ion-implanted and epitaxial Mg-doped GaN at 10 K. As it originates from the radiative transition of electrons in the conduction band or shallow donors to Mg acceptors, the result implies the presence of Mg acceptors on Ga sites. The result is consistent with the fact that PL spectra at 10 K of low [Mg] samples exhibited a peak originating from the recombination of excitons bound to a neutral acceptor.

It should be noted that Mg-implanted GaN commonly exhibited a broad green luminescence (GL) band at 2.35 eV, which was almost unseen in epitaxial Mg-doped GaN. Moreover, overall PL intensity at 10 K of Mg-implanted GaN was more than an order of magnitude lower than that of epitaxial Mg-doped GaN, indicating higher concentration of nonradiative recombination centers (NRCs) in the Mg-implanted samples. As Uedono et al. have shown [1] that high temperature annealing increased the size of vacancy complexes composed of Ga vacancies (V_Ga) and N vacancies (V_N) and Chichibu et al. [2] have clarified the origin of NRCs in GaN as V_Ga-complexes like V_Ga(V_N)_n, additional introduction of V_N by Mg-implantation is likely. Accordingly, GL band is most likely originating from V_N. We will discuss the PL dynamics at the meeting.
This work has been supported in part by NEDO-SIP and MEXT programs (Research Alliance and Grant-in Aids of Scientific Research), Japan.
[1] Uedono et al., PSS B 252, 2794 (2015). [2] Chichibu et al., APL 86, 021914 (2005).

Due to the high-speed switching and high-voltage blocking capabilities, GaN power transistors can enable high-efficiency, compact and low-cost power converters. This presentation provides an overview of the development of GaN power switching device technology at HRL, for both lateral and vertical device structures. For GaN-on-Si lateral transistors, we have tackled key challenges in normally-off gate structure and dynamic on-resistance, resulting in KW-level power switching with ~ns switching time. For GaN-on-GaN vertical didoes and transistors, we addressed issues in carbon impurity, Schottky junction design, trench gate structure, and P-body contact, leading to 600V class Schottky barrier diodes and normally-off transistors.

GaN HEMTs for power switching are being actively developed by major power electronics companies due to their superior combination of low on-resistance and high off-state voltage capability. However the on-state resistance after switching from off-state (dynamic R_ON) is often found to be dramatically higher than the static resistance resulting in unacceptable switching losses. This problem now results largely from transient charge trapping in the semi-insulating carbon doped layer situated below the 2DEG. Here we will show that good performance not only requires good control of doping but also, rather surprisingly, control of the vertical leakage from the 2DEG to the GaN:C layer.
Recent calculations have placed the carbon acceptor level in the lower half of the GaN bandgap making the material slightly p-type. We will demonstrate using simulation and experiment the consequences that follow for device operation, since the GaN:C layer is isolated from the 2DEG by a reverse biased P-N junction under normal operational bias. This floating buffer can easily charge resulting in the dynamic R_ON dispersion, so suppression requires a leakage path to prevent the undesirable charging.
Using an innovative silicon substrate ramp technique we show that leakage between layers and charge storage in the key parts of the GaN epitaxial stack does indeed exist in epitaxy displaying low dynamic R_ON dispersion. It will be demonstrated that good performance of devices requires a blocking barrier below the 2DEG and a vertical leakage path allowing positive charging of the GaN:C, presumably along active dislocations.

This work was funded by the UK EPSRC PowerGaN project.

β-Ga₂O₃ is a promising candidate for future high-power device applications because of its extremely large band gap of about 4.5 eV and associated high breakdown electric field. Recently, we demonstrated a record breakdown voltage of over 750 V for Ga₂O₃ MOSFETs with a channel layer grown by molecular beam epitaxy (MBE) [1]. There have been several reports on homoepitaxial growth of Ga₂O₃ thin films on Ga₂O₃ (100) and (010) substrates. However, Ga₂O₃ MBE growth on Ga₂O₃ (001) substrates has received little investigation. In this work, we performed systematic studies on ozone MBE growth of Ga₂O₃ thin films on Ga₂O₃ (001) substrates.
Ga₂O₃ thin films were grown on β-Ga₂O₃ (001) substrates by MBE using Ga metal source and ozone gas. We investigated their structural features as a function of growth temperature by using reflection high energy electron diffraction (RHEED) and atomic force microscopy (AFM).
The growth rate of a Ga₂O₃ thin film on a Ga₂O₃ (001) substrate strongly depended on the growth temperature. At 600°C, the growth rate was as high as about 0.6 μm/h, which was almost the same as that of Ga₂O₃ thin films grown on Ga₂O₃ (010) substrates. However, the growth rate of Ga₂O₃ (001) monotonically decreased with increasing growth temperature and reached a very small value of less than 10 nm/h at 750°C. Note that the growth rate of Ga₂O₃ (010) thin films grown under similar conditions is almost constant at 0.5-0.6 μm/h in the wide temperature range of 550-750°C [2]. The surface AFM image of a Ga₂O₃ (001) thin film grown at 600°C revealed a wire-like-shaped morphology running in the [010] direction with a periodicity of about 20 nm, which was consistent with the [010] azimuthal RHEED patterns that had implied the formation of micro-facets. The average surface roughnesses (R_a) of Ga₂O₃ (001) films grown at 600°C and 650°C were 1~2 nm and three to four times larger than those of MBE-grown Ga₂O₃ (010) surfaces. In contrast, straight and ordered steps were observed on a Ga₂O₃ (001) surface grown at 700°C, and the absence of two-dimensional islands on the surface grown at 750°C suggested the transition of growth mode from two-dimensional nucleation to step flow at around 700°C. The meandering step-edges running in the [010] direction observed on Ga₂O₃ (001) surfaces grown above 700°C indicated that Ga adatoms were incorporated only at the (010) step-edges. These results suggested that the substrate off-cut angle (i.e. step density) and direction could be important parameters for the high-speed growth of atomically-flat Ga₂O₃ thin films on Ga₂O₃ (001) substrates.
This work was partially supported by Council for Science, Technology, and Innovation (CSTI), Cross-ministerial Strategic Innovation Promotion Program (SIP), "Next-generation power electronics" (funding agency: NEDO).

[1] M. H. Wong et al., IEEE Electron Device Lett. 37, 212 (2016), [2] K. Sasaki et al., J. Cryst. Growth 392, 30 (2014).

Gallium oxides are promising materials. There are 5 known polymorphs[1], the α-, β-, γ-, δ-, ε-Ga₂O₃. Especially the thermodynamically stable phase β-Ga₂O₃ has attracted interest as a material for high power devices[2]. The other metastable polymorphs are moving into focus as well. Oshima et al. have grown ε-Ga₂O₃ thin films by MOCVD[3] and Orita et al. used PLD to grow ε-Ga₂O₃. Basic material properties of ε-Ga₂O₃, such as the size of the band gap are comparable to those of β-Ga₂O₃, but it is also expected to exhibit a high spontaneous polarization, possibly allowing the realization of two dimensional electron gases with high sheet carrier densities[4] when used in heterostructures. α-Ga₂O₃ was grown homoepitaxially on c-plane sapphire by mist CVD[5]. Schewski et al. observed pseudomorphic films on c-plane sapphire with a thickness of 3 monolayers independent from growth technique[6].
In our work we concentrate on the metastable phases ε-Ga₂O₃ and α-Ga₂O₃. We present the growth of ε-Ga₂O₃ and of thicker α-Ga₂O₃ layers by plasma assisted molecular beam epitaxy (PAMBE). ε-Ga₂O₃ thin films were grown in a tin-assisted process on c-plane sapphire. Usually, in Ga-rich conditions the growth of gallium oxide is attenuated by an etching of the growing film due to Ga₂O formation, which re-evaporates at growth temperature[7]. With the addition of a small tin flux this etching is shown to be suppressed, hence allowing the formation of ε-Ga₂O₃ in metal-rich conditions. α-Ga₂O₃ thin films with thickness of up to 200 nm are grown pseudomorphically on r-plane sapphire. However, the film thickness is still limited as nucleation of β-Ga₂O₃ can occur on the c-plane facets of the growing layers. The influence of different growth parameters on the phase formation and properties of the thin films is analyzed with HRXRD, AFM, and optical reflection measurements.


[1] Roy et al. J. Am. Chem. Soc. (1952)

[2] M. Higashiwaki et al. Phys. Status Solidi A 211 (2014)

[3] Y. Oshima et al. J. Appl. Phys. 118 (2015)

[4] M. B. Maccioni and V. Fiorentini Appl. Phys. Express 9 (2016)

[5] D. Shinohara and S. Fujita Jap. J. Appl. Phys. 9 (2008)

[6] Schewski et al. Appl. Phys Express 8 (2015)

[7] P. Vogt and O. Bierwagen Appl. Phys. Lett. 108 (2016)

Gallium oxide (Ga₂O₃) is a wide-bandgap semiconductor with attractive properties being exploited for the development of a range of electronic and electro-optic applications. In this work, we report on the growth of epitaxial Ga₂O₃ thin films on various substrates using metal organic chemical vapor deposition (MOCVD) method. Triethylgallium (TEGa) and trimethylgallium (TMGa) were used as precursors for gallium to grow Ga₂O₃ thin films at chamber pressures of 40 Torr, 65 Torr, 90 Torr and 120 Torr using 1800 sccm of pure oxygen. As the chamber pressure increases, the growth rate of the films was observed to decrease. Moreover, the films grown from the TEGa source were generally thinner than those grown from the TMGa source, despite identical growth conditions. The crystal structure and surface quality of the films were assessed by XRD, Raman spectroscopy, and atomic force microscopy (AFM). The film grown using TEGa at 65 Torr yielded a single phase epitaxial (-201) oriented β-Ga₂O₃ material with a surface roughness of ~ 4.0 nm. However, the films grown using the TMGa source were polycrystalline. Although, the reaction path between TEGa or TMGa and O₂ to form Ga₂O₃ by MOCVD is unknown, the fact that the TEGa pyrolyzes at lower temperature than the TMGa indicates greater susceptibility of the TEGa source to gas phase parasitic reactions than the TMGa source. This suggests that the TEGa source is highly depleted before it reaches the substrates surface, leading to a slow growth rate and, hence, a thinner epitaxial film. The UV-visible transmission spectra for films grown from both Ga sources had a band gap of~4.9 eV. Cathodoluminescence (CL) spectroscopy measurements presented a broad blue emission band, regardless of the Ga source used for the film growth, suggesting the presence of donor-acceptor-pair (DAP) processes. Ga₂O₃ thin film growth with water vapor as an oxidant was also studied and will be discussed.

Vertical n-Ga₂O₃ power devices require insulating or p-type materials for current blocking layers (CBLs), guard rings, or inversion-mode channels. Mg-ion (Mg⁺⁺) implanted Ga₂O₃ was investigated in this work as a CBL in light of semi-insulating Ga₂O₃ obtained by Mg compensation doping of n-type bulk crystals. Systematic thermal anneals and electrical measurements presented evidence of implant activation and illustrated a pathway for forming Mg⁺⁺-implanted CBLs in Ga₂O₃ devices.

Two-terminal electrical test structures comprising n-Ga₂O₃/Ga₂O₃:Mg(CBL)/n-Ga₂O₃ were fabricated on 7-μm-thick Si-doped (n~10¹⁶ cm^-3) β-Ga₂O₃ (001) epilayers grown by halide vapor phase epitaxy on Sn-doped (n~3×10¹⁸ cm^-3) substrates. Their design resembled typical transistor structures with a thick n^- drift layer. Mg⁺⁺ implantation was performed at 560 keV and a dose of 4×10¹³ cm^-2 with a peak concentration of 1×10¹⁸ cm^-3 at ~600 nm below the surface. Capless thermal anneals were carried out at 800°C, 900°C, and 1000°C for 30 min in N₂ to attempt Mg⁺⁺ activation and implantation damage recovery. A 100-nm-thick n⁺ top contact layer was formed by Si ion implantation, followed by activation annealing at 800°C for 30 min in N₂. Patterned-top and blanket-bottom Ti/Au ohmic electrodes were subsequently deposited. Current-voltage measurements were performed to assess vertical conduction through the Mg⁺⁺-implanted CBL by grounding the top electrode and applying positive substrate bias.

Ga₂O₃ as-implanted with Mg⁺⁺ was highly resistive owing to extensive lattice damage. Annealing at increasing temperatures was expected to result in progressive damage recovery and hence reduced current blocking by the implanted region. Leakage through the CBL annealed at 800°C remained low (<1 mA/cm² at 200 V) as only limited damage reversal had taken place. A higher annealing temperature of 900°C led to significantly increased conduction through the CBL (1 mA/cm² at 60–90 V) consistent with improved crystal quality. However, the effect of damage recovery saturated beyond 900°C and only slight degradation in current blocking capability (1 mA/cm² at 40–80 V) was observed with 1000°C annealing. The similar blocking characteristics between structures annealed at 900°C and 1000°C suggested that the barrier was no longer dominated by lattice defects; instead, a distinct mechanism that could be unambiguously ascribed to Mg⁺⁺ activation as compensating acceptors in the host material had given rise to a new barrier in the current path. These results established Mg⁺⁺-implantation with an activation temperature beyond 900°C as a feasible CBL technology in vertical Ga₂O₃ transistors, for which the implantation and annealing conditions could be further optimized to realize effective electron barriers.

This work was partially supported by Council for Science, Technology and Innovation (CSTI), Cross-ministerial Strategic Innovation Promotion Program (SIP), “Next-generation power electronics” (funding agency: NEDO).

Ga₂O₃ has recently generated significant interest and high quality growth (both thin-film and bulk) has been achieved with several techniques. Its distinctive feature compared to other transparent semiconducting oxides is the high transparency all the way to UV thanks to a wide 4.9 eV band gap. Hence this material has potential applications in future UV devices and high power electronics. n-type doping is achieved with Sn and Si, and highly resistive material can be produced by doping with Fe and Mg. p-type doping is yet to be achieved. Ga vacancies have been shown to act as efficient compensating centers in n-type material [1]. In order use Ga₂O₃ as a semiconductor in electronics, detailed understanding and control of defects and doping are required.

In this work, we analyze the formation mechanisms of Ga vacancies with positron annihilation spectroscopy [2] in Ga₂O₃ thin films grown by metal-organic chemical vapor deposition [3]. To this end, we studied samples grown on different substrates (Al₂O₃, Ga₂O₃), with different doping impurities (Si, Sn) and using different precursors for Ga (TMGa, TEGa) and O (H₂O, O₂). In addition, post-growth thermal annealings were performed to manipulate the defect balance in the films. We show that the choice of substrate, precursor and n-type dopant all have a dramatic effect on the efficiency of Ga vacancy formation and hence on the electrical properties of thin-film Ga₂O₃.

[1] E. Korhonen et al., Appl. Phys. Lett. 106, 242103 (2015).
[2] F. Tuomisto and I. Makkonen, Rev. Mod. Phys. 85, 1583 (2013).
[3] G. Wagner et al., phys. status solidi (a) 211, 27 (2014).

Solar-blind photodetectors have great potentials for numerous applications including flame sensors, radiation detectors, and analysis in chemical, environmental, and biological fields. Various material can be used for solar-blind photodetectors such as In₂Ge₂O₇, InAlN, AlGaN, GaN, MgZnO diamond and so on. However, these materials have still several problems to be solved such as difficulty of film growth with high quality, chemical instability, difficulty of handling the substrate due to intrinsic properties, high cost and so on. Therefore, the development of novel materials and designs of devices with 5S (high stability, high speed, high signal-to-noise, high sensitivity, high selectivity) is necessary in deep-UV detectors research field. β-Ga₂O₃ is a promising candidate for deep-UV photodetectors due to its desirable electrical and optical properties such as ~4.9 eV of direct band gap, and excellent chemical and thermal stabilities. Because it also has intrinsic solar-blindness, blinding the light with wavelength over 280 nm, β-Ga₂O₃ based solar-blind photodetectors need not the additive filters. The solar-blind photodetectors were fabricated using two-dimensional β-Ga₂O₃ micro-flakes, which are mechanically exfoliated from bulk sample. The exfoliated flakes were transferred to as-prepared SiO₂/p-Si/back gate metal (Ti/Au) structure and then the Cr/Au contact electrodes were formed via photolithography and electron-beam evaporators technique. The crystal structure and quality of the exfoliated flakes were confirmed by using transmission electron microscope, selected area electron diffraction pattern and micro-Raman spectroscopy. The photoresponse properties of device were investigated using the semiconductor parameter analyzer and the UV lamp with wavelengths of 254 nm and 365 nm. The devices have back-gate field-effect transistor structure. Therefore, dark currents were effectively reduced and the photoresponse properties were enhanced by applying the negative gate voltage. In this study, we demonstrated the solar-blind photodetectors using exfoliated β-Ga₂O₃ micro-flakes for the first time and investigated the output characteristics and photoresponse properties. The fabricated devices exhibited the highest responsivity among the reported literatures. We believe that these excellent results resulted from the following two reasons; the decrease of dark current and the high surface-to-volume ratio of 2-dimensional β-Ga₂O₃ flakes. The details of the results will be presented at the conference.

Atomic-layer-deposition (ALD) Al₂O₃ films are the most promising solution to gate insulation and surface passivation for non-Si, non-SiC semiconductor devices because of their high thermal stability, relatively high dielectric constant (~ 9), and large bandgap (~ 7 eV) together with high conformity, uniformity, and reproducibility due to the self-lim