Ritesh Agarwal University of Pennsylvania
Wei Lu University of Michigan
Oliver Hayden Siemens AG
Akram Boukai University of Michigan
W1: Nanowire Opening Session
Monday PM, November 29, 2010
Ballroom C, 3rd floor (Hynes)
9:30 AM - **W1.1
Semiconductor Nanowires: Building Blocks for Today and the Future.
Charles Lieber 1 Show Abstract
1 , Harvard University, Cambridge, Massachusetts, United States
Advances and breakthroughs in nanoscience depend critically on development of nanostructures whose properties are controlled during synthesis. This presentation focuses generally on this concept using nanowires as a platform material. First, the synthesis of complex modulated nanowires in which rational design can be used to precisely control composition, structure and most recently structural topology will be discussed. These unique material characteristics, which have led to the emergence of nanowires as a central material in nanoscience, will be exploited to investigate fundamental properties and performance limits of photovoltaic devices at the single nanowire level. In addition, the capabilities of nanowire will be highlighted through their unique capability to create unprecedented active interfaces cells and tissue. Recent work pushing the limits of both multiplexed extracellular recording at the single cell level and the first examples of intracellular recording will described, as well as the prospects for truly blurring the distinction between nonliving and living information processing systems.
10:00 AM - W1.2
Tuning the Color of Silicon Nanowires.
Linyou Cao 1 , Mark Brongersma 2 Show Abstract
1 , University of California, Berkeley, Berkeley, California, United States, 2 , Stanford University, Stanford, California, United States
Empowering silicon (Si) with optical functions is one of the most important problems in materials research. Nanofashioning represents a general strategy to turn Si into a useful photonic material and Si structures have been engineered to realize light emission, optical cloaks, high confinement waveguides, nonlinear optics, enhanced light absorption and Raman scattering. Here, we demonstrate that a wide spectrum of colors can be generated by harnessing the strong resonant light scattering properties of Si nanowires under white light illumination. The strong spectral dependence of the light scattering on the structure size, dielectric environment, and illumination conditions opens up entirely new applications of Si and puts this material in a new light.
10:15 AM - W1.3
Transforming Semiconductor Nanowires Into Heterostructures and Superlattices by Size-dependent Cation Exchange Reactions.
Ritesh Agarwal 1 , Bin Zhang 1 , Yeonwoong Jung 1 , Hee-Suk Chung 1 , Lambert van Vugt 1 , Ju Li 1 Show Abstract
1 Materials Science & Engineering, University of Pennsylvania, Philadelphia, Pennsylvania, United States
The unique properties of nanostructured materials enable their transformation into complex, kinetically-controlled morphologies which cannot be obtained during their growth. Solution-phase cation-exchange reactions can transform sub-10 nm nanocrystals/nanorods into varying compositions and superlattice structures; however, due to their small size, cation-exchange reaction rates are extremely fast which limits control over the transformed products and possibilities for obtaining new morphologies. Nanowires are routinely synthesized via gas-phase reactions with 5-200 nm diameters and their large aspect ratios allow them to be electrically addressed individually. To realize their full potential, it is desirable to develop techniques which can transform nanowires into tunable but precisely controlled morphologies, especially in the gas-phase to be compatible with nanowire growth schemes. We report transformation of single-crystalline cadmium-sulfide nanowires into composition-controlled ZnxCd(1-x)S nanowires, core-shell heterostructures, metal-semiconductor superlattices (Zn-ZnCdS), single-crystalline ZnS nanotubes, and eventually metallic Zn nanowires by utilizing size-dependent cation-exchange reaction along with temperature and gas-phase reactant delivery control. Simulations that account for elastic interactions due to atomic size mismatch and diffusional kinetics reveal the conditions for forming these structures, mapping out critical theoretical issues like nucleation versus growth rate of domains, and the peculiarities of 1D versus 3D systems. This versatile synthetic ability to transform nanowires offers new opportunities to study size-dependent phenomena at the nanoscale and tune their chemical/physical properties to design reconfigurable circuits.B. Zhang, Y. Jung, H.-S. Chung, L.K. v Vugt and R. Agarwal. "Nanowire Transformation by Size-Dependent Cation Exchange Reactions," Nano Letters, v.10, 2010, p. 149.
10:30 AM - W1.4
Room Temperature Photoluminescence in Silicon Nanowires.
Vladimir Sivakov 1 , Felix Voigt 1 2 , Florian Talkenberg 1 , Bjoern Hoffmann 1 , Gerald Broenstrup 1 , Gottfried Bauer 2 , Silke Christiansen 3 1 Show Abstract
1 , Institute of Photonic Technology, Jena Germany, 2 , Carl-von-Ossietzky University, Oldenburg, Germany, 3 , Max Planck Institute for the Science of Light, Erlangen Germany
Silicon nanowire (SiNW) ensembles with different architectures have been realized using wet chemical etching of bulk silicon wafers (p-Si(111) and p-Si(100)) with an etching hard mask of silver nanoparticles that are deposited by wet electroless deposition on polystyrene pattered silicon surfaces. Two steps electroless wet chemical etching (WCE) is al method to produce silicon nanowire (SiNW) material from crystalline silicon wafers. SiNWs built by WCE were investigated by photoluminescence (PL) measurements with excitation at 488 nm and power density of about 3.2 mW per mm2. Strong visible (red-orange) room temperature photoluminescence has been observed in wet chemically etched heavily (1020 cm-3) and lowly (1015 cm-3) doped SiNWs. The as-prepared samples show strong visible PL at room temperature peaking at 1.5 eV to 1.6 eV. After treatment by hydrofluoric acid (HF) PL partly vanishes, but substantial PL remains, peaking now at 1.4 eV. In this paper the possible origins of PL of the SiNW and PL dependence on the WCE kinetic’s are investigated. We interpret the results in the framework of a two media model, assuming that one part of the PL contribution stems from quantum confined nano-crystalline states located at the SiNW sidewalls and another part of the PL arising from SiOx related states located around the SiNW surfaces and on top of the sample surface. Considering the known possibilities of PL origin for various Si based material compositions we deduce a coherent picture describing the PL origin of the SiNW based samples under investigation. Our observations strongly suggest that visible light emission at room temperature of SiNWs is a result of the rough sidewall structure that can be such that nanoscale features form that make quantum confinement most probable. Significant light absorption (over 90% in a range between 300-2000 nm) was observed in the SiNWs covered by the TCO (Al doped ZnO) thin layers performed via Atomic Layer Deposition. The strong absorption, less reflection of visible and infra-red light and room temperature photoluminenscence of the SiNW ensembles strongly suggest that such a material has a real potential to be applied in the fields of opto-electronics, photonics, sensoric and photovoltaics. The morphology, crystallographic and surface structure, and optical properties of SiNWs will be presented and discussed in details.
10:45 AM - W1.5
Thermoelectric Properties of Nanostructured Tensile Strained Silicon.
Xiao Guo 1 , Xianhe Wei 1 , Arun Kota 1 , Anish Tuteja 1 , Akram Boukai 1 Show Abstract
1 Materials Science and Engineering, University of Michigan, Ann Arbor, Michigan, United States
The thermoelectric figure of merit is determined by ZT = S2T/ρκ. It is known that n-type, tensile strained silicon shows increased electron mobility, due to the reduced intervalley scattering and lighter electron effective mass. Thus, the power factor (S2/ρ) could be potentially increased. It is also predicted that the thermal conductivity, κ, can be significantly decreased to near the minimum theoretical value, 1W m-1K-1, by utilizing nano-scale boundary confinement. Therefore, the combination of tensile strained silicon and nano-scale features could lead to a high figure of merit.Here we report a unique method of patterning nano-scale arrays of lamellar and cylindrical domains with block copolymer nanolithography. In particular, the block copolymer is used as a template to transfer the nano-scale lamellar and cylindrical features to a thin film (15nm) silicon layer by plasma ion etching. Eventually, tensile strained silicon with these nanostructures is obtained and studied using thermal/electrical connections, which are fabricated by photolithogaphy. We will present thermoelectric measurement results of seebeck coefficient, electrical conductivity, and thermal conductivity obtained on these strained nanostructured materials. A theoretical model incorporating strain effects on thermoelectric properties will also be demonstrated. F. Schäffler. High-mobility Si and Ge structures. Semicond. Sci. Technol 12, 1515-1549 (1997) D. G. Cahill, S. K. Watson & R. O. Pohl. Lower limit to the thermal conductivity of disordered crystals. Phys. Rev. B 46, 6131-6140 (1992) R. Ruiz, et al. Density multiplication and improved lithography by directed block copolymer assembly. Science 321, 936-939 (2008)
11:00 AM - W1: Opening
W2: Nanowire Growth I
Monday PM, November 29, 2010
Ballroom C, 3rd floor (Hynes)
11:30 AM - **W2.1
Growth of Hybrid Group IV-group III-V Nanowires.
Frances Ross 1 Show Abstract
1 , IBM T.J. Watson Research Center, Yorktown Heights, New York, United States
Many lattice mismatched semiconductors do not grow readily as planar layers but have been combined successfully in nanowires. The efficient strain relaxation permitted by the nanowire geometry allows, for example, segments of GaP and InAs, with mismatch over 10%, to be grown together without defects. The ability to combine these III-V materials is exciting for applications such as solid state lighting and photovoltaics. Successful growth of III-V with group IV semiconductors would open an even wider range of applications, but has not been explored in as much detail. Here we discuss the growth of “hybrid” nanowires that contain segments of GaP, Si and Ge. The structures are grown in situ in a transmission electron microscope by supplying triethylgallium and phosphine, disilane, and digermane sequentially to an Au-decorated substrate. This allows us to follow details of the wire structure and catalyst phase as the different segments grow. We describe the sequence of phase changes in the catalyst and the structure of the growth interface during formation of a heterojunction, and discuss the kinetic and thermodynamic parameters that determine whether the wire grows straight or forms a kink at the interface. We consider changes in the catalyst during growth of each segment, describing synergistic effects in which the presence of one material in the catalyst affects the growth of others. This allows us to evaluate favourable conditions for growth of hybrid nanowires and discuss possible applications.
12:00 PM - W2.2
Copper as Seed Particle Material for InP Nanowires.
Karla Hillerich 1 , Maria Messing 1 , Reine Wallenberg 2 , Jonas Johansson 1 , Knut Deppert 1 , Kimberly Dick 1 2 Show Abstract
1 Solid State Physics, Lund University, Lund Sweden, 2 nCHREM/Polymer and Materials Chemistry, Lund University, Lund Sweden
Nanowires are 1D structures with diameters in the nanometer range and a high aspect ratio. Semiconducting nanowires are mostly grown with help of a metallic seed particle, where gold is the most widely used particle material. Gold, however, is known to be a deep level impurity in semiconductors. Therefore, alternative seed particle materials must be found. Metals like copper and aluminum have served as seeds for Si and Ge nanowires with good results. Epitaxial growth of vertically-aligned III-V nanowires seeded by alternative materials has not been shown previously. We report here epitaxial growth of InP nanowires seeded by copper particles in MOVPE for the first time. Copper is expected to be electronically less interfering than gold and can also directly be coupled to the copper used as interconnect material for ICs. We will present the parameter range, growth rates and activation energies for InP nanowire growth from Cu seed particles, and compare these to growth using Au particles.Copper thin films were evaporated onto InP (111)B substrates. These films split up into islands during in-situ annealing under H2 and PH3 in the MOVPE growth chamber. Growth was performed at temperatures between 290°C and 420°C. A wide range of molar fractions and V/III ratios of trimethylindium and phosphine was investigated.In the temperature range of 340°C to 370°C epitaxial nanowires grow in <111>B direction with high yield. Nanowire growth brakes down above 390°C. Below 310°C there are still structures growing, but not vertically aligned. The nanowires show no tapering even after extended growth times and have a strongly faceted particle at the tip after growth. XEDS investigations and examination of the diffraction patterns and atomic distances in the post-growth particle suggest that the nanowires grow from a solid η(Cu2In) phase particle. The growth parameters, i.e. temperature, V/III ratio and total molar fractions, are considerably lower than those commonly used for growth from Au particles.The use of copper as seed particle material opens up new parameter regimes and may help to understand the nanowire growth mechanism.
12:15 PM - W2.3
Elementary Processes in Nanowire Growth.
Jerry Tersoff 1 , Klaus Schwarz 1 Show Abstract
1 , IBM Watson Center, Yorktown Heights, New York, United States
In vapor-liquid-solid growth, uniform nanowires often grow side by side with a zoo of unintended morphologies. One common example is kinking of a wire from one growth direction into another. Another is growth of lateral wires, formed by crawling of the catalyst along the surface. Most applications require suppression of such unintended growth modes. On the other hand, by controlling kinking and crawling it is possible to grow novel device structures. For either purpose, it is important to understand the underlying mechanisms that lead to these complex growth morphologies.Here we show that the complexity of nanowire growth can be understood as arising from the interplay of just three simple elements: facet dynamics (i.e. growth of the facet by liquid-phase epitaxy from the catalyst); droplet statics (i.e. ordinary wetting); and the formation of new facets at the trijunction. We incorporate these processes in a simple model for VLS growth. Our models addresses fully faceted nanowires, such as are seen in experiment.Using this model, simulations of nanowire growth exhibit many of the same phenomena observed in experiment. We present several examples, including: (1) kinking from one direction to another under an external perturbation; (2) a competition between growth of free-standing nanowires and wires growing along the surface by catalyst crawling; and (3) the occurrence of different shapes for the wire-catalyst interface under different growth conditions.
12:30 PM - W2.4
Growing Nanowires without Catalysts: Vapor-solid Process or Vapor-liquid-solid Process?
Xudong Wang 1 , Jian Shi 1 Show Abstract
1 Materials Science and Engineering, University of Wisconsin Madison, Madison, Wisconsin, United States
Self-assembled nanowire (NW) structures are typically formed either with the assistance of metal catalyst or without. Vapor-liquid-solid (VLS) process is a widely accepted mechanism for growing NWs when foreign metal catalysts present. When no other metal catalyst is used, the formation of NWs is generally believed to result from a vapor-solid (VS) process. However, the mechanism of the one-dimensional (1D) growth directly from a vapor phase is not as clear as the VLS process. A recently proposed screw dislocation driven mechanism showed success on explaining the formation mechanism when the vapor components incorporated into the NW lattice stoichiometrically. However, when different elements deposit onto the nanowire with significantly different rates, a single-element phase would form first and catalyze the 1D growth. This is known as the self-catalyzed NW growth. Nonetheless, this mechanism is still a hypothesis. Little evidence has been shown to provide further proof and understanding of this unstable transitional growth stage. Recently, using ZnO as an example, by carefully adjusting the deposition supersaturation, we successfully manipulated the amount of Zn that was precipitated to catalyze the growth of ZnO nanowires. Different amount of Zn would lead to different nanostructure morphology. Increasing the amount of Zn on ZnO surface would eventually eliminated the distinction among the ZnO crystal surfaces, therefore smooth and curvy ZnO nanowires were received. The randomly orientated hemispherical ZnO NW tips suggested the existence of a liquid phase during the NW growth. Diffusion of Zn atoms into the lattice also rendered a strong green luminescence of the ZnO NWs. Based on the experimental observation and theoretical calculation, we suggested that for any two- or multi-element compound, even there is no foreign metal catalyst, the growth mechanism of NWs would still be a VLS process as long as the elements incorporate into the lattice non-stoichiometrically. This research brought new understandings to the growth mechanisms of NWs and would be valuable for guiding morphology and composition control of 1D nanostructures.
12:45 PM - W2.5
Anomalous Nucleation of Si Nanowires Smaller than 10nm.
Lea Marlor 1 , Bong Joong Kim 1 , Jerry Tersoff 2 , Frances Ross 2 , Eric Stach 1 Show Abstract
1 School of Materials Engineering and Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana, United States, 2 IBM Research Division, T.J. Watson Research Center, Yorktown Heights, New York, United States
Nanoparticle size effects are of great importance when studying the catalyzed nucleation and growth of self-assembled nanowires. Previous studies of the nucleation of Si from Au catalysts focused on catalyst sizes greater than 10 nm in the low pressure regime, and found that the time to nucleation increases linearly with increasing diameter. This process is controlled by the rate of dissociative adsorption of disilane onto the catalyst. Here we study nucleation events in catalysts that are less than 10 nm in diameter at higher pressure to assess the kinetics over a wider range of conditions in order to understand the Gibbs-Thomson effect. We used environmental TEM at 300kV to allow real time imaging of the nucleation process at nanometer scale resolution. Au catalysts with diameters ranging from 5 –15 nm were deposited on amorphous SiN membranes. The samples were then heated to temperatures ranging from 450°C – 525°C and exposed to disilane at pressures ranging from 1 x 10-5 – 1 x 10-2 Torr. At 450°C and 1 x 10-2 Torr, nucleation took place in 10 nm diamater catalysts within a few seconds of introducing the disilane. However, catalysts with diameters between 12 and 15 nm required approximately 15 seconds of exposure to disilane before nucleation occurred. Particles under 10 nm do not nucleate: instead they either coarsen to sizes greater than 10 nm and nucleate thereafter, or they remain small and never nucleate. At lower pressures we find that the electron beam accelerates disilane decomposition, and have systematically explored the effect of electron irradiation on the nucleation kinetics. We will discuss the relationship between existing models of nucleation and our quantitative observations, and describe a model for nucleation that includes the Gibbs-Thomson effect in catalysts with a diameter below 10 nm. These experiments show that there is substantial difficulty in creating ultrasmall nanowires.
W3: Nanowire Growth Mechanisms
Monday PM, November 29, 2010
Ballroom C, 3rd floor (Hynes)
2:30 PM - **W3.1
Screw Dislocation-driven Nanomaterial Growth: Nanowire Trees, Nanotubes, and Beyond.
Song Jin 1 Show Abstract
1 , University of Wisconsin-Madison, Madison, Wisconsin, United States
I will discuss a nanowire formation mechanism that is different from the well-known vapor-liquid-solid (VLS) growth. Axial screw dislocations provide the self-perpetuating steps to enable 1-dimensional (1D) crystal growth, unlike previously understood mechanisms that require metal catalysts. This mechanism was initially found in hierarchical nanostructures of lead sulfide (PbS) nanowires with helically rotating branches resembling “pine trees”. I will further explain how dislocations result in the spontaneous formation of nanotubes and use classical crystal growth theory to confirm that their anisotropic growth is driven by dislocations. Dislocation-driven growth should be general to many materials grown in vapor or solution phase and is underappreciated in modern nanomaterial literature. Our discoveries will create a new dimension in the rational design and synthesis of nanomaterials. It could enable the applications of novel complex hierarchical nanostructures in solar energy harvesting and our understanding will allow large scale synthesis of nanowire materials for practical applications.
3:00 PM - W3.2
Step Flow and Interfacial Dynamics During Catalytic Germanium Nanowire Growth.
Andrew Gamalski 1 , Caterina Ducati 2 , Renu Sharma 3 , Stephan Hofmann 1 Show Abstract
1 Electrical Engineering, University of Cambridge, Cambridge United Kingdom, 2 Materials Science and Metallurgy, University of Cambridge, Cambridge United Kingdom, 3 Nanofabrication Research Group, National Institute of Standards and Technology, Gaithersburg, Maryland, United States
Implementing bottom-up grown semiconductor nanowires in future nano/opto-electronic devices will require a detailed understanding of nanowire growth mechanisms. We present environmental transmission electron microscopy video data of Au catalyzed Ge nanowire growth under digermane exposure at temperatures between 240 - 400°C . We focus on catalyst-nanowire interface dynamics during vapor-liquid-solid and vapor-solid-solid growth following the initial nucleation stage from both above and below the eutectic temperature . Kinetic and thermodynamic modeling gives insight into the importance of surface energies and catalyst-interface dynamics to nanowire growth and geometry. A. Gamalski et al, submitted (2010) A. Gamalski et al, Nano Letters, X, XXX (2010)
3:15 PM - W3.3
Growth Mechanisms of InSb Nanowires by Chemical Beam Epitaxy.
Alexander Vogel 1 , Johannes de Boor 1 , Michael Becker 1 , Samuel Mensah 1 , Joerg Wittemann 1 , Peter Werner 1 , Volker Schmidt 1 Show Abstract
1 Exp. II, Max Planck Institute of Microstructure Physics, Halle (Saale) Germany
There is growing interest in antimony based III-V semiconductor materials, due to their intriguing physical properties. For example, InSb is very promising candidate for high-speed, low-power electronics due to the extremely high bulk electron mobility of 77000 cm2V-1s-1. Also, InSb has a good hole mobility of up to 1000 cm2V-1s-1.However, heteroepitaxial growth of InSb is not easily achieved due to the large lattice constant (a0 = 0.648 nm) of InSb as compared to other semiconductor materials. A large lattice mismatch exists between InSb and typical semiconductor substrate materials like InAs (7%), GaAs (15%) and Si (19%). A nanowire grown heteroepitaxially on a lattice mismatched substrate can potentially relax part of the strain energy by elastically deforming its shape. Concerning the growth of InSb nanowires, not much is known about such relaxation mechanisms. They are strongly influenced by the amount of lattice mismatch as well as by the growth parameters.We are going to present detailed growth studies of InSb nanowires grown directly on InSb and InAs substrates using Chemical Beam Epitaxy. CBE has some decisive advantages over other epitaxial growth techniques like MOCVD or MBE. In general, using CBE one is able to grow at lower temperatures compared to MOCVD, which is particularly important when it comes to the growth of materials with very low melting points like InSb. Compared to MBE precursor flow control and switching is much easier due to the use of electronic mass flow controllers. Trimethylindium and triethylantimony were used to grow InSb nanowires. After growth, samples were characterized using SEM, TEM, XRD and Raman spectroscopy. We identified two very different growth regimes. In the low temperature growth regime, at a growth temperature of around 350°C, nanowire growth is actually promoted by a liquid indium droplet rather than an Au-In-alloy. TEM investigations showed that wires grown at those temperatures exhibit a large number of stacking faults and twin-planes. But the stacking fault density could be heavily reduced by growing at higher temperatures.In the high temperature growth regime, around 430°C, completely defect free InSb nanowires were grown. Those nanowires had a length of up to 2,8 µm with diameters as small as 35 nm. Post-growth characterization suggested that an AuIn2 alloy promotes nanowire growth within this regime.By combining CBE nanowire growth and laser interference lithography ordered arrays of InSb nanowires were grown. Those arrays have good homogeneity over a large area with a density of up to 8 wires per square micron.
3:30 PM - W3.4
Simulation of VLS Nanowire Growth with Axial Grain Boundaries and Comparison to Experimental Structures via Cross-sectional TEM.
Edwin Schwalbach 1 , Eric Hemesath 1 , Lincoln Lauhon 1 , Peter Voorhees 1 Show Abstract
1 Dept. of Materials Science and Engineering, Northwestern University, Evanston, Illinois, United States
We have developed a phase-field model for the simulation of Vapor-Liquid-Solid (VLS) growth of nanowires that includes the effects of convection via viscous fluid flow in the catalyst droplet. We apply this model to the growth of nanowires with grain boundaries oriented along the growth axis and compare simulated structures to reconstructions of experimental bi-crystal nanowires obtained from cross-sectional high resolution transmission electron microscopy and tomography. These internal planar defects act as trapping sites for catalyst atoms in the case of Au catalyzed Si nanowires, and the degree of catalyst incorporation is found to depend sensitively on the tilt of the grain boundary. We examine and compare two possible mechanisms for the genesis of such wires: coalescence of neighboring droplets on a substrate and growth from two nuclei within the same droplet. Our model highlights the importance of fluid flow in the early stages of nanowire growth and shows how adjacent droplets can coalesce. Furthermore, the model allows us to determine the relative importance of diffusion and convection within the liquid droplet. Finally, we consider the stability of adjacent grains growing within the nanowire and investigate the complex morphology of the solid-liquid interface for such wires via a simple model of interfacial anisotropy.
3:45 PM - W3.5
Controlling the Transition Region Width of VLS-Grown Axial Nanowire Heterostructures by Catalyst Alloying.
Daniel Perea 1 , S. Tom Picraux 1 Show Abstract
1 Center for Integrated Nanotechnologies, Los Alamos National Laboratory, Los Alamos, New Mexico, United States
We demonstrate the liquid phase growth of Si/Ge axial heterostructures with significantly increased abruptness by in situ trimethylgallium alloying of the liquid Au catalyst with Ga. For nanowire heterostructure applications such as in tunnel field effect transistors or thermoelectric devices, the formation of a compositionally abrupt heterointerface is important for optimizing device performance. However, for group IV semiconductors, abrupt heterojunction formation has been a challenge due to the relatively high solute solubilities in the commonly used Au catalyst during vapor-liquid-solid (VLS) growth. As VLS growth of a nanowire heterostructure, composed of species A and B, is mediated through a liquid metal alloy nanoparticle, the transition region width is dictated by the depletion rate of species A from the liquid, which in turn is dictated by its relative solubility in the liquid. Recently, it was shown by others that compositionally-abrupt axial heterojunctions could be made in Si-Ge nanowires using solid Al-Au catalyst particles. For their case of growth from a solid catalyst, the solid solubility of both Si and Ge is very low, thus allowing for a compositionally abrupt interface, although at an inherently slow solid phase growth rate. In this work, we have taken a new approach of using a low-solubility liquid Ga-Au alloy catalyst to create a sharper axial heterojunction in Ge-Si, relative to that obtained using pure Au. By lowering the solubility of Ge within the liquid Ga-Au alloy catalyst, we show for the first time, the formation of a progressively sharper Ge-Si heterojunction. For example, for 60 nm diameter nanowires the Ge-Si heterojunction width decreases from 53±14 nm for growth with a pure Au catalyst, to 14±4 nm with an increasing Ga/Au catalyst ratio of up to 1±0.05. The sharper interface corresponds to a progressively lower Ge solubility in the Ga-Au alloy. Based on the only moderately lower growth rates compared to Au-catalyzed growth rates, we conclude that nanowire growth from the Ga-Au alloy proceeds via VLS growth making it practical for heterostructure device growth. SEM, TEM, and EDS analyses demonstrate 100% Ge to Si compositional change with good morphology control. This work provides motivation to further explore alternative catalyst metals and metal alloys with Au in order to tailor interfacial abruptness by manipulating the semiconductor and dopant solubility in the catalyst.
4:30 PM - W3.6
Controlled Growth of Three Dimensional Kinked-silicon Nanowire Structures.
Soonshin Kwon 2 , Ji Hun Kim 1 , Zack Chen 1 , Jie Xiang 1 2 Show Abstract
2 Materials Science and Engineering, Univ. California, San Diego, La Jolla, California, United States, 1 Electrical and Computer Engineering, Univ. California, San Diego, La Jolla, California, United States
Semiconductor nanowires have attracted significant interest because of their novel physical properties and diverse potential for electronic and optoelectronic device applications. Adding to their attractiveness is the ability to design and integrate via in-situ synthesis of core-multi-shell, axial heterojunction as well as branched heterostructures. Recently Tian et.al.  reported controllable 2D structure of multiple zigzag shape kinked nanowires in which the straight sections are separated by fixed 120 degree triangular joints. Here we report rational growth of 3D multiple kinked-nanowire structures with diameter as small as 20 nm synthesized using programmed periodic reduction of precursor partitial pressure in a low pressure CVD system. SEM and high resolution TEM clearly showed the generation and 3-fold symmetry breaking process of the kinked joints, which preserve the single crystallinity. The clean, epitaxial joint presents unique mechanical properties. Specialized device functions could be introduced into localized kinked joints in the nanowires. This new technology could open up the possibility of introducing nanoelectronics, nanophotonics, or biological sensors into complex nanoscale structures. Finally, electromechanical properties and applications of such nanojoints will also be discussed.  Bozhi Tian et al, Nature nanotechnology 4, 824 (2009)
4:45 PM - W3.7
Fabrication of Ga2O3 - SnO2 Heterostructure Nanowires by Vapor-liquid-solid Method and Atomic Layer Deposition and Their Gas Sensing Properties.
Yun-Guk Jang 1 , Won-Sik Kim 1 , Dai Hong Kim 1 , Seong-Hyeon Hong 1 Show Abstract
1 Department of Materials Science and Engineering , Seoul National University, Seoul Korea (the Republic of)
Metal oxide nanowire (NWs) semiconductor sensors are the most promising devices among the solid state chemical sensors, because they have many advantages such as a large surface to volume ratios and a Debye length comparable to their dimensions. Therefore, the synthesis of one-dimensional nanostructures has been stimulated to intense research activity about SnO2, ZnO, In2O3, Ga2O3, etc. Moreover, modifications of sensing material have been intensively studied to enhance the gas sensing performance by various routes such as doping, addition of catalyst, and formation of heterostructures. Among these methods, the design of a new sensor composition by forming a heterostructures with different sensing materials has a great potential for tuning the gas response and for accomplishing the selectivity. However, compared with a considerable development in homogeneous systems, researches on multi-compositional sensing materials are still in the early stages. Thus, the formation of heterostructures and characterization of their gas sensing properties are highly required. Ga2O3 and SnO2 are well-known n-type semiconductor gas sensor materials. Ga2O3 sensor shows the oxygen-sensing capabilities as well as reducing gases, but it has too high working temperature (over 600 oC). SnO2 is most sensitive materials toward various gases, but the selectivity towards target gases is lacking. Recently, one-dimensional Ga2O3-SnO2 heterostructures have been extensively studied as promising materials for gas sensor due to their structural defects and combination of their own sensing capabilities, but the gas sensing properties of this structure have not been studied yet.In the present study, we demonstrate an effective strategy for formation of Ga2O3-SnO2 heterostructures and their gas sensing properties. Ga2O3 nanowire (core) was synthesized by typical vapor-liquid-solid (VLS) methods and SnO2 layer (shell) was coated by atomic layer deposition. The detailed process was followed. First, Au was coated on SiO2/Si substrates with interdigitated Pt electrodes, and then nanowire were grown on Au-coated substrate by evaporating Ga powder. As-grown Ga2O3 NWs were coated with SnO¬2¬ by ALD methods to fabricate Ga2O3-SnO2 heterostructures. In our process, we chose DBTDA (dibutlytindiacetate) as Sn precursor to carry out ALD process at 100 oC with O2 plasma. The SnO2 shell thickness, from 5 to 100 nm, was controlled by number of ALD cycle. Ga2O3-SnO2 heterostructures were characterized by XRD, SEM and TEM. The gas sensing properties was measured by flow type sensing equipment. We measured sensing properties towards various gases, such as H2, CO, NH3 and NO2, and the sensing properties with shell (SnO2) thickness will be discussed in this presentation.
5:00 PM - W3.8
Atomic Layer Epitaxy on Nanowire Surfaces at Low Temperatures.
Ren Bin Yang 1 , Nikolai Zakharov 1 , Oussama Moutanabbir 1 , Kurt Scheerschmidt 1 , Li-Ming Wu 2 , Ulrich Goesele 1 , Julien Bachmann 3 , Kornelius Nielsch 3 Show Abstract
1 , Max Planck Institute , Halle Germany, 2 State Key Laboratory of Structural Chemistry, Institute of Research on the Structure of Matter, Fujian China, 3 Institute of Applied Physics, University of Hamburg, Hamburg Germany
Atomic layer deposition (ALD) is a very suitable method for the conformal deposition of semiconductor nanowires with high aspect ratios, while offering the precise tuning of the layer thickness and high uniformity. We have grown nanowires of V-VI semiconductors by cyclic vapour liquid solid growth mode. The synthesized Sb2Se3 and Sb2S3 nanowires have been applied successfully as three dimensional substrates for epitaxial atomic layer deposition. The core-shell structures that will be presented demonstrate the possibility of driving Atomic Layer Deposition at temperatures far below those used so far. Conformal atomic layer deposition of thin Sb2S3 layers takes place epitaxially at 65 °C. More elevated deposition temperatures increase the mobility of the solid and result in the diffusion of Sb2S3 along surface energy gradients. We have observed that the growth of the double-segmented structures relies on the high crystal anisotropy of a layered solid, which drives a perfectly anisotropic growth in a manner. On Sb2Se3 wires, which present the high-energy c facet at their extremity, this results in the axial elongation of the wire with a Sb2S3 segment. When Sb2S3 wires, whose c planes are exposed on the sides, are used as substrate, the homoepitaxy collects material laterally and yields nano-objects with a rectangular cross-section. This work was supported by the German Priority Program SPP 1386 on Nanostructured Thermoelectrics.Reference: R.B. Yang et al., J. Am. Chem. Soc. 132, 7592 (2010)
5:15 PM - W3.9
Tuning the Electronic Properties of Core-shell Nanowires through Control of Strain.
Melodie Fickenscher 1 , Mohammad Montazeri 1 , Howard Jackson 1 , Leigh Smith 1 , Jan Yarrison-Rice 2 , Jung Hyun Kang 3 , Qiang Gao 3 , Hoe Tan 3 , Chennupati Jagadish 3 Show Abstract
1 Department of Physics, University of Cincinnati, Cincinnati, Ohio, United States, 2 Department of Physics, Miami University, Oxford, Ohio, United States, 3 Department of Electronic Materials Engineering, Australian National University, Canberra, Australian Capital Territory, Australia
We show through detailed Raman and CW and Time-Resolved photoluminescence measurements that the band symmetry and electronic properties of strained core-shell GaAs/GaP nanowires can be controlled through variation of the core and shell relative thickness. Raman scattering from as-grown highly strained GaAs/GaP core-shell nanowires with 50 nm diameter GaAs cores and 25 nm GaP shells show that the degree of compressive hydrostatic and shear strain of the GaAs core can be separately determined. Analysis of the shift and splitting of the TO-mode Raman spectra shows that the GaAs core has a -1.2% compressive hydrostatic strain and a -0.7% shear strain. Our measurements are consistent with 8-band k.p calculations and predict a 260 meV increase of the GaAs core band gap and a ~100 meV heavy hole-light hole splitting of the valence band. Detailed low temperature photoluminescence (PL) and time-resolved PL spectra from the highly strained GaAs/GaP core-shell nanowires (NWs) confirm these results, and show, consistent with theoretical modeling, that the band structure of the NWs can be tuned by changing the ratio of the core radius to total NW radius. The ratio was changed by altering either the thickness of the GaP shell or the GaAs core radius with the other held fixed. Cross-sectional TEM is used to measure the range of core and shell radii. The PL from both methods confirms that the band gap can be shifted to dramatically higher energies from the 1.515eV GaAs free exciton peak and is consistent with the theoretical predictions as well as direct Raman measurements of the strain. These results open up new opportunities to strain engineering of the band structure by varying the nanowire core/shell ratio. We acknowledge the financial support of the National Science Foundation through grants DMR-0806700, 0806572 and ECCS-0701703, and the Australian Research Council. The Australian National Fabrication Facility is acknowledged for access to the facilities used in this research.
5:30 PM - W3.10
Self-induced and Site-selective Growth of Vertical InAs Nanowire Arrays on Si (111) by Molecular Beam Epitaxy.
Gregor Koblmuller 1 , Simon Hertenberger 1 , Kristijonas Vizbaras 1 , Max Bichler 1 , Jinping Zhang 2 , Timothy Veal 3 , Ian Maskery 3 , Gavin Bell 3 , Gerhard Abstreiter 1 Show Abstract
1 Technical University Munich, Walter Schottky Institut, Garching Germany, 2 Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou China, 3 Department of Physics, University of Warwick, Coventry United Kingdom
The desire for integration of III–V semiconductor nanowire (NW) devices on Si has fueled large materials synthesis research. For the III–arsenides several reports have shown freestanding NWs on Si, mostly grown by MOCVD with or without the use of gold (Au) catalyst. Very limited – and mainly Au–catalyzed – attempts to grow freestanding III–As NWs on Si by MBE were reported, despite enormous advantages of MBE (low impurity content, sharp composition/doping control, sophisticated core–shell heterostructures). Here, we report a detailed growth study of vertical InAs NW arrays on Si (111) by solid–source MBE. For self–induced, catalyst–free growth two strategies were employed; (i) by use of a thin SiOx mask on Si (111) for self–assembled NWs and (ii) by means of patterned Si (111) substrates (ebeam lithography) for site–selective growth of NWs and control over position, geometry and NW size. Growth of the NW arrays was recorded in situ by RHEED and QMS to provide information of the nucleation kinetics. Microstructure analysis was performed using SEM, HRXRD, Raman spectroscopy and TEM. Results on optical properties by photoluminescence (PL) and surface electronic properties by valence band spectra analysis using XPS are also reported.The InAs NWs grown by the self–assembled method exhibited vertical directionality [along (111)] with straight, hexagon–shaped, non–tapered geometries. Significant NW size variation was achieved with substrate temperature, producing maximum length/minimum diameter (~40 nm) in the 430–460 °C range. On the other hand, growth on patterned Si (111) substrates provided site-selective growth of (111)–oriented InAs NWs with preferential nucleation at the predefined holes and very high yields close to 100 percent. Size variation of the NWs depended here critically on pitch and growth time but much less on hole size.The epitaxial relationship between the InAs NWs and the Si (111) substrate was confirmed by HRXRD 2theta-omega scans. Over a wide range (0–60 deg) only the zincblende (ZB) InAs (111) peak at 25.3° and Si (111) peak at 28.3° were observed. Rocking curves of the on–axis (111) reflection yielded a full width half maximum (FWHM) of ~1° for self–assembled InAs NWs and less than ~0.5° for site-selective NWs, confirming the excellent vertical (111) directionality. The dominant ZB structure and low–defect density of the NWs was further confirmed by HRTEM and the high-intensity transversal optical E1 Raman mode. PL at 20K yielded a peak emission at 0.445 eV on representative NW arrays with a FWHM of ~33 meV, and a slight blue–shift (30 meV) with respect to the bulk InAs reference indicative of quantum confinement effects. Finally, XPS of cleaned NW samples revealed valence band spectra with shapes very different to those observed for bulk InAs; however the surface Fermi level to valence band maximum separation (0.50 eV) was identical for InAs bulk and NWs and highlighted significant surface Fermi level pinning.
5:45 PM - W3.11
Controlling the Growth Location and Length of Indium Nanowires by Introducing Patterns on Substrates.
Wardhana Sasangka 1 2 , Chee Lip Gan 1 2 , Carl Thompson 2 3 , Daquan Yu 4 Show Abstract
1 School of Materials Science and Engineering, Nanyang Technological University, Singapore Singapore, 2 Advanced Materials for Micro- and Nano-Systems, Singapore-MIT Alliance, Nanyang Technological University, Singapore Singapore, 3 Department of Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, Massachusetts, United States, 4 Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research), Singapore Singapore
We have observed formation of Indium nanowires after sputter deposition and post-annealing in vacuum. The growth locations of these nanowires were controlled by introducing trenches on the substrate. The lengths of the nanowires were also controlled by varying the size of the circular trenches. Microstructure characterizations using SEM, FIB, TEM and EDX were employed to investigate the mechanism of growth.Arrays of circular SiO2 trenches with a depth of 1 um, diameters ranging from 1-5 um and pitches of 3-20 um were fabricated on silicon wafers using standard CMOS fabrication processes. Subsequently, nominally 100 nm-thick Cr films were deposited using sputter deposition. The vacuum level in the sputtering system before and during deposition was maintained at ~10-6 torr and ~10-3 torr, respectively. Without breaking the vacuum, ~40 nm nominal thickness films of Indium were deposited at a rate of ~1.3 nm/min at a substrate temperature of 100oC. Post annealing at 200oC for 15 mins was then carried out inside the sputtering chamber.Many short nanowires were found to grow from the walls of the trenches. The diameters of these short nanowires were in the range 40–100 nm with lengths between 0.2–2 um. In addition, a single long nanowire was found in every trench. These long nanowires grew from the base of the trench. The diameters of these long nanowires were in the range 50–200 nm. The lengths varied from 1–20 um, depending on the trench size (with longer wires growing in larger diameter trenches). The composition of the nanowires was determined to be pure Indium using TEM/EDX analysis.The as-deposited Indium films had discontinuous island-like structures. Annealing, allows In diffusion on the surfaces of the substrate and ledges. Whether the wires form from pre-existing islands or are nucleated at the ledge is unclear, though the latter is suggested by their specific location at ledges. Given that longer wires grow in larger circular trenches suggests, it appears that the In that contributes to their growth is deposited within the circular recesses. The fact that all the wires are faceted suggests that surface energy or growth velocity anisotropy play an important role in causing their growth. Screw dislocations were not observed in HRTEM images. Penta-twinned growth is unlikely as most of the nanowires have hexagonally arranged side facets. Based on these observations, we believe that the high rate of axial growth is related to barriers to ledge nucleation on the side facets.
Ritesh Agarwal University of Pennsylvania
Wei Lu University of Michigan
Oliver Hayden Siemens AG
Akram Boukai University of Michigan
W4: Nanowire Characterization
Tuesday AM, November 30, 2010
Ballroom C, 3rd floor (Hynes)
9:30 AM - **W4.1
Atom-level View of Dopant and Catalyst Incorporation in Nanowires.
Lincoln Lauhon 1 Show Abstract
1 Materials Science and Engineering, Northwestern University, Evanston, Illinois, United States
Catalyst-mediated growth enables the control of nanowire size and composition in regimes where useful new properties are manifest. Our understanding of catalyst mediated doping and contamination is rather limited, however, considering the importance of impurity doping to control of semiconductor device function. The primary challenge lies in characterization; the extremely small scale of nanowires demands an atom-level view of dopant and catalyst incorporation as even a single impurity represents a significant ‘concentration’. We will describe recent progress on understanding impurity incorporation using two approaches. First, we will describe the use of atom probe tomography to understand the role of the catalyst in controlling doping rates and the abruptness of dopant homojunctions. We identify an intrinsic limitation in simultaneously achieving high doping rates and abrupt junctions with catalyst-mediated growth. Second, we apply scanning transmission electron microscopy and tomography to the analysis of gold impurity incorporation nanowires. Through sequential electron tomography and high resolution cross-sectional imaging, we correlate the locations of impurities with characteristic planar defects and relate the defect structure to the shape of the growth interface. By combining electron and atom probe tomography, we are developing a comprehensive understanding of how the chemical and physical structure of the catalyst influences impurity incorporation.
10:00 AM - W4.2
Doping of Vertical Si Nanowires and Carrier Profiling by Scanning Spreading Resistance Microscopy.
Xin Ou 1 2 , Pratyush Das Kanungo 2 , Reinhard Koegler 1 , Peter Werner 2 , Ulrich Goesele 2 , Wolfgang Skorupa 1 Show Abstract
1 , Forschungszentrum Dresden-Rossendorf, Dresden Germany, 2 , Max Planck Institute of Microstructure Physics, Halle Germany
The future application of silicon nanowires (Si NWs) in nano electronics requires their doping and the precise control of their electrical properties. However, the dopant incorporation process in Si NWs is not yet fully understood. In this study, individual vertical MBE-grown Si-NWs doped either by ion implantation or by in-situ dopant incorporation are investigated by scanning spreading resistance microscopy (SSRM). The carrier profiles across the axial cross sections of the NWs are derived from the measured spreading resistance values and calibrated by the known carrier concentrations of the connected Si substrate or epi-layer. Furthermore, three-dimensional (3D) SSRM of the NW was obtained by measuring the cross sections at different depth position of the same NW in succession. Carrier profiling reveals a multi-shell structure of the carrier distribution across the NW diameter which consists of a lower doped core region, a higher doped shell region and a carrier depleted sub-surface region.
10:15 AM - W4.3
Direct Correlation of Structural and Optical Properties in Wurtzite/Zinc-blende GaAs Nanowire Heterostructures.
Martin Heiss 1 2 , Sonia Conesa-Boj 1 3 , Emanuele Uccelli 1 2 , Francesca Peiro 3 , Joan Ramon Morante 4 , Jordi Arbiol 5 , Anna Fontcuberta i Morral 1 2 Show Abstract
1 LMSC, Institut des Matériaux , École Polytechnique Fédérale de Lausanne, Lausanne Switzerland, 2 Walter Schottky Institute, Technical University Munich, Garching Germany, 3 Departament d’Electrònica, Universitat de Barcelona, Barcelona, CAT, Spain, 4 , Catalonia Institute for Energy Research, Barcelona, CAT, Spain, 5 ICREA and Institut de Ciencia de Materials de Barcelona, CISC, Bellaterra, CAT, Spain
A new type of heterostructure has recently attracted attention where the chemical composition of the material is constant but the crystalline structure varies along the growth axis from cubic zinc-blende to hexagonal wurtzite [1,2]. The change in crystal structure results in a different band structure, leading to new optical and electronic properties . We report direct correlation experiments combining micro photoluminescence spectroscopy and high resolution transmission electron microscopy (HRTEM) experiments on single GaAs nanowires that exhibit zinc-blende/wurtzite polytypism. By performing both characterizations on the same nanowire, we obtain a direct local correlation between structural and electronic properties. The photoluminescence measurements are performed at 4.2 K on nanowires transferred to a holey carbon film of a numbered TEM copper grid. This allows to subsequently localize the same position with TEM in order to obtain both PL and HRTEM characterizations on the same nanowire. We have applied this technique to polytypic zinc-blende/wurtzite heterostructure nanowires that are presenting a gradient of phase composition along the length. This allows distinguishing emission from nanowire sections that are predominantly composed from zinc-blende, wurztite or mixed phases. In this way, the dimensions of the quantum heterostructures are correlated with the light emission, allowing us to estimate the band gap in wurtzite GaAs to 1.50 eV and the band alignment between the two crystalline phases. Our experimental data is in agreement with recently predicted band structure for wurtzite GaAs.  Ross, F. M. Nat Nano 2009, 4, 17–18. F. M. Davidson, D. C. Lee, D. D. Fanfair, B. A. Korgel, J. Phys. Chem. C 2007, 111, 2929–2935 D. Spirkoska et al., Phys. Rev. B 80, 245325 (2009)
10:30 AM - W4.4
Crystallographic Orientational Imaging of Gallium Nitride Nanowires via Confocal Raman Imaging.
Adam Schwartzberg 1 , Jeffrey Urban 1 Show Abstract
1 The Molecular Foundry, Lawrence Berkeley National Labs, Berkeley, California, United States
Gallium Nitride (GaN) has become a ubiquitous material in modern technology with wide usage in light emitting diodes and optoelectronic devices. Thin films of GaN are common, but increasingly nanowires have become a favored material due to their potential in nanoscale lasing applications and directed charge transport. The imaging of such structures and determination of crystallographic orientation has been limited to transmission electron microscopy due to their small size and homogeneous triangular cross section. The identification of orientation is critical in both device development and basic research applications, and an inexpensive, effective method to determine this is critical. In the present work, we present a method by which crystallographic orientation with respect to a surface can be determined by simple confocal Raman mapping. By monitoring the A1(TO) and E2 Raman peaks we have been able to observe crystallographic contrast in wires as thin as 250 nm, a counterintuitive result as this is both near the diffraction limit at our pump wavelength, and the crystallographic orientation of the crystal does not change with respect to the scanning focal volume. We believe the observed contrast is due to significant waveguiding within the high index of refraction (~2.4) wires, directing Raman scattered photons generated within the wire away from the focal volume, while surface generated photons will be collected at high efficiency. The result is a surface dominated Raman signal that can differentiate between the two possible surface crystal planes. While this work has focused on GaN structures, this type of measurement is possible on any reasonably high index nanostructure and should be viewed as a general technique with significant potential.
10:45 AM - W4.5
Atom-probe Tomographic Analyses of Al-catalyst Grown Si Nanowires.
Oussama Moutanabbir 2 , Dieter Isheim 1 3 , Horst Blumtritt 2 , Ulrich Goesele 2 , David Seidman 1 3 Show Abstract
2 , Max Planck Institute of Microstructure Physics, Halle Germany, 1 Department of Materials Science and Engineering, Northwestern University, Evanston, Illinois, United States, 3 Northwestern University Center for Atom-Probe Tomography, Northwestern University, Evanston, Illinois, United States
Synthesis and properties of silicon nanowires (NWs) are of significant scientific and technological interest since they can be used for components in microelectronic devices and their basic compatibility with many existing semiconductor technologies. Si NWs grown with an Al catalyst are particularly interesting because Al avoids the electronic degradation and CMOS-processing compatibility problems of Au catalyst, which is currently used for producing most Si NWs. Catalyst-grown NWs incorporate trace levels of catalyst atoms effectively doping the NW. A quantitative knowledge of local concentrations and dopant atom distributions is crucial for understanding and designing a NW’s physical properties. We utilize laser-assisted local-electrode atom-probe (LEAP) tomography to characterize Si NWs grown with an Al-catalyst via a vapor-solid-solid (VSS) process. Dual-beam focused-ion beam milling in conjunction with micromanipulation is employed to prepare NWs for LEAP tomography. Pulsed evaporation of individual atoms is achieved employing picosecond ultraviolet (355 nm wavelength) laser pulses. LEAP tomography generates a three-dimensional atom-by-atom reconstruction encompassing the entire cross-section of a NW, including the Al-catalyst particle at the end of the NW. Al concentrations up to 0.33 at.% are measured in the interior of the NWs, which is significantly greater than the equilibrium solubility of Al in bulk Si at the growth temperature. Potential reasons for the increased solubility and implications for the electronic properties of Si NWs are discussed. OM, HB, and UG were financially supported through the Max-Planck Institute for Microstructure Physics, Germany. DI and DNS acknowledge the US-Israel Binational Science Foundation for financial support. APT measurements were performed at the Northwestern University Center for Atom-Probe Tomography (NUCAPT). The LEAP tomograph was purchased and upgraded with funding from NSF-MRI (DMR-0420532) and ONR-DURIP (N00014-0400798, N00014-0610539, N00014-0910781) grants.
11:30 AM - W4.6
Direct Measurement of Strain in Germanium-silicon Core-shell Nanowires.
Aditya Mohite 1 2 , Shadi Dayeh 1 , Wei Tang 3 , Gregory Swadener 4 , S. Picraux 1 , Han Htoon 1 2 Show Abstract
1 Center for Integrated Nanotechnologies, Los Alamos National Lab, Los Alamos, New Mexico, United States, 2 Chemistry and Applied Spectroscopy, Los Alamos National Lab, Los Alamos, New Mexico, United States, 3 Material Science and Engineering, Universityof California Los Aangeles, Los Angeles, California, United States, 4 Mechanical Engineering, Aston University, Birmingham, Birmingham, United Kingdom
Semiconductor nanowire growth techniques like the Vapor Liquid Solid (VLS) and Vapor Solid (VS) methods provide significant flexibility in creating both axial and radial heterostructures for- a wide variety of applications like photodiodes, photovoltaic’s, high performance FETs etc. An important consequence of such nanowire heterostructures is that materials with different lattice constants such as silicon (Si) and germanium (Ge) can be combined to tailor the strain distributions and thus engineer the band structure of the strained nanowire core-shell heterostructure devices. Measuring the degree of strain is critical in tailoring the heterostructure’s interface in order to obtain optimal electronic and optical properties. Here we have used confocal Raman imaging on individual Ge-Si core-shell nanowires to directly probe the strain in each layer for variable core-fixed shell and variable shell - fixed core diameter structures. For nanowires with a Ge core of 10 nm and Si shell of 4 nm, we observe a clear splitting and a red shift in the Ge Raman peak in 90% of the nanowires. For larger core diameters nanowires, the percentage of nanowires showing splitting in the Ge peak decreases to 15% for 50 nm cores and 2% for 100 nm cores at fixed Si shell thicknesses of 4 nm. The splitting is as large as 15-20 cm-1and is attributed to the hydrostatic and shear strain on the Ge core which results in lifting of degeneracy of the LO and TO phonon modes. The magnitude of splitting does not change as we scan along the length of the nanowires, consistent with core diameter and shell thickness being uniform along the nanowire. To directly correlate the strain- induced changes with the observed Raman signals we have combined Raman and HRTEM measurements on the same nanowires which are deposited on thin silicon nitride membranes. For a fixed core diameter of ~ 20 nm and a 10 nm thick Si shell, Ge Raman peak degeneracy disappears, and a single peak at the Ge bulk value evolves, which is indicative of crossing the coherency limit and relaxed Si shell on Ge. The experimental results are compared with predicted strains and strain stability limits - using our recently developed  molecular dynamics simulations1 of the strain distributions between the Ge core and Si shell. xxxxxxxxxxxxxxxx Strain distribution and electronic property modifications in Si/Ge axial nanowire heterostructures, J. G. Swadener & S. T. Picraux J. Appl. Phys 105, 044310 (2009).
11:45 AM - W4.7
Tuning the Electronic Properties of Ultra-strained Silicon Nanowires.
Alois Lugstein 1 , Mathias Steinmair 1 , Andreas Steiger 1 , Hans Kosina 1 , Emmerich Bertagnolli 1 Show Abstract
1 , Technical university of vienna, Vienna Austria
We demonstrate that under ultra high strain conditions p-type single crystal silicon nanowires possess an anomalous piezoresistance effect. The measurements were performed on vapor-liquid-solid (VLS) grown Si nanowires, monolithically integrated in a micro-electro-mechanical loading module. The special setup enables the application of pure uniaxial tensile strain along the(111)growth direction of individual, 100 nm thick Si nanowires while simultaneously measuring the resistance of the nanowires.For low strain levels (nanowire elongation less than 0.8%) our measurements revealed the expected positive piezoresistance effect, whereas for ultra high strain levels a transition to anomalous negative piezoresistance was observed. For the maximum tensile strain of 3.5%, the resistance of the Si nanowires decreased by a factor of 10. Even at these high strain amplitudes no fatigue failures are observed for several hundred loading cycles. Our simulations clearly show that at room temperature even a considerably reduced bandgap does not give any relevant contribution of the minority carriers to the total current. The same holds, if carrier lifetimes are varied by a few orders of magnitude. This means, current remains unipolar and the reduction in resistivity can only be attributed to a mobility increase, and not to the onset of a bipolar conduction mechanism. The simulations performed indicate that the resistivity characteristics mainly reflect the strain-dependent hole mobility, and that the current measured is unipolar and space charge limited.There is a vast geometric and orientational parameter space over which the piezoresistive properties can be tuned, and it is unlikely that the nanowire geometries, orientation and doping parameters studied here will prove optimal for maximum piezoresistive response. While the anomalous piezoresistive phenomenon obtained in ultra-strained Si nanowires may pave the way towards sensitive, silicon compatible strain gages or high performance nanoelectronic devices, these effects should apply to many substances beyond Si.
12:00 PM - W4.8
Silicon Nanowire Cryogenic Microwave Spectroscopy.
Xueni Zhu 1 , David Hasko 1 , Stephan Hofmann 1 , William Milne 1 Show Abstract
1 Department of Engineering, University of Cambridge, Cambridge United Kingdom
Defects are a major problem for the bottom-up approach to nanostructure formation; these give rise to trap states in semiconductors, which can severely degrade the transport characteristics required for classical information processing. By contrast non-classical information processing can exploit defects; for example Xiao et al  used the Zeeman splitting of an electron in a trap in the gate dielectric in a silicon MOSFET and found a relaxation time of ~0.1μs at 0.4K with a signal-to-noise ratio (SNR) close to 1:1. In this work, silicon nanowires have been grown on heavily doped Si (111) using Au catalytic vapour-liquid-solid epitaxy. Metal contacts, formed at the top of nanowires, allow the 2-terminal electrical transport properties of nanowires to be investigated, by using the substrate as the other contact. Measurements at 77K show non-linear I-V characteristics and random telegraph noise, indicating that the channel contains a small number of electrons and is strongly affected by the occupancy of nearby traps. Under DC bias, the current can be modulated by indirect wideband microwave irradiation without a magnetic field; these current changes take the form of a large number of resonant features. The resonance width is an indication of the lifetime of the mechanism giving rise to the feature, in this case the mechanism is thought to be a microwave driven spatial Rabi oscillation between two adjacent trap sites located close to the channel. Lifetimes of ~1μs at 77K are indicated by the quality factors (SNR ~20:1); these characteristics are promising for charge qubit-based quantum information processing. M. Xiao et al, Nature 430, 435 (2004)
12:15 PM - W4.9
Passivation of ZnO Nanowires Using Self-assembled Monolayers.
Daniel Kaelblein 1 , Holger Boettcher 1 , Ute Zschieschang 1 , Klaus Kern 1 2 , Hagen Klauk 1 Show Abstract
1 , Max Planck Institute for Solid State Research, Stuttgart Germany, 2 , Ecole Polytechnique Fédérale de Lausanne, Lausanne Switzerland
Zinc oxide (ZnO) is a semiconductor that crystallizes in the hexagonal structure and has a strong tendency to grow along the (0001) direction, so a variety of methods are available to grow ZnO nanowires. The rich surface chemistry of ZnO causes atmospheric species, such as O2  and H2O , to adsorb on the nanowire surface, and because of the large surface-to-volume ratio these adsorbents affect the electrical conductivity of the nanowires. While this is beneficial if the nanowires are employed as chemical sensors, it is a drawback if the nanowires are used in field-effect transistors (FETs) for integrated circuits, because circuit performance and reliability depend critically on the stability of the FET parameters. ZnO nanowire FETs therefore require a passivation layer to protect the surface from ambient species. Here we show how ZnO nanowires can be passivated using a hydrophobic self-assembled monolayer. ZnO nanowires with a diameter of ~50 nm were grown by a wet-chemical method described by Lu et al. . The as-grown nanowires were dispersed on a Si substrate with a dielectric of 100 nm thermal SiO2 plus 30 nm atomic-layer-deposited Al2O3. Al contacts were defined by e-beam lithography. Due to a high concentration of dopants incorporated during growth, the as-grown nanowires have a large conductivity making it difficult to modulate the current with the electric field from the Si gate. These dopants can be removed by annealing at 600 °C in air. The annealed nanowires show good n-channel FET behavior, including on/off ratio of 107 and mobility of ~50 cm2/Vs. The current-voltage characteristics were measured by sweeping the gate-source voltage from -20 V to 10 V and back at a constant drain-source voltage of 1 V. To study the influence of oxygen and water, the characteristics were measured in air and in vacuum (~10-6 mbar). Without passivation the switch-on voltage shifts by about 3 V towards more positive values when the nanowire is taken out of vacuum and exposed to air. This shift is reproducible when the FETs are repeatedly measured in vacuum and in air. The observed shift can be attributed to the adsorption of electron-accepting species on the nanowire surface. To passivate the nanowires the substrate was exposed to a plasma and then immersed in a solution of pentadecylfluoro-octadecylphosphonic acid - a class of molecules known to form hydrophobic monolayers on metal oxides, including ZnO and Al2O3 (the gate dielectric) . After the treatment, the FET characteristics were again measured in vacuum and in air, and it was found that the shift of the switch-on voltage was greatly reduced to ~0.3 V. These results show that passivation with a hydrophobic phosphonic acid self-assembled monolayer drastically improves the stability of ZnO nanowire FETs in ambient air.  Sohn, Nanotechnology 2009, 20, 505202.  Zhang, Appl. Surf. Sci. 2005, 242, 212.  Lu, Chem. Commun. 2006, 3551.  Perkins, J. Phys. Chem. C 2009, 113, 18276.
12:30 PM - W4.10
Efficient Room-Temperature Visible Emission from II-VI Nanowires.
Keith Kahen 1 , Irene Goldthorpe 1 Show Abstract
1 Research Laboratories, Eastman Kodak Company, Rochester, New York, United States
Despite years of research there still exists a “green gap” in creating efficient green-emitting inorganic LEDs. The main source of the problem is the lack of suitable low-cost substrates upon which to grow strain-free crystalline material with appropriate green-emitting band gaps. Efficient room-temperature emitters can be created using colloidal nanocrystals, however, they are difficult to dope and transport between the nanocrystals is problematic. Many of these problems can be eliminated by employing arrays of semiconductor nanowires, whereby each individual nanowire is a nano-LED (p-i-n diode). Most of the recent efforts have focused on creating dense arrays of nanowires, while the formation of efficient visible-emitting nanowires remains lacking.As is well known, II-VI semiconductors provide a useful route to obtain visible-light emission. By employing novel metallic alloy catalysts in combination with a proper set of precursors and growth conditions, we have been able to form high-quality II-VI semiconductor nanowires in the low 300° C range using the vapor-liquid-solid (VLS) method. The nanowires are grown on oxide surfaces by atmospheric pressure, metal organic vapor phase epitaxy. Using core nanowires of both ZnSe and ZnMgSe, multiple quantum wells (MQWs) of ZnSeTe, ZnTe, and CdZnSe have been formed in the shells of the nanowires. Taking the example of MQWs of ZnTe, by varying the thickness of the wells, the emission peaks can be controllably varied from red to blue, resulting in an emission range of over 1.0 eV. When the room-temperature emission peak is at 540 nm, the integrated photoluminescence (PL) intensity is 5% of its value at 77 K. For the case of ZnSeTe wells (Te content of ~10%) with the room-temperature emission peak again at 540 nm, the integrated PL intensity is 8.5% of its value at 77 K. These quantum efficiency values compare favorably with those obtained using self-assembled quantum dots for various II-VI material systems. Another important result is that the FWHM of the emission peaks at 300 K and 77 K typically differ by less than 15%. Overall, this data shows that II-VI heterostructure nanowires are good candidates to help solve the “green gap” LED problem.
12:45 PM - W4.11
Quantum Transport in Core/Shell GaAs-AlGaAs Nanowires.
Dominique Mailly 1 , Damien Lucot 1 , Fouzia Jabeen 1 , Giancarlo Faini 1 , Jean-Christophe Harmand 1 , Romain Giraud 1 Show Abstract
1 , CNRS, Marcoussis France
Radial core-shell nanowires (NWs) attract increasing interest since they are models for clean one dimensional (1D) systems to probe physics in low dimension as well as potential new scheme for applications like sensors, light emitter or fast electronics. The peculiar geometry of core shell structures allows to be exempt from lithographic roughness usually found in etched or gate-defined 1D wires but also compare to standard nanowires to be insensitive to surface defect . With its well-established properties in 2D heterostructures and intrinsically high electron mobility , the GaAs/AlGaAs system is of particular interest to realize core-shell NW. Here, we report the controlled growth and electrical measurements of vertical GaAs/AlGaAs core/shell NW. Each NW is seeded from a electron beam patterned gold catalyst and grown via vapor-liquid-solid growth in a molecular beam epitaxy vessel. A silicium layer is inserted during the growth of the AlGaAs shell to dope the GaAs. NWs are then buried in an epitaxial undoped GaAs overgrowth . This final step allows to protect the wires from oxidation of the AlGaAs shell and to facilitate the contact of individual wire at their top end.Transport measurements at ambient temperature show an ohmic behavior with two probe resistances of typically few hundred of ohm for a wire one micron long and a core 25nm diameter. At low temperature (1K
W5: Nanowire Based Field Effect Transistors
Tuesday PM, November 30, 2010
Ballroom C, 3rd floor (Hynes)
2:30 PM - **W5.1
Nanowire Tunnel FETs - From All-silicon towards Heterostructures.
Mikael Bjork 1 , Heinz Schmid 1 , Kirsten Moselund 1 , Cedric Bessire 1 , Michelle Natera-Comte 1 , Hesham Ghoneim 1 , Siegfried Karg 1 , Emanuel Lortscher 1 , Heike Riel 1 Show Abstract
1 , IBM Research Zurich, Ruschlikon Switzerland
The continued miniaturization of field effect transistors (FETs) that goes along with an increase of device density and speed leads to power dissipation on the chip level that will severely limit the overall performance. To reduce power dissipation of future FETs, new architectures and materials that support steep inverse sub-threshold slopes and thereby low voltage operation are intensively investigated. The most prominent candidate to compete with the conventional FET is the tunnel FET, while on the material side, Ge and IIIV’s are again considered. Promising, but also most challenging, is the implementation of both concepts in the form of a hetero-junction tunnel FET. We report results on all-silicon based tunnel FETs, which are fabricated using vapor-liquid-solid growth and in-situ doping to create p-i-n structured nanowires. These devices unambiguously show tunnel FET characteristics with inverse sub-threshold slopes of around 100mV/dec over several orders of magnitude in current and even sub-60mV/dec slopes for the lowest currents. Furthermore, we review the options to build tunnel FETs by taking benefit of band engineering and the incorporation of a hetero-junction. The high lattice mismatch of most material combinations, stringent requirement on sharp doping profiles, as well as process limitations exclude traditional fabrication approaches. We detail on our fabrication process and results towards a hetero-junction tunnel FET using MOCVD and selective area epitaxial growth with the focus on the InAs-Si material system.
3:00 PM - W5.2
Semiconductor Nanowires for Ballistic Electronics and Spin Qubits.
Yongjie Hu 1 , Charles Marcus 2 , Charles Lieber 1 3 Show Abstract
1 Department of Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts, United States, 2 Department of Physics, Harvard University, Cambridge, Massachusetts, United States, 3 School of Engineering and Applied Sciences, Harvard University, Cambridge, Massachusetts, United States
Semiconductor nanowires represent a uniquely powerful platform for exploring a diverse range of physical phenomena at the nanoscale due to the demonstrated capabilities of rational design and precise control of diameter, composition, morphology, electronic properties during growth. Here we report ballistic electronic devices, including high performance field-effect transistors and coherent quantum devices, based on the prototypical Ge/Si core/shell heterostructure model system. First, we show that 100% of the ballistic limit is reached for Ge/Si nanowire transistors operating in the low bias voltage regime, even at room temperature. By modulating the contact transparency and cooling down the device to low temperature, we have also obtained detailed information about electronic subbands and spin degeneracy, including the splitting of heavy and light holes due to the radial quantum confinement in this 1D system. In addition, the assembly and detailed characterization of top-gate defined double quantum dot and charge sensor devices for spin qubit and coherent spin manipulation will be described. Specifically, finite bias transport spectroscopy demonstrates Pauli spin blockade for spin-to-charge conversion. Moreover, high-frequency pulsed-gate technique has been implemented to manipulate charge dynamics and elucidate the spin qubit lifetime. Notably, a remarkably long spin relaxation time, ~ 600 µs, has been identified. These new results provide significant implications and substantial promise for fundamental studies and quantum information processing.
3:15 PM - W5.3
InP-GaAs Nanowire Tunnel Field-effect Transistor.
Bahram Ganjipour 1 , Jesper Wallentin 1 , Magnus Borgstrom 1 , Lars Samuelson 1 , Claes Thelander 1 Show Abstract
1 Solid State Physics, Lund University, Lund Sweden
The tunnel field-effect transistor (TFET) is promising for low-power switching in electronics as the inverse sub-threshold swing is not fundamentally limited to 60 mV/dec. We will present recent results on TFET properties of InP-GaAs axial heterostructure nanowires. The nanowires were grown using metal organic vapor phase epitaxy (MOVPE) with heterostructure InP(n-i)-GaAs(p+) segments, with a short (150 nm) InP intrinsic region. The doping was carried out in situ, where hydrogen sulphide (H2S) was used for n-doping, and diethylzinc (DEZn) for p-doping . Three-terminal device structures were processed to such nanowires, using HfO2 as gate dielectric, and omega-shaped top-gates aligned to the intrinsic InP segment. The transistors showed a band-to-band tunneling current in reverse bias regime with an on/off current ratio of 10E7 for a gate voltage swing of 1 V, and where both the on-current and sub-threshold slope are improved compared to previously reported nanowire TFETs. A minimum inverse sub-threshold slope of around 50 mV/dec was observed close to pinch-off, averaged over a gate voltage range of 100 mV.Jesper Wallentin, Johan M. Persson, Jakob B. Wagner, Lars Samuelson, Knut Deppert and Magnus T. Borgström Nano Lett., 2010, 10 (3), 974–979
3:30 PM - W5.4
Engineering Device Interfaces for High Performance PbSe Nanowire Field-effect Transistors.
David Kim 1 , Soong Oh 1 , Tarun Vemulkar 1 , Weon-kyu Koh 2 , Christopher Murray 1 2 , Cherie Kagan 1 2 3 Show Abstract
1 Materials Science and Engineering, University of Pennsylvania, Philadelphia, Pennsylvania, United States, 2 Chemistry, University of Pennsylvania, Philadelphia, Pennsylvania, United States, 3 Electrical Systems and Engineering, University of Pennsylvania, Philadelphia, Pennsylvania, United States
Semiconductor nanowires have motivated widespread interest because of their unique size and shape dependent electronic properties. In particular, PbSe is a high mobility, infrared absorbing semiconductor with large electron, hole and exciton Bohr radii, allowing us to study the physics of charge transport in 1D quantum confined materials by incorporating them into field-effect transistors (FETs). However, these devices suffer from very high contact resistance at low voltages and the I-V curves appear sigmoidal. Forming Ohmic contacts to nanoscale materials is a general problem observed in a wide-range of materials systems and is critical to their device performance, scalability, and application. In this study, we use wet-chemical methods to synthesize single-crystalline PbSe nanowires and electric field-directed assembly to align nanowire arrays to form the semiconducting channel of FETs. We report bottom gold contact PbSe FETs with low-resistance Ohmic contacts for both p and n-type behaviors after hydrazine treatment, which was observed by the linear behavior in the ID-VDS characteristics at low voltage. Similar to carbon nanotubes [2, 3], we believe that the metal –nanowire interface contacts can be modified through charge transfer doping to improve device performance. In order to isolate the role of these contacts, hydrazine was used to “chemically dope” the nanowire FET only at the metal/semiconductor contact by fabricating a blocking layer over the channel of the FET. Despite selectively doping only the contacts with hydrazine and leaving the bulk of the channel p-type, we were able to convert the device to n-type, which signifies the dominating role the contact has in determining the carrier type in nanostructured materials.  D. V. Talapin, C. T. Black, C. R. Kagan, E. V. Shevchenko, A. Afzali, C. B. Murray, “Alignment, Electronic Properties, Doping, and On-Chip Growth of Colloidal PbSe Nanowires,” J. Phys. Chem. C, 111, 13244 (2007).  J. Chen, C. Klinke, A. Afzali, and P. Avouris, “Self-aligned carbon nanotube transistors with charge transfer doping,” Applied Physics Letters, 86, 123108 (2005).  C. Klinke, J. Chen, A. Afzali, and P. Avouris, “Charge Transfer Induced Polarity Switching in Carbon Nanotube Transistors,” Nano Letters, 3, 555 (2005).
3:45 PM - W5.5
Integration of III-V NW-based Vertical FETs on Si and Device Concept for Tunnel FET using III-V/Si Heterojunctions.
Katsuhiro Tomioka 1 2 , Tomotaka Tanaka 1 , Junichi Motohisa 1 , Shinjiroh Hara 1 , Kenji Hiruma 1 , Takashi Fukui 1 Show Abstract
1 GS Information Science and Technology, and Research Center for Integrated Quantum Electronics (RCIQE), Hokkaido University, Sapporo Japan, 2 PRESTO, JST, Kawaguchi Japan
Rapid progress in epitaxial growth technique such as Vapor-Liquid-Solid and selective-area growth has enabled us to integrate III-V nanowires (NWs) directly on Si substrate. These III-V NWs on Si, are expected for electrical and photonic devices on Si platforms because they can achieved high performance devices such as high-electron mobility transistors and avalence photodiodes with a vertical nano-architectures. Recently, we have reported on the growth of InAs NWs on Si (111) substrates by taking special care in preparing arsenic-terminated surface on Si , which has additional advantage for integration vertical III-V devices on Si platforms, and demonstrated InAs NW-based vertical surrounding-gate FETs (VSGFETs) on Si substrate . In this report, we demonstrate fabrication of III-V NW-based VSGFETs with doping and propose a unique concept for steep-slope switches using such III-V NW-based VSGFETs on Si and III-V/Si heterojunctions. At first, we grew InAs NWs on n-Si (111) by low-pressure horizontal MOVPE system. Growth conditions were as follows; partial pressure of TMIn, [TMIn] = 4.87 x 10-7 atm, partial pressure of AsH3, [AsH3] = 1.25 x 10^-4 atm, growth temperature = 560 deg.C, growth time = 10 min. Next, same growth was continued for 10 min with introducing SiH4 doping to make axial n-n+ junctions inside the InAs NW. After these growths, hafnium alminate (HfAlO) was deposited by atomic layer deposition for high-k gate dielectric, followed by the deposition of tangsten (W) by plasma sputtering for gate metal. To remove the gate metal and high-k dielectric resides on the top portion of NWs, protecting layer for etching of low-k insulator resin was formed firstly by spin-coating and then by reactive ion etching (RIE) to etch back to the desired thickness, followed by dry and wet etching of W and HfAlO. After that, separating layer between gate and drain top contact was formed by spin-coating of low-k resin and then it was etched back by RIE to expose top region of NWs. Finally, drain and source metal was evaporated on the top of NWs and backside of the substrate, respectively. Fabricated VSGFET contained 50 NWs parallel in the channel. We observed n-type FET behavior in I_D-V_DS and I_D-V_G characteristics. The performance is summraized as follows; subthreshold slope, S = 320 mV/decade, threshold voltage ~ 0 V, peak transconductance, Gm,max = 0.26 mS (@VG = 0.4 V), and on-off ratio, Ion / Ioff = 10^6 in average. There exists non-liner characteristics in ID-VDS at around VDS = 0 V. We presume this effect was caused by band discontinuity at Si / InAs NWs hetero junction, so the electron carriers feel potential barriers at the heterojunction. Although such potential barrier results in the high access resistance at the source side of the channel and suppress the drive current, but will be used for steep-slope behavior based on tunneling inside NW-based FETs. The detailed concept will be explained on the day.
4:30 PM - **W5.6
Nanowire Tunnel FETs - Device Structure, Transistor Dimension and Material Choice.
Joachim Knoch 1 Show Abstract
1 , TU Dortmund University, Dortmund Germany
Tunnel FETs have recently attracted a great deal of interest due to their potentialabilit to provide a switching behavior superior to conventional MOSFETs. To date, very few experimental realizations showing an inverse subthreshold slope steeper than 60mV/dec have been reported in literature. However, a steep slope is only observed in a narrow gate voltagerange and in addition, the on-state performance is significantly lower compared to conventionalMOSFETs. In the presentation, the performance of tunnel FETs is investigated and the impact of device structure and dimension as well as the impact of the transistor materials will be studied. For instance, using nanowires with thin diameter providing one-dimensional transport together with a wrap-gate device structure strongly improves the tunnel FET performance. In addition, the use ofIII-V type II heterostructures is a further performance booster. However, the use of III-Vsemiconductors with low density of states can be problematic if the device is not designed properly. In the presentation we will give design guidelines and performance predictions of nanowire tunnel FETs based on non-equilibrium Greens functions formalism simulations.
5:00 PM - W5.7
Nano-electro-mechanical Field Effect Transistor Using Suspended Nanowire Channel.
Ji Hun Kim 1 , Zack Chen 1 , Soonshin Kwon 2 , Jie Xiang 1 2 Show Abstract
1 Electrical and Computer Engineering, Univ. California, San Diego, La Jolla, California, United States, 2 Materials Science and Engineering, Univ. California, San Diego, La Jolla, California, United States
With the shrinkage of feature size in VLSI circuit using CMOS technology, the static power consumption became one of the key limiting factors. One major reason of static power consumption is the off-state subthreshold leakage current of the transistor. However, due to the fundamental thermal dynamical limit (kBT/q), the steepest transition is limited to 60 mV/dec (subthreshold swing, SS) at 300K. One approach for obtaining SS < 60 mV/dec is the use of nano-electro-mechanical-system (NEMS] technology. Previous studies have shown suspended-gate MOSFET (SG-MOSFET) can be used as logical switch[2,3], or suspended single-wall-carbon-nanotube channel as MEMS switch. Here we report demonstration of nanowire NEMFET device using suspended nanowire (NW) channel. Coupled 3D simulation of mechanical stress/strain and electrical transport show that the electrostatic pull-in of the NW towards the gate stack enables abrupt switching to the off-state and zero SS with 1E15 on-off ratio and near 1 V pull-in voltage (Vpi) due to the enhanced 3D capacitive coupling. The NW beams’ extremely high aspect ratio and small dimensions allow scaled operation at very-high-frequency (VHF) and even ultra-high-frequency (UHF). Single silicon NW-NEMFET devices were fabricated using e-beam lithography technique and the DC/AC characteristics of the steep subthreshold device will be discussed. Coupled with our previously demonstrated sub-ps intrinsic delay and near-ballistic transport in semiconductor nanowires, the NEMFET provides a route towards future high speed, low power nanoelectronics.  D. A. Antoniadis, et al., Res. & Dev. Vol.50, No.4/5 (2006)  N. Abele, et al., IEEE IEDM, p.479-489 (2005)  K. Akarvardar, et al., Trans. Elect. Dev. 55, 48-59, (2008)  M. W. Jang, et al, IEEE Transducers, p.912-915 (2009)
5:15 PM - W5.8
Label-free, Electrical Biomarker Detection Based on Nanowire Biosensors Utilizing Antibody Mimics as Capture Probes.
Hsiao-Kang Chang 1 , Fumiaki Ishikawa 1 , Chongwu Zhou 1 Show Abstract
1 Electrical Engineering, University of Southern California, Los Angeles, California, United States
Nanowire transistor based biosensors have shown their tremendous potential as highly selective, ultra sensitive devices capable of detecting specific proteins and DNA sequences. These devices utilize a capture agent on the sensor surface to selectively bind the target biomolecules and those commonly used include antibodies, oligonucleotides, and small ligands (e.g. biotin). Antibody mimic proteins (AMPs) are polypeptides that bind to their target analytes with high affinity and specificity like conventional antibodies, but are much smaller in size (2~5 nm, less than 10 kDa). In this report, we describe the first application of AMP in the field of nanobiosensors. In2O3 nanowire based biosensors have been configured with an AMP (Fibronectin, Fn) to detect nucleocapsid (N) protein, a biomarker for severe acute respiratory syndrome (SARS). Using these nanosensors, N protein was selectively detected at subnanomolar concentration in the presence of 44 uM bovine serum albumin as a background. Compared to current immunological detection methods, our sensing signals can be obtained in a relatively short time without the aid of any signal amplifier such as fluorescence labeled reagents. Furthermore, the binding constant of the AMP to Fn was determined from the concentration dependence of the response of our biosensors. Other alternatives to antibody as capture probes are also explored.
5:30 PM - W5.9
Detection of Spin Polarized Carrier in Silicon Nanodevices with Single Crystal MnSi as Magnetic Contact.
Yung-Chen Lin 1 , Yu Chen 1 , Yu Huang 1 Show Abstract
1 MSE, UCLA, Los Angeles, California, United States
We report the formation of single crystal MnSi nanowires, MnSi/Si/MnSi nanowire heterostructures, to study the spin transport in silicon nanowire devices. Scanning electron microscopy (SEM) studies show that silicon nanowires can be converted into single crystal MnSi nanowires through controlled solid state reaction. High-resolution transmission electron microscope (HRTEM) studies show that MnSi/Si/MnSi heterostructures have clean, atomically sharp interfaces with an epitaxial relationship of Si[3-1-1]//MnSi[1-20] and Si(345)//MnSi(-2-14) . Electrical transporting studies show that the single crystal MnSi nanowire exhibits metallic behavior with magnetic transition temperature of 29.7 K (paramagnet to ferromagnet) and a negative magnetoresistance (MR) up to 1.8% at low temperature. Furthermore, using single crystal MnSi/p-Si/MnSi nanowire heterostructures, we have studied carrier tunneling via the Schottky barrier and spin polarized carrier transport in the silicon nanodevices.
W6: Poster Session I
Wednesday AM, December 01, 2010
Exhibition Hall D (Hynes)
9:00 PM - W6.1
High Performance Field–effect Transistors Based on ZnO Nanowires and Nanobelts From a Hydrothermal Method.
Rui Zhang 1 , Yue Fu 2 , Mond Guo 3 , Chongwu Zhou 2 , Mark Thompson 1 Show Abstract
1 Chemistry, University of Southern California, Los Angeles, California, United States, 2 Department of Electrical Engineering, University of Southern California, Los Angeles, California, United States, 3 Department of Chemical Engineering and Materials Science, University of Southern California, Los Angeles, California, United States
We have demonstrated that high performance field-effect transistors (FETs) can be fabricated with ZnO nanomaterials (nanowires and nanobelts) prepared by a hydrothermal method. By applying a post-synthesis annealing step to the as-grown ZnO products prior to device fabrication, the so-obtained FETs show significantly enhanced device performance. ~20% of the devices exhibit excellent n-type semiconductor characteristics, with on/off ratio of ~105, on-current higher than 10-7 A, and the field-effect mobility of ~ 30 cm2 V-1 s-1. These devices are comparable to the FETs based on one dimensional (1D) ZnO nanostructures synthesized by gas phase approaches. This work suggests that 1D metal oxide nanomaterials from hydrothermal methods hold great potential in fabricating high performance nanoscale electronics.
9:00 PM - W6.10
Structural and Optical Properties of Sonochemically Synthesized ZnO Nanorods and Its Application as a Novel Gas Sensor.
Syamanta Kumar Goswami 1 , Byungwoo Lee 1 , Eunsoon Oh 1 Show Abstract
1 Department of Physics, Chungnam National University, Daejeon Korea (the Republic of)
Zinc Oxide nanorods hold a promising key to the world of device applications such as gas sensor, solar cell, light-emitting diode, photodetector, and optical modulator waveguide due to its wide band gap of 3.37 eV and large exciton binding energy of 60 meV. We synthesized vertically aligned ZnO nanorods at ambient temperature by sonochemical method under various mole concentrations of the precursors; HMT and Zn(NO3)2. These nanorods were characterized by x-ray diffraction, scanning electron microscopy, and photoluminescence. When the mole concentration of HMT alone was made decreased, the growth rate of ZnO nanorods became higher accompanied with vertically well-aligned formation of nanorods and vice versa. This is due to the large shielding effect of OH− ions at the interface of the (0001) face in case of high HMT concentrations; as HMT is the primary source of OH− ions. In the low temperature PL spectra, two distinct PL peaks are typically observed in the uv range, one arising from the donor-bound exciton and the other from the surface related defects. In our case, the deep level emission peak was found to be blue-shifted with increasing temperature, on the contrary to the red-shift of the near-bandedge emission peak associated with the bandgap shrinkage. The blue-shift is ascribed to the competition between the two transitions such as conduction band to VO, and Zni levels to VO levels respectively. By increasing the Zn(NO3)2 concentration, the average diameter of the nanorods was found to be increased and only the donor-bound exciton PL peak was observed in the uv range and the surface-related PL peak was diminished. For electrical measurements, ZnO nanorods were grown on pre-patterned alumina substrates and we measured the change in resistivity in presence of NO and H2 gas. The sensitivity for the sample prepared using Zn(NO3)2 as a precursor was found to be better as compared to the sensitivity of the sample prepared using ZnCl4 as a precursor.
9:00 PM - W6.11
Gallium Oxide Nanowires Arrays with Field Emission Properties.
Inaki Lopez 1 , Pedro Hidalgo 1 , Emilio Nogales 1 , Bianchi Mendez 1 , Javier Piqueras 1 Show Abstract
1 Fisica de Materiales, Universidad Complutense de Madrid, Madrid Spain
Metal oxide nanowires are versatile materials due to their diverse properties and functionalities with applications in multidisciplinary fields. One of the potential applications of these nanowires is to use them as field emitters since their particular geometry contributes to a low threshold field for electron emission. Among others, zinc oxide or indium oxide nanowires have been demonstrated good field emission properties. Gallium oxide is a wide band gap semiconductor with good optical and electrical properties. Recently, the field emission properties of several arrangements involving gallium oxide nanowires, such as cactus-like nanostructures or aligned nanowires grown on brass wires have been reported.In this work, we have explored on the field emission properties of gallium oxide nanowires in different arrangements: single nanowires and arrays of aligned nanowires emerging from the lateral surfaces of micro plates. We have also studied the influence of the doping on the field emission properties of gallium oxide nanowires. The study of the structure, luminescence and field emission properties of all samples has been investigated by means of a tuned scanning electron microscope. A special setup for field emission measurements has been designed in our laboratory and incorporated into the SEM chamber. Our system enables to monitor the anode-cathode distance through the specimen holder remote control. Field emission current density versus an applied field curves were recorded for different nanostructures and different vacuum gaps. The results show that Sn doped Ga2O3 nanowires arrays exhibit the best performances.
9:00 PM - W6.12
Non-volatile Resistive Switching Effect in Limited Nanospace of a Single NiO Heterostructured Nanowire.
Keisuke Oka 1 , Takeshi Yanagida 1 2 , Kazuki Nagashima 1 , Jin-soo Kim 3 , Bae-Ho Park 3 , Tomoji Kawai 1 3 Show Abstract
1 The Institute of Scientific and Industrial Research, Osaka University, Ibaraki, Osaka, Japan, 2 PRESTO, Japan Science and Technology Agency, Kawaguchi, Saitama, Japan, 3 WCU, Konkuk University, Seoul Korea (the Republic of)
The mechanisms of non-volatile resistive switching (RS) phenomena have been intensively discussed in last decade. One of the difficulties to analyze these phenomena in detail is due to the occurrence of nanoscale RS events within bulk oxide materials. Individual core-shell type heterostructured nanowire offers extremely limited nano-space structures to investigate such nanoscale RS events. Here we demonstrate the presence of RS within NiO heterostructured nanowires and analyze the local RS events. MgO nanowires as a template were fabricated by pulsed laser deposition with metal catalysts (Au) via VLS mechanism on MgO(100) substrate, and NiO shell-layer for RS was deposited in-situ. A single nanowire was bridged between nano-electrodes using EB lithography, allowing the transport properties of a single nanowire. We found the presence of non-volatile RS effects within a single NiO heterostructured nanowire with the bipolar switching behavior. In addition, we have evaluated the atmosphere dependence on the RS by modulating the ambient gas atmosphere from oxidation to reduction. The reaction of gas atmosphere was the trend of p-type carrier on NiO at resistive switching. Thus above results as to RS events on single oxide nanowire highlight the importance of nanoscale events on the RS characteristics.