MRS Meetings and Events

 

NM02.07.06 2023 MRS Spring Meeting

Large Scale Integration of 2D material for Memristors

When and Where

Apr 13, 2023
10:30am - 10:45am

InterContinental, Fifth Floor, Sutter

Presenter

Co-Author(s)

Clotilde Ligaud1,Lucie Le Van-Jodin1,Bruno Reig1,Clémence Hellion1,Pierre Trousset1,Jean Coignus1,Céline Vergnaud2,Hanako Okuno3,Djordje Dosenovic3,Stéphane Cadot1,Rémi Gassilloud1,Matthieu Jamet2

CEA-Leti, Univ. Grenoble-Alpes1,Université Grenoble Alpes, CEA, CNRS, CEA, Grenoble INP, IRIG-Spintec2,University Grenoble Alpes, CEA, IRIG-MEM3

Abstract

Clotilde Ligaud1,Lucie Le Van-Jodin1,Bruno Reig1,Clémence Hellion1,Pierre Trousset1,Jean Coignus1,Céline Vergnaud2,Hanako Okuno3,Djordje Dosenovic3,Stéphane Cadot1,Rémi Gassilloud1,Matthieu Jamet2

CEA-Leti, Univ. Grenoble-Alpes1,Université Grenoble Alpes, CEA, CNRS, CEA, Grenoble INP, IRIG-Spintec2,University Grenoble Alpes, CEA, IRIG-MEM3
2D materials are promising candidates for next generation devices. Their various properties combined with their intrinsic thinness and flexibility could enable the realization of high-performance devices. For instance, MoS<sub>2</sub> has demonstrated switching behavior [1] which allow the manufacturing of memristors [2] or high cut-off frequency RF switches[3]. Nevertheless, the high growth temperature of 2D material by physical or chemical methods prevents their fabrication directly on partially processed integrated circuits. An intermediate transfer step from the growth substrate to the final substrate is necessary to achieve their large-scale integration. Today, most publications are based on individual devices with a great lack of reproducibility and statistics. In this work, we report the successful large-scale integration of MoS<sub>2</sub> in memristors reaching the current state of the art.<br/>In this work, bottom electrodes are patterned on a 200 mm wafer. About 250 dies of 1 cm<sup>2</sup> were thus obtained. On each die are designed several structures such as van der Pauw, Hall bar, RF switches, memories… By transferring and patterning MoS<sub>2</sub> and top electrodes on the dies, vertical memories are performed with the following structure: bottom electrode/2D material/top electrode.<br/>Planar bottom electrodes are made of a stack of Ti/AlCu/Ti/TiN, performed with standard deposition and patterning processes. The 2D material consists of three monolayers (ML) of MoS<sub>2</sub> grown by Atomic Layer deposition on 200 mm SiO<sub>2</sub>/Si wafer. MoS<sub>2</sub> is transferred above by wet transfer method using polystyrene as support layer. Then 2D material is patterned using deep UV lithography and plasma etching. Finally, top electrodes are deposited by ebeam evaporation and patterned by photolithography and lift-off. Three metallic electrodes are tested: Ag, Ni and Cr/Au.<br/>An in-depth TEM study is performed on the stack SiO<sub>2</sub>/MoS<sub>2</sub>/Ag. It shows the very good quality of the device. It confirms the preservation of each of the three MoS<sub>2</sub> layers and the clean interfaces with electrodes. A study of Raman spectroscopy at each step of the process confirms the MoS<sub>2</sub> preservation. Optical and electronic microscopy images confirmed the quality of the devices.<br/>Finally, several devices are tested by electrical measurements. Direct current characterization demonstrates resistance-switching behavior. Several cycles are observed on several devices with Ni and Au as top electrodes. Set (switching from OFF to ON state) and Reset (from ON to OFF state) cycles are reproducible between devices. The Set voltage is roughly 2V whereas the reset voltage is around -1V. Except for the first cycle during which the OFF-state current is lower than during the other cycles, the I<sub>ON</sub>/I<sub>OFF</sub> ratio is around 10<sup>4</sup>. Several cycles (7) are obtained on the devices.<br/>In summary, we developed a large-scale 2D material integration process compatible within standard microelectronics clean room facility. With this process, we were able to manufacture MoS<sub>2</sub>-memristors reaching the current state of the art.<br/>[1] A. A. Bessonov, M. N. Kirikova, D. I. Petukhov, M. Allen, T. Ryhänen, et M. J. A. Bailey, « Layered memristive and memcapacitive switches for printable electronics », <i>Nat. Mater.</i>, vol. 14, n<sup>o</sup> 2, Art. n<sup>o</sup> 2, févr. 2015, doi: 10.1038/nmat4135.<br/>[2] S. Bhattacharjee <i>et al.</i>, « Insights into Multilevel Resistive Switching in Monolayer MoS<sub>2</sub> », <i>ACS Appl. Mater. Interfaces</i>, vol. 12, n<sup>o</sup> 5, p. 6022-6029, févr. 2020, doi: 10.1021/acsami.9b15677.<br/>[3] R. Ge <i>et al.</i>, « Atomristor: Nonvolatile Resistance Switching in Atomic Sheets of Transition Metal Dichalcogenides », <i>Nano Lett.</i>, vol. 18, n<sup>o</sup> 1, p. 434-441, janv. 2018, doi: 10.1021/acs.nanolett.7b04342.

Keywords

2D materials

Symposium Organizers

Kwabena Bediako, University of California, Berkeley
Fang Liu, Stanford University
Andres Montoya-Castillo, University of Colorado, Boulder
Justin Sambur, Colorado State University

Symposium Support

Silver
Toyota Research Institute of North America

Bronze
HEKA

Publishing Alliance

MRS publishes with Springer Nature