Leifeng Zhang1,Bumsu Park1,Kilian Gruel1,Rafaël Serra1,Lucas Chapuis1,Dong-Jik Kim2,Ibukun Olaniyan2,Catherine Dubourdieu2,3,Christophe Gatel1,4,Martin Hÿtch1
CEMES-CNRS1,Helmholtz-Zentrum Berlin für Materialien und Energie2,Freie Universität Berlin3,Université Paul Sabatier4
Leifeng Zhang1,Bumsu Park1,Kilian Gruel1,Rafaël Serra1,Lucas Chapuis1,Dong-Jik Kim2,Ibukun Olaniyan2,Catherine Dubourdieu2,3,Christophe Gatel1,4,Martin Hÿtch1
CEMES-CNRS1,Helmholtz-Zentrum Berlin für Materialien und Energie2,Freie Universität Berlin3,Université Paul Sabatier4
The metal-oxide-semiconductor (MOS) capacitor, employed individually or as an element of more advanced electronic components, is one of the fundamental electrical components used in integrated circuits [1, 2]. While much effort is currently being made to integrate new dielectric or ferroelectric materials, capacitors of silicon dioxide (SiO<sub>2</sub>) on silicon remain the most prevalent. Therefore, it is perhaps surprising that the electric field within such a capacitor has never been measured or mapped out at the nanoscale.<br/>Here, by adopting the <i>operando</i> electron holography methodology in transmission electron microscopy (TEM) with delicate focused ion beam (FIB, ThermoFisher Helios 600i) specimen preparation, we have successfully mapped the electric potential across a working MOS nanocapacitor with unprecedented sensitivity and revealed unexpected charging of the dielectric material bordering the electrodes [3]. The extended charge layer is up to 5.5±0.5 nm, much larger than the structural or chemical width of the interface. Moreover, the charge density varies monotonically with the applied bias, with an almost linear dependence, and follows the sign of the applied bias with an opposite sign to the charges on the nearby electrodes. In our device, we find a reduced capacitance of 17 nF/cm<sup>2</sup> compared with an ideal capacitor (without the dielectric charge layers) of 29 nF/cm<sup>2</sup>. Our another example using this methodology is a real nanodevice extracted from 28 nm process test chip [4].<br/>We also applied the <i>operando</i> electron holography methodology in the Ti/BaTiO<sub>3</sub> (100)/SrTiO<sub>3</sub> (100)/SiO<sub>2</sub> (110)/<i>p</i>-type Si (110) system, in which the BaTiO<sub>3</sub> and SrTiO<sub>3</sub> layers were fabricated by molecular beam epitaxy (MBE) technique. The charge and potential distributions were successfully mapped for various ferroelectric or dielectric layers with the applied bias, in which SiO<sub>2</sub>, with low dielectric constant, possesses the highest electric field. Although difficult to study the ferroelectric switching dynamics in this structure, our methodology extends its ability to deal with FIB-prepared complex device structures. Furthermore, by adopting the metal-insulator-metal-ferroelectrics-metal (MIMFM) structure, we are able to, by the first time, measure the relative permittivity of ferroelectric material upon polarization switching owing to the existence of floating gate during our <i>operando</i> electron holography analyses.<br/><b>References</b><br/>[1] E. H. Nicollian, et al. MOS (Metal Oxide Semi-conductor) Physics and Technology (John Wiley and Sons, New York, 2002).<br/>[2] S. M. Sze, et al. Physics of Semi-conductor Devices, 4th ed. (John Wiley and Sons, New York, 2021).<br/>[3] C. Gatel, et al. Extended Charge Layers in Metal-Oxide-Semiconductor Nanocapacitors Revealed by <i>Operando</i> Electron Holography, Phys. Rev. Lett. 13, 137701 (2022).<br/>[4] M. Brodovoi, et al. Mapping Electric Fields in Real Nanodevices by <i>Operando</i> Electron Holography. Appl. Phys. Lett. 23, 233501 (2022).