Stephen Pearton, Univ of Florida
Fan Ren, Bell Labs, Lucent Technologies
Randy Shul, Sandia National Laboratories
Sandro Tenconi, Innovative Electronics
Eckhard Wolfgang, Siemens AG
- Innovative Electronics
- Bell Laboratories, Lucent Technologies
- Sandia National Laboratories
- Siemens AG
Proceedings published as Volume 483
of the Materials Research Society
Symposium Proceedings Series.
* Invited paper
SESSION E1: APPLICATIONS FOR POWER ELECTRONICS
Chairs: Stephen J. Pearton and Randy J. Shul
Monday Afternoon, December 1, 1997
1:30 PM *E1.1
MEGAWATT SOLID-STATE ELECTRONICS, E.R. Brown, DARPA Electronics Technology Office, Arlington, VA.
For the past several years solid-state power electronics has been undergoing a steady growth, indicative of what some have called the ``second electronic revolution.'' A key aspect of this revolution is the use of electronically-controlled solid-state switches to drive motors and other machines so pervasive in the modern world, and to control the transmission and distribution of electrical power itself. The solid state switches offer improvements over mechanical or vacuum switches not only in speed and efficiency of the switching action, but also in the reliability and quality of the machine or power being driven. At present, the favored approach consists of high-power three- or four-terminal semiconductor switching integrated monolithically (lower powers) or in hybrid fashion (higher powers) with control devices. Although simple schematically, these high-power ICs are very challenging to design and package because of the electrical, thermal, and mechanical stresses that accompany high-power switching. Much of technological development has been aimed at applications in the range of roughly 10 to 100 KW because of the large number of ac- and dc-motor applications in this range. Recently DARPA has invested in solid-state switches, aiming at power levels from approximately 100 KW to beyond 1 MW. There exists near-term DoD interest in this power range for 100-KW-class ac-induction motor drives and > 1 MW pulsed-power components in Combat Hybrid Power Systems (CHPS). The near-term commercial interests lie in large motors (e.g., locomotives) and Flexible AC Transmission Systems (FACTS) for the electric utilities. For the utilities application, DARPA has coordinated its program with the Electric Power Research institute (EPRI). In this presentation, the DARPA performance goals will be summarized and the MW-level switch technology will be characterized in both theoretical and practical terms. This will include a discussion of existing figures-of-merit along with a proposed figure-of-merit, the power switching efficiency, that is analogous to the power-added efficiency for electronic amplifiers.
2:00 PM *E1.2
APPLICATIONS OF HIGH POWER ELECTRONIC SWITCHES IN THE ELECTRIC POWERUTILITY INDUSTRY AND THE NEEDS FOR HIGH POWER SEMICONDUCTOR SWITCHING DEVICES. G.T. Heydt, Arizona State University, Center for the Advanced Control of Energy and Power Systems, Tempe, AZ.
This paper concerns the applications and needs for high power electronic switches in the electric power utility industry. The main immediate needs are in the primary distribution system (100 - 1000 kVA), subtransmission and transmission systems (1-100 MVA). The practical needs are in power conditioning (including all types of power quality enhancement technologies), power flow control, and transformerless voltage transformation technologies. Power conditioning is needed for bus voltage regulation for sensitive industrial loads, computers, and digital controls. It has been stated that the greatest power quality problem and the greatest power supply threat to productivity in the United States is due to momentary bus voltage sags. Specialized types of power conditioning may be designed to alleviate this problem. The most promising of these technologies are: the transient voltage regulator (TVR), dynamic voltage restorer (DVR), subcycle transfer switch (SCTS), and various types of energy storage devices that are capable of rapidly injecting power into primary distribution circuits that experience low voltage for one reason or another. Power flow control has been proposed at all power levels in electric power engžneering: this mechanism allows automated distribution systems, enhancing economic dispatch of power systems, load-frequency control, load shedding, and unbundling of power distribution services. Transformerless technologies relate to the use of high power semiconductor switches for voltage buck and boost, and for innovative circuit configurations. The main thrust of the paper is to identify the present applications for high power electronic switches; to conjecture the near-term future applications; and to identity the needed capabilities in semiconductor switching devices. Because many of the applications are in the kilowatt and megawatt range, the importance of operating devices in series and parallel is described. Many of the proposed technologies are based on pulse width modulation (PWM). This technology causes 60 Hz signals to translate in frequency to the kilohertz range. In order to make PWM switching most effective, higher frequency modulation indices (Mf is the ratio of the PWM carrier frequency to the low frequency (60 Hz) control signal) are needed. This requires high power electronic switches capable of 2.0 to 6.0 kHz operation. Operating frequency needs for high power switches are discussed. Finally, protection mechanisms for high power electronic switches are described, and summary of present methods is given.
2:30 PM *E1.3
GaN AND RELATED MATERIALS FOR HIGH POWER APPLICATIONS. Michael Shur, Rensselaer Polytechnic Institute, ECSE, Troy, NY.
We discuss materials properties of GaN and related binary and ternary semiconductors and their heterostructures, which make them superior for high-power, high temperature applications. In particular, we analyze the properties of the two-dimensional electron gas at the GaN/AlGaN heterointerfaces and in the quantum well structures and superlattices. The mobility-sheet carrier concentration products for these two dimensional systems may greatly exceed those for traditional GaAs/AlGaAs structures and can be further enhanced by doping the conducting channels and by using piezoelectric doping, which takes advantage of high piezoelectric constants of GaN and related materials. We estimate that current densities over 10 A/mm can be reached in multiple quantum well structures. These high current values can be combined with very high breakdown voltages in high-power lateral devices, which may exceed several thousand volts. Recent Monte Carlo simulations point out to strong ballistic and overshoot effects in GaN and related materials, which should be even more pronounced than in GaAs-based compounds but in a much higher electric fields. This should allow us to achieve faster switching, minimizing the power dissipation during a switching event. A relatively small area of multi-quantum well power devices should lead to a higher yield, which should be a great advantage compared to SiC power devices, where small cross sections required for a reasonable yield severely limit the maximum power of operation. For GaN-based devices, the use of SiC substrates is essential for ensuring an effective heat dissipation. Such an approach combines the best features of both technologies. Nevertheless, self-heating is unavoidable in power devices. Hence, for power applications, one should compare materials properties at operating temperatures and not at room temperature. We discuss the self-heating effects and compare material properties of GaN-based materials at elevated temperatures with those of Si, GaAs, and SiC. We conclude that the advantages of this material system are even more pronounced at elevated temperatures and that GaN-based power devices should find numerous applications both as discrete power devices and as components of multi-chip modules.
3:30 PM *E1.4
4H-SiC POWER DEVICES: COMPARATIVE OVERVIEW OF UMOS, DMOS, AND GTO DEVICE STRUCTURES. J.B. Casady, A.K. Agarwal, L.B. Rowland, R.R. Siergiej, S. Mani, S. Seshadri, P.A. Sanger and C.D. Brandt, Northrop Grumman Science and Technology Center, Pittsburgh, PA.
High-frequency, high-power silicon carbide device development has been fast-paced in recent years since the first commercial release of bulk SiC substrates in the early 1990's. Because of high defect density (especially micropipes) in the substrates, small-area SiC devices (such as MESFETs and SITs) have shown the most immediate promise. Examples of such devices include 4H-SiC MESFETs with fmax of 42 GHz and 3.125 W/mm at 10 GHz , MESFETs with 3.3 W/mm at 850 MHz and 65.7% PAE , and 4H-SiC SITs with 120 W at 2.7 GHz (1 cm periphery)  which have been fabricated to date. As material quality continues to improve (micropipe defect density reducing to less than 50 per cm2 , and commercial availability of 2 inch wafers), larger area SiC power devices are beginning to show the same promise of development which has been seen to date in the microwave and RF high-frequency devices. This abstract will critically review current progress in silicon carbide power devices, with particular emphasis placed on power FETs (such as 1100 V UMOS ; 900 V DMOS ; 260 V, 2 A UMOS ) and power thyristors (such as 900 V,2 A thyristors ; 700 V,6 A thyristors  and 700 V gate turnoff thyristors ). Forward voltage drop, on-state resistance, processing limitations, and switching losses will be given detailed attention as well.
4:00 PM E1.5
THERMO-MECHANICAL SIMULATION OF A MULTICHIP PRESS-PACKED IGBT. Alessandro Pirondi, Gianni Nicoletto, Paolo Cova, University of Parma, ITALY; Maurizio Pasqualetti, Marco Portesine, Pier Enrico Zani, Ansaldo Trasporti, Semiconductor Dept, Genova, ITALY.
The reliability of power electronic modules, including IGBTs, is frequently and negatively affected by thermo-mechanical fatigue and cracking in solder joints and packaging as demonstrated in thermal cycling tests used for reliability check. This intrinsic weakness may be overcome by applying to these devices the press contact technology widely used for high power diodes,SCRís and GTOís as allows the elimination of chip solder and wire bonding. However, due to the different structure of the IGBT chip with respect to the standard device for press-pack assembly, it is necessary to investigate the stresses and strains of thermo-mechanical origin on the chip surfaces. In a previous work of the present authors, stresses and strains in a single-chip press-packed IGBT due to assembly and thermal cycling were simulated by Finite Element method with the ABAQUS code identifying the conditions for potential fatigue or fretting damages. However, the single chip configuration may be inadequate for power requirements of systems like electric motor controls. The current may be distributed over a suitable number of parallel-connected chips leading to the multichip packaging scheme. In such a configuration, a number of design parameters larger than the single chip scheme has to be taken into account. Specifically, the collector and emitter layout, the presence of a stress relief foil above the chip pads, dimensional and flatness tolerances of the different contacting probes are believed to have a prominent influence on the final stress/strain distribution between the contacting parts and, therefore, on the mechanical reliability. In this work stresses and strains due to assembly and thermal cycling in a multi-chip IGBT are simulated with the Finite Element Method. The objective is the determination of the influence of different design solutions and the role of dimensional and flatness tolerances on the contact pressure distribution and on the damage initiation conditions.
4:15 PM E1.6
LOCALIZED LIFETIME CONTROL IN SILICON BIPOLAR POWER DEVICES BY VOID INDUCED BY HELIUM ION IMPLANTATION. V. Raineri, CNR-IMETEM, Catania, ITALY; M. Saggio, R. Letor, F. Frisina, ST Microelectronics, Catania, ITALY; E. Rimini, Dipartimento di Fisica delli Universit, Catania, ITALY.
An innovative method to control carrier lifetime locally and efficiently in silicon bipolar power devices is presented. It is based on the formation of void layers by low energy and high dose He implants and annealing. Details on the void formation and evolution will be presented in view of their positioning very deep in the device structure by their formation before a thick epitaxial growth at 1150 ƒC. Voids introduce two well defined mid gap trap levels in silicon. A study on their electrical properties is also presented considering the application in power devices. Simulations demonstrate the increase of surface hole concentration when a well localized recombination region is introduced in the buffer layer. More in detail we could demonstrate the advantage of using well localized recombination region with respect to its position in a power structure. As example of application to power devices, characteristics of high speed IGBTs will be presented. They were fabricated both with voids in the buffer layer or with unlocalized recombination centres (Metal diffusion or electron irradiation). Devices with localized band gap centres show a lower on-resistance with a fast turn-off behaviour.
4:30 PM *E1.7
THE WORLD-WIDE MARKET SIZE AND POTENTIAL OF WIDE-BANDGAP SEMICONDUCTOR POWER ELECTRONIC DEVICES. Avishay Katz, Watkins-Johnson/Semiconductor Equipment Group, Scotts Valley, CA.
Power electronics refers to the electronic processing of electrical energy. The field finds its roots in the late 1950s with the invention and commercialization of thyristors and diodes for industrial, commercial, and consumer power devices. The highest-power electronics are devices that operate at 2 kV and above. To date, improvements in high-power device performance have come from advances in device design. Now the key source of innovation is materials. The power limit on silicon devices is approaching, and is believed to be a major barrier. Wide-bandgap semiconductors, including silicon carbide, group III nitrides, and chemical-vapor-deposited diamond, will be essential for powerful next generation devices. Of wide-bandgap materials, silicon carbide wafers will be commercially available in 5-7 years. A market exceeding $1 billion by 2015 is projected for high power silicon carbide-based devices. Other materials yet experience difficulties in growing single crystal substrates, and their device commercialization is not expected until after 2010.
SESSION E2: DIAMOND BASED DEVICES
Chairs: T. P. Chow and Michael S. Shur
Tuesday Morning, December 2, 1997
8:30 AM *E2.1
CVD DIAMOND MATERIALS PROPERTIES. J.E. Butler, P.E. Pehrsson, T. Mercer, Naval Research Laboratory, Washington DC; W.B. Alexander, MEMC Electronic Materials Inc, St. Peters MO; D.J. Vestyck, Jr., T. McCormick, Geo-Centers, Inc. Fort Washington, MD; V. Ayres, Department of Electrical Engineering, Michigan State University, East Lansing, MI; A.C. Gilmore, T.J. Davis, C.D.O. Pickard, W.N. Wang, N.A. Fox, and J.W. Steeds, H.H. Wills Physics Laboratory, University of Bristol, Bristol, UNITED KINGDOM.
Amongst the wide band-gap materials which can have an impact on power electronic devices is chemical vapor deposited (CVD) diamond. This material is now routinely grown in many laboratories and is commercially available for a wide variety of applications including: cutting tools, passive thermal management, optical windows, radiation detectors, surface acoustic wave devices, and sensors. Many other potential applications are currently being worked on, including solid state, field emission, and cold cathode devices. The properties of CVD diamond materials used can vary over a wide range (grain size and texture, defect nature and concentration) and are usually optimized for the properties desired by the application. In this presentation, we shall present an overview of the range of examples of the defects properties observed using various characterization techniques including photoluminescence, cathodo-luminescence, Raman scattering, scanning electron microscopy, transmission electron microscopy, IR emission, field emission, and various electrical measurements.
9:00 AM *E2.2
DEVELOPMENT OF DIAMOND BASED POWER MICROELECTRONICS. J.L. Davidson, W.P. Kang, Y. Gurbuz, L. Davis, K. Holmes, L. Jiang, Venkata Pulugurta, W. Anurat, M. Howell, Vanderbilt School of Engineering, Vanderbilt University, Nashville, TN.
Diamond can be a superior candidate for power devices over Si, SiC, and GaN and other nitrides as indicated by its material properties. Even though silicon technology is more advanced for device fabrication, its power performance is fundamentally limited by the intrinsic material properties and already restricts its deployment envelope in everything from PCs to substations. GaN or other nitrides may offer promise but have many unknown material properties and no true fabrication infrastructure. SiC shows considerable promise, but suffers both basic parameter limitations (band gap only incrementally better silicon, poor hole mobility and poor thermal conductivity) and practical material imperfections that years of development have not resolved (such as, micropipes, nitrogen contamination, and slow rate growth). CVD diamond is readily available and can be grown selectively or patterned vertically and laterally by a variety of techniques as demonstrated by our work and others. Moreover, the unique material properties of diamond such as thermal conductivity, dielectric breakdown, mobility, saturation velocity, and many other properties which are crucial material properties for power device applications noticeably exceed, for example, SiC and GaN. Diamond based power device structures such as resistor, capacitor, Schottky diode, p-n diode, thyristor, and field emitters are being investigated. Diamond resistors similar to standard thick film components is form and dimension were fabricated of polycrystalline diamond film. Using PECVD (plasma-enhanced chemical vapor deposition) processing to achieve diamond dielectric layers, high power, high energy density capacitors have been built. Despite grain boundaries and defects of polycrystalline diamond film, electronic devices such as field-effect-transistors and Schottky diodes have been developed. We have fabricated micro-patterned micro-tip arrays with this versatile new diamond technology as electron emitters. This paper will present results of this work.
9:30 AM *E2.3
ATOMISTIC AND MICROSTRUCTURAL MODELS FOR DIAMOND CVD. David J. Srolovitz, Corbett C. Battaile, Paritosh, Dept. of Materials Science & Eng., University of Michigan, Ann Arbor, MI; and James E. Butler, Gas/Surface Dynamics Section, Naval Research Laboratory, Washington, DC.
Diamond films are routinely grown via chemical vapor deposition (CVD) techniques in which a precursor gas containing a small amount of hydrocarbons (usually CH4) in H2 is heated by a hot filament, microwaves, or DC arc jet, dissociating some of the H2 into atomic H and creating many different hydrocarbon. Atomic H helps stabilize the diamond phase by terminating the diamond lattice with C-H bonds (i.e., passivating the surface), converting sp2-bonded C into sp3-bonded diamond, and etching sp2-bonded C from the surface. We present an atomic-scale, kinetic Monte Carlo model of diamond growth that includes a wide range of surface chemical reactions and allows us to simulate in excess of 109 reaction events corresponding to reactor times of up to one hour and hundreds of 104 atom monolayers. We employ this method to predict diamond growth rate as a function of surface crystallographic orientation, gas phase composition and temperature, in excellent agreement with experiment. The resultant structures are analyzed to understand nucleation and growth on the surface, surface roughness and faceting. Using these growth rates determined from the atomistic simulations, we develop a front-tracking model of microstructural evolution on a much coarser scale. This model is used to predict the evolution of crystallographic texture, surface roughness, and grain size and to understand the growth competition between grains that leads to the development of columnar films.
10:30 AM E2.4
HIGH PERFORMANCE THIN FILM DIAMOND FIELD EFFECT TRANSISTORS. Hui Jin Looi, Lisa YS Pang and Richard B. Jackman, University College London, Electronic and Electrical Engineering, London, UNITED KINGDOM.
There has been considerable speculation that electronic devices fabricated from diamond would display high performance levels and be tolerant of hostile environments. However, to date relatively poor device characteristics have been recorded even when single crystal diamond is used. This is due, in part, to the lack of a suitable dopant; p-type characteristics result from boron inclusion but a high activation energy leads to low carrier concentrations and poor carrier mobilities are useful temperatures. Moreover, thin film diamond grown on non-diamond substrates is polycrystalline in nature resulting in further degredation of its electronic character. Recently it has become apparent that hydrogen inclusion in thin film diamond can cause p-type conductivity to occur. It was thought that this was due to a surface band bending effect but we have recently shown that it is due to the formation of shallow acceptor states . Carrier concentrations in the range 10(17) to 10(19) per cm3 can be achieved and in polycrystalline material we have measured carrier mobilities up to 70cm2V-1s-1 at these levels; the highest reported to date. This has enabled us to fabricate enhancement mode MESFET structures in polycrystalline CVD diamond which display full turn off and saturation and high transconductance levels (0.2mS/mm at room temperature). In this paper we will describe the nature of conductivity in this material, the fabrication of MESFET structures and present performance characteristics. We will also contrast the performance of these devices with those we have previously made using boron doped polycrystalline diamond , and with state of the art devices formed from natural diamond; the prospects for diamond as a high performance device material will be assessed.
10:45 AM E2.5
POLYCRYSTALLINE DIAMOND BONDING TO METALS BY RAPID THERMAL PROCESSING. Peter B. Kosel, Roberto Monreal, University of Cincinnati, Cincinnati, OH; Sandra Carr, Joe Weimer, Wright Laboratory WPAFB, OH; R.L.C. Wu, Aaron Dalton, K Systems Corp., Beavercreek, OH.
Metal bonds to polycrystalline diamond (PCD) are important for the realization of ohmic contacts for electron devices, transfer of PCD films to various materials and in the fabrication of PCD-based sensors. We have investigated the formation of titanium (Ti) contacts on PCD and aluminum silicide bonding of the PCD films to a variety of substrates by rapid thermal techniques. Two alternative rapid thermal processing systems were used: (a) a rectangular cavity structure with large area (5"x 10") uniform temperature coverage, and (b) a cylindrical cavity structure with a narrow area (1"x8") uniform temperature coverage. All high temperature process times were kept to 2 minutes for both systems and only the maximum temperature was varied for optimum results in each application. The rectangular cavity system allowed large area test devices to be fabricated and was used for the PCD bonding operations. The cylindrical cavity system was capable of achieving higher temperatures and was used for the Ti/PCD contact experiments. The qualities of both the Ti contacts and the aluminum silicide bonds were checked by measuring the contact resistances from current-voltage measurements. Optimum Ti-on-PCD contacts were formed by rapid sintering at 900C 10 for 2 minutes in argon gas. Aluminum silicide bonding was achieved by deposition of silicon onto Ti contacts that were first made on the PCD then pressing the structure against aluminum foil placed between the silicon surface and a substrate inside a low mass stainless steel clamp. The loaded clamp was placed in the rapid thermal system and rapidly heated for 2 minutes at 600C10 in argon or forming gas. By cutting a patten into the aluminum foil the spread in the contact resistance could be measured and was used to ascertain the uniformity of the bonds so formed. Details of the device structures and experimental procedures will be presented.
11:00 AM E2.6
HEAT SPREADER CHARACTERISTICS OF MULTILAYER DIAMOND FILMS FOR HIGH FREQUENCY POWER DEVICES. Arthur J. McGinnis, K. Jagannadham, J. Narayan, Dept of Materials Science and Engineering, North Carolina State University, Raleigh, NC; Hsin Wang and R. B. Dinwiddie, Metals and Ceramics Division, Oak Ridge National Lab, Oak Ridge, TN.
Diamond films are grown on molybdenum or silicon nitride substrates. Silicon wafers are bonded to the diamond substrates and the heat spreader characteristics are investigated using IR imaging. The stability of the bonded joints when subjected to thermal cycling is determined. The use of diamond substrates as heat spreaders in electronic packaging of high frequency power device is discussed. The thermal conductivity of diamond coatings are compared with those of diamond/aluminum nitride composite coatings. Research supported by DDMI-NSF, SURA-ORNL and HTML USER PROGRAM, ORNL.
11:15 AM *E2.7
SHORT-PULSE LASER INTERACTIONS WITH WIDE-BAND GAP MATERIALS. Rajiv K. Singh, Department of Materials Science and Engineering, University of Florida, Gainesville, FL; and Peter Pronko and Paul Van Rompay, Center for Ultrafast Optical Phenomena, University of Michigan, Ann Arbor, MI.
Lasers provide an unique method for non-contact characterization of the dielectric breakdown in materials. The interaction of laser radiation on surfaces creates intense electric fields in the near surface region of the materials. The oscillating electric fields can lead to breakdown of the materials which can be correlated to be breakdown phenomena. In this work we examine the use of sub-nanosecond (picosecond and femtosecond laser pulses) on the dielectric breakdown phenomena in materials (Si, diamond, GaN, etc). The fluence threshold for breakdown was examined was a function of pulse duration. A two temperature model to understand the nature of laser-solid interaction in this regime was developed. Qualitative correlation with the breakdown phenomena will also be investigated.
SESSION E3: DEVICES AND PROCESSING
Chairs: Fan Ren and Eckhard Wolfgang
Tuesday Afternoon, December 2, 1997
1:30 PM E3.1
POWER LIMITATION DUE TO PREMATURE BREAKDOWN IN A1GaN/GaN HFETs. George Gradinaru, M. Asif Khan, and Tangali S. Sudarshan, Univ. of South Carolina, Department of Electrical and Computer Engineering, Columbia, SC; Qiseng Chen, APA Optics Inc., Blaine, MN.
Superior intrinsic parameters, such as large bandgap, high saturation velocity, high electron mobility, and high sheet electron concentration, make the AlGaN/GaN Heterostructure Field Effect Transistor (HFET) an ideal candidate for high power microwave applications. Obtaining breakdown voltages close to the intrinsic limitation of the material is the crucial condition in achieving the expected high output and RF power levels for this new class of devices. However, the premature breakdown is by far, in the present period, the main power limitation of AlGaN/GaN HFETs. A wide range of breakdown voltages (25 to 340 V, mostly 25 to 80 V) was reported in the last two years. While no theory of breakdown in GaN based HFET has been proposed, avalanche breakdown in the reverse biased gate Schottky junction, in the high voltage/field gate-to-drain region, is widely accepted as the main breakdown mechanism. However, the bulk avalanche breakdown theory cannot explain the too wide range of reported breakdown voltages, nor a variety of experimental results related to premature breakdown of these devices. Here we present a systematic investigation of high field prebreakdown and breakdown phenomena in AlGaN/GaN HFETs. The breakdown was studied as a function of various parameters such as applied electric field, material layer structure, surface conditions, device geometry, and ambient dielectric. Pulsed regime measurements resulting in simultaneous time-resolved electrical characteristics and light emission signal were carried out at room temperature in air and fluorinert ambients. Synchronized CCD images of emitted light with the applied voltage pulse and SEM micographs were also used in the breakdown analysis. The significant influence of the fluorinert ambient on the breakdown process, along with the limitation of post-breakdown damage to the metal gate, with semiconductor not affected, demonstrates the on-surface character of the final breakdown. We propose that is most cases of premature breakdown of GaN-based HFETs the breakdown process is triggered by a surface flashover1 discharge produced in a zone of the gate-to-drain gap where the field enhancement is maximum. Therefore, based on our experimental results, a new breakdown mechanism, distinct from the bulk/subsurface breakdown, is proposed in this paper. Details of experimental procedures, the breakdown data in different ambients and their role in controlling the high power capability of AlGaN/GaN HFETs will be discussed in the presentation.
1:45 PM *E3.2
JUNCTION FIELD EFFECT TRANSISTORS FOR HIGH-TEMPERATURE OR HIGH-POWER ELECTRONICS. J.C. Zolper, Sandia National Laboratories, Albuquerque, NM.
Junction field effect transistors (JFETs) are attractive for high-temperature or high-power operation since they rely on a buried semiconductor junction, and not a metal semiconductor interface as in a metal semiconductor (MESFET) or heterojunction filed effect transistor (HFET), for modulating the transistor channel. This is important since a metal/semiconductor interface often degrades at elevated temperatures, either due the ambient temperature or to Joule heating at high current levels, while a buried semiconductor junction can withstand higher temperatures. In this talk on overview is given of JFET technology based on GaAs, SiC, and GaN. While impressive high-frequency results have been reported for GaAs JFET's with unit current gain cut-off frequencies up to 50 GHz more work is need to limit substrate conduction for optimum operation at 300C and above. For SiC JFETs, well behaved transistor operation has been maintained up to 600 C. More recently a GaN JFET has also been demonstrated that is promising for similarly high temperature operation but is presently limited buffer conduction. Future directions for each of these technologies, and potential extension to high power switching devices such as thyristors will be presented at the conference.
2:15 PM *E3.3
WIDE BANDGAP SEMICONDUCTOR POWER DEVICES. T.P. Chow, Rensselaer Polytechnic Institute, Dept. of Electrical, Computer and Systems Engineering, Troy, NY; M. Ghezzo, GE Corporate Research and Development, Schenectady, NY.
Wide bandgap semiconductors, such as SiC and GaN, possess many intriguing properties which make them attractive for high-temperature, high power device applications. These properties include smaller intrinsic carrier concentration, larger thermal conductivity and higher carrier saturation velocity, when compared to silicon. Several two- and three-terminal high-voltage power switching device structures will be comparatively analyzed using numerical simulations and experimentally. In particular, vertical SiC junction rectifiers having a new charge trapping behavior and a current-control negative-resistance characteristic will be presented. The performance of power unipolar and bipolar transistors (FET, IGBT and MGT) and thyristors (GT0, MCT) will be discussed, with tradeoffs on forward drop, switching times and safe-operating-area. Outstanding technical issues that need to be addressed in order to realize the commercialization of these power devices will also be presented.
2:45 PM *E3.4
COMPARISON OF DRY-ETCH TECHNIQUES FOR GaN, InN, AND AlN, R.J. Shut, M.M. Bridges, C.L. Willison, and G.A. Vawter, Sandia National Laboratories, Albuquerque, NM; J.W. Lee, S.J. Pearton, and C.R. Abernathy, University of Florida, Gainesville, FL.
Although many advances in plasma etching of the group-III nitrides have transpired, the rapid development of advanced device structures, reduced design rules, and complex heterostructures has increased the requirements for etch processes. Etching the group-m nitrides is further complicated by their inert chemical nature and their strong bond energies as compared to other compound semiconductors. The group-III nitrides typically resist etching in standard room temperature wet chemical etchants thus depending almost exclusively on plasma etch technology for all device patterning. For example, commercially available LEDs and the first GaN-based laser diode were fabricated using RIE. Perhaps the most significant advancement in plasma etching these films has been the utilization of high-density plasmas. High-density plasma etch systems typically yield higher etch rates with less damage than more conventional RIE due to plasma densities which are 2 to 4 orders of magnitude greater and the ability to effectively decouple ion energies and plasma density. Etch profiles also tend to be more anisotropic due to lower process pressures which results in less collisional scattering of the plasma species. In this study, we compare ECR, ICP, RIE, and RIBE etch results for GaN, InN, and AlN in chlorine-based plasmas under a variety of plasma conditions. Etch rates, profiles, and surface and sidewall morphology will be discussed.
3:30 PM *E3.5
ELECTRICAL CONTACTS TO SILICON CARBIDE. Mikael Ostling, Kungl. Tekniska Hogskolan (KTH), Department of Electronics, Kista, SWEDEN.
Electrical contacts of both rectifying and Ohmic behavior is crucial to most semiconductor device applications. Silicon Carbide (SiC) has some very interesting and unique material properties which has rendered it an extensive technological importance in application areas such as high power rectifiers and converters, high frequency power amplifiers, high temperature electronics and electronics for harsh environment. The high bandgap of SiC, the extremely slow impurity diffusion and the overall high processing temperature needs during fabrication, all imposes severe problems to form reliable electrical contacts.
This paper will discuss the formation of Schottky -and Ohmic contacts to both n- and p-type SiC of the 4H and 6H polytypes. A review of successful contact schemes based on different refractory and transition metals will be presented. Suitable methods for contact resistivity measurements will be discussed. Ohmic contacts to both heavily doped SiC epitaxial layers as well as contact formation to ion implanted regions is reviewed. A discussion on thermodynamic stability of different contact structures will be included.
4:00 PM *E3.6
SILICON CARBIDE HIGH-VOLTAGE, HIGH-POWER DEVICES. C.E. Weitzel, Motorola Inc., Phoenix Corporate Research Laboratories, Tempe, AZ.
Semiconducting silicon carbide continues to receive increased attention because of its potential for a wide variety of high power devices. The unique material properties of SiC, high electric breakdown field of 4 x 106 V/cm, high saturated electron drift velocity of 2 x 107 cm/sec, and high thermal conductivity of 4.9 W/cm-K, are what gives this material its tremendous potential for RF and switch-mode power devices. Several years ago the only reported SiC RF power device was the MESFET which still holds the record for highest power density (3.3 W/mm @ 850 MHz) and highest operating frequency (fmax = 42 GHz). More recently SiC SIT's (Static Induction Transistor) have set the record for the highest total output power (470 W @ 600 MHz) from SiC: devices. This differentiation in performance is a result of the fact that the MESFET is a lateral or planar device With all device contacts on the top wafer surface whereas the SIT is a vertical device with the drain contact on the back of the wafer. MOSFET's, IGBT's, thyristors, and Schottky diodes are some of the vertical geometry, switch-mode power devices that are being fabricated using SiC. All of these devices are expected to outperform their silicon counterparts primarily because of SiC's higher electric breakdown field. MOSFET's have received the most attention and have been demonstrated as lateral FET's and vertical UMOSFET's and DMOSFET's. SiC IGBT's and thyristors offer even higher current density, but lower switching speed. SiC Schottky diodes are the easiest to fabricate and therefore will probably be the first commercially available SiC power device.
4:30 PM *E3.7
ELECTROTHERMAL TRANSPORT PROPERTIES OF SiC POWER DEVICES: CHANCES AND CHALLENGES. Gerhard Wachutka, Institute for Physics of Electrotechnology, Technical University of Munich, Munich, GERMANY.
Silicon carbide is regarded as a promising material for high power devices which, in several respects, is clearly superior to silicon as basic material. The most notable properties are the wide band gap, being larger by a factor of 2.5 - 3 compared to silicon, the excellent thermal conductivity, and a breakdown field strength which exceeds that of silicon by a factor of nearly 10. As a consequence, SiC devices can be operated under high temperature conditions, with a maximum temperature nearly three times above that of silicon, and we also expect a much higher blocking capability of reverse-biased junctions. Hence, when designing a device, we may either increase the blocking voltage or we may reduce the device thickness, leading to a significantly smaller on-resistance and better switching behavior compared to state-of-the-art silicon devices. In the past decade, large technological progress has been made in fabricating SiC power devices which exploit all these attractive features. However, the performance of the realized devices is still behind the theoretical expectations, in particular with respect to the blocking capability. Based on electrothermal transport models, we try to identify the physical causes for the observed deficiencies by an accurate analysis of the underlying mechanisms, revealing among others the effect of various breakdown phenomena specific of wide-gap materials, the consequences of anisotropic carrier mobility or the action of trap dynamics on the switching transients. From these considerations, we draw conclusions for improved device designs.
SESSION E4: POSTER SESSION:
POWER DEVICES AND MATERIALS
Chairs: Stephen J. Pearton, Fan Ren and Randy J. Shul
Tuesday Evening, December 2, 1997
Salons E-G (M)
A TECHNIQUE FOR RAPID THICK FILM SILICON CARBIDE EPITAXIAL GROWTH. Igor Khlebnikov, Tangali Sudarshan, and Vipin Madangarli, Department of Electrical and Computer Engineering, University of South Carolina, Columbia, SC; Michael Capano, Wright Laboratory/ Materials Directorate, Wright-Patterson AFB, OH.
The thickness of SiC epitaxial layers that can be grown by conventional CVD techniques is limited generally upto 10 microns, due to slow growth rates (0.5 - 4 microns/hr) and problems of epitaxial layer integrity over large areas. Also the presence of line defects and micropipes in SiC substrates, used for CVD epitaxy, adversely affect the quality of the epitaxial layers, especially thin layers, since the substrate micropipes propagate through the epitaxial layer during growth. With the present technology for bulk growth of SiC boules it is not possible to obtain micropipe free substrates, and wafers with low density of micropipes is still very expensive. In this paper we demonstrate the growth of thick SiC epitaxial layers (>100 microns) of good structural quality at a high growth rate (>100 microns/hr) using a modified physical vapor transport technique. The added advantage of this technique is that it is possible to 'repair' or 'heal' commercially available substrates dominated by micropipes, by 'filling up' the micropipes through crystal growth inside the micropipe. Extensive experiments performed on thick SiC epitaxial layers grown on Lely substrates indicate that the thick epitaxial layers are of single polytype of high structural quality, with a single peak X-ray rocking curve of less than 12 arcsecs FWHM. The experiments also demonstrate the ability of the rapid crystallization technique to 'fill-up' large diameter micropipes in the substrate.
6H-SILICON CARBIDE EPITAXIAL GROWTH ON CARBON. Igor Khlebnikov, Vipin Madangarli, and Tangali Sudarshan, Department of Electrical and Computer Engineering, University of South Carolina, Columbia, SC.
The hetero-epitaxy of SiC on substrates other than SiC is of great interest for device applications. Presently, the growth of 3C-SiC on Si substrates is widely adopted to obtain large diameter SiC crystals. Due to the low melting point of Si, it is not possible to perform crystal growth at temperatures > 2000†C, which limits the use of Si substrates for only 3C-SiC growth. In this paper we discuss the possibility of single crystal 6H-SiC epitaxial growth on thick amorphous carbon layers deposited on small diameter SiC wafers of different orientation and surface preparation. Studies related to the epitaxial structural quality as a function of the thickness of the amorphous carbon layer, the substrate wafer orientation, and the structural quality of the substrate wafer surface will be presented. The mechanism of 'information transfer' from the substrate to the epi-layer through the carbon film is being investigated. Preliminary experiments indicate that it is possible to inhibit the influence of the substrate SiC surface condition on the SiC epitaxial layer quality through the use of thick amorphous carbon layers between the substrate surface and the epi-layer.
FORMATION MECHANISM OF NEGATIVE-FIXED CHARGES IN GLASS AT LEAD GLASS/SILICON INTERFACE. Susumu Murakami, Hitachi Ltd., Hitachi Res. Lab., Ibaraki, JAPAN; Hitoshi Matsuzaki, Mitsuyuki Matsuzaki, Masao Tsuruoka, Hitachi Ltd., Hitachi Works, Ibaraki, JAPAN; Minoru Kanno, Hitachi Haramachi Electronics Co., Ltd. Ibaraki, JAPAN.
Glass films are widely used for surface passivation and protection of power semiconductor devices. Because of the importance of high blocking capability, arguments have been made supporting the need to analyze the electrical properties in the glass/silicon interface. Although some reports have shown that there was a negative charge in the glass layer for the Al2O3/Si system and the lead aluminosilicate glass/Si system, little has been done to analyze the physical origins of negative fixed charges in the glass layer. In this work, the formation mechanism of negative fixed charges in lead (PbO-SiO2- Al2O3) glass was investigated with the aid of SIMS impurity profiles in conjunction with the reverse current-voltage characteristics of the p-n junctions and the high frequency C-V curve of the MIS diodes. It was found that a thin p-type region formed by the diffusion of aluminum, which was one of the atoms in the glass, causes positive flatband voltage shifts. In accordance with conventional analysis, it was confirmed that a positive flatband voltage has a negative fixed charge in a glass layer. Using a proposed new model of the MIS structure with a surface p-n junction, it was found that the origin of the negative fixed charge was due not to a real negative fixed charge in the glass layer, but to a supposed charge in the glass layer with the opposite charge sign. These findings will be discussed in terms of the power semiconductor devices.
COVALENT SILICON BONDING AT ROOM TEMPERATURE IN ULTRAHIGH VACUUM. Andreas Plöessl, Heinz Stenzel, Cord Schmidthals, and Ulrich Gösele, Max-Planck-Institut f[ur Mikr ostrukturphysik, Halle (Saale), GERMANY.
For a number of applications in electronics and micromechanics, it would be desirable to be able to join processed wafers. Such a joining technique should yield good mechanical stability without the need of high temperatures. In addition, the interface should be of sufficient electronic and crystallographic quality. Wafer direct bonding could meet those requirements. Conventional wafer bonding exploits the adhesion which upon intimate contact in ambient air is found between two solids with well polished flat surfaces. However, the attraction between two bodies primarily is the result of van der Waals forces or hydrogen bonding. In order to increase the adhesion, the bonded pair is annealed at temperatures of 800C to 1000C. Processed devices may preclude the annealing step. In addition, gaseous products of the bonding reaction can lead to a build-up of pressure at the bonding interface and thus cause delaminations in the interfacial plane. In the case of dissimilar materials, differences in thermal expansion behaviour aggravate the problems with the annealing step. A low-temperature joining technique could circumvent these obstacles in the application of direct bonding. Bonding of atomically clean surfaces is such a low temperature joining technique. Results on the application of this method to silicon direct bonding are being presented. Clean surfaces for bonding were prepared by ex situ chemical cleaning with ensuing hydrogen passivation and their subsequent activation by thermal desorption of the passivation in ultrahigh vacuum. In UHV at room temperature, the wafers were gently brought into contact to initiate the bonding process. Without any subsequent heat treatment, the adhesive strength thus achieved was equivalent to the cohesion of bulk silicon: covalent bonds join the two crystals. The potential of this method for applications in the fabrication of semiconductor power devices is being discussed.
EMISSION PROPERTY OF NITROGEN IMPLANTED DIAMOND FILMS. G. Yuan, C.C. Jin, Y.X. Jin, B.L. Zhang, H. Jiang, T.M. Zhou, Y.Q. Ning, W.B. Wang, Y.Z. Wa, Changchun Institute of Physics, Chinese Academy of Science, Changchun, CHINA.
Recently diamond has attracted research's attention as a cold cathode in field emission display due to its excellent property. In this paper, we report the emission property of diamond films. The diamond films were deposited on silicon wafer by microwave-PCVD method and implanted nitrogen at a dose of 5x1014/cm25x10^15/cm^2 s^-1in ScAlMgO_4 photoluminescence increases of a factor of 5 are observed for AlN(Er) samples treated in a 2H plasma at 200C for 30 mins. The atomic deuterium passivates defects in the AlN which normally provide alternative carrier recombination routes. Post-deuteration annealing at 300C for 20 mins. removes the luminescence enhancement by de-passivating the non-radiative centers. The AlN(Er) provides a high degree of resistance to thermal quenching of luminescence as a function of temperature because of its wide bandgap (6.2eV), and hydrogenation is a simple method for maximizing the optical output in this materials system.
ICP ETCHING OF SiC. J.J. Wang, S.J. Pearton, J.W. Lee, Department of Materials Science and Engineering, University of Florida, Gainesville, FL; C.-M. Zetterling and M. Ostling, Department of Electronics, KTH, Kista, SWEDEN; F. Ren, Bell Laboratories, Lucent Technologies, Murray Hill, NJ; J.C. Zolper and R.J. Shul, Sandia National Laboratories, Albuquerque, NM.
A number of different plasma chemistries, including NF3/O2, SF6/O2 SF6/Ar, ICl, IBr, Cl2/Ar, BCl3/Ar and CH4/H2/Ar, have been investigated for dry etching of 6H and 3C-SiC in a Inductively Coupled Plasma tool. Rates above 2.000Å.cm-1 are found with fluorine-based chemistries at high ion currents. Surprisingly, Cl2-based etching does not provide high rates, even though the potential etch products (SiCl4 and CCl4) are volatile. Photoresist masks have poor selectivity over SiC in F2-based plasmas under normal conditions, and ITO or Ni are preferred, A sequential etch/deposition process developed for Si, micromachining greatly reduces the consumption of photoresist and appears well-suited to trench etching in SiC.
RAMAN SPECTROSCOPY AND TEM CHARACTERIZATION OF 3C-SiC/Si HETEROSTRUCTURES. C.K. Moon, B-T. Lee, D-K. Kim and J.K. Kim, Chonnam National University, Kwangju, SOUTH KOREA; W. Bang and H.J. Kim, Seoul National University, SOUTH KOREA; and Y.H. Seo and K.S. Nahm, Jeonbuk National University, SOUTH KOREA.
Cubic SiC/Si films have been studied using the Raman spectroscopy, grown by various methods such as the conventional two-source CVD, low-temperature single-source CVD, and molecular beam epitaxy. Films with broad range of crystalline qualities were characterized and the results were interpreted based upon their microstructure observed by the transmission electron microscopy (TEM).
It was observed that Raman spectra of high quality SiC films grown on Si consist of strong and sharp LO peak at 970 nm along with relatively weak TO peak at 795 nm. As the density of the crystalline defects increases, the LO peak became weak and broad whereas intensity of the TO peak became higher. In the cases of poly-like crystals, LO peaks almost disappeared and weak TO peaks were observed.
In the case of SiC films thinner than about 1m, even the highest quality films did not show sharp peaks. mainly due to the lattice-mismatch related strains residual within the film. Further details of the Raman scattering-microstructure relationship will be discussed during the presentation.
RESIDUAL OXYGEN DETERMINATION IN SILICON EPILAYER, COMPARISON WITH FTIR MEASURMENTS. F. Degas, G.Blondiaux, CNRS CERI, Orleans, FRANCE; B. Pichaud Laboratoire MATOP, CNRS URA, Universite Aix Marseille III, Faculte des Sciences, Marseille, FRANCE.
For power devices the use of silicon epilayer on CZ substrate is a solution to make devices with a low oxygen concentration in the active zone. Oxygen is probably one of the most important residual impurity in silicon samples usualy the determination of the interstitial oxygen is done by Fourier Transform Infra Red spectroscopy (FTIR). In this work we have achieved the oxygen determination by Charged Particle Activation Analysis (CPAA). The main difference between these two techniques is that CPAA dose the total oxygen concentration We have determined the oxygen in 200m thick silicon epilayer and studied its behavior during thermal treatments. Oxygen concentration is found in the range of 1015/cm3 just after the epitaxial process. After thermal treatment the concentration in the epilayer raise up to several 1016/cm3 to 1017/cm3, depending of the treatment. A comparison with FTIR experiment is done and the amount of oxygen precipitate is determined.
MICROPIPE OVERGROWTH AND DISLOCATION DENSITY REDUCTION IN COMMERCIAL 6H-SiC AND 4H-SiC WAFERS. S.V. Rendakova and V.A. Dmitriev, PhysTech WBG Research Group, Ioffe Institute, St. Petersburg, RUSSIA.
Silicon carbide (SiC) has been considered as a premier material for high power electronics for a long time. It has been experimentally shown that (1) SiC-based devices can operate at much higher forward current density than that for Si devices and (2) electric breakdown field in SiC exceeds 2 MV/cm. Among material issues currently limiting the development of SiC devices for high power applications critical one is a high defect density in commercial SiC substrates. Usually, micropipe and dislocation density is being in the range from 30 to 200 cm-2 and from 103 to 104 cm-2, respectively. In this study, sufficient reduction in the defect density in SiC substrates has been achieved by epitaxial overgrowth yielding the micropipe density in the range from 0 to 5 cm-2 and dislocation density .from 102 to 103 cm-3 in the resulting SiC material. These results were obtained by the development of a novel liquid phase epitaxial technique. The key point of the novel LPE process was the fast SiC growth inside micropipe channels. At the same time, the normal growth rate was kept as low as 0.05 m/hr. As a result, micropipe closing and dislocation density reduction were succeeded while maintaining a relatively smooth surface. The stable effect was observed for C- and Si-faced commercial 6H- and 4H-SiC wafers (30 mm and 35 mm in diameter) having tilt angles in the range from 0 to 8 deg. The fact of the defect density reduction in SiC wafers was proved experimentally by chemical etching, optical and electron microscopy observations, and x-ray topography. The resulted structures can be used as SiC substrates for a subsequent device fabrication.
IN-SITU MONITORING OF ETCH BY-PRODUCTS DURING PLASMA ETCHING OF GaAs IN CHLORINE CHEMISTRIES. J. W. Lee, S. J. Pearton, and C. R. Abernathy, University of Florida, Gainesville, FL; G. A. Vawter, R. J. Shul, M. M. Bridges, and C. L. Willison, Sandia National Laboratories, Albuquerque, NM.
Minimizing the preferential loss of the group-V species has been a challenge in etching of III-V compound semiconductors. Evaporation enthalpies of the group-III etch products are typically higher than the group-Vís, which may cause preferential etching and result in non-stoichiometric surfaces. This may significantly affect device performance. In this paper, we will report in-situ monitoring of etch products of GaAs in a reactive ion beam etch (RIBE) system. The arsenic chloride peaks were the most noticeable peaks observed in this study. Mass spectrometric results will be reported for chlorine/argon discharges as a function of chlorine concentration, beam current, beam voltage, and chuck temperature. Mass spectrometry data will also be compared to etch rates, surface roughness, and near-surface stoichiometry. This work was performed at Sandia National Laboratories supported by the U.S. Department of Energy under contract DE-AC04-94AL85000. Sandia is a multiprogram laboratory operated by Sandia Corporation, a Lockheed Martin Company, for the United States Department of Energy.
UNDERSTANDING THE ROLE OF DEFECTS IN LIMITING THE MINORITY CARRIER LIFETIME IN SiC. William A. Doolittle, Ajeet Rohatgi, Georgia Institute of Technology, School of Electrical and Computer Engineering, Atlanta, GA; Richard Arhenkial and Dean Levi, National Renewable Energy Laboratory, Boulder CO; Godfrey Augustine, Richard Hopkins, Northrup Grummond, Pittsburgh, PA.
Deep level Transient Spectrosopy (DLTS), Electron Beam Induced Current (EBIC), Time-Resolved Photoluminescence TR-PL, and contactless Photoconductive Decay (PCD) were used to characterize both bulk substrates and epitaxially grown Silicon Carbide substrates. Traps as deep as 0.93 eV were observed via DLTS. These traps may play a role in the persistent photoconductivity effect. EBIC reveals the electrical activity of triangular defects. Interestingly, though some of these defects respond electrically as 3C-SiC inclusions would, others do not. Not all defects observable in the EBIC system are observable in the topographic SEM image possibly indicating a new, yet unobserved defect. Diffusion length maps of SiC indicate a wide variation in diffusion length. Other defects that were electrically imaged include micro-pipes, dislocations/step edge decoration, surface polish damage, and bulk defects. TR-PL and PCD indicate sub-nanosecond to microsecond variations in lifetime. Lifetime verses injection level variations are observed. Correlations and differences between the different techniques is explained. The effectiveness of processes to improve the lifetime in SiC were also examined.
OPTICAL CHARACTERIZATION OF SILICON OXYCARBIDE THIN FILMS. D.M. Wolfe, F. Wang, B.J. Hinds and G. Lucovsky, Engineering Research Center for Advanced Electronic Materials Processing, North Carolina State University, Raleigh, NC.
The oxidation process of single crystal SiC wafers continues to receive considerable interest for gate oxide applications in high-power MOSFET devices. With reported room temperature electron surface mobility values being an order of magnitude lower than those measured in the bulk (1), the question remains as to the mechanism responsible for these low values. Incomplete out-diffusion of carbon containing species through the growing oxide may lead to localized non-stoichiometric regions or bonding environments which may scatter or trap electrons. Results based on X-ray photoelectron studies (2) have shown that a thin silicon oxycarbide layer may be present at the SiC/SiO2 interface. As such, there is a need for a fundamental understanding of the bonding environment in the oxide. In this study, silicon oxycarbide thin films of different composition were deposited by low-temperature (<250 C), plasma enhanced CVD and subjected to rapid thermal annealing at temperatures between 800-1000 C. The optical techniques of Fourier transform infrared, photoluminescence (PL), and absorption spectroscopies were used for identifying the bonding environment in the thin films. In particular, we found evidence for Si-H, Si-O, and Si-C bonds in the as-deposited films. For annealed films, the overall amount of hydrogen decreased, however C-H and C-O bond formation was detected, depending on the time and temperature used.
HETEROEPITAXY AND HIGH DENSITY NUCLEATION OF DIAMOND ON MIRROR-POLISHED SILICON. Zhangda Lin, State Key Laboratory of Surface Physics, Institute of Physics, Chinese Academy of Sciences, Beijing, CHINA; Xiaosong Sun, Ge Yu, and S.T. Lee, Department of Physics and Materials Science, City University of Hong Kong, Kowloon, HONG KONG.
By virtue of its excellent electronic properties, diamond may become an important material for high temperature, high speed, high power and high compact electronic devices. However, most of these devices, single crystal or epitaxial films are required. Thus, for obvious reason, large-area heteroepitaxial diamond films are desired. Silicon is the most important material served as a substrate for diamond heteroepitaxy. However, diamond can hardly be grown on mirror-polished Si, with nucleation density being only about 104 cm-2. Although scratching Si substrate could enhance greatly the nucleation density, it destroyed seriously the periodic structure of the Si surface. Thus diamond film grown on such a substrate will be randomly oriented polycrystallites. In order to overcome this difficulty, several methods have been developed, including (1) bias enhanced nucleation; (2) electron emission enhanced nucleation; (3) nucleation enhanced by slight surface modification(H, Si, and hydrocarbon ion bombardment, respectively); and (4) very low pressure nucleation (0.1 Torr). We will introduce the second, third, and fourth methods, which were developed in our laboratory recently. Special attention will be paid to the relation between heteroepitaxy and high density nucleation The incubation time for diamond nucleation is a critical parameter for high density nucleation and heteroepitaxy. If the incubation takes a long time, due to the exposure to the low vacuum atmosphere, the surface of Si substrate would be changed seriously; thus it is important to control the incubation process. Methods for shortening the incubation time will be discussed in this paper.
ACHIEVEMENT OF COALESCED ORIENTED DIAMOND FILMS ON NICKEL BY OPTICAL PROCESS CONTROL AND METHANE ENRICHMENT. P.C. Yang, C.A. Wolden, W. Liu, R. Schlesser, R.F. Davis, J.T. Prater*, and Z. Sitar, Department of Materials Science and Engineering, North Carolina State University, Raleigh, NC; *Army Research Office, RTP, NC.
Although heteroepitaxial nucleation of diamond on nickel has been achieved, its practical application has been limited by difficulties in reproducibility and uniformity. Real time in-situ laser reflectometry was used to investigate changes in surface morphology observed during the nucleation of oriented diamond on Ni in a hot filament chemical vapor deposition reactor. Characteristic features of the reflected and scattered light intensity were interpreted by comparison with scanning electron micrographs of the diamond seeded substrates quenched at sequential stages of the process. Based on this analysis, a process was developed in which the scattered light signal was used as a steering parameter. Using this process, oriented nucleation and growth of diamond on Ni was repeatedly achieved. Auger depth profile analysis showed that carbon diffusion into nickel was very fast during our multi-step process used to produce oriented diamond nuclei. To counter the loss of carbon atoms and to improve the uniformity, different concentrations of methane were added during the high temperature annealing stage. Methane addition proved to be very effective in improving both the uniformity and density of highly oriented diamond nuclei. It was found that 0.5% methane in the gas phase produced the optimum results. Substrates nucleated at these conditions were grown out into coalesced, 30 m thick films. Both, (100) and (111) oriented films showed a high degree of orientation. Raman spectra obtained from each orientation showed an intense and narrow diamond signature peak with FWHM of S and 8 cm-1, respectively.
A STUDY ON THE IMPROVEMENT OF ON-STATE CHARACTERISTICS OF A HIGH SPEED THYRISTOR USING OPEN-TUBE Ga DIFFUSION. Wen Ruimei and Liang Hong, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, CHINA.
In the processing of silicon power devices Ga and Al, which are easily diffused into silicon wafers, are the common dopant atoms. However, diffusion is difficult to control and can lead to poor quality devices when using close tube Ga or Al diffusion. As an alternative to conventional diffusion, Choshtagoyc have successfully developed an open-tube Ga diffusion using a tube furnace with double equilibrium temperature zones where the dopant source was powder Ga203 and the transport gas was CO. It is noted, however that a furnace with double equilibrium temperature zones and CO gas would increase the cost of the manufacture of the thyristors. In this paper we report a simple technique to manufacture the thyristors using open-tube Ga diffusion in a conventional diffusion furnace with a single equilibrium temperate zone and using hydrogen as the reaction and transport gas. The results from this study demonstrate that an ideal concentration depth distribution of impurities in the p-type region of a thyristor can be achieved using open-tube Ga diffusion into a SiO2/Si structure. The advantages of open-tube Ga diffusion are as follows; (i) it is easier to operate and easier to control the profile of the Ga concentration during processing, (ii) a clean surface, which is free from alloy spots can be obtained, (iii) this technique ensures a high ratio of the concentration at the interface of the p-n junction, therefore, increasing the small signal current gain 2 of the nbPbne transistor and lowing the on-state voltage. The on-state characteristic of the thyristor was obviously improved.
THEORETICAL MODEL AND COMPUTER SIMULATION RESULTS OF ENHANCED DIFFUSION OF HIGH-TEMPERATURE IMPLANTED ALUMINUM IN SILICON CARBIDE. Grigorii V. Gadiyak, Institute of Computational Technologies, Russian Academy of Sciences, Siberian Division, Novosibirsk, RUSSIA; and A.V. Suvorov, Cree Research Inc., Durham, NC.
Wide application of SiC films in microelectronics devices makes especially important predictions of the doping profiles during and/or after thermal treatment. A macroscopic kinetic model of enhanced diffusion of aluminum in SiC films during ion bombardment at high temperature has been considered. The set of equations describing the kinetic model takes into account generation Si- and C- dangling bonds during bombardment, breaking of Si- bonds, formation of C-Al and Si-Al bonds, formation of mobile Si and C atoms, diffusion of the mobile species (Aluminum, Carbon, and Silicon) to the surface their reactions with Si- and C- dangling bonds as well as their evolution from the film.
8:30 AM E5.1
SINGLE CRYSTAL SILICON CARBIDE ON SILICON USING A SUPERSONIC GAS JET OF METHYLSILANE. Scott A. Ustin, C. Long, L. Lauhon and W. Ho, Laboratory of Atomic and Solid State Physics and Materials Science Center, Cornell University, Ithaca, NY.
Cubic SiC films have been grown on Si(001) and Si(111) substrates at temperatures between 600C and C with a single supersonic molecular beam source. Methylsilane (H3SiCH3) was used as the sole precursor with hydrogen and nitrogen as seeding gases. Optical reflectance was used to monitor in situ growth rate and macroscopic roughness. The growth rate of SiC was found to depend strongly on substrate orientation, methylsilane kinetic energy, and growth temperature. Growth rates were 1.5 to 2 times greater on Si(111) than on Si(001). The maximum growth rates achieved were 0.63m/hr on Si(111) and 0.375m/hr on Si(001). Transmission electron diffraction (TED) and x-ray diffraction (XRD) were used for structural characterization. In-plane azimuthal (-) scans show that films on Si(001) have the correct 4-fold symmetry and that films on Si(111) have a 6-fold symmetry. The 6-fold symmetry indicates that stacking has occurred in two different sequences and double positioning boundaries have been formed. Minimum rocking curve width for SiC on Si(001) and Si(111) is 1.2. Rutherford back scattering (RBS) and Fourier Transform Infrared (FTIR) absorption were performed to determine the chemical composition and stoichiometry. Cross Sectional Transmission Electron Microscopy (XTEM) was used to image the SiC/Si interface.
8:45 AM E5.2
BULK SILICON CARBIDE GROWTH BY A MODIFIED VAPOR TRANSPORT TECHNIQUE. Igor Khlebnikov, Vipin Madangarli, and Tangali Sudarshan, Department of Electrical and Computer Engineering, University of South Carolina, Columbia, SC.
One of the main drawbacks of the modified Lely technique used to grow bulk SiC crystals is that, it uses an ensemble system of source and seed for the growth process. Due to this it is not possible to have a strict control over the vapor flow and temperature gradient during the growth process; and also it is not possible to have independent heating of the source and seed. Hence it is not possible to suddenly stop the vapor transport without changing the temperature and pressure close to the crystallization (seed) surface.
A modified vapor transport technique, which permits a controlled transport of vapor to the crystallization surface, has been implemented. This involves an independent construction of source and seed regions, which permits us to have independent temperature control over the sublimation and crystallization processes. Also, the special furnace construction makes it possible to start or stop the crystallization process independent of the source and seed temperatures. Preliminary experiments performed using this furnace indicate that it is possible to grow high quality SiC boules of predetermined diameter (that can be varied) at growth rates > 2 mm /hr. Using this furnace construction it is also possible to perform etching of the seed (by reversal of temperature gradient) before the growth to obtain better quality crystals. The structural quality of the small diameter ( 10 mm) crystals grown so far appears to be excellent, with no micropipes present. Studies to determine the polytype of the crystal and other properties are presently being conducted.
9:00 AM *E5.3
BREAKDOWN DEGRADATION ASSOCIATED WITH ELEMENTARY SCREW DISLOCATIONS IN 4H-SiC P+N JUNCTION RECTIFIERS. Philip G. Neudeck, NASA Lewis Research Center, Cleveland, OH; Wei Huang, Michael Dudley, State University of New York at Stony Brook, NY.
It is well-known that SiC wafer quality deficiencies are delaying the realization of outstandingly superior 4H-SiC power electronics. While efforts to date have centered on eradicating micropipes (i.e., hollow core super-screw dislocations with Burgers vector 2c), 4H-SiC wafers and epilayers also contain elementary screw dislocations (i.e., Burgers vector = 1c with no hollow core) in densities on the order of thousands per cm2, nearly 100-fold micropipe densities. This paper describes an initial study into the impact of elementary screw dislocations on the reverse-bias current-voltage (I-V) characteristics of 4H-SiC p+n diodes. First, Synchrotron White Beam X-ray Topography (SWBXT) was employed to map the exact locations of elementary screw dislocations within small-area 4H-SiC p+n mesa diodes. Then the high-field reverse leakage and breakdown properties of these diodes were subsequently characterized on a probing station outfitted with dark box and video camera. Most devices without screw dislocations exhibited excellent characteristics, with no detectable leakage current prior to breakdown, a sharp breakdown I-V knee, and no visible concentration of breakdown current. In contrast devices that contained at least one elementary screw dislocation exhibited a 5 to 35 reduction in breakdown voltage, a softer breakdown I-V knee, and visible microplasmas in which highly localized breakdown current was concentrated. The locations of observed breakdown microplasmas corresponded exactly to the locations of elementary screw dislocations identified by SWBXT mapping. While not as detrimental to SiC device performance as micropipes, the undesirable breakdown characteristics of elementary screw dislocations could nevertheless adversely affect the performance and reliability of 4H-SiC power devices.
9:30 AM E5.4
DEFECTS ORIGIN IN SUBLIMATION GROWTH SiC SINGLE CRYSTAL BOULES. Roland Madar, Micha Anikin, Karim Chourou, LMGP, ENSPG, St. Martin d'Heres, FRANCE; Elizabeth Blanquet, Michel Pons, Claude Bernard, LTPCM, ENSEEG, St. Martin d'Heres, FRANCE; Sylvia Milita, Jose Baruchel, ESRF, Grenoble, FRANCE.
A perfect understanding of the origin of defects in connection with crystal growth conditions is of prime importance for the future of SiC based electronic. In the generally used modified LeLy method, the growth rate is determined by the growth temperature, temperature gradient, distance between the source and seed, pressure inside the crucible and purify and grain size of the SiC powder while the shape of the boule is mainly function of the radial thermal gradient. The defects in these single crystal boules come from two critical steps of the process: the nucleation on the seed and the enlargement of the growing crystal at the expense of adjacent polycrystalline ilots. The influence of the experimental conditions during both steps on the nature and density of defects has been studied using X-Ray diffraction, optical and electronic microscopy and synchrotron white beam X-Ray topography. The as obtained results allowed us to define a set of experimental conditions leading to a substantial reduction of defects, micropipes and macrodefects. density for both 4H and 6H-SiC.
9:45 AM E5.5
10:30 AM E5.6
THE STRUCTURAL EVOLUTION OF ACHESON AND LELY SEEDS DURING THE INITIAL STAGES OF PHYSICAL VAPOR TRANSPORT SiC GROWTH. Volker D. Heydemann, Gregory S. Rohrer, Marek Skowronski, Carnegie Mellon University, Department of Materials Science and Engineering, Pittsburgh, PA.
The physical vapor transport growth (PVT) of SiC is frequently seeded using crystals grown either by the Lely or the Acheson methods. The growth surfaces of crystals synthesized by the Acheson and Lely methods were exceed using optical and atomic force microscopy (AFM) so that the distribution of steps and defects could be determined. The characterized seeds were heat treated in a conventional physical vapor transport reactor. The reactor consists of a graphite crucible within an induction heated graphite susceptor. The crucible and susceptor are surrounded by insulation and contained in a water-cooled quartz vessel. The seed was fixed to the lid of the crucible; the temperature on the outside of the crucible lid was determined by a pyrometer. One set of seeds was treated in the furnace without a charge at temperatures between 1500C and 2400C in either 700 torr of Ar (a typical furnace heat-up pressure) or 50 torr of Ar (typical of growth conditions). A second set were treated in a charged crucible. Based on our before and after observations, we will discuss the conditions under which the surface is etched, due conditions under which it decomposes due to Si loss, and the conditions under which SiC is initially transported from the charge to the seed and growth begins.
10:45 AM E5.7
VARIATION OF OPTIMAL CONDITIONS FOR CVD GROWTH OF SiC ON SIMOX AND Si. P.C. Colter, F. Namavar, E. Gragnon, C.A. Jollimore, Spire Corporation, Bedford, MA.
This paper addresses the conditions required for epitaxial growth of 3C SiC on Separation by IMplantation of OXygen (SIMOX) or Si substrates. We have grown SiC by carbonization and CVD at temperatures from 1300 to 1350 C in an RF-heated vertical reactor near atmospheric pressure. Our results, as observed by Rutherford backscattering spectroscopy and x-ray rocking-curve analysis, clearly indicate that restrictive conditions are required during baking and carbonization in order to avoid affecting the integrity of the SIMOX structures. Under nonoptimized baking or carbonization conditions, the SOI structure is destroyed and the Si top layer peels off. In this work, we have carried out a systematic study of SiC growth by varying the time and propane flow rate during baking and carbonization, and have found optimal growth conditions for growth of good crystal quality SiC on SIMOX while maintaining SIMOX integrity. We have demonstrated improvement of the crystal quality of SiC on SIMOX structures by about 50% (rocking-curve FWHM 600 arcsec for 2 m SiC film).
11:00 AM E5.8
BULK GROWTH OF SIC CRYSTALS: ANALYSIS ON GROWTH RATE AND CRYSTAL QUALITY. Robert Eckstein, Erwin Schmitt, SiCrystal AG, Eschenfelden, GERMANY; Dieter Hofmann, Martin Kolbl, Matthias Muller, Stefan G. Muller, Arnd-D. Weber, Albrecht Winnacker, Materials Science Institute, University of Erlangen-Nurnberg, Erlangen, GERMANY; Gerhard Pens, Applied Physics Institute, University of Erlangen-Nurnberg, Erlangen, GERMANY.
The prerequisites for a commercial SiC electronic device production are large diameter SiC substrate wafers with a low defect density and price. As there is bound to be a trade off between growth rate and crystal quality each kind of process optimization has to take into account this aspect.
In this paper results of experimental analysis and modelling of the SiC bulk growth process by the sublimation technique will be presented. The simulation approach includes heat and mass transport. As input parameter in both cases growth temperature, temperature gradient, system pressure and source to seed distance have been varied. Growth rates and their change during the process have been determined experimentally. The comparison between experimental and calculated results showed a good agreement. Based on this experimental verification process parameters have been evaluated which should lead to both acceptable growth rates and favorable growth conditions e.g. low temperature gradients in the growing crystal for stress reduction. The quality of the crystals grown under different experimental conditions have been determined by KOH etching (micropipe and etchpit density), stress birefringency and Hall/C(U)-measurement (homogeneity of dopant incorporation). The comparison of the growth rates and study of defect densities allows to define a parameter space in which economic SiC crystal growth as well as good crystalline quality can be achieved. Besides the optimization of the SiC sublimation growth process we are presently investigating also other growth techniques e.g. the potential of SiC liquid phase growth for the preparation of bulk material and thick epitaxial layers. Results on SiC growth from the liquid are finally presented and a novel reactor which allows SiC materials processing at high temperatures C and pressures bar is introduced.
11:15 AM E5.9
MORPHOLOGY OF SILICON OXIDES ON SILICON CARBIDE. M. L. O'Brien, North Carolina State Univ, Dept of Physics, Raleigh, NC; S. Pejdo, North Carolina State Univ, Dept of Electrical Engineering, Raleigh, NC; R. J. Nemanich, North Carolina State Univ, Dept of Physics, Raleigh, NC.
The development of high power devices based on silicon carbide requires a more complete understanding of the oxide formation process and interface characteristics. By using an integrated UHV system, samples were cleaned and oxides deposited in situ. The approach of the oxide formation process was to form the initial insulator, a few angstroms thick, and then deposit an oxide. Various deposition techniques are used in the oxide growth process. Both thermal and plasma enhanced chemical vapor deposition were employed with two different precursors (oxygen or nitrous oxide and silane). This study focuses on the morphology of the different deposition processes using AFM as a metric. Examination of the morphology of the initial insulator growth process and the oxide deposition process gives insight into the growth characteristics of the silicon dioxide. The RMS values of the initial insulator formation and the control wafers are 0.54 and 0.55 nm respectively. Meanwhile, the RMS values for PECVD (200-400 C) and thermal CVD (400-600 C for oxygen-silane and 800-1000 C for nitrous oxide-silane) range from 0.48 to 0.63 nm. Although, there is little change in the RMS values between the different oxide formation processes, large-scale features were detected in the PECVD and the lower temperature CVD processes. The relationship of electronic properties and morphology will be discussed.
11:30 AM E5.10
OF SiC-SiO2 INTERFACES BY PLASMA-ASSITED OXIDATION: INITIAL STAGES OF OXIDATION OF C AND Si FACES OF FLAT AND VICINAL 6H SiC(0001). G. Lucovsky, H. Niimi, North Carolina State Univ, Depts of Physics and Materials Science and Engineering, Raleigh, NC.
A low thermal budget process consisting of: i) low-temperature (300 /cirC) plasma-assisted (a) oxidation and (b) film deposition; and ii) rapid thermal annealing (30 s at 900 3.5 degrees in the 1120 direction. The initial stages of oxidation have been monitored by on-line Auger electron spectroscopy (AES) for oxide thickness up to 2 nm. The initial oxidation of SiC(0001), and also Si(111) and Si(100) are characterized by a power law relationship: t_ox= At^b, where t_oxis the oxide thickness, t is the time, and A and b are empirical constants. Values of b are less than 1 for both Si and SiC oxidations, indicating that the rate of oxidation falls off rapidly with increasing time. Results for SiC are compared with Si(111) off cut in the 112direction. For plasma-assisted oxidations using O_2/He: i) values of b are larger (0.4) for SiC compared to Si (_2O/He, and ii) oxidation in O_2/He followed by nitridation using N_2/He.
11:45 AM E5.11
EPITAXIAL GROWTH OF HIGH QUALITY SiC BY SUBLIMATION CLOSE SPACE TECHNIQUE. Shigehiro Nishino, Tetsuya Yoshida, Yuki Nishio, Dept of Electronics and Information Science, Faculty of Engineering and Design, Kyoto Institute of Technology, Matsugasaki, Sakyo-ku, Kyoto, JAPAN.
Semiconducting SiC is expected for power devices high breakdown voltage of the device is required. Growth rate of epilayer by conventional about 3u/h. To make a thick epilayer, more than 10 hours are needed. To minimize the growth time, we propose sublimation epitaxial method by close space technique (CST). In the conventional sublimation method, each layers are epitaxially grown and subsequently bulk crystal is made. In this CST, source and substrate is closely spaced and source material is sublimed and transferred to the substrate in argon atmosphere of about 200 Torr. Substrate size was 5 mm x 5 mm and hole in the spacer was 4 mm in diameter. Epitaxial layer was grown at substrate temperature around 2100 C. Temperature difference between the substrate and source was about 2C. Higher growth rate of 100 u/h was obtained. Surface morphology strongly depended on the off angle of the substrate. Epilayer with large steps was observed on the on-axis substrate, however, smooth surface was obtained on 3.5 degree off-axis substrate. Purity of the substrate reflected to the epilayer. Nitrogen-bound exciton was observed by PL measurement at 2 K in the epilayer when 3C-SiC plate with high purity was employed as the source material. Crystallinity of the epilayer was characterised by X-ray diffraction and Raman sepctroscopy. Electrical properties is also presented.
SESSION E6: DIELECTRICS, PROCESSING
Chairs: Mikael Ostling and Rajiv K. Singh
Wednesday Afternoon, December 3, 1997
1:30 PM E6.1
GROWTH OF AlN ON GaN FOR FABRICATION OF HETEROSTRUCTURE INSULATED GATE FIELD EFFECT TRANSISTORS. J.D. MacKenzie, F. Ren*, J. Lothian*, C.R. Abernathy, S.J. Pearton, R. Karlicek+, Dept. of Mat. Sci. and Eng., University of Florida, Gainesville, FL; *Bell Laboratories, Lucent Technologies, Murray Hill, NJ; +EMCORE Corp., Somerville, NJ.
It has been shown that the GaN surface can easily be made highly conductive during standard device processing, presumably due to loss of nitrogen from the surface. This surface conduction results in premature breakdown of GaN field effect transistors (FETs) and thus severely limits the power regime in which the devices can be operated. While high temperature annealing can be used to restore the surface and reduce the conductivity, the high temperatures required are not compatible with device fabrication. In an alternative approach, we have used AlN as a protective insulator to form heterostructure insulated gate field effect transistors (HIGFETs). Deposition of AlN by Metalorganic Molecular Beam Epitaxy (MOMBE) on an MOCVD grown n-GaN FET structure either prior to processing or after mesa formation results in substantial improvement in the breakdown characteristics. This paper will describe the optimization of the growth parameters and structure. The correlation between AlN gate thickness and breakdown characteristics will be presented as will the effect of growth temperature. Finally, the effect of V/III ratio and growth temperature on growth habit will also be discussed.
1:45 PM E6.2
HIGH FREQUENCY CAPACITANCE MEASUREMENTS ON MIS STRUCTURES IN NON-THERMAL EQUILIBRIUM CONDITION. M. Sadeghi, A. Jauhiainen, B. Liss, E. Sveinbjörnsson, O. Engström, Dept of Solid State Electronics, Chalmers University of Technology, Göteborg, SWEDEN.
We present a model for charge carrier traffic between the energy bands and the interface states in structures like Al/SiO2/6H-SiC, Al/diamond/Si and Al/SIPOS/Si. Such materials have great potential for use in high power semiconductor devices. The structures have in common that traditional electrical measurement techniques performed at room temperature, for instance high frequency capacitance-voltage measurements, are prone to non-thermal equilibrium effects. This is for instance due to the large band gap of the semiconductor in the first case or due to slow interface traps in the latter cases. A correct interpretation of experimental data is not a trivial task and demands therefore a complex modelling study. We find that the occupation of interface traps at different positions in energy can be quite different than the equilibrium occupation, given by the position of the fermi level at the interface. When the surface potential is changed, deep lying (slow) interface states may be virtually frozen in while shallow (fast) ones respond normally. Consequently, the traps are either in thermal or non-thermal equilibrium. The transition between these two cases depends on the rate of variation of the surface potential, the free energy position of the traps and their majority carrier capture cross section. A clear distinction between the two cases is necessary if experimental data are to be related to interface parameters. High-frequency capacitance measurements on the three types of structures mentioned above are compared to numerical simulations based on the non-equilibrium model. We find that traditional models not including non-equilibrium effects are insufficient to model the data; a full non-equilibrium model has to be used in order to obtain reasonable agreement between measurements and simulations.
2:00 PM E6.3
HIGH TEMPERATURE CHARACTERIZATION OF Ni, W AND Al CONTACTS TO 3C-SILICON CARBIDE THIN FILMS. Chacko Jacob and Pirouz Pirouz, Dept of Materials Science and Engineering; Hung-I Kuo and Mehran Mehregany, Dept of Electrical Eng. and Applied Physics, Case Western Reserve University, Cleveland OH.
With the current availability of large-area 3C-SiC films, it is imperative that stable high temperature ohmic and Schottky contacts be developed for high temperature power devices. Currently, most of the work has focused on 6H-SiC but there remain a number of unresolved issues with regard to 3C-SiC metallization. By comparing the data in the literature for 6H- and 3C-SiC, we have demonstrated that the behavior of metallic contacts to SiC depends on the polytype. This can be seen in the difference in the values for the interface slope parameter, S, which is a measure of the Fermi-level pinning in each system and is 0.40-0.48 on 6H-SiC while it is 0.59 on 3C-SiC. A comparison of the density of interfacial states shows that it is about an order of magnitude higher for 6H-SiC and this is consistent with the higher level of pinning. We have studied sputtered Ni, W and Al contacts (for comparative purposes) on n-type single crystal 3C-SiC films grown by chemical vapor deposition on silicon substrates. Interfacial studies have been performed by Rutherford Back Scattering (RBS) and glancing angle x-ray diffraction (XRD), both before and after annealing. Electrical measurements at temperatures up to 500 oC in an inert atmosphere were done in order to evaluate the contact resistance and ohmic behavior of these contacts at the expected operational temperatures. While it has been reported that as-deposited Ni contacts form Schottky contacts, the data is unclear about this. Thus, our measurements indicate that at room-temperature, as deposited nickel contacts are ohmic, rather than Schottky. Tungsten contacts have a higher contact resistivity but may be more stable to higher temperatures. Finally, at room temperature, aluminum contacts are ohmic. Further results in each of these systems will be presented along with possible correlation of properties to the interfacial chemistry.
2:15 PM E6.4
Cl2-BASED DRY ETCHING OF THE AlGaInN SYSTEM IN INDUCTIVELY COUPLED PLASMAS. Hyun Cho, C.B. Vartuli, C.R. Abernathy, S.M. Donovan and S.J. Pearton, Department of Materials Science and Engineering, University of Florida, Gainesville, FL; R.J. Shul and J. Han, Sandia National Laboratories, Albuquerque, NM.
Cl2 discharges with additives of Ar, N2 or H2 were used to etch GaN, InGaN, AlGaN, InN and AIN in an HDP-ICP system. Etch rates peaked around 33% Ar and 66% N2 or H2 by flow due to a trade-of between ion-assisted desorption of etch products and the density of active chlorine neutrals. Etch rate decreased with process pressure beyond 2mTorr due to a reduction in cathode self-bias(ion energy), peaked at 100150 W of chuck power, and increased with ICP source power. The etched features were highly anisotropic under all condition , consistent with an ion-driven etch mechanism. The nature of the additive gas had a strong effect on selectivity for etching one nitride over another.
2:30 PM *E6.5
INTRODUCTION OF IONS INTO WIDE BAND GAP SEMICONDUCTORS. H. Paul Maruska, Mike Lioubtchenko, Implant Sciences Corporation, Wakefield, MA; Bela Molnar, Naval Research Laboratory, Washington, DC; Marek Osinski, Piotr Perlin, University of New Mexico, Albuquerque, NM; Stephen J. Pearton, University of Florida, Gainesville, FL.
Introduction of dopant species by implantation into the mainstream semiconductors such as Si and GaAs is a common industrial practice. Recently, it has been recognized that although the desired end results may be similar, wide band gap materials will require the development of specialized implantation technologies. We shall discuss advances that have been made in applying ion implantation for the modification of the properties of the emerging wide band gap materials, particularly SiC and GaN. Previous efforts shall be reviewed. Details of our current procedures for doping SiC devices shall be presented. Our present work in defining conditions for doping GaN both n- and p-type will be discussed. Because dopant activation is a critical issue, advances that we are making in developing annealing techniques which preserve the nitride surface will be considered. Implications for the preparation of high power electronic devices in these materials which feature planar structures and low contact resistances will be addressed.
3:30 PM *E6.6
EMERGING POWER SIMICONDUCTOR DEVICE TECHNOLOGIES ON SILICON AND WIDE BANDGAP MATERIALS. Krishna Shenai, System on Silicon Research Center(SYSREC), Electrical Engineering and Computer Science Department, The University of Illinois at Chicago, Chicago, IL.
This paper will provide a comprehensive review of the current status of and emerging power semiconductor device technologies on silicon as well as wide bandgap materials such as SiC and III-Nitrides. In silicon, attempts to commercialize MOS-controlled thyristors at best have been futile dun to fundamental material, structural and physical limitations. Hence, IGBT's and related device technologies on f1oatzone substrates are expected to dominate in the next decade. The progress in developing high-power devices on SiC have been slow, largely due to material and processing problems. This paper will provide new insights into the potential of III-Nitride materials in developing next generation of high-power switching devices. For the first time, a novel concept of heteroepitaxial bandgap engineering based on thermal and electrical properties will be introduced that appears to hold significant promise in the future.
4:00 PM *E6.7
ETCHING OF VIA CONNECTIONS FOR POWER HIGH FREQUENCY GaAs DEVICES UTILIZING INDUCTIVELY COUPLED PLASMA SOURCES-PLASMA PARAMETERS AND MANUFACTURING RESULTS. C. Constantine, D.J. Johnson, R. Westerman, Plasma-Therm Inc.; C. Barratt, RF Micro Devices, Inc.; E. Ahlers, TRW Inc.
As the Telecommunications industry expands, Commercial GaAs based devices continue to shrink in size and increase in speed. Another law of this expansion is the inevitable march towards more efficient manufacturability of these devices in light of the dramatic increase in GaAs wafer size to 4" and even 6" diameters. The use of advanced single wafer plasma process equipment begins to yield significant manufacturing gains of repeatability, throughput and damage control over batch processing when high density plasmas are employed. The use of advanced, single wafer GaAs backside via etch equipment is the first of such processes to be used within an environment of high production, high frequency HBT device manufacture. We study the effects of plasma power, RF Bias and gas chemistry on overall via etch rates. The aspect ratio dependence of these processes are documented, along with recommendations on mask selection. Metallization procedures and via profile slope are studied in conjunction with device resistance measurements. Comparisons of devices produced utilizing batch low density plasma etch processes with high density plasma Inductively Coupled Plasma equipment are included.
4:30 PM *E6.8
A NOVEL TECHNIQUE FOR THE RTP ANNEALING OF COMPOUND SEMICONDUCTORS. M. Fu, V. Sarvepalli, MHI Inc., Cincinnati, OH; R. K. Singh, C. Abernathy, S.J. Pearton, University of Florida; and J. A. Sekhar, MHI Inc.
The ion implantation of GaN and SiC type materials can be expected to significantly reduce power losses by reducing the device access resistance. Recent studies have shown that RTP processing for annealing at temperatures higher than 1400C is the preferred processing technique for ion implanted compound semiconductors. A novel device is described in this article for the RTP processing of materials at such high temperatures. The device allows for the required short time uniform heating up to 1700C. Temperature profiles and implant damage profiles obtained by processing GaN with the unit will be described and discussed.
SESSION E7: IGBTs AND FETs
Chairs: Charles E. Weitzel and John C. Zolper
Thursday Morning, December 4, 1997
8:30 AM E7.1
OPTIMIZATION OF TECHNOLOGY AND DESIGN PARAMETERS OF IGBT USING TWB. Bahram Fatemizadeh, Yuri Granik, Technology Modeling Associates, Inc., Sunnyvale, CA.
This paper presents a methodology to optimize the design of different types of IGBT using TWB (TMA WorkBench). TWB is a TCAD (Technology Computer-Aided Design) system for virtual IC manufacturing, which allows integrating TCAD tools in one simulation environment, so various aspects of wafer manufacturing can be simulated. Complexities of the modern power devices such as IGBT require variation of a large number of design and process parameters to optimize. Using RSM (Response Surface Modeling) and DOE (Design of Experiment) in TWB we have developed a methodology, which applied to explore the impact of process and design modifications on the speed improvement and the study the trade-off between speed and on-resistance of IGBT. This methodology can be used for optimizing the optimal layer thicknesses (buffer and base), doping concentrations and lifetime. In addition it helps the device designer in choosing of the device types (Punch-Through Non-Punch-Through structures, Planer and Trench technologies). Two dimensional device and process simulations were used to determine the influence of technology and design parameters on threshold voltage, on-resistance, current gain, latch-up, breakdown voltage, switching time under various biasing conditions The results of Response Surface Models provide the users efficient information to design the new devices and study the trade-off characteristics of device performance. This methodology can also guide optimization and Speed/On-resistance trade-offs for other power devices.
8:45 AM E7.2
A FAST AND EFFICIENT SIMULATION TOOL FOR THE VOLTAGE HANDLING CAPABILITY OF HIGH VOLTAGE DEVICES. Evgueniy Stefanov, Georges Charitat, Nicolas Nolhier, and Philippe Spiesser, LAAS-CNRS, Toulouse Cedex, FRANCE.
In this paper, we report a user-oriented simulator POWER2D for studying the voltage handling capability of power semiconductor devices. The simulation is based on the Poisson's equation solution for an arbitrary shaped ID 2D and cylindrical 3D high voltage structures, composed of Si, 6H-SiC, or 3C-SiC materials. The incomplete ionization of impurities, and both the Boltzmann and Fermi-Dirac statistics for carrier densities are implemented as an option in the program. Gaussian and error function doping profiles with arbitrary position are obtained by means of 2D analytical functions. The input to POWER2D is provided by an input deck, where the language is designed in a simple and flexible manner in order to describe a wide range of structures and simulation conditions. An alternative way to input data is to use an interactive tool allowing users to input informations through a series of pop-up windows: the tool then produces a syntactically correct input file. Its graphical capability also permits the visualization of the simulated device region. The box integration method of Varga is used to discretize Poisson's equation. A balanced scaling factor for the carriers is used depending on the bandgap of the simulated materials. Multi-damping scheme is applied for the Newton linearization procedure of the non-linear algebraic equations, combined with a very efficient solver, based on incomplete LU decomposition preconditioned biconjugate gradient method. Very fast solution of the potential is obtained for arbitrarily high level of applied bias. The calculus of the breakdown voltage is performed by the evaluation of temperature dependent ionization integrals. An original algorithm, based on ``regula falsi'' method is developed ensuring fast and automatic iterative search of the breakdown. A specific algorithm, based on interpolation procedure, reduces drastically the number of iterations, when adjusting automatically the quasi-Fermi potential of floating multi ring structures. All of the termination techniques, used to improve the breakdown voltage of power devices, can be addressed by POWER2D including Floating Rings, Field Plates, negative and positive bevels, semi-resistive layers, RESURF etc. Both SOI and bulk substrates can be studied. The comparison of the predicted breakdown capability with experimental results shows good agreement.
9:00 AM *E7.3
MATERIAL REQUIREMENTS FOR HIGH VOLTAGE, HIGH POWER IGBT DEVICES. Thomas Lang, Raymond W. Zehringer*, Hansrudi Zeller, ABB Semiconductors, Lenzburg, SWITZERLAND, *ABB Corporate Research, Baden, SWITZERLAND.
High voltage ( 1700V/1000A) IGBT devices are used today predominantly for traction applications but in the future most likely also in electrical power transmission and distribution systems. Two different forms of package have evolved. The first is basically an extrapolation of existing IGBT module technology to higher voltages and currents. The second is a multichip variant of the classical presspack, dry contact, thyristor technology. The generic structure of a module is very simple: The dye is soldered to a ceramic substrate which in turn is soldered to a base. The base is either a water cooler or a metal plate. The internal electrical contacts are wire bonded embedded in silicone gel insulation. Major advantages of modules are the galvanic separation of the cooling system from the electrical part, the simple system assembly and low parasitic inductance. Modules, however, are not suited for series connection which is mandatory in transmission and distribution applications. If redundancy has to be built into a series connection, the failure mode of the devices has to be short circuit. Since the bond wires in modules will melt in a fault case, presscontact is the technology of choice. In a mass transit traction application, a module is subjected to severe temperature cycling due to the line profile (107 @ T=20 - 40C due to stops, 105 - 106 @ T = 40 - 80C due to end-station stops) and the environmental conditions (104 day-night cycles @ T = 80 - 100C). This poses enormous reliability requirements for all interconnect technologies (wirebond and soldering). We will discuss all subsystems of high voltage modules and IGBT presspacks in terms of specific materials requirements, existing solutions and trends for the future. This includes functionality, reliability and handling of different failure modes.
9:30 AM *E7.4
INFLUENCE OF SILICON DEFECTS ON THE ELECTRICAL BEHAVIOR OF SEMICONDUCTOR POWER DEVICES. H.-J. Schultz, Corporate Technology, Siemens AG, Munich, GERMANY; B.O. Kolbesen,Johann Wolfgang Goethe-Universität, Frankfurt, GERMANY.
To achieve high breakdown voltages and on-state currents, power devices require a thick electrically active n-type silicon layer with high resistivity and a large area. Therefore, the electrical characteristics are extremely sensitive to contamination. An intensive contamination control was performed after each high-temperature step required for the device fabrication. The influence of heavy metals on the lateral carrier lifetime distribution in the n-base was assessed by several optical methods. The results demonstrate that considerable diffusion of heavy metals into silicon wafers can occur during the high-temperature steps because the temperature necessary for the doping processes is much higher and the diffusion time is longer than in the case of IC technologies. This contamination can result in an uncontrolled increase in the recombination and generation rates of free charge carriers. Accordingly, both the leakage current and the on-state voltage are increased. It turned out that the optimization of the cleaning and high-temperature steps alone is not sufficient to avoid such effects. It is also important to avoid silicon crystal defects by proper processing. A dramatic rise in the leakage current was correlated with the appearance of silicon defects decorated with heavy metals. Decorated D-defects, for example, are very effective generation centers and are distributed over a large wafer area. These vacancy-related defects could be removed by the injection of interstitial silicon atoms into the wafer. Another risk is an instability of the electrical data due to the formation and current-induced decomposition of Fe/acceptor-complexes. As a consequence of the low doping level of the n-base, power devices are also sensitive to contaminating atoms acting as donors. Such undesired donors can result in a reduction of the blocking voltage. Furthermore, the failure rate due to cosmic radiation may increase. The incorporation of donors was detected by electrical and optical resistivity measurements.
10:30 AM E7.5
A NEW METHODOLOGY FOR DESIGNING FLOATING-RING TERMINATION TECHNIQUE IN HIGH VOLTAGE STRUCTURE. Evgueniy Stefanov and Georges Charitat, LAAS-CNRS, Toulouse Cedex, FRANCE; Luis Bailon and Juan Barbolla, Department of Electricity and Electronics, Faculty of Sciences, University of Valladolid, Valladolid, SPAIN.
The Floating Ring (FR) termination technique is well established in the planar technology as a means to protect p-n junctions at high voltage. The optimal design of such a multiple PR structure requires the knowledge of the potential behavior of the floating rings and is performed with respect to several parameters ring-to-ring spacings; width of each ring; ring and substrate doping profiles oxide charges density. In this paper, we report a simple and effective methodology to optimize the design of complex multiple floating ring structure. The blocking capability of a system with only one guard ring is simulated and the results are extended to a multiple FR system. The FR structure could be optimized in respect of the ring-to-ring spacings, ring widths, and number of rings for fixed doping profile and oxide charge density. The off-state simulation program POWER2D is based on 2-D numerical solution of Poisson's equation and the ionization integral is calculated from the electric field. An efficient numerical algorithm, based on interpolation procedure, is developed to reduce drastically the number of iterations (up to 4-5 for a ring), when adjusting automatically the quasi-Fermi potential of the floating rings. Excellent agreement is obtained when compared with the combined Poisson's and continuity equations analysis for a two ring system. Comparison with experimental results for 4, 5, 6 and 7 ring system is also realized, proving the adequacy of our method. We illustrate this new design methodology by optimizing a FR structure with a junction depth X=5 and Si substrate doping 2.1014. A seven ring structure is optimized giving 90% efficiency in respect to the ideal plane parallel junction breakdown voltage VBR=850 V. The optimized structure extends some 160 microns in the device periphery. This method perfectly predicts the breakdown voltage for a multiple ring termination structure, based on the fast simulation of one ring only FR periphery.
10:45 AM E7.6
DESIGN AND FABRICATION OF NITRIDE BASED HIGH POWER DEVICES. Z.Z. Bandic, E.C. Piquette, P.M. Bridger, R.A. Beach, T.F. Kuech*, T.C.McGill, Thomas J. Watson Laboratory of Applied Physics, California Institute of Technology, Pasadena, CA; *Department of Chemical Engineering, University of Wisconsin, Madison, WI.
We have estimated the breakdown voltage, critical current density and maximum operating frequency of several GaN and GaN/AlN based high power and high temperature electronic devices. GaN Schottky and GaN/AlGaN enhanced Schottky barrier rectifiers as well as GaN/AlGaN thyristor switch devices show promise of operation at 5 KV with current densities higher than 70 A/cm2, at frequencies approaching 1MHz. Important model parameters which influence device design and performance are minority carrier recombination lifetime and critical field for electric breakdown.
In this study, aimed at the demonstration of nitride power devices, GaN and GaN/AlGaN have been grown by MBE, MOCVD and HVPE. To evaluate the material quality, samples have been structurally, optically and electrically characterized by a variety of techniques including in-situ RHEED and cathodoluminescence and ex-situ high resolution X-ray diffraction, photoluminescence, X-ray photoelectron spectroscopy, scanning electron microscopy and electron channeling. The minority carrier recombination lifetimes have been measured by electron beam induced currents and attempt have been made to correlate them with the average distance between dislocations. Current-voltage and capacitance-voltage measurements have been used to evaluate electric breakdown critical fields as a function of doping. Preliminary results on the fabrication and testing of nitride power devices and comparison of their performance with design modeling will be reported.
11:00 AM E7.7
SYSTEMATIC EVIDENCE OF SIMOX AS A COMPLIANT SUBSTRATE FOR SiC. F. Namavar, P.C. Colter, C.A. Jollimore, M. Yoganathan, Spire Corporation, Bedford, MA; M. Leksono, J.I. Pankove, Astralux, Inc., Boulder, CO; W. Zhou, P. Pirouz, Case Western Reserve University, Cleveland, OH; and E. Gagnon, Spire Corporation, Bedford, MA.
Since bulk Group III-nitride substrates are not available, silicon carbide (which is nearly lattice-matched) is presently the most suitable surrogate substrate for III-N devices. Fabrication of SiC structures on SIMOX wafers is desirable for a number of reasons, including their use as low-cost, large-area substrates for high-temperature, high-power SiC devices, and the ability to integrate them with Si electronics on the same chip. A SiC-on-insulator (SiCOI) structure is valuable not only because the usual planar strategies to isolate devices (ion implantation and diffusion) are difficult to apply to bulk SiC, but also because the structure can be used as an infrared and visible waveguide.
We have grown SiC on SIMOX and Si using more than a hundred different process conditions to optimize crystal quality. Results from even partially carbonized Si on SIMOX clearly demonstrate the advantage of an SOI structure for growth of 3C-SiC. Much narrower rocking-curve spectra ( 500 arcsec FWHM for 1 to 2 m films) were obtained from SiC grown on SIMOX than from SiC/Si. Conventional (-2 x-ray diffraction (using the Bragg-Brentano focussing technique) which is frequently used to characterize SiC on Si indicates that the crystal quality of our SiC is as good as that of Si, which is not the case as shown by rocking-curve analysis. Rocking-curve data, unlike Bragg-Brentano data, are sensitive to the mosaic structure of heteroepitaxial growth and thus measure overall crystal quality. Photoluminescence of MOCVD-grown GaN on SiC/SIMOX shows much stronger violet and weaker yellow emission than GaN on SiC/Si or sapphire. Results from selective epitaxial growth of SiC on SIMOX and three-inch substrates produced using a newly installed 50 kW RF generator will also be presented.
11:15 AM E7.8
UNIFORMITY, HIGH TEMPERATURE PERFORMANCE AND RELIABILITY OF X-BAND NITRIDE POWER HEMTS FABRICATED FROM 2-INCH EPITAXY. Robert Hickman, J.M. Van Hove, P.P. Chow, J.J. Klaassen, A.M. Wowchak, C.J. Polley, SVT Associates, Eden Prairie, MN.
The development of economical and repeatable processes for high temperature power HEMTs is desirable for a number of applications in the microwave bands. We have evaluated the X-band performance of AlGaN/GaN power HEMTs fabricated by RF atomic nitrogen plasma MBE. Deposition and fabrication were performed on 2-inch (0001) sapphire substrates to determine process uniformity. Distribution data will be presented for threshold and pinch-off voltage uniformity and high frequency performance uniformity over the 2-inch epitaxial area. Results leading to the development of a 3-inch power HEMT process will also be discussed. The use of atomic force microscopy to correlate epitaxial morphology with HEMT performance and 2-DEG room temperature mobility of over 600 cm2/Vsec will be presented. In addition to HEMTs with 100-150 micron total gate widths, power HEMTs with multiple gate finger geometry and 2.1 mm total gate width have been fabricated with refractory ohmic contacts. Using 1 micron fabrication processes, frequency cutoffs in the range of 8-13 GHz have been achieved. Typical DC performance values include transconductance of >70 mS/mm and gate-source breakdown voltage of >50 V. Device performance and reliability will be presented for extended operation over 400 C, and AlGaN/GaN HEMT decay mechanisms at high power and temperature will be discussed.
11:30 AM *E7.9
CRITICAL ISSUES ON MOVPE GROWTH OF HIGH ELECTRON MOBILITY TRANSISTORS. Hong Q. Hou and B. E. Hammons, Sandia National Laboratories, Albuquerque, NM ; I. Ferguson, EMCORE Corp., Somerset, NJ; and F. Ren, Bell Laboratories, Lucent Technologies, Murray Hill, NJ
Metalorganic vapor phase epitaxy (MOVPE) technology is increasingly recognized as a superior platform for compound semiconductor manufacturing because of its high throughput, low surface defect density, and the flexibility for materials and dopant choices. However, for the application in power electronic devices, such as high electron mobility transistors (HEMTs), some MOVPE material growth issues, including uniformity, interfacial charges between epilayer and substrate, and quality of AlGaAs materials, are commonly considered limiting factors for HEMT manufacturing. In this paper, we review our recent effort in the development of novel MOVPE processes addressing HEMT manufacturability. The growth was performed on an EMCORE stainless-steel wall rotating-disk MOVPE reactor. The AlGaAs was grown using 100 arsine, trimethylgallium, and trimethylaluminum. Alternative Ga and Al precursors, such as triethylgallium and dimethylaluminum hydride, were also explored. The Si dopant was from disilane. The growth temperature was optimized to suppress the C incorporation and Si diffusion. The modulation-doped GaAs/AlGaAs heterostructure materials demonstrated a typical mobility of greater than 16000 cm2/Vs at 77 K with a sheet carrier concentration of 2.5x1012 cm-2, and 6000 cm2/Vs at room temperature with 2.8x1012 cm-2. The thickness, composition, and free carrier concentration variations on an entire 3-inch diameter wafer are smaller than 0.5, 0.5, and 1.5, respectively. We have developed procedures to eliminate or deactivate the electric charges at the interface of the epitaxial layer and the substrate. Ultrahigh purity AlGaAs was achieved by using alternative Ga and Al precursors. We will present results from high-performance InGaAs-channel psudomorphic HEMTs. In summary, we have demonstrated optimized processes for growth of high-quality HEMT materials, and manufacturability of HEMTs by the MOVPE growth technique. The research at Sandia National Laboratories, a multiprogram laboratory operated by Sandia Corporation, a Lockheed Martin Company, for the United States Department of Energy was performed under contract No. DE-AC04-94AL85000.
SESSION E8: DEVICES AND PROCESSING ISSUES
Chairs: Cammy R. Abernathy and Christopher Constantine
Thursday Afternoon, December 4, 1997
1:30 PM *E8.1
NOVEL FABRICATION OF C-DOPED BASE InGaAs/InP DHBT STRUCTURES FOR HIGH SPEED CIRCUIT APPLICATIONS. R.F. Kopf, R.A. Hamm, R.J. Malik, R.W. Ryan, J. Burm, A. Tate, Y.K. Chen, G. Georgiou, and M. Geva, Lucent Technologies, Bell Laboratories Division, Murray Hill, NJ.
We have fabricated InP based DHBTs for high speed circuit applications. A process involving both wet and ECR plasma etching was developed. C was employed as the p-type dopant of the base layer for excellent device stability. Both the emitter-base and base-collector regions were graded using quaternary InGaAsP alloys. The extrinsic emitter-base junction is buried for junction passivation to improve device reliability. The use of an InP collector structure with the graded region results in high breakdown voltages of 8 to 10 V, with no current blocking. The entire structure is encapsulated with spin-on-glass. These devices show no degradation in DC characteristics after operation at a collector current density of 90KA/cm2 and a collector bias of 2V at room temperature for over 500hrs. Typical common emitter current gain was 50 ft of 78 and fmax of 239 GHz were achieved for 3x5 um2 emitter size devices.
2:00 PM E8.2
HIGH RESISTIVITY OXYGEN-DOPED AlGaAs FOR POWER DEVICES. Yuichi Sasajima, Noboru Fukuhara, Masahiko Hata, Takayoshi Maeda, Sumitomo Chemical Co., Ltd., Tsukuba Research Laboratory, Ibaraki, JAPAN; Hideyo Okushi, Electrotechnical Laboratory, Ibaraki, JAPAN.
We have succeeded in making high resistive AlGaAs by oxygen doping and have studied application of those materials (AlGaAs:O) to buffer layer for power devices. Samples of AlGaAs:O were prepared by MOVPE method. Oxygen-related levels in AlGaAs:O were investigated by application of isothermal capacitance transient spectroscopy (ICTS) to MIS (Al/AlGaAs:O/n-GaAs) diodes. By comparing SIMS data for the total oxygen concentration in the samples, it was found an oxygen-related broad peak in the ICTS spectra. On the other hand, an ability of AlGaAs:O for power devices was characterized by current-voltage measurements for AlGaAs:O. A breakdown field Eb (defined as the electric field when the leakage current reaches at 1 A) of samples was evaluated over 105 V/cm and it became higher as increasing in the intensity of oxygen-related peak in the ICTS spectra. The value of 105 V/cm for Eb is improved over five times better than that of undoped-AlGaAs, while we observed no serious affections due to the oxygen doping in characteristics of MESFET with AlGaAs:O buffer layer. We will also report on a comparison of device performance at high temperature for AlGaAs with and without the oxygen doping.
2:15 PM E8.3
IMPLANTATION DOPING AND DOPANT ACTIVATION OF SiC. H. Du, G. Hu, M. Libera, and S. Withrow*, Stevens Institute of Technology, Hoboken, NJ; * Oak Ridge National Laboratory, Oak Ridge, TN.
The development and realization of SiC-based integrated circuits and devices depends critically on the ability to selectively dope SiC in two-dimensionally patterned areas. Ion implantation must be used for doping in SiC, since thermal in-diffusion in this material needs temperatures exceeding 1800C for sufficient dopant incorporation. This paper describes work comparing and contrasting the resultant microstructures and electrical properties produced by: (i) solid phase epitaxial (SPE) regrowth of implantation-doped specimens pre-amorphized by co-implantation of Si and C at room temperature; and (ii) implantation doping of crystalline specimens at 500circC where dynamic recrystallization occurs. Studies were done both on B-doped and P-doped specimens to levels of 1019 ions/cm3 according to implantation schedules derived by a TRIM-type simulation. SPE was done under an argon atmosphere for 30 minutes at 1500circC. Hot-implanted specimens were subjected to identical annealing treatments. The as-implanted and annealed microstructures were studied using high-resolution imaging and electron diffraction from cross-sectional specimens. Sheet resistance and dopant activation were assessed by electrical measurements and correlated with microstructural data.
2:30 PM E8.4
INTERFACIAL REACTIONS BETWEEN A1, Ti, AND Ti/A1 AND 6H-SiC DURING HEAT TREATMENTS. Y.-S. Shin and B.-T. Lee, Chonnam National University, Kwangju, KOREA.
Phase reactions at the interfaces between Al, Ti, and Ti/(30nm)AI and 6H SiC have been studied using the TEM (transmission electron microscopy) and XRD (X-ray diffractometer). Metal layers were deposited on the commercial 6H-SiC wafers by the RF magnetron sputtering, and annealed at 300C-1100C for 20-60 min. In the case of Al/SiC samples, no detectable reactions were found after annealing at up to 700C. whereas Al4C3 phase was observed at above 900C. As the Al layer melts and regrow at temperatures above 700C, the metal layer showed high degree of epitaxial relationship with respect to the substrate. Ti/SiC interfaces did not show any reaction at 300C, and Ti5Si3 formed as a result of the annealing At 500C. A mixture of Ti3Si3 and TiC was observed at 700C and 900C, and TiSi, TiSi2, and TiC at 1100C. In the case of Ti/AI/SiC, preliminary results indicate somewhat different phase products compared with the Ti/SiC and Al/SiC system. Efforts to correlate the observed interfacial reactions with the electrical contact properties are in progress. Further details and the discussion on the reaction mechanism will be given during the presentation.
2:45 PM E8.5
ELECTRONIC PROPERTIES OF WIDE BANDGAP MATERIALS. J.E. Yater, A. Shih, R. Abrams, Naval Research Laboratory, Washington, DC.
The material properties of some wide bandgap materials make them well-suited for the fabrication of high-power, high-temperature devices. For example, numerous studies of diamond and group III-nitride materials have reported interesting surface and bulk electronic properties that are important for the development of FETs, radiation detectors, cold electron emitters, and other electronic devices. However, before high performance devices can be developed, the electronic properties of the material must be understood. In this study, the electron generation, transport, and emission processes in CVD and single crystal diamond are investigated using secondary electron emission spectroscopy. This technique uses an incident electron beam to generate energetic electrons in the conduction band via impact-ionization. By studying the electron emission from diamond surfaces having a negative electron affinity, the full energy spectrum of the internal electrons is revealed in the measured energy distribution data. The electron transport distance in the material is changed by varying the incident beam energy, and information is deduced from the emitted energy distribution and yield data about the scattering mechanisms and transport efficiency. We have developed a model that describes the electron transport and emission processes in wide bandgap material, and studies on BN and AlGaN alloys are being conducted to develop the model further.