Symposium Organizers
Ioannis (John) Kymissis Columbia University
Max Shtein University of Michigan
Ana Claudia Arias Palo Alto Research Center
Tsuyoshi Sekitani University of Tokyo
C1: Inorganic Electronic and Photonic Devices I
Session Chairs
Monday PM, November 30, 2009
Commonwealth (Sheraton)
9:30 AM - **C1.1
ZnO and Organic Flexible Substrate Thin Film Transistors.
Thomas Jackson 1
1 Center for Thin Film Devices and Materials Research Institute, Department of Electrical Engineering, Penn State University, University Park, Pennsylvania, United States
Show AbstractOxide semiconductor thin film transistors (TFTs) offer significantly improved performance and stability compared to hydrogenated amorphous silicon or organic semiconductor devices. Using plasma enhanced chemical vapor deposition (PEALD) to deposit ZnO and Al2O3 thin films at 200 °C we have fabricated n-channel ZnO TFTs with field-effect mobility of 20-30 cm2/V.s on glass substrates and 15-20 cm2/V.s on flexible polyimide substrates. Using a gate-self-aligned process on glass substrates we have fabricated ring oscillators with 2.5 μm channel length TFTs with propagation delay <10 nsec/stage for a supply voltage of 18 V. The layer-by-layer PEALD process is effective in reliably and uniformly coating substrates with significant surface roughness and we have demonstrated >80% yield for 8,000 cross-over test structures on flexible polyimide substrates for a 50 nm Al2O3 insulating layer and a non-clean-room fabrication process, and working TFTs on rough copper flexible printed circuit material. We have also fabricated ring oscillators with 5 μm channel length TFTs on flexible polyimide substrates with propagation delay <60 nsec/stage for a supply voltage of 18 V. Working with John Anthony (University of Kentucky) we have also investigated functionalized pentacenes and related organic semiconductors that can provide both solubility and good molecular order in deposited films. Using fluorinated 5,11-bis(triethylsilylethynyl) anthradithiophene (diF-TES-ADT) films deposited by simple spin casting we have fabricated p-channel organic TFTs (OTFTs) with mobility >1.5 cm2/V.s. By combining ZnO TFTs with spin-cast diF-TES-ADT OTFTs, we have demonstrated a simple 4-mask CMOS process and hybrid inorganic/organic TFT ring oscillators with propagation delay <150 nsec/stage. These CMOS circuits have μA-level leakage currents limited by undesirable current flow in the unpatterned diF-TES-ADT. By using ink jet printing to deposit the diF-TES-ADT, the leakage current is reduced to sub-pA level and inverter gains >30 are easily obtained, even using lower mobility ink-jet printed OTFTs. The combination of high performance ZnO TFTs and ZnO/organic CMOS circuits provides a foundation for a wide range of flexible substrate digital and analog circuits.
10:00 AM - C1.2
Advanced Designs in Stretchable Electronics for Electronic Eyeball Cameras.
Gunchul Shin 1 , Inhwa Jung 2 3 , Viktor Malyarchuk 2 3 , Song Jizhou 5 , Heung Cho Ko 6 2 3 , Yonggang Huang 7 8 , John Rogers 2 3 4 , Jeong Sook Ha 1
1 Chemical and biological engineering, Korea University, Seoul Korea (the Republic of), 2 Materials Science and Engineering, University of Illinois, Urbana-Champaign, Urbana, Illinois, United States, 3 Frederick Seitz Materials Research Laboratory, University of Illinois, Urbana-Champaign, Urbana, Illinois, United States, 5 Mechanical and Aerospace Engineering, University of Miami, Coral Gables, Florida, United States, 6 Materials Science and Engineering, Gwangju Institute of Science and Technology (GIST), Gwangju Korea (the Republic of), 7 Mechanical Engineering, Northwestern University, Evanston, Illinois, United States, 8 Civil and Environmental Engineering, Northwestern University, Evanston, Illinois, United States, 4 Beckman Institute for Advanced Science and Technology, University of Illinois, Urbana-Champaign, Urbana, Illinois, United States
Show AbstractRecent reports of hemispherical electronic eye cameras based on compressible silicon optoelectronics technology validates a new and practical route to the implementation of Si technology on complex curvilinear surfaces [1]. As a means to improve the fill factor and pixel densities in such cameras, we report new photodetector and interconnect designs, together with a reduction of the pixel size by ~90 %, in layouts guided by theoretical mechanics analysis. These systems use arrays of islands each of which supports four photodetector pixels with edge-to-edge interconnects for improved compressibility. The basic materials science and mechanics aspects will be reported. Results of high resolution color images collected with cameras that use these strategies demonstrate the practical value of these results.[1] H. C. Ko, M. P. Stoykovich, J. Song, V. Malyarchuk, W. M. Choi, C.-J. Yu, J. B. Geddes III, J. Xiao, S. Wang, Y. Huang, and J. A. Rogers, Nature 454, 748 (2008).
10:15 AM - C1.3
Stretchable Silicon Electronics and Their Integration with Rubber, Plastic, Paper, Vinyl, Leather and Fabric Substrates.
Dae-Hyeong Kim 1 , John Rogers 1
1 Materials Science and Engineering, University of Illinois at Urbana Champaign, Urbana, Illinois, United States
Show AbstractElectronic systems that offer elastic mechanical responses to high strain deformations are of growing interest, due to their ability to enable new electrical, optical and biomedical devices and other applications whose requirements are impossible to satisfy with conventional wafer-based technologies or even with those that offer simple bendability. This talk describes materials and mechanical design strategies for classes of electronic circuits that offer extremely high flexibility and stretchability over large area, enabling them to accommodate even demanding deformation modes, such as twisting and linear stretching to ‘rubber-band’ levels of strain over 100%. The use of printed single crystalline silicon nanomaterials for the semiconductor provides performance in flexible and stretchable complementary metal-oxide-semiconductor (CMOS) integrated circuits approaching that of conventional devices with comparable feature sizes formed on silicon wafers. Comprehensive theoretical studies of the mechanics reveal the way in which the structural designs enable these extreme mechanical properties without fracturing the intrinsically brittle active materials or even inducing significant changes in their electrical properties. The results, as demonstrated through electrical measurements of arrays of transistors, CMOS inverters, ring oscillators and differential amplifiers, suggest a valuable route to high performance stretchable electronics that can be integrated with nearly arbitrary substrates. We show examples ranging from plastic and rubber, to vinyl, leather and paper, with capability for large area coverage.
10:30 AM - **C1.4
Inorganic Semiconductor Nanomaterials for Unusual Format Electronics.
John Rogers 1
1 , University of Illinois, Urbana, Illinois, United States
Show AbstractSingle crystalline inorganic semiconductor nanomaterials can be used to achieve high performance electronics on diverse classes of substrates. Advanced designs allow nearly any type of mechanical property to be obtained, ranging from bendability like a thin sheet of plastic to fully elastic stretchability like a rubber band. This talk reviews the materials and mechanics approaches, and then summarizes examples of their use in unusual classes of electronics for applications in biomedicine.
11:30 AM - **C1.5
Towards Organic-based Dielectrics for Low-temperature Silicon-based Devices for Large-area Electronics.
James Sturm 1 2 , Bahman Hekmatshoar 1 2 , Lin Han 1 2 , Sushobhan Avasthi 1 2 , Grigory Vertelov 1 3 , Yabing Qi 1 2 , Jeffrey Schwartz 1 3 , Antoine Kahn 1 2 , Sigurd Wagner 1 2
1 Princeton Institute for the Science and Technology of Materials (PRISM), Princeton University, Princeton, New Jersey, United States, 2 Department of Electrical Engineering, Princeton University, Princeton, New Jersey, United States, 3 Department of Chemistry, Princeton University, Princeton, New Jersey, United States
Show AbstractThe stability of electronic devices processed at low-temperature is a major issue for commercialization. It is scientifically a difficult problem, since deposition at low temperature using low-cost techniques tends to create materials in highly non-equilibrium and/or non-stochiometric states, which are then prone to change over time. In our work to create ultra-stable amorphous silicon TFT’s, we have found that the gate dielectric plays at least as large a role as the semiconductor, and that much of the device drift can be attributed to trapping at dangling bonds in the insulator. Thus it is of fundamental interest to consider organic insulators, since they are usually deposited from pre-formed molecules, with only van der Waals bonding between the molecules. In this talk we examine three different stages of low-temperature silicon-based devices, representing a transition towards organic-based insulators. The first work is on amorphous silicon (a-Si) TFT’s using a conventional inorganic silicon nitride insulator deposited by plasma-enhanced CVD. By using hydrogen etching during PECVD to yield an effective in-situ annealing, which reduces the density of weak and/or dangling bonds in the semiconductor and gate dielectric, the lifetime of the devices can be extended from a standard one month in DC operation to an extrapolated 1000 years. However, this requires raising the process temperature to ~300 ○C. Second, we describe such amorphous silicon TFT’s with a novel gate insulator deposited by PECVD at room temperature from a mixture of oxygen and an organo-silicon precursor, hexamethyl disiloxane. The resulting hybrid of SiO2 and silicone results in devices more stable than and with at least twice the mobility of standard a-Si devices (mobilities as high as 2 cm2/Vs). Finally, we find devices with a direct deposition of a fully organic insulator on silicon are limited by the unsaturated silicon dangling bonds on the silicon surface. The resulting interface states within the silicon bandgap cause a very high level of carrier recombination and prevent modulation of the surface Fermi level, as required in MOS capacitors and FET’s. We will show how this issue can be addressed by a heteroatomic Diels-Alder reaction between the silicon surface and 1,10-Phenanthrenequinone (PQ), a semiconducting small organic molecule (EG ~ 3.2 eV). Followed by an organic insulator, the resulting structure yields a surface recombination velocity (a measure of interface states) and MOS capacitor-voltage characteristics approaching those of high quality silicon-silicon dioxide interfaces.
12:00 PM - C1.6
Position Controlled ZnO Nanowire Arrays on p-GaN for Light Emitting Diode.
Sheng Xu 1 , Zhong Lin Wang 1
1 School of Materials Science & Technology, Georgia Institute of Technology, Atlanta, Georgia, United States
Show AbstractLEDs covering green to violet light are still under intensive development due to the low efficiency of the available devices. In recent years, development has begun of so-called hybrid p–n hetero-junction LEDs, which are composed of hetero-junctions between oxide-semiconductor nanowires (NWs) and thin films underneath. Among all of the known oxide semiconductors, ZnO NWs are one of the best choices for blue emission because of not only a wide band-gap (3.37 eV) and a large exciton-binding energy (60 meV), but also their easy growth via chemical and physical vapor-phase approaches. We report the fabrication of high-brightness position controlled n-ZnO NWs/p-GaN thin film hybrid hetero-junction LED devices by directly growing n-type ZnO NWs arrays using hydrothermal decomposition on p-GaN wafers [1]. The position of the ZnO NWs was readily defined by electron beam lithography, with NW size and pattern pitch controllable [2]. A UV–blue electroluminescence (EL) emission was observed from the NWs–thin film hetero-junction diodes. The emission spectrum shifted towards short wavelengths, with an increase in forward bias applied to the device, with p-GaN as anode, indicating the modification of external voltage to the band profile in the depletion region. This means that the emission color can be slightly tuned by bias voltage. In addition, the hetero-junction LED device exhibited a high sensitivity in responding to UV irradiation due to the residual charge carriers excited by UV and the change in p–n junction energy gap. The 370nm UV emission was first enhanced and then dropped after UV illumination, indicating its stronger dependence on density of charge carriers in ZnO. The 400nm blue emission was less dependent on the UV excitation.[1] Xiao-Mei Zhang, Ming-Yen Lu, Yue Zhang, Lih-J. Chen and Zhong Lin Wang, “Fabrication of a High-Brightness Blue-Light-Emitting Diode Using a ZnO-Nanowire Array Grown on p-GaN Thin Film” Adv. Mater. 2009, 21, 1-4.[2] Sheng Xu, Yaguang Wei, Melanie, Kirkham, Jin Liu, Wenjie Mai, Dragomir Davidovic, Robert L. Snyder, Zhong Lin Wang, “Patterned Growth of Vertically Aligned ZnO Nanowire Arrays on Inorganic Substrates at Low temperature without Catalyst”, J. Am. Chem. Soc. 2008, 130, 14958-14959.[3] Research supported by DARPA, DOE and NSE.[4] For more information: http://www.nanoscience.gatech.edu/zlwang/
12:15 PM - **C1.7
Paper-e: Green Electronics for the Future.
Elvira Fortunado 1
1 Materials Science, FCT-UNL, Caparica, na, Portugal
Show AbstractIn this paper we report the use of a sheet of cellulose fiber-based paper as the dielectric layer used in oxide based semiconductor thin film field effect transistors (FETs). In this new approach we are using the cellulose fiber-based paper in an “interstrate” structure since the device is build on both sides of the cellulose sheet. Such hybrid FETs present excellent operating characteristics such as high channel saturation mobility (>30 cm2/Vs), drain-source current on/off modulation ratio of approximately 104, near-zero threshold voltage, enhancement n-type operation and sub-threshold gate voltage swing of 0.8 V/ decade. The cellulose fiber-based paper FETs characteristics have been measured in air ambient conditions and present good stability. The obtained results outpace those of amorphous Si TFTs and rival with the same oxide based TFTs produced on either glass or crystalline silicon substrates. The compatibility of these devices with large-scale/large-area deposition techniques and low cost substrates as well as their very low operating bias delineates this as a promising approach to attain high-performance disposable electronics like paper displays, smart labels, smart packaging, RFID and point-of-care systems for self analysis in bio-applications, among others.
C2: Inorganic Electronic and Photonic Devices II
Session Chairs
Monday PM, November 30, 2009
Commonwealth (Sheraton)
2:30 PM - **C2.1
Expandable Silicon for Large-Area Electronics Applications.
Peter Peumans 1
1 Electrical Engineering, Stanford University, Stanford, California, United States
Show AbstractMonolithic Silicon is the electronics technology with the lowest cost per unit functionality. Unfortunately, its form factor, i.e. wafers densely packed with electronics, is not compatible with that of large-area electronics applications. We have developed a method to divide a wafer or die into miniature dies connected in a two-dimensional network via Silicon springs that also support metal interconnects. These networks can be mechanically expanded to a much larger size to cover areas up to several square meters. The expansion process results in up to tens of thousands of miniature Silicon dies, interconnected in a two-dimensional network, placed accurately in the desired location. The Silicon springs and miniature dies are formed after the circuitry has been processed with a conventional process, using a MEMS-style deep-reactive ion etch step and the subsequent release via a wet or dry etch step. The expansion step consists of translation of four or more pads to the desired end location and takes place in seconds. The application of this platform technology to smart materials, RFID, displays, focal plane arrays and solar cells, will be discussed.
3:00 PM - C2.2
Effects of Mechanical Strain on the Electrical Performance of Amorphous Silicon Thin-Film Transistors with a New Gate Dielectric.
Katherine Song 1 , Lin Han 1 , Sigurd Wagner 1
1 Electrical Engineering, Princeton University, Princeton, New Jersey, United States
Show AbstractThe stiff SiNx gate dielectric in conventional amorphous silicon thin film transistors (TFTs) limits their flexibility by brittle fracture. We report the effect on the overall flexibility of TFTs of replacing the brittle SiNx gate dielectric with a new, resilient SiO2-silicone hybrid material. This hybrid is deposited by plasma enhanced chemical vapor deposition from a mixture of hexamethyl disiloxane and oxygen. It has been found to combine the electrical properties of SiO2 with the flexibility of silicone. Individual TFTs on a 50μm-thick polyimide foil were bent to known radii for one minute and then re-flattened for measurement of transfer characteristics. The axis of bending was perpendicular to the source-drain current path. This process was then repeated on the same TFT until the TFT failed electrically. Compared with conventional TFTs made with SiNx, TFTs made with the new hybrid material demonstrated similar flexibility when strained in compression and significantly increased flexibility when strained in tension. Under bending to compressive strain, all TFTs tested delaminated from the substrate for compressive strains greater than 2%. Conventional a-Si:H/SiNx TFTs have been previously found to delaminate at a similar compressive strain. Under bending to tensile strain, TFTs made with the new hybrid material did not exhibit significant changes in transfer characteristics up to strains of ~0.8% and remained functional up to strains of 1.6%. Conventional a-Si:H/SiNx TFTs have been found to exhibit changes in transfer characteristics at ~0.4% tensile strain and remain functional for strains of up to 0.5%, a value over 3 times less than that for TFTs made with the new hybrid material. These results suggest that TFTs made with the new dielectric material have the potential to enhance the flexibility and durability of large area electronics, such as displays and sensors. We thank Universal Display Corporation for supporting this research.
3:15 PM - C2.3
Crystallization of Patterned Nanocrystalline Micro-structures Through Self-heating.
Ali Gokirmak 1 , Gokhan Bakan 1 , Adam Cywar 1 , Kadir Cil 1 , Nicholas Williams 1 , Helena Silva 1
1 Electrical and Computer Engineering , University of Connecticut, Storrs, Connecticut, United States
Show AbstractAmorphous silicon is commonly used for conventional large area electronics applications due to its uniformity and low leakage currents. Polycrystalline (poly-) silicon offers higher performance however device to device variations are significant. Nano-crystalline (nc-) Si is a mixed phase consisting of an amorphous Si matrix containing Si nanocrystals. nc-Si offers higher performance than amorphous Si and less variability than poly-Si. nc-Si can be deposited at lower temperatures compared to poly-Si and its relatively high conductivity allows crystallization of patterned micro-structures through current annealing.Rapid current annealing of these structures through high-amplitude short duration pulses result in self-heating and melting. Growth from melt is initiated upon termination of the pulse [1] and single-crystal domains can be formed if a strong thermal gradient can be maintained during the process and the width of the structures are smaller than the thermodynamically favored grain size. Hence, this approach allows crystallization of lithographically defined structures at room temperature. Effect of the substrate and stress conditions (down to < 50 ns) on this crystallization approach will be discussed. [1] G. Bakan, A. Cywar, H. Silva and A. Gokirmak, "Melting and crystallization of nanocrystalline silicon microwires through rapid self-heating," Appl. Phys. Lett., 2009.
3:30 PM - C2.4
UV Anti-reflection Coating for Large Plastic Optics.
Yi Du 1 , Lunet Luna 1 , Wuisiew Tan 2 , Grinia Nogueira 2 , Michael Rubner 2 3 , Robert Cohen 1 3
1 Chemical Engineering, Massachusetts Institute of Technology, Cambridge, Massachusetts, United States, 2 Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, Massachusetts, United States, 3 Center for Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, Massachusetts, United States
Show Abstract A novel thin film nanoporous coating for large-area poly(methyl methacrylate) (PMMA) Fresnel lenses has been designed to enhance the collection of UV light from cosmic ray showers at the international space station. A good coating technology should ensure a conformal coating without significant distortion of the optics. We have successfully demonstrated that a conformal antireflection (AR) coating can be achieved by the layer-by-layer (LbL) assembly method. The refractive index and film thickness can be precisely controlled by varying assembly conditions, and so the optimized AR performance can be targeted at the desired wavelength range of 300 nm to 400 nm. The AR coating design utilizes a graded index in which high- and low-refractive index regions of quarter-wave stacks were generated with commercially available oxide nanoparticles and synthesized hollow silica nanoparticles. The hollow silica nanoparticles have a diameter of 80 nm and a shell thickness of 10 nm. The refractive index of these novel nanoparticles can be as low as 1.10 and the thin film thickness can be controlled precisely to within ± 15 nm. The reflectance of the PMMA substrates was successfully reduced from 7% to 0.5% while the optimized transmission is increased from 92% to 98% at 400 nm. A spray coating LbL procedure has been employed to reduce the processing time and cost, and to scale up the AR coating to accommodate large-area PMMA lenses. The angled wedges of the Fresnel lenses are evenly coated and the optic nature is largely preserved. SEM and AFM were used to characterize the AR coating films while the refractive index and film thickness were determined by the spectroscopic ellipsometry and profilometry.
3:45 PM - C2.5
Photolithography Based Ultra-Fast Self-Assembly of Micro-Scale Particles by Open-Channel Flow.
Sun Choi 1 , Albert Pisano 1
1 Berkeley Sensor and Actuator Center (BSAC), UC Berkeley, Berkeley, California, United States
Show Abstract Micro-scale particles are crucial building blocks for numerous applications such as bio-assays, photonics and microelectronic devices. Self-assembly of micro particles is highly favorable in micro-fabrication since it provides easier, faster and more convenient way to construct micro-structures. A number of self-assembly techniques based on electrostatic force, electrochemical reactions, surface functionalization and microfluidics have been demonstrated in order to induce and control particle assembly. Especially, fluidic self-assembly is emerging as a promising pathway to guide and assemble micro structures due to its high yield and great simplicity. It is reported that particles of meso-scale, micro-scale in fluid can be assembled and structured by lateral capillary forces between particles in suspension and the mechanism of two-dimensional crystallization of micro particles was also explained. There have been several attempts to control the formation of two-dimensional micro particle-assembly from micro particle dispersed suspension, however, those approaches had drawbacks such as long assembly time and compatibility with conventional photolithography techniques. Here, we describe an ultra-fast microfluidic approach to self-assemble micro-particles in three-dimension by taking advantage of simple photolithography and capillary action of micro particles-dispersed suspensions. Theoretical aspects of fast-assembly speed have been discussed and various sizes of silica microspheres and silica gel microspheres have been successfully assembled within micro-open channel by using this approach. Also, microsphere-based line patterns have been also fabricated by releasing resist which was used for guiding open-channel flow. We anticipate the presented technique will give a huge impact on semiconductor and MEMS(Micro Electro Mechanical Systems) fields since it offers not only an fast way of controlling micro-scale particle assembly but also superb compatibility with photolithography, which can lead to an easy integration of particle assembly with existing CMOS and MEMS fabrication processes.
4:00 PM - C2:Inorganic2
break
C3: Passive Devices
Session Chairs
Monday PM, November 30, 2009
Commonwealth (Sheraton)
4:15 PM - C3.1
Wrinkling and Cracking of Gold Thin Films on PDMS.
Patrick Goerrn 1 , Oliver Graudejus 1 , Sigurd Wagner 1
1 Electrical Engineering, Princeton University, Princeton, New Jersey, United States
Show AbstractWe have studied the wrinkling and cracking of thin gold films on poly(dimethylsiloxane) (PDMS). The gold thickness, prestrain of the substrate and its temperature during electron-beam evaporation were varied using combinatorial approaches. Typical wrinkling wavelengths lie in the range of 10 to 40µm and amplitudes up to 6µm. For high substrate temperatures the wrinkles form 50-µm to 3-mm sized domains. Interdomain wavelengths are similar but amplitudes are less. Crack sizes in the gold film range from ~ 1 µm (microcracking) to the mm range. Elastically stretchable electronic systems enable new applications beyond the reach of rigid wafer based technologies. However, the highest electrical performance is found in rigid materials such as inorganic semiconductors or metals. Therefore various approaches have been developed to integrate stiff materials and elastomeric substrates into elastically stretchable systems. In one such approach, bonding ribbons of single crystals of silicon to a prestrained elastomeric PDMSsubstrate and releasing the strain causes wrinkling of the silicon. This wrinkled composite can then be stretched much further without cracking than the silicon by itself, combining superior stretchability with desirable electrical performance. Theoretical models have been developed to describe the wrinkling amplitude and wavelength of these systems based on the Young’s moduli of the two materials. Wrinkled gold thin films are known to show improved flexibility compared to smooth layers. Recently, microcracked thin gold films on PDMS have been found to be elastically stretchable by up to 80% while remaining electrically conducting. But contrary to the first approach thin films can not be placed on the prestrained flexible susbtrate without influencing it. A growing film causes a varying strain to the substrate. The increase of the substrate temperature during that deposition also influences the mechanical properties of the substrate and leads to thermal expansion and so additional strains. Moreover some deposition technologies may alter the PDMS surface resulting in a change of its Young’s modulus. It is thus not surprising that deposition parameters have an impact on cracking and wrinkling. We found the critical prestrain for wrinkling to decrease with higher deposition temperature. When patterning a defined deposited area in the mm range via shadow masks the wrinkling wavelength is increased by around two orders of magnitude compared to identical deposition without shadow mask. Near the edges of the patterned area microcracks are found, even for thick gold layers. The results of this study enable a better understanding of the behavior of thin films on elastomeric substrates and spotlight the critical parameters for the production of elastically stretchable conductive gold thin films on PDMS.
4:30 PM - C3.2
A New Material for the Encapsulation of Plastic Foil Substrates.
Lin Han 1 , Prashant Mandlik 1 2 , Sigurd Wagner 1
1 Electrical Engineering, Princeton University, Princeton, New Jersey, United States, 2 , Universal Display Coporation, Ewing, New Jersey, United States
Show AbstractWe have introduced a new material to thin-film electronics. The material is a hybrid of SiO2 and silicone. It is deposited by plasma-enhanced chemical vapor deposition (PE-CVD) from a silicone monomer and oxygen. The “hybrid” has desirable properties of SiO2 but is not brittle. Its first application is as an environmental barrier for organic light-emitting diodes. We also discovered that the hybrid can replace the conventional SiNx gate dielectric in amorphous-silicon thin-film transistors (a-Si:H TFTs), where it enables an electron field-effect mobility of 2 cm2/Vs. Here we focus on use of the hybrid as the backchannel passivation layer for a-Si:H TFTs. We first encapsulate a polyimide foil substrate by depositing the hybrid on both faces. The TFTs made on this substrate have the inverted-staggered back channel-encapsulated geometry. First a Cr/Al/Cr(15/40/15nm) gate metal sandwich is thermally evaporated and patterned for gate electrodes. Then a 150-nm thick SiO2-silicone hybrid gate dielectric is deposited at room temperature by PE-CVD, followed by 150-nm i a-Si:H at Tdep of 150oC. 150-nm thick SiO2-silicone hybrid is deposited for back-channel passivation, which is patterned. 40-nm n+ a-Si:H source/drain layer is deposited at Tdep of 150oC. 15/40/15-nm Cr/Al/Cr sandwich is thermally evaporated and patterned for source/drain contacts. a-Si:H islands are separated and vias to gate electrodes are opened by etching. The TFTs adhere well to the foil substrate, have an electron field-effect mobility of 1.2 cm2/V s, subthreshold slope of 300 mV/decade, ON/OFF ratio of 107,and leakage current of 10-12A. We will discuss the TFT characteristics with focus on effects of substrate encapsulation and backchannel passivation with the new hybrid material.
4:45 PM - C3.3
Multilayer Polymer Films for Photonic Applications.
Kenneth Singer 1 2 , Joseph Lott 2 , Hyunmin Song 2 , Yeheng Wu 1 , Juefei Zhou 1 , James Andrews 3 , Eric Baer 2 , Anne Hiltner 2 , Christoph Weder 2
1 Department of Physics, Case Western Reserve University, Cleveland, Ohio, United States, 2 Department of Macromolecular Science and Engineering, Case Western Reserve University, Cleveland, Ohio, United States, 3 Department of Physics and Astronomy, Youngstown State University, Youngstown, Ohio, United States
Show AbstractRoll-to-roll processing for low-cost production of new generations of polymeric optoelectronic devices is receiving great attention. We have been investigating continuously rolled, multilayer polymer melt co-extrusion processes for creating substrates and active devices. The process in our laboratory uses a layer multiplication scheme capable of producing hundreds or thousands of A-B layers over a wide range of thicknesses down to the nanometer scale yielding thin multilayer polymer films rolling onto a chilled take-up roll. As these multilayer polymer films are one-dimensional photonic crystals, they could find a number of applications such as lasers, optical switches, and other photonic applications. We report on our studies of optically-pumped surface-emitting lasers fabricated from co-extrusion processed multilayer films.We have fabricated all-polymer lasers both as distributed feedback lasers (DFB) and distributed Bragg reflector (DBR) lasers. As DBR lasers, a gain layer of a polymer doped with a laser dye is laminated between two multilayer polymer reflectors. The distributed Bragg mirrors are made using the layer-multiplying co-extrusion process combining poly(methyl methacrylate) (PMMA) with polystyrene (PS) with 128 layers for each Bragg reflector. Two photoluminescent dyes were incorporated into appropriate polymers as gain media dopants. Distributed feedback lasers were also fabricated by incorporating the same dyes into one of the polymers before the multilayer co-extrusion process and are processed onto a single roller. These lasers were fabricated from dye-doped SAN25 (a styrene acrylonitrile – random copolymer with 25 mol% acrylonitrile, n = 1.56), and THV 220G (a fluoroelastomer terpolymer of vinylidiene fluoride, hexafluoropropylene, and trifluoroethylene, n = 1.37). The gain species were Rhodamine 6G (R6G), a commercially available dye, and 1,4-bis-(α-cyano-4-methoxystyryl)-2,5-dimethoxybenzene (C1RG).The lasers emitted high quality spatial and temporal modes normal to the film surface. The lowest threshold for lasing for both DBR and DFB lasers was observed to be about 90 μJ/cm2, with slope efficiencies of about 5% and 19% for DFB and DBR lasers, respectively. We have studied the dependence of the threshold on the optical density of the gain layer for DBR lasers and found that the optimum optical density is about 1.1, in agreement with modeling the system as a 4-level end-pumped laser including pump absorption and emission re-absorption. Improved laser performance can be expected as the layer uniformity is improved and more stable gain media are included.
5:00 PM - C3.4
Large Area Flexible Electronics Fabrication by Selective Laser Sintering of Nanoparticles with a Scanning Mirror.
Seung Hwan Ko 1 2 , Heng Pan 1 , Daeho Lee 1 , Nico Hotz 1 , Costas Grigoropoulos 1
1 Mechanical Engineering, UC Berkeley, Berkeley, California, United States, 2 Mechanical Engineering, KAIST, Daejon Korea (the Republic of)
Show AbstractThe development of electric circuit fabrication on heat and chemically sensitive polymer substrates has attracted significant interest as a pathway to low-cost or large-area electronics. We demonstrated the large area, direct patterning of microelectronic structures by selective laser sintering of nanoparticles without using any conventional, very expensive vacuum or photoresist deposition steps. Surface monolayer protected gold nanoparticles suspended in organic solvent was spin coated on a glass or polymer substrate. Then low power continuous wave Ar-ion laser was irradiated as a local heat source to induce selective laser sintering of nanoparticles by a scanning mirror system. Metal nanoparticle possessed low melting temperature (<150°C) due to thermodynamic size effect, and high laser absorption due to surface plasmon mode. These make metal nanoparticles ideal for the low temperature, low laser energy selective laser processing, and further applicable for electronics fabrication on a heat sensitive polymer substrate. We extended our laser selective sintering of nanoparticles research to a large area (> 4” wafer) using scanning mirror to demonstrate current technology for industry level fabrication.
5:15 PM - C3.5
Maskless Large-Area Fabrication of Passive Optical Elements Through Modulated Surface Stress Lithography (MS2L).
Mathias Dietzel 1 , Sandra Troian 1
1 Applied Physics, California Institute of Technology, Pasadena, California, United States
Show AbstractOptical lithography remains the most widely used method for fabricating micro- to nanoscale structures in an efficient, parallel fashion. A major drawback of mask-based manufacturing methods, however, is the difficulty in adapting quickly to new layouts and designs, which requires insertion of new masks. Harsh developer and etchant solutions also produce highly roughened surfaces subject to significant scattering losses. Sequential methods such as ink-jet printing or dip pen lithography offer easy adaptation to new layouts but with consequent lower resolution and much slower processing speeds.In this talk, we explore through finite element simulations a promising route for large-area, maskless and adaptive fabrication of polymeric optical elements based on film patterning by modulated surface stress control. The surface tension of a nanoscale film of molten polymer is spatially modulated to induce thermocapillary stresses, leading to film elongation near cooler regions and film depressions near warmer regions. The thermocapillary stresses are purposefully tuned by the choice of the geometry and thermal gradients applied to exert a predominant effect and rapidly overcome stabilizing capillary stresses caused by the increase in surface area during structure formation. This procedure leads to positive replication of a pattern if the desired design is imposed by definition in a cooler substrate placed above the film, leaving a thin air gap between the film and the upper plate, or negative replication if the design is imposed by an array of thin film heaters from below. Successive rapid cooling of the molten polymer film to a temperature below the glass transition temperature affixes the pattern in place once the desired film shape and feature amplitudes have been achieved. As an example of this patterning process, we demonstrate the fabrication of a straight ridge waveguide by local modulation of the surface stress along the polymer film interface and analyze its optical performance through supplementary simulations of the corresponding electro-magnetic equations.Since structures fabricated by this method ultimately solidify from a melt, it is anticipated to result in specularly smooth surfaces with ultralow scattering losses. Rapid adaptation to various patterns can be achieved by simply varying the temperature distribution imposed, which can be modified in situ during the formation process. Our results indicate that this novel patterning technique can provide an important step toward truly adaptive, large-area, rapid, robust and low-cost fabrication of small-scale optical devices based on polymeric materials.
5:30 PM - C3.6
Mechanical Sintering Techniques for Printed Electrodes with Various Work-function on a Plastic Substrate.
Manabu Yoshidda 1 , Kouji Suemori 1 , Sei Uemura 1 , Satoshi Hoshino 1 , Noriyuki Takada 1 , Takehito Kodzasa 1 , Toshihide Kamata 1
1 , AIST, Tsukuba, Ibaraki, Japan
Show AbstractA print technique of an electrode on a plastic substrate is one of the most important technique for developing a printed large area device. Especially, preparation of a metal electrode with low work function by printing is very important to develop a printed active devices such as diode and transistors. However, it is well known that it is very difficult to prepare a printed metal electrode except for noble metals such as Ag and Au. Because many other kinds of metals are easily oxidized during print process owing to high temperature annealing treatment. In this study, we have examined to develop a new annealing technique on a printed electrode to reduce the process temperature during metal printing. We have newly developed a mechanical sintering technique in which mechanical forces is applied on a printed metal pattern. Control of the direction balance of applied mechanical force was effective to reduce resistivity of the printed metal without any destruction of plastic substrate. Furthermore, distribution control of metal particle in the metal ink was also effective to reduce resistivity. By using this technique, we have succeeded in the preparation of an aluminum, zinc, copper and tin electrode on a plastic substrate.On the other hand, we have tried to prepare a metal alloy ink to control the work function of printed electrode. Metal alloy ink was composed of two kinds of metal particles. Work function of the electrode was controlled by changing composition of these metal contents in a alloy ink. By applying our developed mechanical sintering technique on the printed alloy pattern, printed electrode with various work function from 3.5eV to 5eV could be prepared on a plastic substrate. These printed alloy was effective to improve the performance of printed diode and transistors.
5:45 PM - C3.7
Process Related Issues on Selective Area Patterning of Zinc Oxide by Inkjet Printing.
Yen Nan Liang 1 , Boon Keng Lok 2 , Xiao Hu 1
1 Materials Technology, Nanyang Technological University, Nanyang Avenue Singapore, 2 , Singapore Institute of Manufacturing Technology, Singapore Singapore
Show AbstractInkjet printing has been employed as a production technology to pattern inorganic functional materials such as ZnO and TiO2 etc. The influences of coffee ring profiles of inkjet printed pattern towards the process and device performance have been less described and worth investigation. In this work, selective area patterning of zinc oxide (ZnO) was carried out by inkjet printing of ZnO sol-gel precursor. The profiles of inkjet printed ZnO patterns adopted typical coffee ring profiles; which were affected by substrate’s temperature, ink concentration, ink volume deposited. It is further demonstrated the employment of inkjet printed ZnO patterns as (a) seed layers for ZnO nanorods growth and (b) active layer of thin film transistor. ZnO nanorods selectively grow on ZnO seed layer; which diameters changed at different regions of same patterns. Transistor characteristics depended very much on the morphologies of the deposited thin film. Inkjet printing was shown to be a better choice than spin-coating for thin film transistor fabrication.
Symposium Organizers
Ioannis (John) Kymissis Columbia University
Max Shtein University of Michigan
Ana Claudia Arias Palo Alto Research Center
Tsuyoshi Sekitani University of Tokyo
C4: Printing, Integration, and Packaging
Session Chairs
Tuesday AM, December 01, 2009
Commonwealth (Sheraton)
9:30 AM - **C4.1
Techniques and Materials for Making Flexible, Deformable, and Elastic Electronic Surfaces.
Sigurd Wagner 1 , Oliver Graudejus 1 , Lin Han 1 , Wenzhe Cao 1 , Patrick Goerrn 1
1 Electrical Engineering and Princeton Institute for the Science and Technology of Materials, Princeton University, Princeton, New Jersey, United States
Show AbstractDuring the past few years, new flexible electronic surfaces have been demonstrated with imaginative techniques that make use of established as well as unconventional materials. Can these exciting experiments provide guiding principles for designing flexible structures and selecting, or even designing, materials for them? In an effort to answer this question we will first review structures that have been made, and the materials that have been used. Then we will focus on a recent and fascinating development: new materials that have been introduced specifically for making electronics flexible: (i) organic polymer foils that can be processed at high temperature; (ii) organic device materials that keep functioning under plastic deformation; (iii) metal conductor/polymer composites and (iv) dispersions of carbon nanotubes in polymer films, capable of extreme plastic or even elastic deformation; and (v) inorganic-organic hybrids that combine the impermeability and high dielectric breakdown strength of brittle inorganic materials with the resilience of organic polymers. Inspection of these new materials suggests that we are entering a new field of materials science. This field is expanding through the search for optimal combinations of opto-electronic and mechanical properties. We will attempt to identify the principles by which this search proceeds.
10:00 AM - C4.2
Electronic & Mechanical Device Components Incorporating Carbon-Based, Organic and Inorganic Active Materials onto Flexible Substrates.
Daniel Hines 1 , Ellen Williams 2 , Nathan Siwak 3 4 , Reza Ghodssi 3 4
1 , Laboratory for Physical Sciences, College Park, Maryland, United States, 2 Department of Physics, University of Maryland, College Park, Maryland, United States, 3 Dept. of Electrical & Computer Engr, University of Maryland, College Park, Maryland, United States, 4 The Institute for Systems Research, University of Maryland, College Park, Maryland, United States
Show AbstractTransfer printing processes have previously been demonstrated for fabricating electronic components onto flexible substrates, using a wide variety of active layer materials, including Pentacene (Pn), poly(3-hexylthiophene) (P3HT), carbon nanotube mats (CNTM), graphene, and a variety of polymer dielectric layers including poly(hydroxystyrene) (PHS), polystyrene (PS), polycarbonate (PC) and poly(methylmethacrylate) (PMMA). The printing method has been used to fabricate transistors, resistors, capacitors, inductors and resonators onto plastic substrates in an additive process that does not require the use of chemical processing on the device substrate. Here we demonstrate the extension of the process to fabricate mechanical resonators on flexible substrates. Structures were constructed from both Si membranes and thin, Au coated polymer films transfer printed onto polycarbonate (PC) substrates. The substrates were prepatterned with cavities ranging from 100 x 100 µm to 200 x 300 µm in dimension. The structures were aligned over a cavity and printed in place. The mechanical response of the structures was measured optically in air using an AC voltage applied to a probe tip to actuate the resonator. For a Si resonator of thickness 70 nm and area 10,000 µm2 a resonant frequency of approximately 480 KHz was measured. For a 200 nm thick PC film coated with 35 nm of Au and area 10,000 µm2, a resonant frequency of approximately 520 KHz was measured. Preliminary calculations suggest a fundamental resonant frequency of 42 KHz for the Si resonator and 80 KHz for the Au coated PC film. Differences between measured and calculated frequencies are most likely related to stresses in the printed structures, which are visible in the resulting resonators. Devices, which contain less stress in the printed membrane, are being fabricated which are expected to exhibit resonant frequencies closer to the calculated values. Details of the printing methods and characteristics of the resulting devices will be presented as a function of membrane material, thickness, printing conditions and cavity dimensions.
10:15 AM - C4.3
Ink Jet Printing Devices and Circuits.
Steven Ready 1 , Ana Arias 1 , Sanjiv Sambandan 1
1 Electronic Materials and Devices Laboratory, Palo Alto Research Center, Inc., Palo Alto, California, United States
Show AbstractFor several years there have been many efforts to employ ink jet technologies in the fabrication of consumer electronics. The potential of displacing large and expensive pieces of electronic fabrication equipment and processes with seemingly appropriately scaled inexpensive alternatives is attractive. However, of course, the devil is in the details. Feature size, accuracy, registration and materials all have sever impacts on design rules, processing, performance and the types of devices appropriate to the technology. Here we present a look at some of the materials and deposition challenges along with solutions developed at PARC. The discussion will include the defining of printed features >5μm with ±1.5μm drop placement and layer to layer alignment accuracy, the materials characteristics of the generally complex functional fluids of interest required for reliable jetting and device performance. Examples of ink jet fabricated integrated circuits, working displays, imagers and microfluidic devices and RGB color filters for 15" displays will be shared.
10:30 AM - C4.4
Development of SiO2 Dielectric Thin Film Prepared by the Low-temperature Solution Process.
Takehito Kodzasa 1 , Sei Uemura 1 , Kouji Suemori 1 , Manabu Yoshida 1 , Satoshi Hoshino 1 , Noriyuki Takada 1 , Toshihide Kamata 1
1 , National Institute of Advanced Industrial Science and Technology, Tsukuba Japan
Show AbstractIt is mostly important to develop the fabrication technology of the dielectric thin film with high insulation performance and surface flatness by the solution process. We have developed a technique to fabricate a silicon dioxide (SiO2) dielectric thin film by the low temperature solution process. The thin film prepared by multi-source photo-oxidation technique below 200oC showed excellent dielectric performance with high resistivity in the order of 10 to the 16 ohm*cm and surface flatness with the same degree of thermal oxidized SiO2 thin film on the silicon wafer (RMS=0.15nm). In addition, it is showed that the production of thick film of SiO2 with high dielectric performance and surface flatness is possible by applying over-coating technique. These indicate that this SiO2 production technique is greatly useful for the large-area printed electronics technology.
10:45 AM - C4.5
Advanced Transfer Printing Modes for Heterogeneous Integration.
Andrew Carlson 1 , Paulius Elvikis 2 , Shuodao Wang 3 , Yonggang Huang 3 4 , Placid Ferreira 2 , John Rogers 1 5
1 Materials Science and Engineering, University of Illinois, Urbana-Champaign, Urbana, Illinois, United States, 2 Mechanical Science and Engineering, University of Illinois, Urbana-Champaign, Urbana, Illinois, United States, 3 Mechanical Engineering, Northwestern University, Evanston, Illinois, United States, 4 Civil and Environmental Engineering, Northwestern University, Evanston, Illinois, United States, 5 Chemistry, University of Illinois, Urbana-Champaign, Urbana, Illinois, United States
Show AbstractMeeting the increasing performance demands of many existing and emerging microelectronic and optoelectronic technologies often require devices fabricated by large-scale integration of disparate classes of materials into spatially organized, functional arrangements. Transfer printing, a process in which an elastomeric stamp element acts as a carrier between a prepatterned donor wafer of ‘inks’ (semiconducting nanomaterials and others) and a specified target substrate, provides a route for direct integration of diverse nanostructures and materials into single, unified systems. Transfer printing efficacy, particularly ink release from the viscoelastic transfer element (stamp) to substrate, can be enhanced by engineering the stamp/ink interface to support a variety of mechanical forces that alter its adhesive strength. We have demonstrated a series of active polydimethylsiloxane (PDMS) stamps containing small pressurized microchannels and reservoirs which can be used to locally inflate the stamp surface, providing an unprecedented level of dynamic control over stamp geometry during printing. Exploiting the well-established molding techniques of soft lithography, a variety of reservoir and channel designs were investigated to reveal critical factors influencing the printing process such as contact area manipulation of the stamp/ink interface and surface-supported shear loads. Additionally, PDMS stamps with independently programmable active regions were fabricated to demonstrate selective retrieval and printing of different ink layers onto a variety of unusual substrates such as plastic sheets and glass. Demonstration of several of heterogeneously integrated electronic devices illustrates the technologically relevant systems that can be fabricated using this approach.
11:30 AM - **C4.6
Fluidic Surface-Tension-Directed Self-Assembly of Miniaturized Semiconductor Dies Across Length Scales and 3D Topologies.
Robert Knuesel 1 , Heiko Jacobs 1
1 Electrical Engineering, University of Minnesota, Minneapolis, Minnesota, United States
Show AbstractThis talk will review recent progress in the engineered fluidic surface-tension-directed self-assembly involving liquid solder. The process is applied to the assembly of discrete inorganic semiconductor device components at different length scales producing electrically interconnected devices and systems. Prior results included the assembly with unique angular orientation and contact pad registration, parallel packaging, and the programmable assembly of various types of light emitting diodes. Recent progress on the scaling of the minimal die size from 300 to 30 µm will be presented which required the development of a new delivery system to concentrate and effectively introduce the components to solder based receptors. Specifically components are pre-oriented at a liquid-air or liquid-liquid interface and transferred onto the solder based receptors using a dynamic