Symposium Organizers
Thomas Anthopoulos Imperial College London
Conor Madigan Kateeva, Inc.
Ioannis Kymissis Columbia University
Max Shtein University of Michigan
T1: Thin Film Transistors
Session Chairs
Monday PM, November 28, 2011
Room 300 (Hynes)
9:30 AM - **T1.1
Weak Reactant Plasma Enhanced Atomic Layer Deposition ZnO Thin Film Transistors for Large Area and Flexible Substrate Applications.
Thomas Jackson 1
1 Center for Thin Film Devices and Materials Research Institute, Department of Electrical Engineering, Penn State University, University Park, Pennsylvania, United States
Show AbstractOxide semiconductor thin film transistors (TFTs) offer significantly improved performance and stability compared to hydrogenated amorphous silicon or organic semiconductor devices. Commercialization of oxide semiconductor TFTs for display applications appears likely, with much activity focused on gallium indium zinc oxide thin films (GIZO) deposited by sputtering. GIZO TFT processes often use annealing steps incompatible with flexible polymeric substrates. Also, for flexible applications, substrate roughness and defects may limit the yield for sputtered thin films and defect friendly processes like atomic layer deposition are of interest. Using weak reactant plasma enhanced chemical vapor deposition (PEALD) to deposit ZnO and Al2O3 thin films at 200 ○C we have fabricated bottom gate TFTs with field-effect mobility of 20-30 cm2/Vs on glass substrates [1] and 15-20 cm2/Vs on flexible polyimide substrates.[2] Using a gate-self-aligned process on glass substrates we have fabricated ZnO TFT ring oscillators with 2.5 μm channel length TFTs and propagation delay <10 nsec/stage.[3] The layer-by-layer PEALD process is effective in reliably and uniformly coating substrates with significant surface roughness and we have demonstrated >80% yield for cross-over test structures (8,000 cross-overs per test structure) on flexible polyimide substrates for a 50 nm Al2O3 insulating layer and using a non-clean-room fabrication process.[2] We have also fabricated PEALD ZnO ring oscillators on flexible polyimide substrates with propagation delay <20 nsec/stage for 1 μm channel length devices. PEALD also allows high quality Al2O3 dielectric passivation layers to be deposited on ZnO TFTs with negligible threshold voltage shift compared to unpassivated devices. Using PEALD Al2O3 top dielectric we have also fabricated double gate TFTs. Top gate mobility is lower than bottom gate (~10x) due to less effective contact gating in our undoped contact structures, but allows >1 V threshold voltage tuning for bottom gate circuit operation.1. D. A. Mourey, D. A. Zhao, J. Sun, and T. N. Jackson, “Fast PEALD ZnO Thin-Film Transistor Circuits,” IEEE Transactions Electron Devices, 57, pp. 530-4 (February 2010). 2. D. A. Zhao, D. A. Mourey, and T. N. Jackson, “Fast Flexible Plastic Substrate ZnO Circuits,” IEEE Electron Device Letters, 31, pp. 323-5 (April 2010).3. D. A. Mourey, D. A. Zhao, and T. N. Jackson, “Self-Aligned-Gate ZnO TFT Circuits,” IEEE Electron Device Letters, 31, pp. 326-8 (April 2010).
10:00 AM - T1.2
Low Voltage Self-Aligned Organic Transistors Fabricated Using I-Line Lithography.
David Beesley 1 , Donal Bradley 1 , John de Mello 1 , Thomas Anthopoulos 1
1 Physics, Imperial College London, London United Kingdom
Show AbstractThin-film transistors (TFTs) based on organic semiconductors have been extensively studied for over 20 years. Small molecule materials such as fullerenes and their solution processible derivatives, in particular, have attracted growing interest owing to their high charge carrier mobility. The latter makes fullerenes particular attractive for application in future generation of optical displays such as current driven organic light-emitting diode screens. However, more complex electronic integrated circuits, such as radio-frequency identification tags and display drivers require greater manufacturing control, improved transistor performance and particularly higher frequency operation. In such complex circuits the dominant factor that limits the frequency response of the circuits is often the parasitic capacitances present within the individual transistors. The later is typically caused by the overlaps between the source/drain electrodes with the gate electrode [1,2]. Reduction of such parasitic overlaps requires stringent fabrication methods that are typically slow and costly. In this work we utilise interlayer lithography [3,4] to build self-aligning bottom gate low voltage fullerene transistors with sub-micron gate overlap and minimal parasitic capacitance. Our approach is well suited to current i-line manufacturing standards and could allow cost effective and scalable production of complex logic at small channel dimensions. This work represents an important step towards development of high performance organic TFTs and integrated circuits employing a facile, low-cost and large-area compatible lithography method. References [1]Caironi, M et al Semiconductor Science and Technology, 2011 26(3), 034006 [2]Tsividis, Y Oxford University Press 2008 ISBN:0195170148 [3]Leem, D et al Organic Electronics 2010 11(7), 1307-1312 [4]Wöbkenberg et al. Advanced Materials 2011 23(13), 1558
10:15 AM - T1.3
A New Mechanism of Enhanced Solid-Phase Crystallization in a-Si:H Films Seeded by Large Silicon Nanocrystals.
Andrew Wagner 1 , Uwe Kortshagen 2 , K. Mkhoyan 1
1 Chemical Engineering & Materials Science, University of Minnesota, Minneapolis, Minnesota, United States, 2 Mechanical Engineering, University of Minnesota, Minneapolis, Minnesota, United States
Show AbstractIncorporation of silicon nanocrystals in hydrogenated amorphous silicon films (a-Si:H) has been proposed to enhance the solid phase crystallization of hydrogenated amorphous silicon (a-Si:H) thin films for photovoltaics. In this work a Si:H films produced by plasma-enhanced chemical vapor deposition (PECVD) have been seeded with large gas-phase synthesized cubic silicon nanocrystals (~25 nm on a side and defect-free). The films are grown in a layer-by-layer dual plasma process which produces the nanocrystals in a plasma separate from the thin film deposition plasma. This enables individual optimization of the a-Si:H thin film and the nanocrystals and provides for highly controllable lateral distribution of nanocrystals at any desired locations throughout the film thickness. In addition to the expected improvement in crystallization time and grain size, an additional kinetic process has been observed by in-situ heated stage transmission electron microscopy (HS TEM) which results in increased rate of crystal growth. A multi-phase region (a small void bounded by amorphous and crystalline surfaces) forms near the nanocrystals and accelerates the rate of crystallization by rapidly growing long, thin regions of crystalline silicon extending from the nanocrystal into the amorphous matrix. These crystalline regions differentially increase the amorphous-crystalline interfacial surface, contributing to solid phase crystallization and increase grain size. Further studies of plan-view and cross-sectional high resolution transmission electron microscopy (HR-TEM), scanning transmission electron microscopy (STEM), electron energy loss spectroscopy (EELS), and a technique to study the kinetic processes by cross-sectional TEM of a single specimen have elaborated on the kinetics of this enhanced crystallization process. It is proposed that classical nucleation and surface science theories are capable of fully describing the kinetic process observed and that the unique properties of our films create an environment conducive to this process on a large scale. Preliminary kinetic monte-carlo simulations in addition to continuum modeling elaborate on the source of the enhanced crystallization and its subsequent steady-state growth. Careful control of this process offers the potential to completely crystallize the film prior to native nucleation. The enhanced crystallization process additionally allows for rapid extension of the included nanocrystals into the amorphous matrix, promoting large grain size largely dependent on nanocrystal density. This work was partially supported by NSF grant DMR-0705675 and by the Xcel Energy Renewable Development Fund under grant RD-3-25.
10:30 AM - **T1.4
Planar and Vertical Metal Oxide Transistors.
Shelby Nelson 1 , Lee Tutt 1 , David Levy 1 , Mitchell Burberry 1
1 Kodak Research Laboratory, Eastman Kodak Company, Rochester, New York, United States
Show AbstractIn this paper we will discuss thin-film transistors enabled by a process that can readily be applied to a variety of substrates, both rigid and flexible. The metals are deposited by convention sputtering, while the dielectric and semiconductor layers are deposited with a large-area-compatible form of Atomic Layer Deposition (ALD) called spatial ALD (SALD).Unlike the usual chamber-based ALD process, the SALD deposition process takes place in a localized region of a coating head, with no enclosure except that produced by gas isolation curtains, thus allowing substrates to move in and out of the coating area without any pumping cycles. It also allows substrates to be larger than the coating equipment, which is convenient for roll-to-roll processes. The SALD process is capable of producing high-quality films with growth characteristics typical of standard ALD processes. At deposition temperatures at and below 200°C, SALD produces high-quality planar thin-film transistors, using alumina for the dielectric and zinc oxide (ZnO) for the semiconductor, with mobility above 20 cm2/V-s, high on/off ratios, and good uniformity of the deposited layers. Devices show good performance even when deposited at temperatures below 120°C.Patterning and alignment of the transistors on a flexible substrate present a challenge, and especially for submicron channel lengths. In this paper we present a vertical transistor architecture that has both high alignment tolerance as well as submicron channel lengths and is also compatible with flexible supports. These vertical devices are conformally coated and combined with a beam (line-of-sight) deposition process such as sputtering or evaporation. Showing comparable materials properties to planar transistors, but with self-aligned submicron channel lengths, these devices demonstrate remarkable current-carrying properties at low voltage. Several workable geometries will be discussed.
11:30 AM - **T1.5
Where Science Fiction Meets Reality? With Oxide Semiconductors!
Elvira Fortunato 1 , Rodrigo Martins 1
1 Materials Science, FCT/UNL, Caparica Portugal
Show AbstractTransparent electronics has arrived and is contributing for generating a free real state electronics that is able to add new electronic functionalities onto surfaces, which currently are not used in this manner and where silicon cannot contribute. The already high performance developed n- and p-type TFTs have been processed by physical vapour deposition (PVD) techniques like rf magnetron sputtering at room temperature which is already compatible with the use of low cost and flexible substrates (polymers, cellulose paper, among others). Besides that a tremendous development is coming through solution-based technologies very exciting for ink-jet printing, where the theoretical limitations are becoming practical evidences, as well as new emerging materials and technologies like the promising graphene-based applications. In this paper we will review some of the most promising new technologies for n- and p-type thin film transistors based on oxide semiconductors.
12:00 PM - T1.6
High-Performance Ink-Jet Printed Single-Droplet Transistors Based on a Small Molecule/Insulating Polymer Blend for Large-Area Organic Electronics.
Xiaoran Li 1 2 , Wiljan Smaal 2 , Peter Graat 3 , Charlotte Kjellander 2 , Bas van der Putten 2 , Edsger Smits 2 , John Anthony 4 , Dirk Broer 1 , Paul Blom 2 , Jan Genoe 5 , Gerwin Gelinck 2
1 Chemical Engineering and Chemistry, Eindhoven University of Technology, Eindhoven Netherlands, 2 Systems-in-Foil Program, Holst Centre/TNO, Eindhoven Netherlands, 3 Materials Analysis Department, Philips Research, Eindhoven Netherlands, 4 Department of Chemistry, University of Kentucky, Lexington, Kentucky, United States, 5 Department of Large Area Electronics, imec vzw, Leuven Belgium
Show AbstractOrganic electronics are currently aiming at light-weight, low-cost and large-area applicability. Drop-on-demand ink-jet printing is a compelling strategy for controlled deposition of small amounts of organic semiconductors, with efficient material usage and high throughput in large-area fabrications. However, it is still challenging to print well-defined structures from dilute inks of small-molecule organic semiconductors.By blending the molecular semiconductor with a polymer, the viscosity of printed inks can be tuned. Here, we present single-droplet ink-jet printed field-effect transistors based on blends of 6,13-bis(triisopropyl-silylethynyl) pentacene (TIPS-PEN) and polystyrene (PS). After careful process optimizations we routinely make bottom-gate transistors of TIPS-PEN/PS blends with an average mobility of 1 cm2/Vs (maximum 1.5 cm2/Vs), on/off ratio exceeding 107, sharp turn-on in current (sub-threshold slopes approaching 60 mV/decade), and good uniformity in large areas. These parameters are superior to the pure TIPS-PEN transistors. Next, we set out to investigate how the material compositions and printing conditions impact transistor performance, and the role of blended polymer in device operation via a specific lateral phase-separation. We study in details the local charge-transport properties of our transistors based on pure TIPS-PEN and TIPS-PEN/PS blends, by using scanning probe microscopies during device operation. Our results indicate the presence of structural inhomogeneity within a single grain and across grain boundaries, at least partly responsible for the large variation of transistor performance for small-molecule crystalline organic semiconductors. The fundamental understanding of device operation for our blend transistors provides valuable guidelines to the development of next generation transistors based on small-molecule semiconductor and insulating polymer blends, for applications in large-area organic electronics.
12:15 PM - T1.7
3 V-Operation, High Mobility Organic Thin-Film Transistors Using Screen Printed Source and Drain Electrodes.
Yiying Zhao 1 , Martin Kaltenbrunner 2 , Tsuyoshi Sekitani 1 , Siegfried Bauer 2 , Takao Someya 1 3 4
1 Department of Electrical Engineering, University of Tokyo, Tokyo Japan, 2 Soft Matter Physics, Johannes Kepler University Linz, Altenbergerstr Austria, 3 Department of Applied Physics, University of Tokyo, Tokyo Japan, 4 Institute for Nano Quantum Information Electronics , University of Tokyo, Tokyo Japan
Show AbstractIn this work, organic thin-film transistors (OTFTs) with a 3 V operation voltage and mobility of 0.43 cm2/ (Vs), are demonstrated, combining high-definition screen printing source and drain electrodes and a 2-nm thick self-assembled monolayer (SAMs) gate dielectric layer. This technique is expected to move a great step toward the full solution based large area OTFTs manufacturing.Recently OTFTs have demonstrated promising potentials for applications in flexible electronics and large-area flexible electronics such as robotic sensory arrays [1], e-paper [2] and RFID tags [3]. For these applications, it is extremely important to reduce the process cost to compete with the existing mature products. Screen printing, as a simple and environment-friendly way to produce electronic circuitry, has drawn intense interests in past decade, especially for patterning source and drain electrodes. The critical challenge for screen printing process is to improve the process capability and avoid the performance degradation caused by solvents in silver paste. Previously, Sekitani et al. have successfully demonstrated a high definition screen printing process, which can fabricate OTFTs with a channel length of 18 um. [4] However, those devices were fabricated in bottom contact geometry and correspondingly results in an operation voltage higher than 40 V. Therefore, the high performance OTFTs fabrication technique still remains as a great technique challenge.In this work, a high viscosity Ag paste with 360 Pa s is used to reduce the concentration of organic solvent, and thus enables the device structure optimization. OTFTs in this work are composed of a 100-nm thick bottom Al gate electrode, a double gate dielectric layer (Aluminum oxide and SAMs ), a 60 nm-thick 2, 9-didecyl-dinaphtho [2, 3-b: 2’, 3’-f] thieno [3, 2-b] thiophene (DNTT) semiconductor layer, and printed Ag source and drain electrodes. Top contact device geometry is adapted to reduce the operation voltage; and SAMs layer [5] is used to improve the carrier mobility. The best device achieved has a mobility of 0.43 cm2/ (Vs), leakage current smaller than 10 pA up to 6 V gate bias, and on/off ratio of 108. The effect of solvent in Ag paste on OTFTs performance is also investigated. [1] Y. Kato, T. Sekitani, Y. Noguchi, T. Yokota, M. Takamiya, T. Sakurai, and T. Someya, IEEE Trans. Electron Devices 57, 995 (2010)[2] J. A. Rogers, Z. Bao, K. Baldwin, A. Dodabalapur, B. Crone, V. R. Raju, V. Kuck, H. Katz, K. Amundson, J. Ewing, and P. Drzaic, Proc. Natl. Acad. U.S.A. 98, 4835 (2001)[3] P. F. Baude, D. A. Ender, M. A. Haase, T. W. Kelley, D. V. Muyres, and S. D. Theiss, App. Phys. Lett. 82, 3964 (2003)[4] T. Sekitani and T. Someya, et al, in preparation[5] Kobayashi, T. Nishikawa, T. Takenobu, S. Mori, T. Shimoda, T. Mitani, H. Shimotani, N. Yoshimoto, S. Ogawa and Y. Iwasa, Nat. Mater. 3, 317 (2004)
12:30 PM - T1.8
Ultra-Low Voltage and Highly Flexible Organic Field Effect Transistors.
Piero Cosseddu 1 2 , Stefano Lai 1 , Giulia Casula 1 , Massimo Barbaro 1 , Annalisa Bonfiglio 1 2
1 Dept. of Electrical and Electronic Engineering, University of Cagliari, Cagliari Italy, 2 S3 nanoStructures and bioSystems at Surfaces, CNR-INFM, Modena Italy
Show AbstractIn this work we propose a novel structure for the fabrication of ultra-low voltage Organic Field Effects Transistors (OFETs), working at 1V. All devices have been fabricated on flexible Polyethylenetherephtalate film (PET) and are based on a proper combination of different, ultra-thin, insulating films (nominal thickness=20nm) employed as the gate dielectric for the final OFET. The proposed structure has been employed for the fabrication of unipolar p- and n-type transistors using different organic semiconductors, namely pentacene, TIPS-pentacene and N1400. The fabricated devices worked as unipolar transistors at voltages below 1V and are characterized by a remarkable very small leakage current, usually around 100-200pA. Very interestingly, mobility up to 10-1 and 1x10-2 cm2/Vs (for p and n-type transistors respectively) and Ion/Ioff ratios up to 104 have been obtained using this structure. Moreover, CMOS like complementary inverters have been also fabricated reaching gains values up to 10.In addition, a full electromechanical characterization of the presented structure has also been performed. We have demonstrated a clear correlation between the device output current and the applied surface strain, which can be related to an almost linear variation of the channel mobility induced by morphological deformations of the active layer induced by the applied mechanical stress. Such a behaviour was found to be reproducible, and fully recoverable for surface strain within the range of 0-2%, so that these devices can be employed for the realization of ultra-low voltage strain sensors. Moreover, since surface strain is strongly dependent on the mechanical properties of the employed substrate, we have also demonstrated that, by simply reducing the thickness of the plastic substrate, mechanically stable transistors can be realized. In particular, we have fabricated ultra-low voltage transistors on very thin PET films (1.5 µm thick) that, thanks to the very small surface strain induced by the substrate can be bent down to very small bending radii (below 1mm) without getting damaged and most importantly without giving evidence of change of their electrical performances. These results represent a step forward for the fabrication of low-voltage flexible electronic devices to be employed for the fabrication of innovative applications in the wearable electronics field, such as sensorized clothes for physiological parameter detection.
12:45 PM - T1.9
Low-Voltage Chemosensors for Analytes in Solution.
Stefano Lai 1 , Monia Demelas 1 2 , Giulia Casula 1 , Piero Cosseddu 1 2 , Massimo Barbaro 1 , Annalisa Bonfiglio 1 2
1 Electrical and Electronic, University of Cagliari, Cagliari, Cagliari, Italy, 2 INFM S3 nanoStructures and bioSystems at Surfaces, CNR, Modena, Emilia Romagna, Italy
Show AbstractA novel structure for organic biosensors is proposed. The Organic Charge Modulated Field Effect Transistor (OCMFET) consists of a floating gate OTFT, biased by a control capacitor; the floating gate hosts a sensing area, where specific molecules can be anchored in order to define the selectivity of the sensor. The structure acts as charge sensor, detecting changes in the amount of charge associated to the molecules on the sensing areas caused by specific chemical and biological reactions. This change determines a charge separation in the floating gate: a surplus of charge is induced under the OTFT channel and a shift in the threshold voltage is obtained. As a consequence, the conductance of the transistor is increased or decreased, accordingly to the sign of the charge and to the transport regime. In order to carry out differential measurements, each sensor hosts two OCMFET with a common source and common control gate electrode. The sensors are typically realized with a p-type semiconductor (pentacene or TIPS pentacene), so a negative charge immobilized on the sensing areas determines an increase of its conductance, while a positive charge determines its decrease. This structure has been first implemented with a dielectric layer with a thickness of about 1.5 µm. Using gold as metal for all the electrodes, its operating voltages are in the range of tens of Volts. This structure has been successfully used as pH sensor and DNA-hybridation sensor. pH sensitivity has been successfully tested in devices whose probe areas have been functionalized with amino or carboxylic acid functional groups, which protonate and de-protonate in acid and basic solutions respectively. Depending on the pH, these functional groups set the voltage drop on the insulating layer and thus modulate the current flowing between source and drain. As a consequence, if a p-type semiconductor is used, a decrease of the conductance is obtained in acid solutions, while its increase is obtained in basic solutions. DNA hybridation tests have been carried out immobilizing a thiol-modified single-stranded DNA probe on the sensing area. When functionalization occurs, the negative charge associated to the backbone of the DNA molecule determines a shift in the threshold voltage. A further shift of the threshold voltage is obtained when hybridation with a complementary DNA single-strand occurs.A second implementation of this principle consists in a a low voltage version of the OCMFET, based on a much thinner dielectric layer.. The structure and the working mechanisms of the sensors are the same described previously, but, by properly modifying the materials used in the realization process, operating voltages in the range of 1 Volt have been reached. The preliminary tests for this structure as pH and DNA sensor show an improved reproducibility in the results, suggesting a higher stability of the realized setup for the measurements in aqueous media.
T2: Patterning and Deposition
Session Chairs
Monday PM, November 28, 2011
Room 300 (Hynes)
2:30 PM - **T2.1
High-Definition, High-Speed Printing for Large-Area, Organic Integrated Circuits.
Tsuyoshi Sekitani 1 , Tomoyuki Yokota 1 , Yiying Zhao 1 , Takao Someya 1
1 , University of Tokyo, Tokyo Japan
Show AbstractEmploying complementary printing technologies with picoliter inkjet and screen printing with 18 µm-accuracy, we demonstrate the fabrication of all-printed large-area organic transistor integrated circuits for user-friendly human/machine interfaces. A p-type channel was formed by an inkjet-printed polycrystalline semiconductor, while a gate dielectric layer was formed using a single-molecule-thick self-assembled monolayer (SAM) and thin AlOx. Electrodes were fabricated using the state-of-the-art screen printing on a polyethylene naphthalate (PEN) film. For the demonstration, we have constructed an 300×300 mm2 organic transistor active matrix with 1-mm-priodicity, which was applied to read-out circuits for large-area pressure sensors. Fabrication of printed pseudo-CMOS inverters [1] and ring-oscillators have also been demonstrated for realizing gate-driver circuits including column selectors and low decoders. Furthermore, for high-speed and low-voltage operation of organic circuits, we demonstrate the feasibility of subfemtoliter inkjet that can eject Ag nanoparticle inks with 0.5-fL accuracy to fabricate organic transistors with ultrafine printed electrodes. In this work, Ag electrodes with a linewidth of 1 µm and a channel length of 1 µm were printed directly onto an air-stable, high-mobility o dinaphtho-[2,3-b:2’,3’-f]thieno[3,2-b]thiophene (DNTT) [2] that was deposited on a single-molecular self-assembled monolayer-based gate dielectric. We have successfully achieved mobility higher than 0.2 cm2/Vs, on/off ratio exceeding 107, subthreshold slope of 90 mV/decade, and a transconductance of 0.76 S/m for organic thin-film transistors with 4 V-operation [3], which is the largest transconductance reported for organic transistors fabricated using printing methods. We will also present the improvement in the stability and performance uniformity by utilizing new materials, printing processes and circuit design in the printed circuits.This study was partially supported by JST/CREST, Kakenhi (Wakate S & A), NEDO, and Special Coordination Funds for Promoting Science and Technology.[1] T. C. Huang et al., IEEE TED. 58, 141 (2010).[2] T. Yamamoto and K. Takimiya, J. Am. Chem. Soc. 129, 2224 (2007).[3] T. Yokota, et al., MRS Communications, Published online (2011).
3:00 PM - T2.2
Molecular Semiconductor Films and Devices Grown in Air Using Guard Flow-Enhanced Organic Vapor Jet Printing.
Shaurjo Biswas 1 , Kyle Luck 1 , Christian Schlepuetz 2 , Yongsoo Yang 2 , Roy Clarke 2 , Max Shtein 1
1 Department of Material Science and Engineering, University of Michigan, Ann Arbor, Michigan, United States, 2 Department of Physics, University of Michigan, Ann Arbor, Michigan, United States
Show AbstractGuard flow enhanced organic vapor jet printing (GF-OVJP) is a method for direct additive, solvent-free deposition of organic materials in air, applicable to the fabrication of organic LEDs, solar cells (OPV), and thin film transistors (OTFT). In GF-OVJP, the morphology and properties of deposited organic films can be controlled via the jet properties, in addition to control via substrate temperature and deposition rate, allowing for improved device performance while enabling rapid deposition on substrates, even at room temperature.GF-OVJP uses an inert carrier gas to transport organic vapor toward the substrate in the form of a focused jet, surrounded by an annular inert guard jet to prevent degradation of the hot organic material due to ambient oxygen and moisture. Local deposition rates well in excess of 100 nm/s are attained while depositing in air, achieving nanocrystalline organic films that require higher process temperatures and lower growth rates using conventional approaches.Here, we characterize the effect of the guard jet flow rate on the thin film morphology deposited in air by GF-OVJP, and relate the modified morphology and crystallinity to the film’s performance as the active layer of optoelectronic devices. In particular, GF-OVJP is used to grow inverted C60/SubPc heterojunctions in air and correlate the roughness and OPV device performance to the guard flow rate, varied from 0 to 1000 sccm, using simulations and experiments. Power conversion efficiency exceeding 2% is obtained at higher guard flow rates (e.g. > 700 sccm.) Furthermore, growth of polycrystalline pentacene thin films is shown in air, and studied via in-situ and ex-situ synchrotron X-ray diffraction. A positive shift is observed in the 2θ angle of the (001) and (002) film-phase Bragg peaks for higher guard flow rates, suggesting a change in the orientation of the film crystallites. The effect of flow conditions on the temporal evolution of phase and morphology of pentacene crystal grains is discussed. Hydrodynamic effects of guard flow are thus related to crystallinity and consequently, pentacene TFT performance.
3:15 PM - T2.3
Dry Lithography of Large Area, Thin Film Organic Semiconductors Using Frozen CO2 Resists.
Matthias Bahlke 1 , Hiroshi Mendoza 1 , Marc Baldo 1
1 Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts, United States
Show AbstractThe highest efficiency organic light emitting devices (OLEDs) are based on small molecular weight materials that cannot be patterned by conventional lithography. Instead, the manufacture of efficient OLED displays and solid-state lighting relies on shadow masks – an increasingly problematic solution for larger area substrates. Here, we present an entirely dry lithography process based on the sublimation of inert, frozen CO2. We demonstrate patterned organic and metallic features with densities as high as 325ppi. Side-by-side patterning of different organics is possible, as is the definition of metallic films on organic substrates. First CO2 gas is flowed over a cooled substrate, where it freezes solid to form a resist. The frozen CO2 is patterned by thermal excitation to define the areas where the desired thin film is to remain. For example, high throughput lithography is possible by patterning the frozen CO2 resist with a room-temperature stamp or roller. We describe patterning with prototype stamps fabricated with micron-scale features formed in SU-8 photoresist.After the desired thin film or films are deposited, the substrate is brought above the sublimation temperature of CO2, leaving behind only the intended pattern. All the unwanted regions are lifted off by the subliming resist without the aid of solvents.Finally, we will contrast this approach with the various serial printing approaches in development for OLEDs, focusing on the benefits of an inert lithography process that patterns large numbers of pixels in parallel without compromising OLED reliability.This work was supported as part of the Center for Excitonics, an Energy Frontier Research Center funded by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences under Award Number DE-SC0001088 (MIT). M. E. Bahlke would like to thank the MIT Energy Initiative for a Graduate Fellowship in Energy.
3:30 PM - **T2.4
Spray-Deposition of Organic Thin-Film Transistors: Towards Low-Cost, Large-Area Electronics.
Oana Jurchescu 1
1 Department of Physics, Wake Forest University, Winston-Salem, North Carolina, United States
Show AbstractSignificant progress has been made in organic semiconductor material design, and presently a large number of compounds exhibit electrical properties which rival α-Si:H. Nevertheless, all the records reported for organic thin-film transistor (OTFTs) mobilities can only be reproduced over small areas, when deposition methods such as spin-coating, drop-casting, dip-coating or ink-jet printing are used, and fail when larger areas are employed. It is clear that achieving long-range order is not trivial. I will describe a method that allows for efficiently depositing organic semiconductors over large areas, with minimal material waste and without compromising the device performance and fabrication costs. This method implies spray-deposition of soluble small molecules organic semiconductors such as acene and thiophene derivatives and yields OTFTs with field-effect mobilities of µ = 0.3 cm2/Vs, and current on/off ratios Ion/Ioff =107. These properties will be compared with results obtained with other deposition methods, as well as with single crystal data and discussed in the frame of correlating chemical structure with crystal packing and film microstructure. I will show that spray-coated thin-film morphology presents heterogeneities across multiple length scales, which severely affects charge transport. This order can be carefully controlled by tuning processing parameters.The work is in collaboration with: Natalia Azarova, Jack W. Owen, Claire A. McLellan, and Eric Chapman (Wake Forest University), Marsha A. Loth, John E. Anthony (University of Kentucky), Markos Paradinas, Mariona Coll, Carmen Ocal (Institut de Ciència de Materials de Barcelona).
4:15 PM - **T2.5
Low-Cost Manufacturing Process for OLEDs: Solution Printing.
Marie O'Regan 1
1 , DuPont Displays, Inc., Santa Barbara, California, United States
Show AbstractDuPont Displays solution coated AMOLED technology is poised for large format commercial adoption. Intra- and inter-pixel layer uniformity of solution processed AMOLED matches or exceeds that of commercial evaporated AMOLEDs and AMLCDs for short range uniformity.
4:45 PM - T2.6
Limitations on Roll Based Microcontact Printing Imposed by Variations in Macro Scale Stamp Dimensions.
Joseph Petrzelka 1 , David Hardt 1
1 , MIT, Cambridge, Massachusetts, United States
Show AbstractAdapting microcontact printing to roll-based printing processes is a promising technique for large area, high rate patterning of micron and sub-micron features. While previous authors have suggested that this laboratory scale process can be successfully scaled to large scale roll-based manufacturing, this paper examines stamp mechanics unique to the roll-based configuration. Ultimately, we provide practical limits and design insight for implementations of roll-based microcontact printing.In microcontact printing, pattern transfer quality is dependent on the integrity of the stamp contact. Several authors have identified common defect modes in stamp contact, including feature collapse and air entrapment. Collapse defects can be related to either stamp pressure or to stamp displacement. Several studies have identified the critical collapse pressure for these defect modes in the pressure-dependent configuration. To date, no one has mapped these pressure-dependent results to a displacement-dependent regime as found in roll-based processing, as in a roll nip or between a roll and rigid substrate. Our experiments demonstrate that the elastomeric stamp has a counter-intuitively high stiffness, such that the displacement-dependent regime is extremely sensitive to errors in macroscale stamp and roll dimensions.We address analytical, numeric, and experimental investigations of stamp contact mechanics between a rigid roll and rigid substrate. Analytical models are drawn from contact mechanics theory, in particular elastic layer problems that originally addressed elastomeric coatings on processing rolls. Using finite element methods, we examine stamp contact area and contact pressure as a function of roll displacement while incorporating the effects of the PDMS stamp surface energy. Additionally, we verify these contact area and pressure distribution data on a lab-scale precision rolling machine.Using these models, we identify the sensitivity of contact pressure and contact area to variations in displacement. By considering variations in displacement, we can identify the resulting variation in pressure (causing possible collapse) and variation in contact area (causing a varying contact residence time during rolling). Based on these results we infer practical limits imposed by inherent non-uniformities in the stamp and roll. Finally, we comment on the implications of these sensitivities to future design and control efforts, where we find that variations in stamp thickness and roll diameter must be less than the minimum feature size on the stamp.
5:00 PM - T2.7
Orthogonal Lithography for Organic Integrated Circuits.
Alex Zakhidov 1 2 , Hon Hang Fong 3 , Hans Kleemann 1 , John DeFranco 4 , Jin-Kyun Lee 2 , Priscilla Taylor 2 , Christopher Ober 2 , George Malliaras 2 , Mingqian He 5 , Michael Kane 6 , Bjoern Luessem 1 , Karl Leo 1
1 IAPP, TU-Dresden, Dresden Germany, 2 Materials Science and Engineering , Cornell University, Ithaca, New York, United States, 3 National Engineering Lab of TFT-LCD Materials and Technologies, Shanghai Jiao Tong University, Shanghai China, 4 , Orthogonal Inc, Ithaca, New York, United States, 5 , Corning Inc., Corning, New York, United States, 6 , Sarnoff Corporation, Princeton, New Jersey, United States
Show AbstractThe realization of organic integrated circuits (IC) requires reliable, high resolution, cost effective and scalable structuring technique. Traditional photo and e-beam lithography can not be directly applied to such systems due to chemical incompatibility of sensitive organic electronic materials with processing solvents. Novel structuring technique (such as ink-jet and soft imprint) lack reliable multi-stack integration protocols. In this work we demonstrate that existing infrastructure can be used to fabricate organic and hybrid electronics. We exploited the concept of solvent orthogonality to enable photolithography for high-resolution, high-throughput fabrication of organic electronic circuits. An array of ring oscillators utilizing top contact organic thin film transistors with 1 µm channel length have been fabricated on a 100 mm wafer scale. We used high performance, air stable poly(2,5-bis(thiophene-2-yl)-(3,7-ditri-decanyltetrathienoacene) as our active semiconducting material. Due to small channel length and small overlap length (4 μm) fabricated ring oscillator devices have signal propagation delay as low as 7 μsec per stage. We also show, that proposed technique can be used to fabricate small channel size field effect transistor based on p-type and n-type small molecule organic semiconductors.
5:15 PM - T2.8
Large Area-High Resolution Nanofabrication for Plasmonics and Metamaterials with Nanostencil Lithography.
Serap Aksu 1 2 , Min Huang 2 3 , Alp Artar 2 3 , Ahmet Yanik 2 3 , Ronen Adato 2 3 , Hatice Altug 2 3
1 MSE, Boston University, Brookline, Massachusetts, United States, 2 Photonics Center, Boston University, Boston, Massachusetts, United States, 3 ECE, Boston University, Boston, Massachusetts, United States
Show AbstractA new generation of plasmonic antennas and metamaterials operating at the visible and infrared frequencies is opening up a myriad of exciting possibilities. However, advances in nanoplasmonics critically depend on our ability to structure metals in a controllable way at high resolution. Although existing nanolithography techniques offer tremendous flexibility in creating large variety of nanostructure geometries and patterns at high resolution, they have major drawbacks such as low-throughput and fabrication complexity. In addition, the choice of substrates is also limiting factor for some widely used lithography techniques. In this talk, we show a novel high-throughput fabrication approach for fabrication of engineered plasmonic nanorod antenna arrays and metamaterial designs operating at visible and infrared wavelengths. The technique is called Nanostencil Lithography (NSL) and relies on direct deposition of materials through nanoapertures on a mask. We will present that we can fabricate nanostructures complementing the size of the nanoapertures on the stencil down to 10 nm accuracy and achieved reliable production of plasmonic dimmers (such as bow-ties), oligomers and metamaterials with inter-particle separation below 50 nm. We will also show that NSL enables engineered optical antenna arrays having optical qualities comparable to that of the ones fabricated by electron beam lithography. Moreover, as a unique advantage that has not been demonstrated before for any fabrication approach, we show that the nanostencil masks can be reused many times to fabricate series of plasmonic nanoantenna arrays with identical optical responses. Furthermore, we demonstrate that our technique has the flexibility and the resolution to create complex plasmonic nanostructures on the substrates that are difficult to work with e-beam and ion beam lithography tools. Enabling a resist free fabrication scheme, NSL also has promising potential for simple and high-throughput fabrication of 3D metamaterial designs.
5:30 PM - T2.9
Anti-Reflection Coatings on Temperature Sensitive Materials.
Pascal Buskens 1 , Marielle Wouters 1 , Zeger Vroon 1 , Corne Rentrop 1 , Marieke Burghoorn 1 , Barend Vermeulen 1 , Patrick Chin 2 , Oana van der Togt 2 , Daniel Turkenburg 1
1 , TNO, Eindhoven Netherlands, 2 , TNO, Delft Netherlands
Show AbstractIn the field of optical applications, such as ¼ lambda layers, (semi-)transparent and/ or reflective coatings, ceramics and metals are the most commonly used materials. Optical coatings like anti-reflection layers are mostly applied using chemical vapor deposition (CVD) or other techniques that require high temperatures and/or low pressures. If up-scaling or cost reduction of such optical devices is desired, it is advantageous to apply such layers by wet-chemical techniques. Multi layered anti-reflection coatings can be composed from alternating layers of well defined thickness of materials with different refractive indices. TNO has developed a standard procedure to translate conventional CVD optical coatings into equivalent sol – gel systems that may be applied on temperature sensitive materials.For large area applications such as solar cell covers, a single graded index layer is preferred. In this way, it is possible to generate a gradient in refractive index from about 1.5 (refractive index of the plastic substrate) to unity (refractive index of air). At TNO we have developed such a coating for plastic substrates like polycarbonate, PET and PEN using a hybrid UV curable coating system. The coating is structured using nano-imprint lithography.
5:45 PM - T2.10
Nanostructured Organic Photovoltaics from Contorted Coronenes.
Alon Gorodetsky 1 , Colin Nuckolls 1 , Chien-Yang Chiu 1 , Zachary Bullard 1 , Marshall Cox 2 , Ioannis Kymissis 2
1 Department of Chemistry, Columbia University, New York, New York, United States, 2 Department of Electrical Engineering, Columbia University, New York, New York, United States
Show AbstractI will discuss our efforts toward efficient organic photovoltaics (OPVs) that take advantage of the complementary geometry of contorted donor molecules and spherical acceptor molecules.1 We have designed, synthesized, and characterized a new class of contorted coronene donor materials.2-4 Such molecules demonstrate favorable properties, including environmentally sensitive shape-shifting, templated assembly of robust organic/organic interfaces, and the formation of three-dimensional crystalline networks.2-4 These supramolecular features have enabled us to design and fabricate nanostructured bulk heterojunction devices with power conversion efficiencies that approach state-of-the-art values for small molecule organic photovoltaics.2 Overall, our findings may hold significant implications for inexpensive and efficient solar energy conversion technologies.1)Tremblay, N. J.; Gorodetsky, A. A.; Cox, M. P.; Schiros, T.; Kim, B.; Steiner, R.; Bullard, Z.; Sattler, A.; So, W.-Y.; Itoh, Y.; Toney, M. F.; Ogasawara, H.; Ramirez, A. P.; Kymissis, I.; Steigerwald, M. L.; Nuckolls, C. ChemPhysChem 2010, 11, 799−8032)Gorodetsky, A. A.; Chiu, C.-Y.; Schiros, T.; Palma, M.; Cox, M.; Jia, Z.; Sattler, W.; Kymissis, I.; Steigerwald, M.; Nuckolls, C. Angew. Chem. Int. Ed. 2010, 49, 7909−7912.3)Whalley, A. C.; Plunkett, K. N.; Gorodetsky, A. A.; Schenck, C. L.; Chiu, C.-Y.; Steigerwald, M. L.; Nuckolls, C. “Bending Hexabenzocoronene into a Bowl.” Chem. Sci. 2011, 2, 132−135.4)Chiu, C.-Y.; Kim, B.; Gorodetsky, A. A.; Sattler, W.; Wei, A.; Sattler, A.; Steigerwald, M. L.; Nuckolls, C. “Shape-Shifting in Contorted Dibenzotetrathienocoronenes.” Chem. Sci. 2011, Advance Article.
Symposium Organizers
Thomas Anthopoulos Imperial College London
Conor Madigan Kateeva, Inc.
Ioannis Kymissis Columbia University
Max Shtein University of Michigan
T5: Poster Session
Session Chairs
Tuesday PM, November 29, 2011
Exhibition Hall C (Hynes)
T3: Conductors and Electrodes
Session Chairs
Tuesday PM, November 29, 2011
Room 300 (Hynes)
9:30 AM - **T3.1
Elastically Stretchable Metallization for Interconnects.
Sigurd Wagner 1 , Wenzhe Cao 1 , Patrick Goerrn 2 , Oliver Graudejus 3
1 Electrical Engineering, Princeton University, Princeton, New Jersey, United States, 2 Elektronische Bauelemente, Bergische Universität Wuppertal, Wuppertal Germany, 3 Adaptive Neural Systems, Arizona State University, Tempe, Arizona, United States
Show AbstractMany large-area circuit concepts need interconnects that conduct well electrically and can be stretched like rubber. Skin-like circuits, for example, rely on connections to hold up under cyclic stretching by tens of percent. Combining electrical connectivity with large mechanical strain makes elastically stretchable interconnects a demanding technology. All such interconnects use an elastomer as a substrate or as an enveloping matrix. The structures that have been introduced to make metals reversibly-stretchable fall into two groups: (i) 2-D conductors, either meanders of metal with ranges of size and thickness, and either in-plane or as out-of-plane surface waves, or a 2-D microscopic random network; (ii) 3-D dispersions of conductors with concentrations above a percolation limit. We survey these first and then focus on the microscopic-network type, which provides a good example of the art and the science that today go into making stretchable conductors. Its microscopic network forms when the surface of the elastomeric substrate expands during metal deposition. Patterning the metal and the stretchable electrical insulator require developing special microfabrication techniques. And, we are only beginning to understand quantitatively how the conductance of a microscopic network depends on strain, and to apply this understanding to evolve design guidelines. Developing robust technologies for the fabrication of stretchable conductors will remain an important task for large-area processing and patterning.
10:00 AM - T3.2
Silver Nanowires as Flexible, Transparent Conductors: Controlling Network Conductivity through Nanowire Geometry.
Sophie Sorel 1 , Philip Lyons 1 , Sukanta De 1 , Jonathan Coleman 1
1 , Trinity College Dublin, Dublin Ireland
Show AbstractThin transparent conducting films are critical for building many optoelectronic devices and components. Such films are usually made from doped metal oxides such as Indium Tin Oxide (ITO), which shows major drawbacks such as cost, brittleness and high temperature processing.
We have prepared thin, flexible, transparent, conducting films from aqueous dispersions of silver nanowires1. A sheet resistance, Rs, of < 1Ω/sq was obtained for a film with optical transmittance, T, of 92 %. These results make silver nanowires a possible replacement for ITO. In order to fully exploit such applicable properties the factors controlling the film conductivity must be understood.
A selection of nanowires with lengths, L, and diameters, D, varying from 61-127nm and 3.4-8.7µm respectively, were used to prepare films with a range of thicknesses. These films exhibit a transition from network to bulk-like DC conductivities at thicknesses of ~160nm1. However, thickness measurements for such films are not reliable. By measuring T and Rs in the bulk regime and in the percolation regime, a set of figures of merit2 were calculated which allowed the properties of the nanowires to be characterized by their diameter and without the use of thickness measurements.
Using these new figures of merit (Π and the percolative exponent n) , a peak was found in the sheet resistances for films (T= 90%) prepared from nanowires with D=88nm. The DC to Optical conductivity ratio decreases linearly with increasing diameter. From these figures of merit a proxy for the optical and DC conductivities, σOptmin and σDC,Btmin, where tmin is the bulk to network transition thickness, were calculated. It was found that both σOptmin and σDC,Btmin decrease with increasing nanowire diameter but they do so at different rates.
(1) De et al. “Silver nanowire networks as flexible, transparent, conducting films: extremely high DC to optical conductivity ratios” ACSNano 2009, vol.3, no.7, 1767-1774.
(2) De et al. “Size effects and the problem with percolation in nanostructured transparent conductors” ACSNano 2010, vol.4, no.12, 7064-7072.
10:15 AM - T3.3
An Improved In-Line Inkjet Printing Process for 3D Multilayer Passive Devices.
Abdelwahhab Yakoub 1 , Mohamed Saadaoui 1 , Romain Cauchois 1 2 , Jean-Michel Li 1 , Patrick Benaben 1
1 Electronic Packaging and Flexible Substrates, Ecole Nationale Supérieure des Mines de St-Etienne, Centre de Microélectronique de Provence, Gardanne France, 2 Innovation & Manufacturing Technologies, Gemalto, Gémenos France
Show AbstractInkjet printing is a very promising technology for the realization of flexible electronic devices. It is a full additive deposition process of functional inks at high speed without waste. However, the challenge remains the optimization of printing parameters and surfaces state. This paper describes an in-line process for the realization of 3D passive components on A4 format substrate by piezo inkjet printing, developed within a semi-industrial prototype system named “JETPAC”. JETPAC is a complete inkjet printing system including an oxygen plasma torch for surface preparation and post-process modules as a variable frequency microwave oven and an UV lamp for metal selective sintering and dielectric ink curing, respectively.JETPAC is used to achieve 3D resistors and capacitors by chaining conductor and dielectric layers on kapton® substrate: silver nanoparticles based ink is used to print conductors. For multilayer component elaboration, the metal ink is deposited both on kapton® and on printed dielectric materials that have a surface energy (S.E.) of 52mN/m and 32mN/m, respectively. Due to a low S.E. of the dielectric which impedes the realization of efficient silver ink printing, a special process has been developed. This process combines O2 plasma treatment and UV exposure before printing, allowing to reach S.E. value on dielectric near the optimum one (55mN/m).Process parameters have been defined as:- a 1 sec optimum O2 plasma exposure increasing the wettability of silver ink on the dielectric by enhancing its surface energy to 66mN/m.- then a 4 sec UV illumination step producing an ageing effect that tends to gradually decrease the surface energy of the dielectric from 66 to 56mN/m.This pre-process allows printing of well-defined conductive structures on top of the dielectric. In-line sintering of printed structures is then performed using variable frequency microwave source. The optimal resistivity of planar silver conductors varies from 5.7µΩ.cm to 8.75µΩ.cm for a sintering time between five and ten minutes at a temperature of 150°C.The process allows the elaboration of multilayer 3D structures including resistors and capacitors. As an example, five stacks of metal/dielectric layers were successively printed using the above-mentioned process. Those stacks were automatically aligned and vertical interconnections were printed on the dielectric sidewalls between upper and lower conductors: vertical conductors exhibit a thickness of 200nm which is four times thinner than the horizontal ones. Resistance (R) varies from 20mΩ to 4kΩ, and the 3D parallel plate capacitance (C) ranges from 20pF to 200pF for a 2x2 mm2 surface. Finally, systems combining R and C have been composed to achieve low pass filters designed with a cut-off frequency in the range of 40kHz.These promising results demonstrate the realization of multilayer devices by full in-line inkjet printing, and show high efficiency to achieve passive devices for smart tag applications.
10:30 AM - **T3.4
Transparent Electrodes for Plastic Electronics.
John de Mello 1
1 Chemistry, Imperial College London, London United Kingdom
Show AbstractOrganic semiconductors are attracting widespread interest due to their potential applications in lighting, displays and solar cells. A key obstacle to successful commercialisation, however, is the absence of high performance flexible electrodes that can be processed at plastic-compatible temperatures. For rigid applications, indium tin oxide (ITO) is the transparent conductor of choice, but its high cost, tendency to crack when flexed, and need for high temperature processing are problematic for large area applications. Here we investigate the use of conducting polymers, single wall carbon nanotubes and silver nanowires as ambient processable transparent electrodes for organic light-emitting diodes and solar cells, and find them to offer a promising alternative to ITO for many device applications.
11:30 AM - **T3.5
Graphene-Based Electrodes for Large-Area Organic Electronics.
Manish Chhowalla 1
1 , Rutgers University, Highland Park, New Jersey, United States
Show AbstractIn this presentation, recent progress on utilization of chemically derived graphene oxide (GO) and partially oxidized graphene (POG) for large area electronics will be described. The advantages of GO and POG are that they can be processed from solution and uniformly deposited on a variety of substrates and synthesized in potential ton quantities. Although their mobility is inferior to pristine graphene obtained from mechanical exfoliation or chemical vapor deposition, the electronic properties of GO and POG are exceptionally good for organic or large area inexpensive electronics. I will describe several such applications enabled by solution processability and electrochemical stability of transparent and conducting reduced GO and POG. In addition, I will also highlight the versatility of symmetric reduced POG source - drain (S-D) electrodes in three organic electronics applications: Hole, electron and ambipolar transporting organic field-effect transistors (OFETs), complementary voltage inverter circuits, and discrete OFETs based on a novel device architecture comprising a self-assembled monolayer (SAM) nanodielectric. The latter is widely recognized as an elegant approach to reducing the operating voltage and power consumption in electronic devices.
12:00 PM - T3.6
Roll-to-Roll Graphene Synthesis by Using Microwave Plasma Chemical Vapor Deposition at Low Temperature.
Takatoshi Yamada 1 , Jaeho Kim 1 , Masatou Ishihara 1 , Masataka Hasegawa 1 , Sumio Iijima 1
1 Nanotube Research Center, National Institute of Advanced Industrial Science and Technology, Tsukuba, Ibaraki, Japan
Show AbstractGraphene is expected to be an appropriate material for transparent conductive films for displays and solar cell applications because of its high conductivity, hardness and chemical stabilities. For development of graphene electronics, mass productions are the key technologies as well as depositions of high quality films. Thermal CVD on metal catalysts [1] and reduction of graphene oxide [2] were reported for the syntheses of graphene films. However, higher temperature and long process time are remaining problems for mass productions.Roll-to-roll process is usually used for industrial mass productions for thin film deposition. It was reported to transfer graphene films to polymer support from Cu substrates [3]. CVD within roll-to-roll process is expected for continuous depositions of graphene films. However, it has not yet been established for industrial mass production process because of high temperature and long time process. In order to establish roll-to-roll CVD synthesis of graphene films, both lowering the deposition temperature and shortening the process time are mostly essential. Recently, graphene films were synthesized at low temperature by micro-wave plasma (MWP) CVD [4]. Here, we report about the development of roll-to-roll MWPCVD process towards the industrial mass production of graphene films. A continuous graphene film with 294 mm width is successfully deposited on Cu foil at low temperature.For reduction of the substrate temperature during graphene deposition, surface wave plasma was used. During graphene deposition, CH4, H2 and Ar were used as source gases. These gases are introduced from the top of the CVD chamber and evacuated from the bottom the chamber. Roll-to-roll system consists of an unreeling and a roll-up mechanism. Roll-up process had a motor that dominates the film flow speed in the range from 1 to 500 mm/s. The unreeling process had a decelerator to keep the appropriate tension of Cu. The typical CVD conditions for formations of continuous films are as follows. Flow rates of CH4, H2 and Ar were 30, 50, 20 sccm, respectively. Transfer speed of Cu is 5 mm/s. Film temperature is less than 400 C. Total micro-wave power is 16 kW. Pressure is 30Pa. A rolled 33µm-thick cupper film with 294 mm in width was used as substrate.Both G and 2D peaks at 1592.6 and 2652.3 cm-1 were detected by Raman spectroscopy, which indicates that graphene was successfully obtained on Cu foils. The graphene film transferred onto a PET sheet, which showed high and uniform optical transmittance. Typical transmittance of the graphene film was estimated to be about 95 %. From these obtained results, a successful establishment of a roll-to-roll MWPCVD process for graphene deposition was accomplished.[1] A. Reina et al., Nano Lett. 9 (2009) 30-35, [2] J. Zhao et al., ASC Nano 4 (2010) 524-528.[3] S. Bae et al., Nature Nanotechnol. DOI: 10.1038/NNAN.2010.131.[4] J. Kim et al., Appl. Phys. Lett. 98 (2011) 091502.
12:15 PM - T3.7
Transfer Printing of Nanowire Electronics onto Arbitrary Substrates.
Chi Hwan Lee 1 , Dong Rip Kim 1 , Xiaolin Zheng 1
1 Mechanical Engineering, Stanford University, Stanford , California, United States
Show AbstractFabricating nanowire (NW) devices on nonconventional substrates is highly desirable for applications, such as flexible electronics, conformal sensors, and bio-integrated electronics. Although several methods have been developed towards this goal, the NW devices have been realized only on a few flexible/transparent substrates including plastic, glass, and thick polymer (over 20 μm thick) due to the limitations of process temperatures, chemicals, and handling difficulties. Here, we demonstrate a new approach, named water-assisted transfer printing (WTP) method that enables to transfer pre-fabricated NW devices on Si wafers to target substrates without further fabrication, so the WTP method significantly broadens the choice of substrates for NW devices. With the WTP method, we successfully transferred a range of NW electronic devices, such as resistors, diodes, and field effect transistors, onto diverse substrates, including paper, tape, glass, polydimethylsiloxane (PDMS), aluminum foil, and ultrathin polymer substrates (800 nm thick). The transfer yield is nearly 100% regardless of materials and feature geometries, and the transferred devices maintain their original geometries and electronic properties with high fidelity. The WTP method also has the potential to fabricate other electronics based on nanotubes, thin films, and organic materials on nonconventional substrates. Given the versatility and reproducibility of the WTP method, we believe that it will open up unique opportunities for integrations of various inorganic electronic devices onto flexible, transparent, attachable, and even stretchable substrates, and thereby impact a range of applications, such as flexible displays, biosensing, robotics, and energy conversion systems.
12:30 PM - T3.8
Solution-Processed Transparent Conducting Polymer Films with a Conductivity of > 3000 S/cm and Its Application as Transparent Electrode of Polymer Solar Cells.
Yijie Xia 1 , Jianyong Ouyang 1
1 Department of Materials Science & Engineering, National University of Singapore, Singapore Singapore
Show AbstractHigh-performance flexible transparent conductive materials are in urgently needed as the transparent electrode of optoelectronic devices, because the traditional transparent condutive material, indium tin oxide (ITO), has problems of scarce indium on earth and poor mechanical flexiblity. A conducting polymer, PEDOT:PSS, is promising to be the next-generation transparent electrode material due to its solution processability, high transparency and high mechnical flexibility. However, as-prepared PEDOT:PSS from its aqueous solution usually has a conductivity below 1 S/cm. This paper will report novel methods to enhance the conductivity of the solution-processed PEDOT:PSS films to be more than 3000 S/cm, which is comparable to that of ITO, and the application of the highly conductive PEDOT:PSS films as the transparent electrode of polymer solar cells.
12:45 PM - T3.9
Study of Low-Temperature Sintering for Copper Ink for the Application of Inkjet Printing Using Pulse Wire Evaporated(PWE) Copper Nano Powders Coated with Vaporized Self-Assembled Multi-Layers(VSAMs).
Jaehak Her 1 , Shinyoung Park 1 , MD. Mominul Haque 1 , Joonghak Park 2 , Caroline Sunyong Lee 1
1 Division of Metallurgy and Material Engineering, Hanyang Univ., Ansan-si Korea (the Republic of), 2 , Nano Technology, Daejeon Korea (the Republic of)
Show AbstractThe flexible substrates have been considered as the most important thing in display field. Polymers are generally used as flexible substrates and they are low-temperature materials where its processing temperature is under 200 celsius. Copper is very useful in making electrical lines on substrate because it is cheap and has high electrical conductivity. However, it is easily oxidized and hard to disperse nano-sized powders to reduce sintering temperature. PWE method, which is a type of inert-gas phase-condensation technique, is one of the most cost-effective nano-powder production method. In this study, 100nm-sized copper powders were fabricated by PWE and they were coated with 1-octanethiol(CH2(CH3)7SH) as VSAMs for oxidation prevention using dry method. And 1-octanol was used as a solvent for ink due to its long life time and good dispersion of cooper nano powders in the solvent.100nm-sized copper powders were coated with 1-octanethiol in vacuum(4.0 × 10-6 torr) chamber in the glove box under high-purity Ar atmosphere. As a result, 10-nm thick 1-octanethiol layer was coated. And 10wt% ink of 1-octanethiol coated copper powders was prepared in 1-octanol solvent. After that, a pattern with its dimension of 10x10mm, was made on a glass substrate followed by heat treatment in 100% hydrogen atmosphere. For analysis, electrical resistivity was measured using 4-point probe and thickness was measured using alpha-step. As a result, copper nano powders were well dispersed in 1-octanol ink solution for 6 weeks. And its electrical resistivity for the pattern was measured to be 7.67 × 10-6Ωcm with its thickness of about 5um. Its electrical resistivity is 4.6 times than that of bulk copper, which is about 1.67 × 10-6Ωcm. Therefore, a novel method of fabricating copper nano ink using VSAM coating for oxidation prevention was demonstrated for low temperature sintering process.
T4: Devices and Systems
Session Chairs
Tuesday PM, November 29, 2011
Room 300 (Hynes)
2:30 PM - **T4.1
Exploring Polymer Ferroelectric Transistors and Diodes for Flexible Optoelectronics.
Gerwin Gelinck 1
1 , Holst Centre, Eindhoven Netherlands
Show AbstractThe advent of non-volatile flash memory revolutionized consumer electronics. Similar types of organic memory will play a pivotal role in the wide range of new market opportunities of flexible electronics. Currently, these memory elements do not exist, thus forming a major impediment to the commercialization. Ferroelectric polymers based on poly(vinylidenedifluoride trifluoroethylene), P(VDF-TrFE), have drawn considerable attention due to their excellent solution processability and stability. They can be integrated with both conventional silicon-based microelectronics and emerging microelectronic technologies based on organic and metal oxide semiconductors to make electrically reprogrammable non-volatile memories. In ferroelectric memories information is stored via two anti-parallel polarization states interpreted as “0” or “1”. Ferroelectric polymers can possess spontaneous electric fields that are more than an order of magnitude larger than the breakdown field of SiO2, the most widely used insulating medium for field effect devices. The use of the ferroelectric polarization field thus allows for extremely large modulation of the charge carrier density and electronic properties of semiconducting materials. In this presentation we will discuss the potential of the ferroelectric effect to control and manipulate in a reversible fashion charge transport in diodes and thin-film transistors. The resistive switching that they provide results in a high or a low current response that can read non-destructively, making them suitable candidates for non-volatile reprogrammable. In this presentation the latest progress will be reported.
3:00 PM - T4.2
Matrices of Inkjet Printed OFETs for the Realization of Artificial Robotic Skin.
Piero Cosseddu 1 2 , Laura Basirico 1 2 , Alberto Loi 1 , Stefano Lai 1 , Massimo Barbaro 1 , Annalisa Bonfiglio 1 2
1 Dept. of Electrical and Electronic Engineering, University of Cagliari, Cagliari Italy, 2 S3 nanoStructures and bioSystems at Surfaces, CNR-INFM, Modena Italy
Show AbstractIn this paper we introduce a novel, flexible, system for mechanical deformation detection. The core of the system is based on an Organic Field Effect Transistor (OFET) which has been assembled on a flexible PET substrate and patterned by means of inkjet printing. It will be shown that the surface deformation induced by an external mechanical stimulus gives rise to a marked, reproducible and reversible variation of the device output current. We have performed a detailed investigation on the electromechanical behaviour of OFETs and we have demonstrated that this phenomenon is correlated to the morphological and structural changes taking place within the organic semiconductor upon mechanical stimulus application, thus leading to a reversible (within a certain rage of surface deformation) change in the output current.In order to have a deeper understanding of the physical causes dominating this behaviour, we have made a detailed investigation on the effective correlation between sensitivity and morphological/structural properties of different organic semiconductors films employed as active and sensitive layers. Starting from the same basic structure, OFET-based mechanical sensors were fabricated employing a set of very different organic semiconductors, namely small molecules (pentacene) deposited by thermal evaporation and different solution processable organic semiconductors (P3HT, TIPS-pentacene, N1400) deposited either by spin coating or drop casting. We will show how the intrinsic properties of the employed active layers play a crucial role in determining the final sensitivity to the mechanical deformation. Starting from these results, more complex structures such as arrays and matrices of OFET based mechanical sensors have been fabricated by means of inkjet printing. Thanks to the flexibility of the introduced structure, we will show that the presented system can be transferred on different surfaces (hard and soft) and employed for a wide range of applications. In particular, we have designed and fabricated a fully functional system based on a matrix of 64 elements that can be employed for detecting mechanical stimuli over larger areas, and we will demonstrate that such a system can be successfully employed for tactile transduction in the realization of artificial “robot skins”. We will also show that the same system can be also employed for innovative applications in the wearable electronics field, such as sensorized clothes for physiological parameter detection, as for instance joint bending, and/or breathing rate or also human posture by using a matrix of sensors embedded into a sole shoe.
3:15 PM - T4.3
High-Precision Capillary-Driven Self-Alignment of mm- and cm-Sized Systems-in-Foil.
Gari Arutinov 1 2 , Edsger Smits 1 , Jeroen van den Brand 1 , Herman Schoo 1 , Andreas Dietzel 1 2
1 , Holst Center/TNO, Eindhoven Netherlands, 2 Micro- and Nano- Scale Engineering section (MNSE), Eindhoven University of Technology, Eindhoven Netherlands
Show AbstractFluidic Self-Assembly technology (FSA), invented at University of California, Berkeley by Prof. John S. Smith and coworkers [1] was extremely successful and led to breakthroughs in the field of chip integration. However low yield hindered industrial applications of this approach. Originally proposed idea has been further investigated and developed by numerous scientific groups all over the world. Besides methods such as shape-directed assembly [1,2] research on fluidic self-assembly also includes the use of capillary forces for accurate positioning of functional elements on a corresponding binding sites on a big carrier. A direct capillary-driven self-assembly approach unlike the parallel stochastic assembly processes obeys to the following concept: one site, one droplet, one chip. A common way to use capillary forces for placing and aligning chips is to pattern a substrate surface selectively into hydrophilic and hydrophobic areas or in more precise words in areas with different surface energies. Many strategies for patterning surfaces exist in the literature, including ultraviolet exposure of SAMs [3], microcontact printing of one type of SAMs and subsequent exposure to a second set of SAMs [4,5] and surface plasma treatment [6,7]. Due to fundamental scaling principles, forces that scale with lower powers of the length scale become dominant over those that scale with higher powers [8]. Capillary forces scale with the length of the solid-liquid interface (power “1”), and therefore become dominant over surface (power “2”) and body forces (power “3”) as the size of the system is reduced. Based on this advantageous scaling, lots of groups developed various techniques to self-align micron-sized silicon chips. Through miniaturizing it is possible to achieve a very high accuracy and alignment yield. For successful alignment, micron-sized chips need to be pre-aligned in respect of corresponding binding sites with high accuracy in order to sufficiently overlap dice with a corresponding assemble droplets, which is a complicated task. Whereas, in case of mm- and cm-sized dice this overlap can be easily achieved without any complex machining for high precision placement. Using water as a medium for direct self-assembly mm- and cm-sized square-shaped pre-marked foil dice were aligned on patterned marked glass and foil carriers also. Figure 1 shows the alignment marker structure patterned by laser in the center of each foil die. Alignment accuracy of about 20 µm was obtained for a set of mm- and cm-sized foils. As an illustration, Figure 2 shows mm-sized foils aligned on the patterned marked underlying glass carrier. Since we demonstrated that mm- up to cm-sized functional foils can be aligned with high accuracy, assembling systems such as separately manufactured sensors, paper batteries and RFIDs is feasible with this direct capillary-driven self-alignment approach.
3:30 PM - **T4.4
One Transistor One Capacitor Device Structure for Ferroelectric Random Access Memory in Flexible Electronics.
Duo Mao 1 , I. Mejia 1 , A. Salas-Villasenor 1 , M. Singh 1 , H. Stiegler 1 , Bruce Gnade 1 , M. Quevedo-Lopez 1
1 Department of Material Science and Engineering, University of Texas - Dallas, Richardson, Texas, United States
Show AbstractWe have demonstrated a low temperature process ferroelectric nonvolatile random access memory (FeRAM) element based on one transistor one capacitor (1T1C) device structure for flexible electronics. The n-channel TFTs is fabricated using cadmium sulfide as the semiconductor, and poly(vinylidene fluoride-trifluoroethylene) copolymer is used for the ferroelectric capacitors (FeCaps). The device is fabricated using an eight-mask photolithography process using standard interconnect technology, with two inter-level dielectric layers. The maximum processing temperature for TFTs is 150 °C and 120 °C for ferroelectric capacitors. For the FeCaps in 1T1C, the hysteresis loop shows spontaneous and remanent polarizations of 8.4 and 7.3 μC/cm2, respectively, with a coercive voltage of 7.9V (corresponding to coercive field of approximately 0.5MV/cm) for the 100 × 200 μm size FeCaps. For working at 15 V, the fabricated FeCaps can achieve switching polarization of 13.0 μC/cm2 at 50 μs pulses, while maintaining a low nonswitching polarization of 1.7 μC/cm2. The FeCaps are able to work at temperature range from -60 to 60 °C, and 87% of the initial switching polarization remained with low nonswitching polarization after 1×106 cycles of switching at room temperature. For the fabricated 1T1C devices, the FeCaps can be repeatablely accessed through the TFTs by applying a turn on voltage on the word line, and large signal margin can be achieved on the bit line for different polarization states of the FeCaps.
4:30 PM - **T4.5
Polymer OLEDs for Large Area Applications.
Jeremy Burroughes 1 , Richard Wilson 1
1 , Cambridge Display Technology Ltd., Cambridgeshire United Kingdom
Show AbstractAs Polymer OLED processing is by solution coating techniques such as ink jet printing, it is therefore intrinsically suitable for large area OLED applications such as TVs. We will show that when the ink jet process is optimised parity between ink jet printing and spin coating can be achieved. Large area applications operate at higher temperatures. We will discuss using P-OLED temperature stability data the impact of this on system requirements.
5:00 PM - T4.6
Metacapacitors: Printed, Low-Cost Capacitors for Electric Power Conversion.
Eli Leland 1 , Barry Van Tassell 1 , Paul Chando 1 , Abhinav Gaikwad 1 , Shyuan Yang 2 , Brian Tull 2 , Limin Huang 1 , Olivia Niitsoo 1 , Ioannis Kymissis 2 , Alexander Couzis 1 , Dan Steingart 1 , Steve O'Brien 1
1 CUNY Energy Institute, City College of New York, New York, New York, United States, 2 Electrical Engineering, Columbia University, New York, New York, United States
Show AbstractNewer and better capacitors will be required to allow switched capacitor DC-DC converters to transition to higher-power applications including drivers for LED lighting and voltage conversion for photovoltaic panels. These improved capacitors must combine high frequency performance with low leakage, low loss, and low cost. We have developed a method for fabricating capacitors using printed nanoparticle dielectrics that offer the requisite performance for these power conversion applications. Whereas standard ceramic capacitor manufacture requires a high-temperature firing step, our printed capacitors are fabricated using only low-temperaure processing, and thus enable flexible, configurable high-throughput deposition onto a polymer substrate at low cost.We have demonstrated working (non-shorted) capacitor devices as large as 10 cm^2 with a nanoparticle dielectric film only 300 nm thick. Using techniques including dispenser printing and inkjet printing we have demonstrated multilayer capacitor structures with areal capacitance density of 1 nF/cm^2. Devices have shown frequency performance to several megahertz and loss tangent below 0.1. Leakage current at the rated operating voltage of 10 V is below 100 nA/cm^2. Nanoparticle dielectrics include both barium-strontium titanate (BST) and silver-silicon dioxide core-shell particles. Electrode materials include printed nanoparticle silver inks and sputtered and evaporated aluminum and gold.
5:15 PM - T4.7
Transfer-Printed Assemblies of Colloidal Quantum Dots for Full-Color Light-Emitting Displays.
Tae-Ho Kim 1 , Kyung-Sang Cho 1 , Eun Kyung Lee 1 , Sang Jin Lee 1 , Jungseok Chae 2 , Jung Woo Kim 1 , Do Hwan Kim 1 , Sang Yoon Lee 1 , Byoung Lyong Choi 1 , Young Kuk 2 , Jong Min Kim 1
1 , Samsung Advanced Institute of Technology, Yongin Korea (the Republic of), 2 Physics and Astronomy, Seoul National University, Seoul Korea (the Republic of)
Show AbstractLight-emitting diodes with quantum dot luminophores show promise in the development of next-generation displays, because quantum dot luminophores demonstrate high quantum yields, extremely narrow emission, spectral tunability andhigh stability, among other beneficial characteristics. However, the inability to achieve size-selective quantum dot patterning by conventional methods hinders the realization of full-colour quantum dot displays. Here, we report the first demonstration of a large-area, full-colour quantum dot display, including in flexible form, using optimized quantum dot films, and with control of the nano-interfaces and carrier behaviour. Printed quantum dot films exhibit excellent morphology, well-ordered quantum dot structure and clearly defined interfaces. These characteristics are achieved through the solvent-free transfer of quantum dot films and the compact structure of the quantum dot networks. Significant enhancements in charge transport/balance in the quantum dot layer improve electroluminescent performance. The results suggest routes towards creating large-scale optoelectronic devices in displays, solid-state lighting and photovoltaics.
5:30 PM - T4.8
Solution-Processed Multiphoton-Emission-Type Polymer Light-Emitting Devices.
Takayuki Chiba 2 , Yong-Jin Pu 1 2 , Yang Yang 2 3 , Hisahiro Sasabe 1 2 , Junji Kido 1 2
2 Research Center for Organic Electronics, Yamagata University, Yonezawa Japan, 1 Department of Organic Device Engineering, Yamagata University, Yonezawa Japan, 3 Department of Materials Science and Engineering, University of California, Los Angele, Los Angele, California, United States
Show AbstractMulti-photon emission (MPE) type organic light emitting devices (OLEDs) are comprised several vertically stacked light-emitting (LE) units, connected in a series with a charge-generating layer (CGL). When N number of LE units are stacked in an MPE device, the luminance increases N-fold, compared to that of conventional OLEDs having a single LE unit, at equal current density. We report the MPE devices with two LE units by hybrid process of spin-coating and evaporation. The device structure was [ITO / 1st-LE unit / CGL / 2nd-LE unit / Al]. Solution-processed 1st and 2nd-EL unit are consisting of PEDOT:PSS as a hole injection layer, fluorene-based polymer as a light-emitting layer, and ZnO as an electron injection layer. Thin Al layer (1 nm) and MoO3 were successively evaporated as an intermediate CGL. The MPE device exhibited doubly higher current efficiencies than that of unstacked single LE device.
5:45 PM - T4.9
A Study on the Design of Oriented Polymer/Dye Polarizer for OLED/LCD Application.
Myungman Kim 1 2 , Jonghoon Won 1 2 , Myungseob Jeong 1 2
1 , Samsung Advanced Institute of Technology, Yongin-si, Gyeonggi-do Korea (the Republic of), 2 , Samsung Electronics Co., Ltd, Suwon Korea (the Republic of)
Show AbstractPolymeric sheet polarizers has been widely using in the application of liquid crystalline display. These polarizers are manufactured from oriented sheets of semicrystalline polymers containing dichroic dyes. Orientation of polymer/dye composite is conducted by drawing at the temperature above glass transition of polymer, but below the melting temperature of polymer. During drawing, the dichroic dyes are oriented with generating anisotropic adsorption of light in the visible wavelength range (λ = 380 - 780 nm). This results in the typical characteristics of a polarizer, i.e., two crossed polarizers hardly transmit light whereas two parallel polarizers are highly transparent. This paper presents a framework to design oriented polymer/dye polarizers. It provides the criterion of polymer and dye selection to meet the requirement of polarizing film for OLED/LED application. Process variables in drawing step (such as drawing temperature and drawing ratio) are evaluated and optimized to accomplish the optical property for OLED/LCD application. The theoretical calculation is conducted to evaluate the effect of dye concentration and drawing ratio on the optical characteristics of polarizers (such as dichoric ratio, polarizing efficiency and transmittance). This study could be practically utilized to design polarizing films using both commercially available and new developed dyes.
T5: Poster Session
Session Chairs
Wednesday AM, November 30, 2011
Exhibition Hall C (Hynes)
9:00 PM - T5.1
Oligomer Diffusion Induced Visible Pattern in Touch Screen Panel.
Duk Su Kim 1 , Jae Ik Yang 1 , Dong Hyuk Shin 1
1 , ELK Corporation, Daejeon Korea (the Republic of)
Show AbstractAlong with runaway hit products from Apple, such as iPhone and iPad, the greater needs and demands on touch screen panel has been increased. Accordingly, many issues that are not acknowledged previously have been occurred, and some of them are still unclear. This study aims to determine the cause of visible patterns of transparent conducting oxide (TCO), which is used for touch panel electrodes. Analytical methodologies, such as SEM/EDS, XPS/ESCA, and HPLC, are conducted to elucidate the root cause of this issue. After series of attempt to isolate the failure, it is found to be related with polymeric diffusion of PET oligomer, trimer in most of cases, into optically clear adhesive, one of DST that is adopted for touch panel industry, and diffused element is preferentially segregated on the interface with TCO. To confirm its occurrence, oligomer-content is enriched for the specific sample, and the other is controlled to be minimal. Visible pattern follows the one with high oligomer content.
9:00 PM - T5.10
Optimization of Contact and Adhesion during Lamination and Roll-to-Roll Process of Organic Electronic Structures.
Jing Du 1 2 , Wali Akande 1 3 , Tiffany Tong 1 3 , Androniki Tsakiridou 2 4 , Doumon Yao 5 , Zebaze Kana 6 , Wole Soboyejo 1 2 5
1 The Princeton Institute for the Science and Technology of Materials (PRISM), Princeton University, Princeton, New Jersey, United States, 2 Department of Mechanical and Aerospace Engineering, Princeton University, Princeton, New Jersey, United States, 3 Department of Electrical Engineering, Princeton University, Princeton, New Jersey, United States, 4 Picker Engineering Program, Smith College, Northampton, Massachusetts, United States, 5 , African University of Science and Technolog, Abuja, Federal Capital Territory, Nigeria, 6 , Sheda Science and Technology Complex, Abuja, Federal Capital Territory, Nigeria
Show AbstractThis paper presents the results of a combined experimental, analytical, and computational study of the contact and adhesion between surfaces during fabrication of organic electronic devices. The material properties of organic materials used in these processes are characterized using nanoindentation testing, atomic force microscopy and fracture mechanic techniques. These experimental results are then incorporated into analytical and finite element models of contact during lamination processes that are relevant to roll-to-roll fabrication. The effects of substrate stiffness, the effects of applied pressure and the effects of surface roughness/impurities on contact and adhesion are studied. The implications of the results are discussed for the roll-to-roll fabrication of robust organic electronic structures.
9:00 PM - T5.11
Photopatterning of Precursor Poly(p-phenylenevinylene) Polymers.
Ross Johnson 1 , Patrick Finnegan 1 , Cody Washburn 1 , David Wheeler 2 , Shawn Dirk 1
1 organic materials, Sandia National Laboratories, Albuquerque, New Mexico, United States, 2 Biosensors and Nanomaterials, Sandia National Laboratories, Albuquerque, New Mexico, United States
Show AbstractConjugated polymers such as poly(p-phenylenevinylene) (PPV) have attracted a great deal of attention due to their electronic and optoelectronic properties. The ability to control the lateral spatial resolution of conjugated polymers will allow for improved integration into electronic devices. We have previously described a method for photo-patterning a xanthate precursor polymer leading to micron scale spatial control of conjugated poly(p-phenylenevinylene). Here, we expand on our initial work, examining the photopatterning of several other novel precursor PPV polymers. We will discuss our ongoing efforts to improve the conductivity of the photopatterned polymers through doping, as well as our progress in integrating these materials into devices.
9:00 PM - T5.13
Quest for a High Performance Host Material Based on a 3,3’-Bicarbazole Derivative in Blue Phosphorescent OLED.
Naoki Toyota 1 , Hisahiro Sasabe 1 2 , Tasuku Ishizaka 1 , Yong-Jin Pu 1 2 , Junji Kido 1 2
1 Organic Device Engineering, Yamagata univ, Yonezawa, Yamagata Japan, 2 Research Center for Organic Electronics, Yamagata univ., Yonezawa, Yamagata Japan
Show AbstractWe designed and prepared a series of 3,3’-bicarbazole derivatives for blue phosphorescent OLED. Then, in order to quest for molecular design of host, we investigated the relationship between the physical properties and device performances. As a result, by using tetraphenylmethane-containing host material, we successfully developed a high-efficiency blue OLED with a power efficiency of over 40 lm/W @ 100cd/m2 without any outcoupling enhancement. In this presentation, we will also report the relationship between the substituent and device performances.
9:00 PM - T5.14
Laser-Induced Forward Transfer of Phthalocyanines.
Premysl Fitl 1 , Vladimir Myslik 2 , Martin Vrnata 1 , Kopecky Dusan 1 , Irena Kasparkova 2 , Jan Vlcek 1 , Jitka Skodova 1
1 Department of Physics and Measurements, Institute of Chemical Technology in Prague, Prague Czechia, 2 Department of Solid State Engineering, Institute of Chemical Technology in Prague, Prague Czechia
Show AbstractLaser-Induced Forward Transfer (LIFT) technique was successfully used for preparation of chemical sensors with structured sensitive layers containing Zinc and Copper phthalocyanines. The LIFT source substrates were prepared as follows: Thin BK7 glass slides with sputtered metal layer (gold, platinum - thickness ~ 100 nm) were washed in acetone and dried. Side with sputtered metal was then covered with a thin phthalocyanine layer deposited by low temperature evaporation in high vacuum chamber (working pressure 10-4 Pa, deposition rate ~ 1nm/min, substrate temperature 20°C). In the next step LIFT depositions of phthalocyanines were carried out from these substrates. The LIFT - apparatus include micro CNC machine Gravostar GV-20 (microstepping with possible minimal step 300 nm) equipped with semiconductor laser operating at 405 nm in continual mode and focusing optics. During the depositions laser power was set to 50 mW and diameter of the beam spot to approximately 6 microns. The distance between LIFT source substrate and target (i.e. glass, silicon or alumina sensor substrates) was varied between 1-100 micrometers. Deposition process was held in an inert surrounding gas (Nitrogen, Argon) at atmospheric pressure. Chemical composition of deposited structures was studied by FTIR. It was proved that chemical structure of Zinc and Copper phthalocyanine is not affected by this deposition technique. The best resolution of prepared structures was obtained for phthalocyanine layer thickness of 100-150 nm. Employing the LIFT technique we are able to achieve precise and reproducible laser transfer of materials to the target substrate with structural resolution of 7 microns.
9:00 PM - T5.15
Large Area Electrodeposited Nickel Single Crystal Substrates for Photovoltaic.
Meifang Li 1 , Deepa Vairavapandian 1 , Eric Chason 1
1 Division of Engineering, Brown University, Providence, Rhode Island, United States
Show AbstractThin films such as Si, Ge film are key components for optical devices such as solar cells and photo detectors. Single crystal thin films have higher quantum efficiency than their multi-crystalline counterparts, but the cost of single crystal production can be prohibitive. We describe a method for producing large-area inexpensive single crystal substrates for semiconductor thin films through electrochemical processing. The method uses a sequence of electropolishing, epitaxial electrodeposition and selective etching to create freestanding foils from an initial template crystal that can then be reused to make more material. Pole figure and XRD results indicate high crystal quality, with FWHM of the (200) peak less than 1deg. We have shown that the starting single crystal nickel substrate can be reconditioned using electropolishing so that we have been able to produce multiple generations of freestanding films from the same starting sample with the same crystalline quality. We describe how this will allow us to develop a continuous process for generating large area substrates at low cost.
9:00 PM - T5.16
Control of Doctor-Blade Coated Poly (3,4-ethylenedioxythiophene)/Poly(Styrenesulfonate) Electrodes Shape on Pre-Patterned Substrates via Microflow Control in a Drying Droplet.
Yunseok Jang 1
1 Printed Electro-Mechanical Systems Research Center, Korea Institute of Machinery & Materials, Daejeon Korea (the Republic of)
Show Abstract In recent years, the doctor-blade system has received special attention as a coating technique for the cost-effective fabrication of organic electronics devices such as organic light-emitting diodes (OLEDS), organic thin-film transistors (OTFTs), organic solar cells (OSCs), and dye-sensitized solar cells (DSSCs). Most of these studies have not focused on patterning the conducting layers but rather on coating them. However, conducting layer patterning is more important to the development of wider applications than conducting layer coating. In this presentation, we propose a simple and fast patterning method based on the doctor-blade system by adjusting the wetting properties at the interface of ink and substrate to deposit the polymer electrodes, such as poly(3,4-ethylenedioxythiophene)/poly(styrenesulfonate) (PEDOT/PSS), on the substrate. And we demonstrate the influence of evaporation-induced flow in the PEDOT/PSS droplet on the film morphology of the doctor-blade printed conducting polymer layers by varying the composition of the solvent mixture. In particular, the patterns of the PEDOT/PSS electrodes without the ring-like stains were successfully produced by adjusting the microflow direction in the PEDOT/PSS solution drop.This study was supported by a grant (B551179-08-03-00/ B551179-10-01-00/ NK162D/ NK162H) from the cooperative R&D Program funded by the Korea Research Council Industrial Science and Technology, Republic of Korea.
9:00 PM - T5.17
Ultra High-Efficiency Multi-Photon Emission Blue Phosphorescent OLEDs Incorporating a Wide-Energy-Gap Charge Generation Layer.
Kazuhiro Minamoto 1 , Hisahiro Sasabe 1 2 , Masakatsu Hirasawa 1 2 , Yong-Jin Pu 1 2 , Junji Kido 1 2
1 Organic Device Engineering, Yamagata univ, Yonezawa, Yamagata Japan, 2 Research Center for Organic Electronics, Yamagata univ., Yonezawa, Yamagata Japan
Show AbstractWe developed ultra highly efficient blue phosphorescent OLEDs incorporating a novel charge generation layer. For the CGL in this multi-photon emission blue OLED, we used a wide-energy-gap electron-transporter. This blue OLED showed an extremely high current efficiency of over 90 cd A–1, and an external quantum efficiency of over 40% at 100 cd m–2 without any outcoupling enhancement.
9:00 PM - T5.18
Influence of Nitrogen Position of Pyridine-Containing Electron-Transporters on Physical Properties and Blue Phosphorescent OLED Performances.
Masatoshi Ishiba 1 , Hisahiro Sasabe 1 2 , Yong-Jin Pu 1 2 , Junji Kido 1 2
1 Organic Device Engineering, Yamagata univ, Yonezawa, Yamagata Japan, 2 Research Center for Organic Electronics, Yamagata univ., Yonezawa, Yamagata Japan
Show AbstractWe designed and prepared three types of pyridine-containing electron-transporters with different nitrogen position on peripheral pyridines. We investigated the influence of the N position on physical properties and blue phosphorescent OLED performances. As a result, despite the same molecular weight, thermal properties greatly changed depending on the N position on peripheral pyridines. Especially, in terms of efficiency, 4-pyridine-based device has showed doubled efficiency compared with 3- and 2-pyridine-based devices.
9:00 PM - T5.19
Extremely High-Efficiency Green Phosphorescent OLEDs Using Diphenylsulfone Derivatives as a Host Material.
Yuki Seino 1 , Hisahiro Sasabe 1 2 , Masato Kimura 1 , Takao Motoyama 1 2 , Junji Kido 1 2
1 Organic Device Engineering, Yamagata univ, Yonezawa, Yamagata Japan, 2 Research Center for Organic Electronics, Yamagata univ., Yonezawa, Yamagata Japan
Show AbstractDiphenylsulfone containing host materials were designed and prepared for green phosphorescent OLEDs. An OLED with a structure of [ITO/ HIL(40 nm) /TAPC (20 nm)/Host : 11 wt% Ir(ppy)3 (10 nm)/B3PyPB (50 nm)/Liq (1 nm)/Al (100 nm)] was fabricated. An extremely high power efficiency of over 100 lm/W and an external quantum efficiency of over 26% were obtained at 100cd/m2. By using a diphenylsulfone derivatives as a host material, reduced efficiency roll-off was also observed at high luminance in this OLED.
9:00 PM - T5.2
Gravure Printing and Its Application to RFID Tag Development.
Ramprakash Yerramilli 1 , Gary Power 1 , Sushim Roy 2 , Nemai Karmakar 2
1 Research and Development, Securency International Pty Ltd., Craigieburn, Victoria, Australia, 2 Electrical and Computer System Engieering, Monash University, Clayton, Victoria, Australia
Show AbstractRadio-frequency identification (RFID) is an established enabling technology for identification of items, controlling and tracking of goods in supply chain management and products in manufacturing environment. However, the cost of RFID chips hinders mass deployment of RFID tags in low-cost item tagging and tracking. Chipless RFID tags can be printed at low cost on paper and plastic substrates using screen, inkjet, gravure and flexo printing techniques. Gravure printing process occupies a prominent place for its capability of achieving high yields of large volumes of printed product. Securency International is a manufacturer of polymer banknotes and sells Guardian polymer notes to more than 31 countries. Gravure technology features highly in the production of banknotes.Monash University and Securency have been developing world’s first chipless RFID tag enabled polymer banknotes using multiresonator-based chipless RFID tag [1] as a security feature. Gravure printing is well established as an industrial process for many of the products at Securency. Despite this, there are critical parameters in its use as a process for producing RFID chipless tags. These include not only the electrical conductivity, but when applied to banknotes the chemical and physical process parameters such as the viscosity of ink, pigment particle size, binder content, cylinder groove depth, print speed, curing/sintering temperature together with an accurate control of the printing resolution need also to be included. All these parameters affect the RF performance of the tag. In this paper, some of the process parameters that control the line printing accuracy will be discussed in general terms. The economics of metal based inks for low cost chipless printed tags will also be discussed.Reference:1) “Multiresonator-based chipless RFID system for low-cost tracking”, S. Preradovic, I. Balbin, N.C. Karmakar and G.F. Swiegers, IEEE Trans. Microwave Theory & Tech., 57 (2009) 1411-1419
9:00 PM - T5.20
Sequential Lateral Solidification of Silicon on Low-K Dielectrics for 3D Integrated Circuits.
Vincent Lee 1 , Gabriel Ganot 2 , Alexander Limanov 2 , James Im 2 , Ioannis Kymissis 1
1 Electrical Engineering, Columbia University, New York, New York, United States, 2 Applied Physics and Applied Math, Columbia University, New York, New York, United States
Show Abstract3D integrated circuits(3DIC) are being explored as a way to augment the functionality of traditional CMOS devices as scaling becomes increasingly expensive and difficult. Integrating devices on the back-end can alleviate space constraints on the front-end, reduce the number of long wire runs, and perform functions that may not be otherwise possible. For example, back-end devices can be used to interface with external components either through high-voltage switches or photodetectors for optical interconnects. 3DICs are currently being explored through two methods: 1. Wafer bonding using Through Silicon Vias (TSV) or Through Chip Interfaces (TCI), or 2. Monolithic integration of thin film transistors (TFT) using low-temperature poly-silicon, carbon nanotubes, or oxide semiconductors. Wafer bonding can offer high quality CMOS devices, but also increases costs and complexity by requiring a second CMOS chip and processes such as wafer thinning and alignment. Monolithic integration can be more cost effective, but require higher mobility transistors for wider applicability.We are using 1µm of electron beam-deposited SiO2 as a thermal buffer between 100nm of electron beam-deposited amorphous silicon and the substrate. Performing the depositions at high vacuum (10-7 torr) prevents gas inclusion, and keeping the substrate temperature at 400°C during the depositions improves film quality. Using a laser recrystallization technique called sequential lateral solidification (SLS) we can produce high mobility, 500 cm2/Vs, polycrystalline-silicon material while keeping process temperatures below 400°C for back-end CMOS processing. SLS is performed with a 308nm XeCl excimer laser at pulse durations of 30ns combined with precise microtranslations of the sample stage. The 100nm of amorphous silicon absorbs 99.995% of the energy from the laser and locally melts without increasing the temperature of the substrate or exposing the substrate to UV light. The SiO2 thermal buffer keeps the diffusive heat of the molten silicon from interacting with the substrate. Past literature has shown that SLS can successfully crystallize silicon on polymer films with low melting points. Our simulation results of the 1µm SiO2/100nm Si structure show that even with complete melting of the silicon, the substrate only reaches a maximum temperature of 70°C, well below the temperature ceiling for back-end CMOS processing. Further, we successfully crystallized silicon directly on low-k dielectrics without a buffer layer. Low-k dielectrics are ubiquitous in modern day back-end CMOS processes as interlayer dielectrics.Silicon crystallized by the SLS process provides high mobility transistors that can be monolithically integrated onto traditional CMOS devices, enabling new applications. In addition, since SLS is a technique already commercialized in large area flat panel display manufacturing, industrial sized, high speed tools are available for integration into current CMOS fabrication lines.
9:00 PM - T5.21
High Efficiency Phosphorescent White Organic Light-Emitting Diodes Using Red:Blue/Green Stacked Emitting Layer Structure.
Chang Woo Seo 1 , Ohyoung Kim 1 , Jun Yeob Lee 1
1 Polymer science and engineering, Dankook University, Youngin-si Korea (the Republic of)
Show AbstractHigh efficiency phosphorescent white organic light-emitting devices (WOLEDs) were demonstrated using a red:blue/green stacked emitting layer structure. 2,7-Bis(diphenylphosphoryl)-9-phenyl-9H-carbazole was used as the host material for the red:blue emitting layer and bis-(9,9’-spirobifluoren-2-yl)-methanone was used as a host material for green emitting layer to obtain high quantum efficiency in WOLEDs.. Two color single emitting layer device with only red:blue emitting layer was also fabricated. High maximum quantum efficiency of 20.0 % and maximum power efficiency of 34.9 lm/W were achieved in the two color single layer device, while high maximum quantum efficiency of 19.3 % and power efficiency of 36.9 lm/W were obtained in the three color stacked WOLEDs. The quantum and power efficiency of the three color stacked WOLEDs at 1,000 cd/m2 were 16.1 % and 23.6 lm/W. The color coordinate of the WOLEDs was (0.38, 0.44) which was suitable for lighting applications.
9:00 PM - T5.22
Eco-Fabrication of Metal Nanoparticles for Electronic Packaging by Solid-Liquid Reaction Systems.
Yamato Hayashi 1 , Yoshihiro Sekiguchi 1 , Takahiro Mori 1 , Hirotsugu Takizawa 1
1 Applied Chemistry, Tohoku University, Sendai, Miyagu, Japan
Show AbstractNanoparticles is one of the most important nanomaterials because nanoparticle manufacturing is an essential component of nanotechnology. In general, a low metal source concentration (<0.1M) and too much surfactant concentration are almost important in the metal nanoparticle fabrication. Metal nanoparticle cannot be made only by the supersaturation. Because the surface of the cluster and the nano particle are very active, large clustering and particle agglomeration happens for stabilization. The surface modification of the cluster and the nano particle is necessary to prevent these by using too much the surfactant. It is necessary to introduce washing of nanparticles to remove that for production. There is a problem also in the raw metal source. The metal salt and organic metallic compound is almost used as a metal source. Many metallic salts often contain the acid ion (NO3-, SO42-, Cl-, etc.) that becomes an acid deposition problem. In case of the organic metallic compound, the organism waste is generated. It is necessary also to introduce the wet scrubber and washing of nanoparticles to remove that for production.We developed a new metal nanoparticles synthesis method that solve these problems. This new synthesis method is with the ultrasonic cleaner and microwave oven as a general-purpose device and the metal oxide (MxOy) and alcohol are used for the main raw material. Because it is home electric appliance, the ultrasonic cleaner and microwave oven are cheap devices. Moreover, the oxide and alcohol generally are cheap without toxicity and waste. We have synthesized Ag and Cu nanoparticles (under 50nm) by appliances in liquid-solid (alcohol- metal oxide) slurry with high concentration (1M) and washingless.Nanoparticle can be synthesized in case of high metal source concentration, as the solid-liquid system is rate controlling for the reaction. The synthesis technique is very easy. The alcohol and the metal oxide powder are put in the beaker and the ultrasound or microwave only irradiated with surfactant of the proper quantity. Morphology of metal particles is changed by irradiation conditions. These nanoparticles can sinter at the low temperature (Ag: ≤200 degree C, Cu: ≤300 degree C) without washing, and show good electronic conductivity. In this presentation, we explain these formation behaviour and morphology change by these irradiation in details and introduce some applications (Ag nanoparticle, Cu nanoparticle and Ag/Cu nanocomposite for electronic nanoparticle paste).
9:00 PM - T5.23
Photo-Oxidized Coating for High Power Laser Resistance and Waterproof.
Yuji Sato 1 , Yoshiaki Okamoto 2 , Masataka Murahara 1
1 Innovative Research Initiative, Tokyo Institute of Technology, Tokyo Japan, 2 , Okamoto Optics.co, Kanagawa Japan
Show AbstractA photo-oxidized thin film, which transformed the organic silicone oil into inorganic glass, was coated on optical materials surface by using Xe2 excimer lamp at room temperature. This technique has enabled an optical thin coating capable of transmitting ultraviolet rays [UV] of wavelengths under 200 nm and possessing the characteristics of hardness, strain-free, resistance to high power laser, and resistance to water.The fused silica has a low refractive index, a high dielectric constant, and optical transparency in the region of vacuum ultra violet rays [VUV] to near infrared rays [IR]. Therefore, it is used as a protective film for a mirror, lens, and optical crystals. In general, a plasma vapor deposition [PVD] and a chemical vapor deposition [CVD] are widely used to deposit SiO2 thin film onto a substrate heated to around 400 degrees Celsius by means of vapor deposition, high-frequency ion plating, or sputtering. However, these methods require the substrates at high temperatures above 400 degrees centigrade, which occurs the heat strain. Thus, we developed to form a transparent and hard SiO2 film on the optical crystal by silicone oil and a Xe2 excimer lamp at room temperature.Silicone oil [-O-Si[CH3]2-O-]n was spin-coated on the fused silica glass surface to make a thin film, and Xe2 lamp light was vertically irradiated in the air. The methyl group [-CH3] of the silicone oil was photo-dissociated because the photon energy of Xe2 excimer lamp is higher than the bond energies of C-H and Si-C. At the same time, the oxygen was photo-excited by the UV photon to produce active oxygen O [1D]. This active oxygen reacted with the dangling bond of Si of the silicone oil, transforming into glass. Thus, the organic silicone oil was changed into inorganic glass.UV and IR spectroscopic analysis was carried out for investigation of the oxidized silicone oil. The results revealed that the absorption peak of the CH3 group at 2900 cm-1 decreased as the irradiation time of the excimer lamp increased, and the transmittance of the light in the 190 nm wavelengths conversely became high. The UV transmittance of the silicone oil was 29.2 % before the lamp irradiation; and it improved to 90.6 % after the irradiation for 60 minutes. Moreover, in order to evaluate for resistance to laser damage [J/cm2/10 ns], the films were further irradiated with the Nd: YAG laser of ω [1.06 μm] or 2ω [0.503 μm]. The silica glass substrate had almost same laser tolerance in ω and 2ω, 112 J/cm2 and 113 J/cm2, respectively. The laser damage threshold of the photo-oxidized 100 nm thick film formed on the fused silica substrate was 72 J/cm2 in ω and 107 J/cm2 in 2ω.
9:00 PM - T5.24
Surface-Energy-Driven Secondary Grain Growth of Solid Phase Crystallized Si1-xGex Ultra Thin Films for Thin Film Transistors.
Sangsoo Lee 1 , Yong-Hoon Son 2 , Euijoon Yoon 1 2 3
1 Materials Science and engineering, Seoul National Unviersity, Seoul Korea (the Republic of), 2 WCU Hybrid Materials Program, Department of Materials Science and Engineering, Seoul National University, Seoul Korea (the Republic of), 3 Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Suwon, Gyeonggi, Korea (the Republic of)
Show Abstract Si1-xGex is a promising candidate for use as a channel film in thin film transistors, as it allows for lower solid phase crystallization temperature and higher electron mobility than pure Si. However, a lot of subboundaries in dendrite-grained Si and Si1-xGex microstructures which results from anisotropic grain growth kinetics of solid phase crystallization cause the characteristics of carrier mobility and leakage of thin film transistors to be deteriorated. The surface-energy-driven secondary grain growth (SEDSGG) technique had been substantially studied to eliminate the normal grain boundaries of as-deposited polycrystalline films and to make large grained microstructures. The SEDSGG thermal process just below melting point (~1413 oC) enables polycrystalline Si films to have the uniform and subboundary-less microstructure. However, it also requires too high thermal budget to make devices on any substrates. Therefore, we introduced two-step recrystallization process of Si1-xGex films which consists of the low temperature furnace annealing for large grained microstructure and sequentially the high temperature rapid thermal annealing for the elimination of subboundaries. In our study, Ge contents and film thickness have been observed to be a key parameter for SEDSGG of the solid phase crystallized thin Si1-xGex films prepared by sputtered deposition. The orientation of as-solid phase crystallized Si1-xGex films was mainly composed of {111}, {220} and {311}. After high temperature annealing for surface-energy-driven secondary grain growth, {111} orientation was observed to account for approximately 90% of microstructure at high Ge contents and ultra thin film thickness (~10 nm). The grain orientation was observed from x-ray diffraction data and electron backscatter diffraction, and the kinetics of SEDSGG was analyzed using transmission electron microscopy.
9:00 PM - T5.25
SnO2 Nanowire Inverter Arrays on Hemispherical Deformable Substrates.
Gunchul Shin 1 , Min Young Bae 1 , Sahng Ki Hong 1 , Junghwan Huh 2 , Chang Hoon Yoon 1 , Gyu-Tae Kim 2 , John A. Rogers 3 , Jeong Sook Ha 1
1 Chemical and biological engineering, Korea University, Seoul Korea (the Republic of), 2 School of Electrical Engineering, Korea University, Seoul Korea (the Republic of), 3 Department of Materials Science and Engineering, University of Illinois at Urbana-Champaign, Urbana-Champaign, Illinois, United States
Show Abstract Most of the common electronic devices exist on the flat surfaces of rigid wafers or glass substrates. Although these flat device configurations are suitable for conventional applications, they are intrinsically incompatible with curved complex or curvilinear surfaces, such as human skin and organs for medical monitoring or alternative body parts. Recently, several applications, mostly based on silcon materials, using various stretchable techniques for non-planar systems are reported. In this work, we report on the fabrication of n-type metal-oxide-semiconductor inverter devices consisting of an n-type field effect transistor (FET) and a resistor with SnO2 nanowire (NW) channels on a hemispherical surface. Pre-strained PDMS film of hemispherical shape was used as a substrate for the stretchable NW devices, where the arc shaped interconnection accommodated the pre-strain of the whole surface. Suspended NW structure made by oxygen plasma etching was used for the better electrical characteristics of NW FET. These devices exhibited FET and inverter performance with a field effect mobility of ~ 100 cm2/Vs, threshold voltage of ~ 1.0 V, and the input-output characteristics with a maximum gain value of ~ 5. This work presents that NW logic devices can be applicable to implantable or curvilinear electronics on non-planar surfaces such as human organs or robot skins.
9:00 PM - T5.26
Micropatterning of Rubrene Thin Film with Electron Irradiation and Its Application in Organic Thin Film Transistor.
Jae Joon Kim 1 , Hyeuk Moo Lee 2 , Sung Oh Cho 1
1 Nuclear and Quantum Engineering, Korea Advanced Institue of Science and Technology, Daejeon Korea (the Republic of), 2 , LG Chem Research Park, Daejeon Korea (the Republic of)
Show AbstractWe report here unprecedented method for the patterning of organic semiconductor from pre-patterned polystyrene dielectric layer. Pre-pattern of polystyrene was fabricated by partial electron beam irradiation with mask cover and semiconducting material rubrene (5,6,11,12-tetraphenylnaphthacene) was crystallized by thermal evaporation following abrupt heating process. After electron beam irradiation, only irradiated area is cross-linked with structure of higher thermal stability and which induces higher temperature necessary for the growth of rubrene in orthorhombic phase with high mobility. Oppositely, non-irradiated polystyrene area has movable polymeric structures so it consumes most heat and leads rubrene to a crystal phase of lower temperature, triclinic or amorphous. The rubrene pattern of micrometer scale is accomplished along the shape of mask with clear edge and images were captured by polarized optical image (POM). Finally by adding gold electrode, rubrene thin film transistor with competitive mobility of 0.1 cm2/Vs was fabricated and measured.
9:00 PM - T5.27
Printing Silver Electrode for Large Area Electrochromic Window Applications.
Young Kyu Hong 1 , Byung Ryang Kim 1 , Eunsil Kang 1 , Jae Seok An 1 , Kyu Hong Lee 1 , Hak Jun Jeong 1 , Ju Hwan Choi 1 , Sung H