Symposium Organizers
Rinus Lee, GLOBALFOUNDRIES
Kah-Wee Ang, National University of Singapore
Nadine Collaert, IMEC
Tony Low, University of Minnesota
Symposium Support
Applied Materials
Kokusai Semiconductor Equipment Corporation
ED3.1: 2D Device Technology
Session Chairs
Kah-Wee Ang
Nadine Collaert
Tuesday PM, April 18, 2017
PCC North, 100 Level, Room 127 C
11:30 AM - *ED3.1.01
From Black Phosphorus to Phosphorene and Beyond
Peide Ye 1
1 , Purdue University, West Lafayette, Indiana, United States
Show AbstractBlack Phosphorus is a layered semiconductor and have great potentials in optical and electronic applications. Remarkely, this layered material can be redueced to one single atomic layer in the vertical direction owing to the van der Waals structure, dubbed phosphorene. In this talk, the systematic studies of its unique electrical, optical, thermal and mechanical anisotropic properties will be reviewed. Meanwhile, we will also introduce the new progress on the quest for low-dimensional air-stable high-mobility van der Waals nanomaterials.
12:00 PM - ED3.1.02
Adatoms Doping Effects on the Thermal Stability of Black Phosphorus Formed on High-K Gate Dielectric
Xuewei Feng 1 , Vadym Kulish 2 , Ping Wu 2 , Xinke Liu 3 , Kah-Wee Ang 1
1 Department of Electrical and Computer Engineering, National University of Singapore, Singapore Singapore, 2 , Singapore University of Technology and Design, Singapore Singapore, 3 College of Materials Science and Engineering, Shenzhen University, Shenzhen, Guangdong, China
Show AbstractBlack phosphorus (BP) is attracting tremendous research interests due to its superior electronic properties such as high carrier mobility and wide bandgap tunability from 0.3 eV (bulk) to 2.0 eV when scales to a monolayer thinness. Recently, high performance BP transistor with hole field-effect mobility up to 1,000 cm2/Vs has been experimentally demonstrated. However, the inferior thermal stability of BP is known to be a major issue, which limits its compatibility to high temperature process that could detrimentally degrade the device performance. Here, we perform a systematic study to significantly improve the thermal stability of BP through aluminium (Al) and hafnium (Hf) metal adatoms doping by means of diffusion from the underlying high-k gate dielectrics such as Al2O3 and HfO2. The out-diffusion of Al and Hf adatoms into BP channel is confirmed by EDX depth profiling upon thermal anneal, which promotes the formation of covalent bonds with the neighbouring P atoms to realize Al-P and Hf-P with a stronger binding energy. This is evidenced by the X-ray photoelectron spectroscopy (XPS) analysis of the BP/Al2O3 and BP/HfO2 interfaces. First-principles calculations within the density functional theory (DFT) framework further confirms the achievement of a higher binding energy for Al-P (-2.18 eV) and Hf-P (-4.17 eV) bonds, which is responsible for the significant thermal stability improvement. This leads to thermal coefficients as low as 0.00044, 0.00081 and 0.00012 cm-1°C-1 for the Ag1，B2g and Ag2 phonon modes, respectively, which are two orders of magnitude lower than that observed for pristine P-P bonds (~0.01cm-1°C-1). This work paves the way towards strengthening the structural stability of BP for potential use as a channel material in next generation transistor applications.
Acknowledgements
This research is supported by the National University of Singapore Faculty Research Committee Grants (R-263-000-B21-133 and R-263-000-B21-731), A*STAR Science and Engineering Research Council Grants (No. 152-70-00013 and 152-70-00017), and by the National Research Foundation, Prime Minister’s Office, Singapore under its medium sized centre program.
12:15 PM - ED3.1.03
Intrinsic Bipolar Molybdenum Disulfide via One Dimensional Electrical Contact
Zheng Yang 1 , Chang Ho Ra 1 , Jiyoung Noh 2 , Faisal Ahmed 1 , Jaehwan Kweon 1 , James Hone 3 , Kyeongjae Cho 2 , Won Jong Yoo 1 , Inyong Moon 1
1 , SKKU Advanced Institute of Nano Technology, SUWON-SI Korea (the Republic of), 2 Department of Materials Science and Engineering, and Department of Physics, University of Texas at Dallas, Richardson, Texas, United States, 3 , Columbia University, New York City, New York, United States
Show AbstractMolybdenum disulfide (MoS2) is one of the most promising two dimensional materials for future applications in nano electronics, which has high carrier mobility, very good stability under atmosphere, proper band gap, etc. However, its applications to electronic switching devices is hindered by Fermi level pinning at metal MoS2 interface. Here, we experimentally demonstrate one dimensional electrical contact (1D contact) to MoS2 formed via controllable plasma etching. We fabricated Al/MoS2 FET (n type), Mo/MoS2 FET (n type), and Pd/MoS2 FET (ambipolar). For n type part, on/off current ratio is ~107 and the maximum two probe electron mobility is more than 100 cm2/Vs at 300 K with 0.1 V source drain bias. By contrast, for p type part, on/off current ratio is ~10^6 and the maximum two probe hole mobility is around 480 cm2/Vs at 300 K with 0.1 V sour drain bias. The mean free path of hole carrier at 9 K is around 17 nm. All the measured mobilities are evaluated by using two-terminal field-effect configuration. We can also achieve complementary logic gates with intrinsic metal/MoS2 one-dimensional electrical contact. We achieve MoS2 inverter based on Mo/MoS2(n type branch) 1D contact and Pd/MoS2(p type branch) 1D contact. The gain of this inverter is more than 15.4.
12:30 PM - ED3.1.04
Carrier Density Modulation and Polarity Control of MoTe2 via Electron Beam Irradiation
Min Sup Choi 1 2 , Myeongjin Lee 1 2 , Inyong Moon 1 2 , Won Jong Yoo 1 2
1 , Sungkyunkwan University, Suwon Korea (the Republic of), 2 , SKKU Advanced Institute of Nano-Technology, Suwon Korea (the Republic of)
Show AbstractThe transition metal dichalcogenides (TMDCs), has a great potential for replacing the Si-based electronics due to its comparable band gap with Si and relatively high carrier mobility. Since each TMDC has different bandgap and electrical properties dependent on the combination of transition metal and chalcogen atoms, an appropriate selection of material is essential for realization of practical electronics. In this regard, molybdenum ditelluride (MoTe2) is appealing for Si-based electronics due to its very similar bandgap (~ 1 eV) with Si and abnormal indirect-to-direct bandgap crossover, widening application ranges.[1],[2] However, the studies on MoTe2 are still limited compared to other TMDCs such as MoS2, requiring more thorough investigation to enhance device performances.
Here, we demonstrate an effective way for carrier density modulation and polarity control of MoTe2 by using electron beam (e-beam) irradiation. When the e-beam irradiated onto MoTe2, the carrier density was significantly increased and the p-type property transformed to degenerate n-type as previously reported on polar transition of MoS2 by chemical method.[3] Although the current density slightly decreased, the n-type property could be maintained even after several days indicating that the n-doping effect is not originated from only electron trapping at interfaces. By measuring the work-function change after e-beam irradiation by Kelvin probe force microscope (KPFM), the work-function difference of 0.3~0.4 eV, which is lower than our expectation, was observed. In order to figure out a mechanism of n-doping effect, we compared the work-functions between MoTe2 on SiO2 and suspended MoTe2 after e-beam irradiation. Furthermore, we were able to fabricate a complementary inverter by partial e-beam irradiation on p-type MoTe2 to form n-type region and it revealed gain over 1.5.
[1] C. Ruppert, O. B. Aslan, T. F. Heinz, Optical properties and band gap of single- and few-layer MoTe2 crystals, Nano Lett., 14, 6231 (2014).
[2] I. G. Lezama, A. Arora, A. Ubaldini, C. Barreteau, E. Giannini, M. Potemski, A. F. Morpurgo, Indirect-to-direct band gap crossover in few-layer MoTe2, Nano Lett., 15, 2336 (2015).[p1]
[3] X. Liu, D. Qu, J. Ryu, F. Ahmed, Z. Yang, D. Lee, W. J. Yoo, P-type polar transition of chemically doped multilayer MoS2 transistor, Adv. Mater., 28, 2345 (2016).
Acknowledgments
This work was supported by the Global Frontier R&D Program (2013M3A6B1078873) at the Center for Hybrid Interface Materials (HIM), funded by the Ministry of Science, ICT&Future Planning.
12:45 PM - ED3.1.05
Surface Functionalization of Graphene via the Controlled Assembly of 2D Micelles
Benjamin Robinson 1 , Oleg Kolosov 1 , Steven Bailey 1 , Martin Bryce 2 , Sam Jarvis 1 , Colin Lambert 1
1 , Lancaster University, Lancaster United Kingdom, 2 , Durham University, Durham United Kingdom
Show AbstractHere we have studied the surface functionalisation of graphene by a new class of complementary chemical structures – 2D micelles. Due to its 2D structure, effective modification of surfaces and interfaces in graphene based systems is essential; efficient separation, suspension/dispersion and functionalisation of is typically achieved via surfactants in aqueous solution. However, it is well known that above a certain critical concentration, surfactants in aqueous environments self-assemble into three-dimensional spherical micelles with hydrophobic moieties shielded by a hydrophilic shell. Here we report a combined experimental and theoretical study demonstrating that surfactants can be designed to form 2D micelles, which are reported in for the first time in this study, when deposited in an aqueous environment onto atomically-flat graphitic surfaces thus opening up new strategies for processing and functionalising of 2D material surfaces and interfaces with widespread applications in post-silicon electronics, energy storage and information technology.
Our molecular dynamics simulations indicate that such surfactants form a new class of 2D self-arranged ‘starfish’ micelles (2DSMs), which possess highly desirable and tuneable characteristics of high surface affinity coupled with unimpeded mobility. These predictions are supported by experimentally-measured interactions using a graphene coated quartz crystal microbalance, in ambient and vacuum environments.
Using real-space nanoscale resolution nanomechanical sensitive ultrasonic force microscopy we correlate the molecular orientation within graphite deposited 2DSM with topographical mapping achieved by atomic force microscopy. We observe height profiles two orders of magnitude less than the 2DSM typical lateral dimension (0.60 ± 0.21 nm and 12.79 ± 2.93 nm respectively).
ED3.2: Wafer Scale 2D Electronics
Session Chairs
Tuesday PM, April 18, 2017
PCC North, 100 Level, Room 127 C
2:30 PM - *ED3.2.01
Two-Dimensional Materials: From Properties to Applications
Steven Koester 1
1 , University of Minnesota, Minneapolis, Minnesota, United States
Show AbstractTwo-dimensional (2D) materials are a broad class of layered crystals that have weak inter-layer coupling that allows them to be exfoliated or grown with atomic-scale thickness. While these materials -- including graphene, transition metal dichalcogenides (TMDs), black phosphorus (BP) and others -- have now been explored extensively in the scientific community, it remains unclear what new applications these materials can truly enable. Here, I describe an analysis of the properties of 2D materials to show where they can obtain a clear advantage over the state-of-the-art for a variety of electronic, photonic, spintronic and sensing devices. For instance, the quantum capacitance effect enables graphene to create passive wireless sensors with smaller size and greater functionality than MEMS-based sensors [1]. Graphene optical modulators have been demonstrated [2] and show potential for > 100 GHz [3] and sub-fJ/bit operation [4]. Graphene also has great potential for future spintronic applications due to its superior spin lifetimes [5]. For TMDs such as MoS2, while the large band gap and heavy effective mass have disadvantages for high-performance devices, these properties are ideally suitad for use in dynamic memories where the extremely-low leakage currents can lead to 100x improvement in refresh rates [6]. While TMDs are well-suited for low-power applications, BP is extremely promising material for high-performance transistors due to its low transport effective mass, asymmetric band structure and relatively high carrier mobility. To date, BP has produced the highest transconductance transistors based upon 2D semiconductors [7]. The narrow band gap of BP also allows high-speed photodetectors [8] to be realized for operation in the near infrared and could be especially useful to realize CMOS-compatible midwave infrared photodetectors with significant integration advantages compared to III-Vs. Finally, 2D materials can realize numerous novel heterostructures which simply cannot be achieved in conventional 3D semiconductors [9], suggesting that the potential for these unique materials is only beginning to be uncovered. This work was supported by the Minnesota Partnership for Biotechnology and Medical Genomics, AFOSR (Grant No. FA9550-14-1-0277), DTRA (Grant No. HDTRA1-14-1-0042), NSF (Grant Nos. ECCS-1102278 and DMR-1420013), and C-SPIN, one of the six STARnet Centers sponsored by SRC and DARPA.
[1] S. J. Koester, Appl. Phys. Lett. 99, 165105 (2011); [2] N. Youngblood, et al., Nano Lett. 14, 2741 (2014); [3] S. J. Koester and M. Li, Appl. Phys. Lett. 100, 171107 (2012); [4] S. J. Koester, et al., Opt. Express 20, 20330 (2012); [5] J. Kim, et al., Proc. IEEE 103, 106 (2015); [6] C. U. Kshirsagar, et al., ACS Nano 10, 8457 (2016); [7] N. Haratipour, et al., IEEE Elect. Dev. Lett. 37, 103 (2016); [8] N. Youngblood, et al., Nat. Photonics 9, 247 (2015); [9] V. O. Özçelik, et al., Phys. Rev. B 94, 035125 (2016).
3:00 PM - ED3.2.02
Interface Control of 2D Materials to Enable Wafer Scale Transfer and Tuning of Electronic Properties
Daniele Chiappe 1 , Alessandra Leonhardt 1 2 , Cesar Javier Lockhart de la Rosa 1 2 , Inge Asselberghs 1 , Olli Virkki 1 3 , Umberto Celano 1 , Marta Perucchini 1 , Ashish Dabral 1 4 , Thierry Conard 1 , Valeri Afanasiev 4 , Geoffrey Pourtois 1 , Steven Brems 1 , Cedric Huyghebaert 1 , Matty Caymax 1 , Stefan de Gendt 1 2 , Iuliana Radu 1
1 , imec Leuven & Hasselt University, Leuven Belgium, 2 Department of Chemistry, University of Leuven, Leuven, Choose a State or Province, Belgium, 3 , University of Jyvaskyla, Jyvaskyla Finland, 4 Department of Physics and Astronomy, University of Leuven, Leuven Belgium
Show AbstractThe electronic industry is progressively moving towards few-nanometer-scale CMOS and 3D IC designs. The extremely reduced dimensions of transistors make difficult a full gate-control of the current paths throughout the bulk active channel. In this context, 2D transition metal dichalcogenides (TMDs) are emerging as top candidates for beyond-silicon electronics.
In order to meet the technological requirements for the integration of this material for large-scale, industrial production, various bottom-up techniques have been explored. The high temperatures and the use of template substrates which are normally required to form highly oriented 2D film are not compatible with further processing steps. To cope with this drawback, the development of a wafer-level transfer technique able to preserve the integrity and the physical-chemical properties of 2D materials is of outmost importance. Such a heterogeneous integration can overcome the incompatibility of the growth process with back-end-of-line CMOS technology. On the other side, the transferring of 2D semiconductors to different substrates allows one to explore their change in behavior as function of transfer conditions and interface properties. It is thus the aim of this work to provide a reliable, up-scalable transfer process together with a description of the transfer-induced material modifications. Finally, possible methods are proposed to locally tune the electronic properties of transferred layers through chemical functionalization of the interface. [1-4]
[1]O. V. Yazyev and A. Kis, “MoS2 and semiconductors in the flatland,” Mater. Today, vol. 18, no. 1, pp. 20–30, 2015
[2]G. Fiori et al., “Electronics based on two-dimensional materials,” Nat. Nanotechnol., vol. 9, no. 10, pp. 768–779, 2014.
[3]D. Chiappe et al., “Controlled Sulfurization Process for the Synthesis of Large Area MoS 2 Films and MoS 2 /WS 2 Heterostructures” Adv. Mater. Interfaces,3: 1500635, 2015 doi: 10.1002/admi.201500635
[4]A. Gurarslan et al., “Surface-energy-assisted perfect transfer of centimeter-scale monolayer and few-layer MoS2 films onto arbitrary substrates,” ACS Nano, vol. 8, no. 11, pp. 11522–11528, 2014.
3:15 PM - ED3.2.03
Growth of Continuous Graphene by Open Roll-to-Roll Chemical Vapour Deposition
Guofang Zhong 1 , Xingyi Wu 1 , Lorenzo D'Arsie 1 , Kenneth Teo 2 , Nalin Rupesinghe 2 , Alex Jouvray 2 , John Robertson 1
1 Department of Engineering, University of Cambridge, Cambridge United Kingdom, 2 , AIXTRON Ltd, Cambridge United Kingdom
Show AbstractChemical vapour deposition (CVD) offers process controllability, scalability and flexibility and is the most promising method for industrial production of high-quality, continuous graphene for electronic device applications. Recently, various roll-to-roll (R2R) CVD systems to produce graphene on Cu foils have been developed.[1-3] However, these systems are essentially cassette systems enclosed in vacuum chambers, which cannot be integrated inline into production lines with sequential processes before and after growth. To achieve inline integration of graphene growth, an atmospheric pressure, open (OP-) R2R CVD system is required.
Here, we demonstrate growth of graphene on Cu foils using a prototype OP-R2R CVD reactor under both static and moving-foil conditions. [4] N2 rather than Ar is used as carrier gas to reduce process cost. An over-pressure supply of nitrogen is used to keep oxygen out of the growth chamber. To ensure process safety, H2 and CH4 concentrations are kept below the lower explosive limits. The CVD process has three stages. First, the Cu foil is heated to 1010-1070°C at 50°C/min with a N2 flow rate of 5-10 slm for annealing. Second, growth starts by adding 0.5-5 sccm CH4 and 80-160 sccm H2 to the N2 flow. A growth time of ~40 min for static growth and 70-90 min for dynamic growth is used. Third, growth is then terminated by switching off the CH4 flow and heater power. For static growth, the foil is stationary during the whole CVD process. For dynamic growth, the foil is only moved during stage two. SEM and Raman characterization indicate that high-quality, continuous, well-covered monolayer graphene is formed in both the static and dynamic mode. Raman spectra show no detectable D peak and a 2D/G ratio over 2.6 for static growth, while for dynamic growth, there is a weak D peak and the 2D/G ratio is 1.5~2.0. For the dynamic case, the grain size obtained is ~20 µm, and the measured room temperature carrier mobility ranges from 5270-6040 cm2V-1s-1 on 50 µm × 50 µm Hall devices. This high value compares with 900 cm2V-1s-1 or under in previous R2R work, and is due to the graphene’s high coverage and closed grain boundaries. The prototype system shows a viable path for the in-line R2R integration of graphene growth.
[1] T. Kobayashi, et al, Appl. Phys. Lett. 102, 023112 (2013).
[2] J. Ryu, et al, ACS Nano 8, 950 (2014).
[3] T. Yamada, et al, Carbon 50, 2615 (2012).
[4] G. Zhong, et al, accepted for publication in Appl. Phys. Lett. 2016.
3:30 PM - ED3.2.04
High n-Type Conduction in Si-Doped Al0.84Ga0.16N Epilayers for Deep Ultraviolet Emitters
Talal Al Tahtamouni 1 , Jing Li 2
1 , Qatar University, Doha Qatar, 2 , Texas Tech University, Lubbock, Texas, United States
Show AbstractIn this work, We experimentally reveal a direct relationship between n-type conductivity and the corresponding growth conditions using photoluminescence, secondary ion mass spectroscopy, and Hall effect measurements, in order to suppress self-compensation from Al vacancies and their complexes in high Al-content Si-doped AlGaN. High quality and highly conductive n-type Si-doped Al0.84Ga0.16N epilayers were grown by metalorganic chemical vapor deposition on SiC substrates. Photoluminescence measurements show that Si doping for growth with a relatively high temperature and low V/III ratio can effectively suppress self-compensation by the formation of cation vacancy complexes. Variable temperature Hall-effect measurements have been employed to study the electrical properties for si doped samples, we have achieved a very low n-type resistivity with a high electron concentration and mobility at room temperature. The activation energy of Si was determined as it will be discussed.
ED3.3: New Electronics Materials and Design
Session Chairs
Tuesday PM, April 18, 2017
PCC North, 100 Level, Room 127 C
4:15 PM - *ED3.3.01
Exploring the 2-D Material Design Space through Ab Initio Device Simulation
Mathieu Luisier 1 , Aron Szabo 1 , Christian Stieger 1 , Hamilton Carrillo-Nunez 1
1 , ETH Zurich, Zurich Switzerland
Show AbstractThe first mechanical exfoliation of graphene sparked the interest of the scientific community for two-dimensional (2-D), single-layer materials. Besides graphene hexagonal boron nitride (hBN) and transition metal dichalcogenides (TMDs) have since then received a lot of attention because of their unique electronic characteristics ranging from insulating to semiconducting and metallic, thus opening up new research opportunities. Some of the 2-D materials discovered so far have been considered as potential replacement for Silicon as high performance logic switches at the end of the semiconductor roadmap because they exhibit excellent electrostatic properties, large band gaps (Eg~1.8 eV in MoS2), and decent mobility values up to 100’s cm2/Vs. These features make them also well suited for flexible and transparent electronic applications.
Recent theoretical studies have shown that there might exist several thousands of 2-D materials that are stable in the air and can therefore be exfoliated from the bulk and turned into devices. The on-going exploration work is mainly based on experiments. However, it could be more efficiently guided towards the most promising components if advanced modeling tools capable of predicting the electron and hole mobility, thermal conductivity, and current characteristics of 2-D materials were available.
In this presentation an ab-initio (from first-principles) simulation approach that provides accurate descriptions of the electronic and thermal properties of semiconductors, treats ballistic and dissipative transport at the quantum mechanical
level, correctly represents the electrostatics of 2-D transistors, and accounts for the atomic granularity of device structures will be employed to compute the phonon-limited electron and hole mobility of various 2-D materials, evaluate the I-V characteristics of n- and p-type 2-D FETs, and shed light on the mechanisms that severly limit the resistance of metal to single-layer TMD interfaces and thus the performance of the resulting logic switches.
4:45 PM - ED3.3.02
Electrical Resistivity of Mesoporous and Quasi-Monocrystalline Germanium
Meghan Beattie 1 , Youcef Bioud 2 , Abderraouf Boucherif 2 , David Hobson 1 , Richard Ares 2 , Dominique Drouin 2 , Christopher Valdivia 1 , Karin Hinzer 1
1 SUNLAB, Centre for Research in Photonics, University of Ottawa, Ottawa, Ontario, Canada, 2 Laboratoire Nanotechnologies Nanosystèmes (LN2) - CNRS UMI-3463, Institut Interdisciplinaire d’Innovation Technologique (3IT), Université de Sherbrooke, Sherbrooke, Quebec, Canada
Show AbstractGermanium has proven in recent years to be a valuable material for many electronic and optoelectronic applications, in particular due to its compatibility with III-V semiconductor alloys such as GaAs. There has also been increasing interest in Ge nanostructures, including porous Ge layers, which have been shown to possess tunable photonic emission and absorption properties [1]. Furthermore, quasi-monocrystalline Ge, formed by recrystallization of porous Ge, has many potential applications including the fabrication of releasable seeds for epitaxial growth of III-V materials [2]. Due to the sensitivity of many III-V semiconductor devices such as solar cells to the introduction of series resistance, the resistivity of quasi-monocrystalline Ge must be characterized before it can be integrated into device structures.
In this study, the electrical transport properties of mesoporous Ge layers formed on Ge substrates by bipolar electrochemical etching [1-3] are investigated. The pores in these layers have columnar structure with diameters on the order of 10 nm. Current-voltage characteristics are measured for mesoporous Ge layers with porosities ranging from 65 to 80% fabricated on p-doped substrates with ohmic contacts applied to the top and bottom surfaces. The measured current-voltage characteristics are linear and the electrical resistivity of the porous layer is determined by performing measurements on samples with a range of porous layer thicknesses. The resistivity of the mesoporous Ge is found to be (1.5 ± 0.6) x 103 Ω cm, five orders of magnitude larger than that of the p-doped Ge substrate (~2.5 x 10-2 Ω cm). Our theoretical calculations of carrier density and mobility performed using methods modified from Banerjee et al. [4, 5] are in agreement with this experimental result.
It is observed that rapid thermal annealing of mesoporous Ge results in a reduction in resistivity due to partial recrystallization of the porous material. In particular, rapid thermal annealing at a temperature of 550°C for 10 minutes yields quasi-monocrystalline Ge characterized by large voids beneath the surface with diameters ranging from 5 to 80 nm and a resistivity on the order of 20 Ω cm, a 100-fold improvement relative to the as-porosified Ge. These findings suggest that rapid thermal processing could be used to tune the electrical transport properties of quasi-monocrystalline porous Ge.
References:
[1] A. Boucherif, A. Korinek, V. Aimez, R. Arès, AIP Advances 4 (2014) 107128.
[2] A. Boucherif, G. Beaudin, V. Aimez, R. Arès, Appl. Phys. Lett. 102 (2013) 011915.
[3] S. Tutashkonko, A. Boucherif, T. Nychyporuk, A. Kaminski-Cachopo, R. Arès, M. Lemiti, V. Aimez, Electrochimica Acta 88 (2013) 256-262.
[4] M. Banerjee, S.K. Datta, H. Saha, Nanotechnology 17 (2006) 163-169.
[5] M. Banerjee, S.K. Dutta, U. Gangopadhyay, D. Majumdar, H. Saha, Solid-State Electronics 49 (2005) 1282-1291.
5:00 PM - ED3.3.03
Zintl Layer Formation during Atomic Layer Deposition of Crystalline Perovskites on Ge (001)
Shen Hu 1 , Edward Lin 1 , Ali Hamze 1 , HsinWei Wu 2 , David Smith 2 , Alexander Demkov 1 , John Ekerdt 1
1 , University of Texas at Austin, Austin, Texas, United States, 2 , Arizona State University, Tempe, Arizona, United States
Show AbstractThe growth of high-k, crystalline SrBO3 (where B = Ti, Hf, Zr) and BaTiO3 perovskite oxides by atomic layer deposition (ALD) has been reported directly on Ge(001). This talk discusses the mechanisms for the initial growth of these perovskites on Ge (001) by ALD and how the nature of this initial layer affects crystal quality. Experimentally, the ALD process is initiated by dosing the Sr or Ba cyclopentadienyl precursor first on the clean Ge surface. Valence band shifts and surface core level binding energy shifts are compared for Ge (001) that is exposed to the ALD precursors or to an atomic flux of Sr or Ba using Knudsen cells in a molecular beam epitaxy (MBE) system. Density functional theory (DFT) calculations are performed to model structures and energies for different surface coverages of the alkaline earth metal (AEM). High angle angular dark field scanning transmission electron microscopy (HAADF-STEM) is performed to examine the interfacial structure after the growth of 3 to 5-nm thick films.
The organic ligands dissociate from the precursor after precursor adsorption on the Ge (001) surface. The similar Ge binding energy shifts, spectral features and valence band shifts with exposure to Ba or Sr by ALD and MBE indicate the same phenomena are occurring on the Ge surface at submonolayer AEM coverage. The first-principles DFT calculations for Ba and Sr adsorbed in a four-fold site between dimer rows on Ge (001) predict the binding energy shifts and the flattening of the tilted dimer in qualitative agreement with experiment. A Zintl layer is reasoned to form the template for MBE growth of crystalline perovskites on Si and Ge and we posit Ba and Sr form a Zintl layer at the perovskite/Ge interface during the initial stages of Ba- and Sr-based perovskite ALD. The 2×1 periodicity at the perovskite-Ge interface in the HAADF-STEM images for the four perovskites grown by ALD on Ge (100) with either Ba atoms or Sr atoms located at the trough between the dimer rows further demonstrate the formation of a Zintl layer during ALD.
5:15 PM - ED3.3.04
Ternary Oxide Nanowires for Ultraviolet Photosensing Applications
Jiangxin Wang 1 , Pooi See Lee 1
1 School of Materials Science and Engineering, Nanyang Technological University, Singapore Singapore
Show AbstractUltraviolet (UV) light detection is of particular interest for applications such as biological threat detection, optical communication, and missile tracking etc. The conventional Si photodetectors have encountered the limitation of low efficiency and high dark current in UV light detection. The generated electron-hole pairs by the UV radiation are close to the highly recombinative surface states in the Si photodetectors. In addition, costly and bulky high pass optical filters are required in these devices to avoid optical crosstalk due to the small bandgap in silicon (Eg=1.1 eV). Application of large bandgap semiconductors can eliminate the insertion of optical filters, leading to miniaturized UV photodetectors. Recent reports on the large bandgap nanomaterials such as In2Ge2O7 nanowires (NWs), β-Ga2O3 nanostructures, and Zn2GeO4 NWs have shown promising performance in UV light detection. Investigation in the ternary oxides NWs for UV photodetectors will provide promising solutions to tackle the challenges with the conventional Si photodetectors.
In this talk, the ternary oxides NWs of Zn2GeO4 (ZGO) NWs (bandgap of 4.6 eV) and Zn2SnO4 (ZTO) NWs (bandgap of 3.6 eV) were fabricated by a Chemical Vapor Deposition (CVD) method. Transparent and flexible photodetectors with all-NW structures were fabricated with a solution-assembly method. The NW photodetector showed a good transparency at around 80% in the visible light range. Excellent flexibility and electrical stability were also achieved in the NW network device, which could be repetitively bended to an angle of 90°. The features of 1D structure, high material purity, and good crystallinity of the ZGO NWs contributed to high photosensitivity of the UV. Photocurrent of the ZGO NW detectors reached 3000 times of the dark current. The Schottky barriers between the Ag-ZGO NWs and the energy barrier in the NW-NW junctions in the NW network structures contributed to improve the switching speed of the NW photodetectors. A transparent and stretchable UV photodetector using ZTO NWs as the sensing channels could also be successfully fabricated by embedding the NW photodetectors into stretchable polymer matrix (polydimethylsiloxane). The photodetector tolerated tensile strain up to 50% with good photosensing performance maintained in the device. With the partial embedded NW structures, switching speed of the photodetector could be improved compared to fully embedded device structure, showing the respond time below 0.8 s and the reset time of around 3 s. The developed solution-assembly approach can be widely applied for other NW device fabrication. The elastic and transparent photodetector may find broad applications wearable and implantable electronic devices.
Reference:
1. Jiangxin Wang, Chaoyi Yan, Meng Fang Lin, Kazuhito Tsukagoshi, and Pooi See Lee, Journal of Materials Chemistry C, 2015, 3, 596-600.
2. Jiangxin Wang, Chaoyi Yan, Wenbin Kang, and Pooi See Lee, Nanoscale, 2014, 18, 10734-10739
5:30 PM - ED3.3.05
Theory of Magneto-Resistance of Organic Molecular Tunnel Junctions with Non-Magnetic Electrodes
Sha Shi 1 , Zuoti Xie 1 , C. Daniel Frisbie 1 , Darryl L. Smith 1 , P. Paul Ruden 1
1 , University of Minnesota, Saint Paul, Minnesota, United States
Show AbstractRecently, large room temperature magneto-resistance observed for devices composed of self-assembled mono-layers of different oligophenylene thiols sandwiched between gold contacts was reported [ACS Nano, 10, 8571−8577 (2016)]. The transport mechanism through the organic molecules was determined to be non-resonant tunneling. To explain the magneto-resistance, we developed an analytical model based on the interaction of the tunneling charge carrier with an unpaired charge carrier populating a contact/molecule interface state. The Coulomb interaction between these charge carriers causes the transmission coefficients to depend on their relative spin orientation. Singlet and triplet pairing of the tunneling and the interface charge carrier thus correspond to separate conduction channels with different transmission probabilities. Spin relaxation enables transitions between the different channels and therefore tends to maximize the tunneling current for a given applied bias. However, spin relaxation can be suppressed by relatively small magnetic fields, leading to the observed positive magneto-resistance. Our model elucidates how the Coulomb interaction gives rise to transmission probabilities that depend on spin, how exchange plays a role in determining the relative magnitudes of the transmission probabilities, and how an applied magnetic field can inhibit transitions between different spin configurations. The results obtained will be compared with the recent experimental data.
5:45 PM - ED3.3.06
Photoemission Electron Microscopy as a New Tool to Study the Electronic Properties of 2D Crystals on Silicon Oxide
Taisuke Ohta 1 , Morgann Berg 1 , Kunttal Keyshar 2 , Calvin Chan 1 , Jeremy Robinson 3 , Gautam Gupta 4 , Pulickel Ajayan 2 , Aditya Mohite 4
1 , Sandia National Laboratories, Albuquerque, New Mexico, United States, 2 , Rice University, Houston, Texas, United States, 3 , Naval Research Laboratory, Washington, District of Columbia, United States, 4 , Los Alamos National Laboratory, Los Alamos, New Mexico, United States
Show AbstractThe energy positions of the valence and conduction electronic states with respect to the vacuum level are essential parameters to evaluate how the band gaps of semiconductors or Fermi-levels of metals would line up with respect to each other. Defined as an energy separation between the vacuum level and the highest occupied electronic states, the ionization energy is of particular importance for atomically-thin two-dimensional (2D) crystals to predict the performance of their heterostructures useful in high performance electronics and opto-electronics. Ionization energies have been investigated based on theoretical calculations, but to the best of our knowledge, no systematic experimental confirmation is reported for the wide range of 2D crystals despite their importance.
Here, we present a new approach to study the electronic properties of prototypical 2D crystals, graphene, MoS2, WS2, and MoSe2 monolayer and multilayer flakes, supported on thick silicon oxide (SiO2) film using a photoemission electron microscopy combined with a deep ultraviolet (DUV) illumination. We determine the band alignments of monolayer to multilayer junctions in these four materials, and show that the ionization energy decreases from MoS2, WS2, to MoSe2 as predicted by density functional calculations. We postulate that the defects in SiO2 alleviate the charging of the 2D crystals thanks to the relatively low total photoemission current due to the low energy excitation by the DUV light. This study reveals a new metrology to uncover electronic properties intrinsic to 2D crystals supported on SiO2 substrates that interact minimally with the overlying 2D crystals.
The PEEM work was performed at the Center for Integrated Nanotechnologies, an Office of Science User Facility (DE-AC04-94AL85000). The work performed by M. B. and C. C. are supported by a U.S. DOE, Office of Energy Efficiency and Renewable Energy SunShot Initiative award for BRIDGE (DE-FOA-0000654 CPS25859). K. K. was supported by the Army Research Office MURI grant W911NF-11-1-0362. T. O. is supported by the CINT user program and Sandia LDRD. A. D. M. is supported by LANL LDRD program. Sandia National Laboratories is a multi-program laboratory managed and operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin Corporation, for the U.S. Department of Energy's National Nuclear Security Administration under contract DE-AC04-94AL85000.
ED3.4: Poster Session
Session Chairs
Wednesday AM, April 19, 2017
Sheraton, Third Level, Phoenix Ballroom
9:00 PM - ED3.4.01
Low Energy Ion Implantation and Annealing of Au/Ni/Ti Contacts to n-SiC
Neelu Shrestha 1 , Martyn Kibel 2 , Patrick Leech 1 , Anthony Holland 1 , Geoffrey Reeves 1 , Mark Ridgway 3 , Phillip Tanner 4
1 School of Engineering, RMIT University, Melbourne, Victoria, Australia, 2 Centre for Materials and Surface Science, LaTrobe University, Bundoora, Victoria, Australia, 3 Electronic Materials Engineering, Australian National University, Canberra, Australian Capital Territory, Australia, 4 Queensland Microtechnology Facility, Griffith University, Brisbane, Queensland, Australia
Show AbstractThe bombardment of SiC with low energy ions has been successfully used to modify the mechanical [1] and electrical [2] properties of the surfaces. In this paper, we examine for the first time the effect of annealing treatment on the electrical characteristics of Au/Ni/Ti/ n-SiC contacts with prior implantation of the SiC at a low energy. The substrates were comprised of n-type 3H-SiC epitaxially grown on Si <111>. The n-SiC was implanted using either P or C ions at a low energy of 5.0 keV with doses in the range 1013- 1015 ions/cm2. Arrays of metal electrodes were then lithographically fabricated on the surface of the SiC in a two-contact circular test pattern [3] to enable the measurement of specific contact resistance, ρc and sheet resistance, Rs. The Au/Ni/Ti contacts on implanted n-SiC have exhibited ohmic current-voltage characteristics after annealing at temperatures in the range 750-1000 °C. The magnitude of ρc was approximately constant with implant dose until increasing at a dose of 1 x 1015 ions/cm2 for both C and P ions. The value of ρc was reduced by an order of magnitude to ρc ~1 x 10-6 Ωcm2 at an annealing temperature of 1000 °C. These trends have been discussed in relation to elemental depth profiles of the annealed interfaces obtained by Auger Electron Spectroscopy (AES).
[1] F. Lui, C.H. Li, A.P. Pisano, C. Carraro, R. Maboudian, J.Vac.Sci.Technol., A28(5) 1259 (2010).
[2] M. Grodzicki, J. Chrzanowski, P. Mazur, S. Zuber, A. Ciszewski, Opt. Appl., 39(4) 765 (2009).
[3] Y. Pan, G.K. Reeves, P.W. Leech, A.S. Holland, IEEE Trans Electron Dev, 60(3) 1202 (2013).
9:00 PM - ED3.4.02
Redox Properties, Charge Transport and Device Performance in WO3 Electrolyte-Gated Thin-Films Transistors
Martin Barbosa 1 2 , Xiang Meng 2 , Clara Santato 2 , Marcelo Orlandi 1
1 , UNESP, Araraquara Brazil, 2 , Montreal Polytechnique, Montreal, Quebec, Canada
Show AbstractAmong the approaches pursued in transistor engineering to achieve low voltage operation, electrolyte gating (based on the use of electrolytes as the gating medium) is very promising considering the nanometric scale thickness of the electrical double layers responsible for doping and the low contact resistance due to ion accumulation at the transistor channel interface[i].
Tungsten trioxide (WO3) is a material widely used in electrochromic and sensing devices. It features multiple oxidation states, such that, besides their technological interest, WO3 electrolyte-gated (EG) transistors can be used as experimental tools to study possible correlations between redox activity and ionic/electronic transport in the material[ii]. Establishing such correlations paves the way for the demonstration of high performance (sub 1 V, prolonged cyclical stability) EG transistors.
In this work, we propose a two-fold strategy to explore the full potential of WO3 EG transistors. Our strategy is based on the control of the structure/morphology of WO3 films as well as the structure of the electrical double layers at the WO3/electrolyte interface, investigated by Atomic Force Microscopy[iii].
The WO3 films we consider are granular (densely packed polycrystalline film) and nanofiber-based films (highly entangled monocrystalline fibers). All syntheses were performed by soft chemical routes. Granular films were synthetized by a sol-gel process whereas nanofibers were synthesized directly on the substrates by microwave-assisted hydrothermal synthesis[iv] using a granular film as a seeding layer. Electrolyte-gating was performed using an ion-gel composed of triblock copolymers (such as poly (styrene-ethyleneoxide-styrene)) and ionic liquids (such as [EMIM][TFSI])[v] and a high-surface area carbon top-gate electrode. Different values of the charge doping density and charge carrier mobility are expected for the two types of transistor channels, explained at least in part by the nature of the ions constituting the ionic liquid, in turn affecting the structure of the electrical double layer.
[i] TARABELLA, G. et al. New opportunities for organic electronics and bioelectronics: ions in action. Chemical Science, 2013, 4, 1395-1409
[ii] MENG X. et al. Electrolyte-Gated WO3 Transistors: Electrochemistry, Structure, and Device Performance J. Phys. Chem. C 2015, 119, 21732−21738
[iii] LABUDA, A. et al Atomic Force Microscopy in Viscous Ionic Liquids Langmuir 2012, 28, 5319−5322
[iv] ZHANG J. et al Hydrothermally synthesized WO3 nanowire arrays with highly improved electrochromic performance J. Mater. Chem., 2011, 21, 5492
[v] HO J. et al. High-Capacitance Ion Gel Gate Dielectrics with Faster Polarization Response Times for Organic Thin Film Transistors Adv. Mater. 2008, 20, 686–690.
9:00 PM - ED3.4.03
Black Phosphorus Quantum Dots for Holes Extraction of Typical Planar Hybrid Perovskite Solar Cells
Ligeng Wang 1 , Wei Chen 1 , Zhubing He 1
1 Materials Science and Engineering, Southern University of Science and Technology, Shenzhen, Guangdong, China
Show AbstractBlack phosphorus, famous as two-dimensional (2D) materials, shows such excellent properties for opto-electronic devices as tunable direct bandgap, extremely high hole mobility (300-1000 cm2/(Vs)) and etc., which meet well with desirable requirements of hole-transport materials for currently hot hybrid perovskite solar cells (HPSCs). In this paper, facile processed black phosphorus quantum dots (BPQDs) were successfully applied to enhance holes extraction at the anode side of the typical p-i-n planar HPSCs, which remarkably improved the performance of devices with photon conversion efficiency (PCE) ramping up from 14.10% to 16.69%. Moreover, more detailed investigations by c-AFM, SKPM, SEM, hole-only devices and photon physics measurements, discover further the hole extraction effect and work mechanism of the BPQDs, such as nucleation assistance for the growth of large grain size perovskite crystals, fast hole-extraction rate, more efficient hole transfer and suppression of energy-loss recombination at the anode interface. This work definitely paves a way for discovering more and more 2D materials with high electronic properties to be used in photovoltaics and opto-electronics.
9:00 PM - ED3.4.04
Evolution of the Crystal Structure of BAlN Thin Films with Increasing Boron Concentration in the Gas Flow
Shuo Wang 1 , XiaoHang Li 2 3 , Alec Fischer 1 , Theeradetch Detchprohm 2 , Russell Dupuis 2 , Fernando Ponce 1
1 Department of Physics, Arizona State University, Tempe, Arizona, United States, 2 Center for Compound Semiconductors and School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia, United States, 3 Computer, Electrical and Mathematical Sciences and Engineering Division, King Abdullah University of Science and Technology, Thuwal Saudi Arabia
Show AbstractBAlN layers were grown on c-plane AlN/sapphire templates at 1010 oC by metalorganic chemical vapor deposition, with vapor phase B/III ratios of 6%, 12%, 15% and 18%. The structural properties of the BAlN films were studied by cross-section transmission electron microscopy. The films showed only the wurtzite structure, with no cubic phase present. The BAlN layer with the lowest 6% B/III ratio exhibits a columnar structure with diameters of about 10 nm. BAlN grown with 12% B/III ratio also exhibits a columnar structure, but with irregular boundaries. In the layer with a 15% B/III ratio, the bottom region maintains a columnar structure, and the upper region presents twins associated with (1-101) mirror planes. BAlN with the highest 18% B/III ratio exhibits a granular structure, including rotations and twins. The TEM images suggest that the early stages of thin film growth involve island formation, of the Volmer-Weber or Stranski-Krastanov types. For low boron content, larger islands result in well-defined and stable columns, and rough surfaces, as seen in the BAlN film with B/III = 0.06 and a columnar diameter of ~ 10 nm. At higher boron contents, the islands tend to be smaller and coalesce to form smoother surfaces, as observed in BAlN with B/III = 0.12. This explains why the granular contrast is similar to the surface morphology. The composition of the films was studied using X-ray diffraction (XRD) and Rutherford backscattering spectrometry (RBS). XRD measures the basal plane separation, which is correlated with the B content using Vegard’s law, giving a boron content in the range of 3 to 9 %. RBS gives the Al content which is used to deduce a B content that ranges from 6% to 17%, closely following the B/III ratios in the vapor phase. The discrepancy between XRD and RBS results may come from the microstructure of the sample. XRD measures the crystalline region only, which has lower B content, while RBS measure the average, giving a B content close to the B/III ratio.
9:00 PM - ED3.4.05
Liquid Phase Epitaxy for Growth of High-Quality Crystalline Germanium (100) on Silicon (100) Wafers
Saloni Chaurasia 1 , Srinivasan Raghavan 1 , Sushobhan Avasthi 1
1 Centre for Nano Science and Engineering, Indian Institute of Science, Bangalore, Karnataka, India
Show AbstractThere is widespread interest in integrating III-V materials on silicon using Ge as a buffer layer due to GaAs being lattice matched to Ge .However, growing epitaxial Ge on Si is not easy due to the large lattice mismatch between Ge & Si (~4%) [1]. Epitaxial Ge-on-Si has been reported by MBE using complicated multi-step growth [2]. In this paper we present a simpler, and possibly more practical, liquid-phase epitaxy (LPE) method for growing epitaxial Ge (100) on Si (100). By carefully preparing the growth surface, maintaining purity of the gasses/furnaces, and precise process control, we achieve high-quality epitaxial Ge layer on Si(100) with a rocking curve FWHM of only 0.10.
Prior to Ge deposition, the Si(100) wafer was cleaned using standard RCA procedure, followed by dilute HF dip to etch the chemical oxide. The H-passivated & cleaned Si surface is essential to seed the germanium during subsequent crystallization [2]. An amorphous layer of germanium was deposited on the cleaned silicon using PECVD at 350 0C, RF power of 0.2 W cm-2, and pressure of 1 torr using germane gas. The as-deposited film was amorphous, as confirmed by a broad Raman peak at 265.8 cm-1. Next, the amorphous germanium film was crystallized using LPE under N2 (99.999% pure) ambient. During LPE the Ge film is heated right above its melting point (937 0C) and then allowed to slowly crystallize as it cools down. It was extremely important to perform the LPE in a clean furnace. Any contamination from gas or furnace interferes with nucleation of Ge on Si, leading to polycrystalline Ge islands or nanowires (seen in SEM), instead of smooth epitaxial films of Ge. While in a clean furnace the Ge layer crystallizes leading to continuous and void-free films (seen in SEM). It is also critical to control the cooling-down rate of the LPE process. Under optimal conditions, sharp Raman peak at 292.5 cm-1 were observed, confirming complete crystallization of the Ge film. X-ray diffraction measurements showed a sharp peak at 66.50 corresponding to Ge (400). The thickness of the Ge films had an effect on the quality of the crystallized Ge layer. The rocking curve FWHM of the 100 nm Ge film was 0.40, while FWHM of 1000 nm film was just 0.10, suggesting that the thicker Ge film has higher quality as compared to thinner. From the rocking curve, the dislocation density in the thick Ge layer is estimated to be ~108 cm-2. Post growth annealing is expected to reduce defect density even further.
In summary, we present a one-step method to grow epitaxial Ge on Si wafers using liquid phase epitaxy. The resulting Ge films are void-free, (100) oriented, with a rocking curve FWHM of only 0.10.
[1] Sci. Technol. Adv. Mater. (2014) 024601.
[2] Liquid Phase Epitaxy of Electronic, Optical and Optoelectronic Materials, John Wiley & Sons,July 2007.
9:00 PM - ED3.4.07
Low Temperature Germanium Surface Passivation Formed Using In Situ NH3/N2 PECVD Nitration for High Quality Ge-MOS Capacitors
Ghada Dushaq 1 , Mahmoud Rasras 1 , Ammar Nayfeh 1
1 , Masdar Institute, Abu Dhabi United Arab Emirates
Show AbstractThe development of high quality integration of Ge/high κ gate stack is very critical for future metal oxide field effect transistor (MOSFET). A superior high-κ /Ge gate stack satisfying low density of traps (Dit) and thin EOT simultaneously is mandatory for high performance Ge-channel devices [1,2]. The major weaknesses in Ge technology is germanium oxides (GeO and GeO2) stability and water solubility, the poor quality of Ge/ high κ-dielectric interfaces and the difficulty in forming a low density of traps (Dit) Ge metal-oxide semiconductor interface. Thus, in order to achieve a high quality Ge devices, it is essential to understand the surface chemistry of Ge and to introduce an effective way to clean and passivate its surface.
In this paper, nitration of germanium surface using 380 sccm flow of N2, and 30 sccm flow of NH3 is performed using RF-PECVD reactor at 250C. The chemical state at the surface of the treated samples were characterized using FT-IR Bruker Vertex 80v over a spectral rang of (500-4000 cm-1). Moreover, the pseudo dielectric function of the bare Ge wafer and Ge surface nitration with different exposure time is studied using J.A.Woollam Co. (M-2000R) variable angle ellipsometer. The electrical characteristics (Capacitance-Voltage measurements at 1 MHz) of Al/Ti/HfO2/GeON/p-Ge capacitors are investigated using Agilent B 1505 A curve tracer + Signatone manual 1160 prober.
The FT-IR spectra of the passivated Ge surface confirms the existence of stable Ge-N vibrational mode and Ge-NH2 deformation mode at 732cm-1 and 1510cm-1, respectively. The peak of energy ~ 4.2eV in the pseudo dielectric function is a sensitive measure of transition-region widths. This energy peak shows its maximum of 25 for Ge passivated samples compared to the Ge bulk wafer. The maximum energy peak observed in the pseudo dielectric function can be understood from the heterogeneous medium optical models as a reduction in GeO2 thickness in the passivated samples [3]. Furthermore, the ellipsometery data shows ~ 1.4nm GeON film thickness generated in the passivated surface.
The CV characteristic of the fabricated capacitors at 1MHz show that no hysteresis with nitration-based passivation step is observed, compared with ~400mV of the un-passivated sample. The suppression of hysteresis is attributed to the reduction of electron traps (Dit ~2.5x1011) and enhancement of dielectric/Ge interface quality. The improved interface quality of plasma-based nitration of Ge surface is a promising technique for high performance Ge MOSFET fabrication.
1. T. Maeda, et. all, applied Physics Letters 85, 3181 (2004).
2. G .Dushaq, et. all, ECS Transactions 75 (8), 661-666, (2016).
3. D. E. Aspnes and A. A. Studna, PHYSICAL REVIEW B, 27( 2), 985-1009,(1983).
9:00 PM - ED3.4.08
Amorphous IZTO Thin-Film Transistor Stability Improvement via Oxygen Vacancy Reduction
Jinhee Park 1 , Eric Young 1 , Chao Li 1 , Mark Goorsky 1 , Dwight Streit 1
1 Materials Science and Engineering, University of California, Los Angeles, Los Angeles, California, United States
Show AbstractWe report device performance and stability of sputtered amorphous indium-zinc-tin-oxide (aIZTO) thin-film transistors (TFTs) as a function of oxygen gas ratios during growth. Negative bias illumination stress (NBIS), negative bias stress (NBS) and illumination stress (IS) tests of the devices were performed for different gas ratios of oxygen. With increased oxygen ratio, complex deep-level oxygen-related defect centers were partially suppressed and the IS results were improved by reducing deep-level defect centers of oxygen vacancies. The oxygen vacancies were also related to the persistent photocurrent (PPC) behavior under illumination with green light. The ionized oxygen vacancy sites are believed to cause PPC behavior for hours. The PPC effect at high oxygen ratio was gradually reduced. As a result, we confirmed that the incorporation of oxygen and the reduction of oxygen vacancy concentration could effectively reduce intrinsic deep-level defect states in a-IZTO TFTs and improve device stability under IS test. On the other hand, device stability under NBS and NBIS test was significantly degraded at high oxygen ratio due to the increased defects states at interfacial layer between channel and dielectric.
9:00 PM - ED3.4.10
Thin Silicon Films Grown Using Ultra-High-Vacuum Evaporation and Conventional Plasma Enhanced Chemical Vapor Deposition Means—The Potential for Device Applications
Farida Orapunt 2 , David Lockwood 3 , Jordan Andrews 1 , Stephen O'Leary 1
2 Faculty of Engineering and Applied Science, University of Regina, Regina, Saskatchewan, Canada, 3 Measurement Science and Standards, National Research Council of Canada, Ottawa, Ontario, Canada, 1 , University of British Columbia, Kelowna, British Columbia, Canada
Show AbstractRecently, we reported on a number of thin silicon films deposited onto crystalline silicon, native oxidized crystalline silicon, and optical quality fused quartz substrates through the use of ultra-high-vacuum evaporation at growth temperatures ranging from 98 to 572 oC [1]. An analysis of their grazing incidence X-ray diffraction and Raman spectra indicates that a phase transition, from amorphous-to-crystalline, occurs as the growth temperature is increased. This phase transition was shown to be a strong function of the substrate being employed. In this analysis, we contrast these thin silicon films with those deposited using conventional plasma enhanced chemical vapor deposition. In particular, a detailed comparison of the differences between the grazing incidence X-ray diffraction and Raman spectra is pursued. We then examine the impact of these differences from the perspective of the potential for electron device applications
[1] F. Orapunt, L.-L. Tay, D. J. Lockwood, J.-M. Baribeau, M. Noël, J. C. Zwinkels, and S. K. O’Leary, “An amorphous-to-crystalline phase transition within thin silicon films grown by ultra-high-vacuum evaporation and its impact on the optical response,” Journal of Applied Physics, Volume 119, pages 065702-1-12, 2016.
9:00 PM - ED3.4.11
Challenges to Overcome in Graphene Synthesis for New Generation Electronics
Selcuk Temiz 1 , Zafer Mutlu 1 , Mihrimah Ozkan 1 , Cengiz Ozkan 1
1 , University of California, Riverside, Riverside, California, United States
Show AbstractGraphene is the two-dimensional hexagonal arrangement of Carbon atoms that form σ-type bonding in plane, and π-type bonding out of plane. Graphene has the enormous mechanical strength thanks to sp2- hybridized orbitals, and it has the excellent electrical mobility thanks to out of plane pz orbitals. There are several methods to synthesize graphene; micro-mechanical exfoliation from bulky graphite sheets as top down design, and chemical vapor deposition (CVD) as a bottom up design. CVD technique is more advantageous for its wafer scale, uniform, controlled growth capabilities; however it is restricted to grow only on metallic (Cu, Ni) surfaces. One of the biggest challenges on graphene synthesis is the transferring graphene from metallic substrate to final substrate, which is usually Si/SiO2 for device applications. The chemical etching process is mostly involved in transfer steps, that results contamination by the chemical solvent agents, and the contamination gives rise to unintentional doping on graphene. As a result, the performance of graphene-based devices is deteriorated after transfer. We study to overcome contamination problem by performing the transfer with chemical free solution of deionized (DI) water. DI water separates graphene at the interface from the substrate by differentiating hydrophilic and hydrophobic surfaces. We observe a promising progress on graphene transfer from Cu substrate onto Si/SiO2 chips in terms of cleanness of final product.
9:00 PM - ED3.4.12
Photoemission Analysis of Oxygen Chemisorption and Electronic Structure of Epitaxial GaN Films Grown on Different Substrates
Monu Mishra 1 2 , Shibin Krishna 1 2 , Neha Aggarwal 1 2 , Govind Gupta 1 2
1 , CSIR-National Physical Laboratory, Delhi India, 2 , Academy of Scientific and Innovative Research, Delhi, New Delhi, India
Show AbstractThe electronic properties and surface chemistry of epitaxial GaN (polar and nonpolar) films grown on GaN template as well as different orientation of sapphire substrate were probed via spectroscopic and microscopic measurements. Epitaxial GaN films were grown on MOCVD GaN/c-sapphire template and all planes sapphire substrate (a-, c-, and r-plane) via Molecular Beam Epitaxy. Photoemission (XPS and UPS) measurements were performed to investigate the nature of the surface chemical states and electronic structure while AFM and FESEM measurements divulged the morphology of the grown films. The XPS core level (CL) and valence band maximum (VBM) positions shifted towards higher binding energies (BE) with oxide coverage and revealed a downward band bending. The position of Fermi Level was observed to be pinned due to donor like states in near surface region. The valence band (VB) investigation revealed that the hybridization corresponds to the interactions of Ga 4s and Ga 4p orbitals with N 2p orbital, and result in N2p–Ga4p, N2p–Ga4s, mixed and N2p–Ga4s states. It was observed that the electron affinity and ionization energy were increased as the amount surface oxide was enhanced. The pit structure probed via microscopic measurements (FESEM and AFM) revealed that the film surface was covered with hexagonal pits, which played a significant role in oxygen chemisorption. The favorable energetics of the pits offered an ideal site for oxygen adsorption. Pit density and pit depth were observed to be important parameters that governed the surface oxide coverage. The contribution of surface oxide was increased with an increase in average pit density as well as pit depth. The analysis provides better understanding of the surface structure and properties and would help in fabrication of high quality metal-semiconductor contact to enhance the device performance.
9:00 PM - ED3.4.13
Physical Vapor Deposition of Ge Nanostructures on Si Substrates Using Solid Ge Sources
Yize Li 1 , John Nguyen 1
1 , California State University, Bakersfield, California, United States
Show AbstractGe finds important applications in optoelectronics, owning to its pseudo-direct bandgap property and compatibility with Si-based semiconductor technology. Ge-on-Si materials are typically grown by costly molecular beam epitaxy (MBE) or ultra-high vacuum chemical vapor deposition (UHVCVD) using the highly toxic and flammable GeH4 gas. We demonstrate the growth of Ge nanostructures on Si substrates using solid Ge sources in a compact CVD system, where ultra-high purity Ar gas serves as the carrier gas. The morphology of the Ge nanostructure is found to depend on the flow rate of Ar gas and the pre-growth cleaning procedure of the Si substrate. The morphological, structural, electrical, and optical properties of the Ge nanostructures, and their correlations, are investigated. The goal is to demonstrate that these Ge-on-Si materials, produced by a low-cost and toxic-free process, are suitable for practical applications in optoelectronics.
9:00 PM - ED3.4.14
Low Temperature Plasma Heteroepitaxy of Si and SiGe on (100) GaAs
Pere Roca i Cabarrocas 1 , Jean-luc Maurice 1 , Decobert Jean 2 , Vaissiere Nicolas 1 , Hamon Gwenaelle 1
1 LPICM, CNRS, Ecole Polytechnique, Palaiseau France, 2 , III-V Lab, Marcousis France
Show AbstractIntegration of III-V materials on silicon has been and still is a challenging subject due to lattice and thermal mismatch effects, as well as to the polarity issues at the interface which result in a high density of defects. To overcome these difficulties, we present here an original approach for high efficiency tandem solar cells [1]. In our inverted metamorphic approach, we first use MOVPE to grow the AlGaAs top cell lattice matched on a (100) GaAs substrate, and then perform low temperature PECVD heteroepitaxial growth of SiGe for the bottom cell. Without the need for ultra-high vacuum and keeping temperature below 200°C, both a III-V surface cleaning and a subsequent heteroepitaxial growth with a good crystalline quality were achieved. The good electronic quality of the low temperature epi-Si and epi-SiGe layers has been demonstrated by making heterojunction solar cells on highly doped c-Si substrates [2]. Moreover, we will show that ultra-shallow junctions can be readily achieved by adding phosphine or trimethylboron to the silane and germane gases used for the epitaxial growth. This opens the way to tunnel junction diodes where the p-type and n-type layers can be either in the III-V material, in the group IV material; or even a hybrid solution where one doped layer is based on III-V and the other on the group IV material, placing the critical interface in the ideal position.
1. R. Lachaume, R. Cariou, J. Decobert, M. Foldyna, G. Hamon, P. Roca i Cabarrocas, J. Alvarez, J-P. Kleider, Enerdy Procedia 84 (2015) 41-46.
2. R. Cariou, J. Tang, N. Ramay, R. Ruggeri, and P. Roca i Cabarrocas. Solar Energy Materials and Solar Cells 134 (2015) 15.
9:00 PM - ED3.4.15
Capacitance—Voltage Measurement of Al/HfO2/InGaAs MOS Capacitor on Silicon Substrate
Sisir Chowdhury 1 , Pallab Banerji 1
1 , IIT Kharagpur, Paschim Medinipur India
Show AbstractElemental semiconductors like Si and Ge are mostly used in semiconductor for a long time. Both Si and Ge are indirect band gap materials and, hence efficiency is less for optoelectronic and high speed applications. III-V semiconductors are the most promising area of research for these applications. Most III-V compound semiconductors are direct band gap materials having higher electron mobility and drift velocity. Moreover, Si/SiO2, MOS reaches the ultimate limit of miniaturization. Consequently using this technology it is not possible to continue with the Moore’s law further unless otherwise new materials systems are obtained. To continue Moore’s law, thickness of the oxide layer should be decreased. Decreasing in the thickness of the oxide layers causes a high leakage current. High leakage current and less-reliable behaviour suggest a need for a replacement of SiO2 with thicker dielectric materials with higher permittivity.
Hafnium oxide is used as a most suitable and promising high-K dielectric due to its relatively large dielectric constant and high band gap for III-V MOS devices. In this work, we have fabricated Al/HfO2/InGaAs Metal-oxide-semiconductor capacitor on Silicon substrate. The silicon wafer is degreased and etched then a InP buffer layer is grown on it by means of metal organic vapor phase epitaxy (MOVPE) technique. Then temperature is raised in presence of PH3 overpressure to prevent the Phosphorous deficiency in the grown InP layer. At a temperature of 625 degree celsius InGaAs layer is deposited onto the grown InP layer. High-K HfO2 film of 20 nm thickness is deposited on InGaAs at room temperature by RF sputter deposition technique. Aluminum metal contact is deposited on the oxide layer by thermal evaporation. Finally, a ohmic contact is made on InGaAs to measure the capacitance-voltage (C-V) characteristics of the MOS capacitor.
C-V characteristics of the Al/HfO2/InGaAs MOS capacitor for wide frequency range from 5 KHz to 500 KHz are studied by Kiethley 4200-SCS. The C-V curves show that the flatband voltage is frequency dependent and also shows small frequency dispersion in the depletion region. Theoretically the measured capacitance should be independent of the input signal frequency. This dispersion may be present due to the interface traps present in the dielectric layer. The traps respond to a signal with a time constant less than that of the inverse of the given frequency and the flatband voltage is reached at a particular input voltage. Thus, for a high frequency the slow traps failed to responds and remained charged. Hence, the flatband voltage is achieved at a slightly higher input voltage and the C-V curves spread along the applied bias voltage axis. However, the curves are frequency independent in the accumulation region. A further study is required to investigate the interface trap density.
9:00 PM - ED3.4.16
Single GaAs Nanowire/Graphene Hybrid Devices Fabricated by a Position Controlled Micro Transfer and Imprinting Technique for Embedded Structure
Anjan Mukherjee 1 , Dong-Chul Kim 1 2 , Hoyeol Yun 3 , Miri Seo 4 , JungTae Nam 5 , Keun Soo Kim 5 , Sang Wook Lee 4 , A. Mazid Munshi 2 , Dasa L. Dheeraj 2 , Bjorn-Ove Fimland 1 , Helge Weman 1
1 Department of Electronics and Telecommunications, Norwegian University of Science and Technology (NTNU), Trondheim Norway, 2 , Crayonano AS, Trondheim Norway, 3 School of Physics, Konkuk University, Seoul Korea (the Republic of), 4 Department of Physics, Ewha Womans University, Seoul Korea (the Republic of), 5 Department of Physics and Graphene Research Institute, Sejong University, Seoul Korea (the Republic of)
Show AbstractCompared to present semiconductor thin film/graphene optoelectronic devices [1-2], semiconductor nanowire (NW)/graphene contact devices can show additional interesting properties such as light trapping and polarization dependent absorption. GaAs is one of the most important III-V semiconductor NW structure with a high potential for high efficiency solar cells [3] and photo detectors [4]. In addition, using graphene as a highly conducting and transparent electrode could lead to enhanced the absorption efficiency of single GaAs NW optoelectronic devices as well as enable basic NW contact studies through a fermi level tuning of graphene.
In this report, we present the fabrication process of single GaAs NW/graphene hybrid devices with a planar junction configuration. A position-controlled micro transfer and imprinting technique that enables us to choose and transfer a single NW (or graphene) selectively on a target graphene (or a single NW) for high quality junction has been developed. Both GaAs NW/graphene bottom- and top-contact devices are presented. For the fabrication of first approach, GaAs NW/graphene bottom contact devices, we utilized a weak nature of adhesion between polymer resist and hydrophobic surface. By dispersing NWs on hydrophobic surface, single NWs could easily be detached with a polymer resist and selectively transferred on top of the target graphene substrate, forming a NW/graphene contact at the bottom. For the second approach, NW/graphene top contact devices, a key issue is how to make single NWs embedded in a flat-surfaced structure, which is critical for the successful transfer of graphene on top of the NWs without any damage to the graphene. Using a curable photoresist layer, single NWs could be transferred and imprinted on for the embedded NW structures. Exfoliated graphene or chemical vapor deposited graphene was subsequently deposited on top to produce the NW/graphene top contact. One merit of this top contact device is that one can investigate the NW/graphene contact through the transparent graphene. The optoelectrical measurement results of the fabricated single GaAs NW/graphene hybrid devices will also be presented.
References:
1. Xiaoqiang Li and et al., Nano Energy, 16, 310-319(2015)
2. Hang He and et al., Nano Energy, 16, 91-98(2015)
3. Sander A. Mann and et al., Nature Nanotech., 162, 10.1038(2016)
4. Fu X. W. et al. Appl.Phys.Lett., 100, 223114(2012)
9:00 PM - ED3.4.17
Microstructure Analysis and Multiple Photoluminescence in High Temperature Electronic Conducting InZrZnO Thin Films
Jayaram Peediyekkal 1 , Prasoon Prasannan 2 , Sulfikkarali NK 3
1 , MES Ponnani College, Malappuram India, 2 Department of Pure and Applied Physics, Kannur University, Kannur, Kerala, India, 3 Department of Physics, Farook College, Calicut, Kerala, India
Show AbstractIndium and Zirconium co doped zinc oxide (InZrZnO) thin films are prepared by chemical spray pyrolysis method on pre-heated quartz substrates. The films are subjected to vacuum annealing at 400 degree celsius for three hours in an appropriate air (10-5mbar) ambience after deposition. X-ray diffraction, Scanning electron microscopy, energy dispersive spectra and photoluminescence are used to characterize the films. Temperature dependent electrical measurements are conducted on the films and the films exhibit exceptional conductivity at higher temperatures. XRD analysis shows that all the films prepared in this work have hexagonal wurtzite structure. The average crystallite sizes of the films were calculated using Scherrer’s formula, and uniform deformation model (UDM) of Williamson-Hall method is used to establish the micro-strain values. The dislocation density is determined from the Williamson and Smallman’s formula. Intense, broad and strongly coupled multiple photoluminescence were observed from photoluminescence spectra. PL indicated relatively high concentration defective oxygen and Zn vacancies in the film composition. Strongly coupled ultraviolet near blue emissions authenticate that the dopants are capable of inducing modulated free excitonic (FX), donor accepter pair (DAP) and longitudinal optical phonon emissions in thin films.
9:00 PM - ED3.4.18
Gadolinium Substitution Effect on the Structural, Surface, Chemical Composition and Thermoelectric Properties of Ni0.5 GdxBi0.5-x CoO3
Ramachandran Thuruthiyil 2 , Jayaram Peediyekkal 1
2 Physics, Zamorins Guruvayurappan College, Calicut, Kerala, India, 1 , MES Ponnani College, Malappuram India
Show AbstractCeramic solid solutions Ni0.5 GdxBi0.5-x CoO3 (x= 0, 0.1, and 0.2) were synthesized. The structural characterization reveled a transformation from cubic phase to tetragonal on Gadolinium incorporation. The XRD pattern of Ni0.5Gd0.1Bi0.4CoO3 and Ni0.5Gd0.2Bi0.3CoO3 showed a simple tetragonal structure and the observed peaks agree well with the ICDD data card nos. 00-049-1762 identifying space group as P-421c and is identical with β Bi2O3. Raman spectrum of the samples substitution of Bismuth with Gadolinium leads the A1g modes to a read shift from the preferred active vibrations. SEM and EDAX exposed the morphology and chemical composition respectively. From the XPS analysis of the compounds , peak asymmetries, complex multiplet splitting, shake-up and other surface states of elements Gd,Bi,Co,Ni and O were identified . The results were processed through computer assisted surface analysis techniques and surface chemistry of the compounds were well resoloved. The electrical conductivity, thermal conductivity and Seebeck coefficient, were measured in the temperature range 600-900K. The effect of Gadolinium substitution on the thermoelectric properties of this p type semiconducting material has been studied in detail. Hopping conduction is found to dominate at high temperature for electrical conductivity. The localized conduction occurred on two different percentages of Gadolinium has been also discussed. The thermoelectric figure of merit is found to increase on x=0.1 than the x=0.2 sample which suggests the optimum substitution of Gd3+ in the host matrix. The impurity compensation by charge carrier concentration on the thermoelectric nature of the material at relatively higher temperatures qualifies the ability of this material for high temperature thermoelectric applications.
9:00 PM - ED3.4.19
MoS2/Graphene In-Plane Heterostructure—Synthesize, Electronic Properties and Interface Characteristics
Amirhossein Behranginia 1 , Poya Yasaei 1 , Fei Long 2 , Reza Shahbazian-Yassar 1 , Amin Salehi-Khojin 1
1 Mechanical Engineering, University of Illinois at Chicago, Chicago, Illinois, United States, 2 Mechanical Engineering, Michigan Technological University, Houghton, Michigan, United States
Show AbstractThere is an extreme demand to reduce the size of the electronic devices for future applications; so, the creation of in-plane heterojunction between 2D materials can be a promising solution to achieve this goal. In this work, in-plane molybdenum disulfide/graphene (MoS2/Gr) heterostructure is synthesized through chemical vapor deposition (CVD) technique and its interface properties is characterized by Kelvin probe force microscopy (KPFM) measurements under the device operation. This in-plane heterostructure with at least three orders of magnitude less contact area compared to the out-of-plane graphene-contacted devices has also shown comparable mobility with these devices. The Ohmic behavior in the in-plane graphene-contacted MoS2 devices also results in an order of magnitude higher mobility compared to metal-contacted ones.
9:00 PM - ED3.4.20
Optical Characterization of Semipolar InGaN/GaN MQWs Grown on Si(001) Substrate
Hojun Lee 1 , Siyoung Bae 2 , Kaddour Lekhal 2 , Yoshio Honda 2 , Hiroshi Amano 1 2
1 , Nagoya University, Nagoya Japan, 2 , Institute of Materials and Systems for Sustainability, Nagoya University, Nagoya Japan
Show AbstractRecently, our group demonstrated single domain semipolar GaN on Si(001) substrates and improved its crystal quality [1]. As for the next step, multiple quantum wells (MQWs) were grown on the semipolar GaN for potential optoelectronic applications. Theoretically, piezoelectric polarization fields in the c-plane InGaN/GaN MQWs cause serious spatial separation of electrons and holes in quantum wells, reduced quantum efficiency and shifted emission spectra with increasing carrier injection [2]. In this study, we report on the growth and optical characterization of InGaN/GaN MQWs by comparing polar (0001) and semipolar (10-13) planes. Semipolar GaN film were selectively grown on the stripe-patterned where nucleation was grown by directionally sputtered-AlN (DS-AlN)/Si(001), while the c-oriented GaN film was grown on Si(111) substrate. MQWs consist of a well thickness of 3 nm and a barrier thickness of 8 nm. Excitation power-dependent photoluminescence (PL) spectra were measured for c-plane and semipolar (10-13) plane at room temperature. The excitation power was varied from 1.8 to 31.8 mW with a excitation wavelength of 405 nm. The PL peak position of c-plane (0001) MQWs was blue-shifted with increasing excitation power. On the other hand, PL peak position of semipolar (10-13) plane MQWs was nearly constant with increasing excitation power. This indicates that the quantum confined Stark effect (QCSE) in MQWs is significantly reduced. For details more analysis were performed such as LT-PL, STEM, and XRD.
Reference
[1] H.J. Lee, S.Y. Bae, K. Lekhal, T, Mitsunari, A. Tamura, Y. Honda, and H. Amano, J. Cryst. Growth 454 (2016) 114
[2] P. Lefebvre, A. Morel, M. Gallart, T. Taliercio, J. Allègre, B. Gil, H. Mathieu, B. Damilano, N. Grandjean, and J. Massies, Appl. Phys. Lett. 78 (2001) 1252
9:00 PM - ED3.4.21
Probing the Chemical Functionalization of Reduced Graphene Oxide with NEXAFS Spectroscopy
Chris McNeill 1 , Amit Tewari 2 , Dipti Gupta 2 , Lars Thomsen 3 , Eliot Gann 1 3
1 , Monash University, Clayton, Victoria, Australia, 2 , Indian Institute of Technology, Bombay, Mumbai India, 3 , Australian Synchrotron, Clayton, Victoria, Australia
Show AbstractThe ability to produce large area samples of graphene with high throughput at low cost is of significant interest for the development of graphene-based electronics. A promising route is the exfoliation of graphite to produce graphene oxide (GO) that can then be solution-processed to form layers or films. To restore the electronic functionality of graphene, GO must be reduced, with the quality of the resulting reduced graphene oxide (rGO) dependent on the nature and concentration of residual functional groups. While Raman spectroscopy has been a standard tool for proofing graphene and graphene-like materials, synchrotron-based near-edge X-ray absorption fine-structure (NEXAFS) spectroscopy has excellent sensitivity to residual chemical defects such as epoxide and carboxylic acids groups. NEXAFS spectroscopy furthermore can assess the extent of local ordering, the degree of planarity and can be used to assess samples with less than a monolayer of coverage.
Here we use NEXAFS spectroscopy to characterise the effectiveness of various reduction routes for restoring the electronic structure of graphene oxide. In particular, reduction via hydrazine, hydrogen iodide in acetic acid, and UV exposure are compared. Reduction via hydrazine and hydrogen iodide in acetic acid are found to be effective in restoring local order evidenced by the restoration of the σ* excitonic peak. Differences in the type of residual chemical functionalities are observed and compared. Finally, high degrees of dichroism are observed for hydrazine and hydrogen iodide reduction indicating that highly planar rGO samples can be produced.
9:00 PM - ED3.4.22
Synthesis of Few-Layer Rhenium Disulfide via Chemical Vapor Deposition
Michael Valentin 1 , Alison Guan 1 , Cindy Merida 1 , Michael Gomez 1 , I Hsi Lu 1 , Ludwig Bartels 1
1 , University of California, Riverside, Riveride, California, United States
Show AbstractTransition metal dichalogenides (TMDs) are exciting new materials that have received a lot of attention due to their direct bandgap semiconducting properties. Well-studied TMDs such as molybdenum disulfide (MoS2) and tungsten diselenide (WSe2) exhibit a direct bandgap at the single layer limit, while in the bulk form offering an indirect gap. Rhenium disulfide (ReS2) is a new TMD that is unique in its ability to retain a direct bandgap even in the bulk form. Using chemical vapor deposition (CVD), few-layer ReS2 is grown and characterized by Raman spectroscopy, photoluminescence, atomic force microscopy (AFM), and x-ray photoelectron spectroscopy (XPS). We obtain films with a Raman signature that directly corresponds to bulk values as well as an XPS-based compositions indicative of ReS2.
9:00 PM - ED3.4.23
Investigation on the Synthesis and Properties of Single-Crystalline Nickel Silicide Nanowires
Jen-Yi Lin 1 , Hsiu-Ming Hsu 1 , Kuo-Chang Lu 1
1 Department of Materials Science and Engineering, National Cheng Kung University, Tainan Taiwan
Show AbstractHigh quality single-crystalline NiSi2, Ni2Si and Ni31Si12 nanowire arrays coated with amorphous silicon dioxide were synthesized in high quantity by a nickel transport chemical vapor deposition (CVD) method. The morphological changes with various reaction temperatures, ambient pressures and reaction times, were observed and studied. At 750 °C and 850 °C, cone-shaped nanowire arrays were formed, composed of dense and oriented Ni31Si12 and Ni2Si nanowires with lengths of over 60 μm. The growth mechanisms of the nickel silicide nanowires have been proposed and identified with microscopy studies. Field emission measurements show that the as-grown NiSi2, Ni2Si and Ni31Si12 nanowires were of remarkable field enhancement factors, 2532, 4822 and 4099, respectively, and magnetic property measurements show ferromagnetic characteristics for the Ni2Si and Ni31Si12 nanowires, demonstrating promising potential applications for field emitters, magnetic storage, and biological cell separation.
9:00 PM - ED3.4.24
Atomic Scale Simulations of Phosphorus-Vacancy-Nitrogen and Nitrogen-Self-Interstitial Complexes in Germanium
Piotr Spiewak 1 , Kamil Czelej 1 , Krzysztof Kurzydlowski 1
1 , Warsaw University of Technology, Warsaw Poland
Show AbstractIn spite of the research efforts spent in the past decade, achieving highly activated shallow n-type junctions in germanium remains challenging. That is associated with the enhanced diffusion and deactivation of the donors for concentrations exceeding 1019 cm−3 [1-3]. The enhanced diffusion is a consequence of the singly negatively charged donor-vacancy (DV)− pair that mediates donor diffusion in Ge according to the reaction (DV)− ↔ Ds+ + V2−, where Ds+ and V2− are respectively the singly positively charged substitutional donor with D = {P; As; Sb} and the doubly negatively charged vacancy. The deactivation is related to the formation of inactive donor-vacancy clusters whose formation is favoured due to Coulomb attraction between Ds+ and (DV)− via the reaction (DV)− + Ds+ ↔ (D2V)0 [2]. To overcome these problems several schemes for point-defect engineering have been proposed. The first method concerns the use of co-implantation with inactive impurities like F, C, or N, while a second class of methods relies on native point defect management by creating an excess self-interstitial (I) concentration. The diffusion control of F-, and C-DV clusters are relatively well understood, however the exact diffusion retardation mechanism induced by N is still a matter of controversy [3]. An early density functional theory (DFT) calculations points to the vacancy trapping mechanism and some experimental results conclude differently, supposed that NnIm clusters stabilize the presence of excess interstitials at the initial annealing stages and act as a source of I injection during cluster dissolution, which may retard the PV-mediated diffusion. Since the vacancy-mediated dopant diffusion activation enthalpies were calculated within standard DFT that might introduce some inaccuracy (pointed out in our previous work [4,5]) due to well know shortcoming of the standard DFT - the underestimation of bandgaps of semiconductors and insulators. To overcome the bandgap problem, we will apply one of the higher level electronic structure methods: the Heyd-Scuseria-Ernzerhof hybrid functional (HSE06), that have proven reliable for describing the bandgap and native defects in germanium [4,5]. In the current work we report results of hybrid functional calculations of PV-N and NnIm complexes, that shed more light on the retardation mechanism induced by nitrogen as a co-implantation species in germanium.
[1] J. Vanhellemont and E. Simoen, Mater. Sci. Semicond. Process. 15, 642 (2012).
[2] A. Chroneos and H. Bracht, Appl. Phys. Rev. 1, 011301 (2014).
[3] E. Simoen, M. Schaekers, J. Liu, J. Luo, C. Zhao, K. Barla, and N. Collaert, Phys. Status Solidi A (2016), DOI: 10.1002/pssa.201600491.
[4] P. Spiewak, J. Vanhellemont, and K. J. Kurzydlowski, J. Appl. Phys., 110, 063534 (2011).
[5] K. Sueoka, E. Kamiyama, P. Spiewak and J. Vanhellemont, ECS J. Solid State Sci. Technol. 5, P3176 (2016).
9:00 PM - ED3.4.25
Zirconium-Doped MgZnO Thin Film Deposited Using RF Magnetron Sputtering
Kuang-Po Hsueh 1 , Wen-Yen Lin 1 , Hsien-Chin Chiu 2 , Jinn-Kong Sheu 3 , Po-Hsun Liao 3 , Jenq-Yang Chang 4
1 , Vanung University, Chung-Li Taiwan, 2 Department of Electronics Engineering, Chang Gung University, Tao-Yuan Taiwan, 3 Department of Photonics, National Cheng Kung University, Tainan Taiwan, 4 Optical Science Center, National Central University, Tao-Yuan Taiwan
Show AbstractDoped MgxZn1-xO (MgZnO) is of interest as a transparent conductive oxide because of its ternary material as well as its higher transparency and wider bandgap compared with zinc oxide. Zirconium (Zr) was chosen as the dopant in this work because of its abundance, comparable ionic size to that of Zn, and because it can act as a donor providing an extra free electron per ion. In this paper, we report on high-quality, wurtzite (WZ) Zr-doped MgZnO epitaxial film grown with the RF magnetron sputtering method using a ZnO/MgO/ZrO2 (75/20/5 wt %) target. Hall measurements, XRD analyses and transparent performance tests were recorded. The XRD results indicate that the as-grown Zr-doped MgZnO film exhibited the coexistence of two phases: MgZnO (111)-cubic and MgO2 (200)-WZ peaks. The Zr-doped MgZnO film shows high transparency with transmittances of more than 90 % in the visible region (400-1000nm), and the sharp absorption edge is visible in the UV region (approximately 350nm). Additionally, the Hall measurement of Zr-doped MgZnO film reveals that the higher doping concentration, the lower resistivity and higher mobility as a function of the annealing temperatures. The experimental results also indicate that Zr-doped MgZnO film annealed at high temperature contains more oxygen vacancies playing the role of donor.
9:00 PM - ED3.4.26
Single Element Device Using SnO Micro Discs for Gas Sensor Application
Marcelo Orlandi 1 , Mateus Masteghin 1
1 , UNESP, Araraquara Brazil
Show AbstractChemical sensors are very important in the modern society due to their ability to continuous environment monitoring. Many systems related to combustion require real-time measurement of both gas components and contaminants to operate at optimal efficiency and minimize harmful emissions. Moreover, the need to evaluate the composition of multi-component gas mixtures has also been a challenge, as most chemical sensor technologies are specific to a single analyte. Another important problem is the detection of ultra-low levels of analytes. To overcome the reported problems one possibility is to construct an array of single element sensor devices working in parallel. Each individual sensor can be designed to operate for a specific analyte and the device can present the ability to detect multi species in an atmosphere.
In order to have high sensitive single element devices it is important to use single crystalline materials with the surface presenting the most sensitive exposed planes for an analyte. In this way, we have recently reported that single crystalline SnO micro discs with (001) large faces present exceptional sensor response to low levels of NO2 with excellent selectivity [1]. Then, in this work we prepared sensor devices using a single disc as the active element. The devices were prepared by using a Focus Ion Beam microscope using the Pt gas injection system (GIS) to deposit Pt electrodes connecting the disc with measuring pads. We prepared of two different devices, one of them with twice the exposed area than other. Sensor measurements were performed exposing the devices to NO2 and CO gases in ppm levels and results showed that the sensor response of both devices is higher to NO2 than for CO, meaning that even for a single element devices the selectivity of SnO to NO2 was kept. Besides, the sensor with higher exposed area presented almost twice the sensor response than the smaller device, in a good agreement of devices response of with the exposed area. The sensor mechanisms are related to the ionosorption model, in which the polar NO2 molecules are more easily adsorbed on the (001) material surface, which present a high density of lone pairs, promoting a more effective charge transfer.
Acknowledgements:
FAPESP (proc. # 2015/210033-0 and # 2013/07296-2) and CNPq (proc #447760/2014-9, #800733/2014-2, #303542/2015-2). SEM and FIB facilities were provided by the LMA-IQ-UNESP.
References:
[1] P.H. Suman et al., Sensors and Actuators B 186, 103-108 (2013).
9:00 PM - ED3.4.27
Hydrothermal Growth Of Zinc Oxide
Leeju Singh 2 1 , Ghanshyam Varma 2 1
2 Physics, IIT Roorkee, Roorkee, Uattarkhand, India, 1 , Indian Institute Of Technology Roorkee, Roorkee India
Show Abstract
In this work, zinc oxide (ZnO) nano rods of different shapes were successfully synthesized by hydrothermal method. Zinc nitrate hexahydrate and hexamethylenetramine (HMTA) were used as precursor and surfactant respectively. Absolute ethanol was used as solvent and pH was adjusted by dilute solution of NaOH. The ZnO seed layer was formed in the buffer solution of different concentration. ZnO nano wires of different shape were further grown by varying the pH of solution in the hydrothermal process. The samples were characterized by X-ray diffraction (XRD), Scanning Electron Microscopy (SEM), Fourier Transform Infrared Spectroscopy (FTIR), Transmission Electron Microscopy (TEM), and UV visible spectroscopy. The scanning electron microscopy confirmed formation of the nano sized seed and growth of various shaped nano wires in hydrothermal solution. The XRD diffraction pattern confirmed the formation of hexagonal wurtzite crystal structure of ZnO. The average particle size observed in SEM image was 12-14 nm. The optical properties of the sample are investigated by UV-visible spectroscopy. For different pH value, growth time and concentration of hydrothermal solution, nano-wire of different shapes and size were obtained. The world therefore now demands a material that should possess inherent properties like larger band gap, higher electron mobility as well as higher breakdown field strength. So on making investigation about such a material the name of compound comes out is “Zinc Oxide” which is a wide gap semiconductor material very well satisfying the above required properties. Not only has this Zinc oxide possessed many versatile properties for UV electronics, spintronic devices and sensor applications. Also ZnO has been commonly used in its polycrystalline form over hundred years in a wide range of applications. This ignites many research minds all over the world and creates enthusiasm to develop proper growth and processing techniques for the synthesis of Zinc oxide.
9:00 PM - ED3.4.28
Reduced Graphene Oxide Synthesized by Intense Pulse Light on Colorless Polyimide Film for Wearable Chemical Sensors
Seon-Jin Choi 2 1 , Il Doo Kim 1
2 Applied Science Research Institute, Korea Advanced Institute of Science and Technology, Daejeon Korea (the Republic of), 1 Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology, Youseong-Gu Korea (the Republic of)
Show AbstractIntense pulsed light (IPL) substantially reduces the complexity in synthesis of reduced graphene oxide (RGO) and damage to a plastic substrate. Optical IPL irradiation is advantageous considering the fast reduction process less than 22 msec as well as simple integration technique on a plastic substrate. It was revealed that approximately 1000-fold enhancement in electrical conductivity was achieved after IPL irradiation, which demonstrates effective formation of RGO sheets on flexible and colorless polyimide(CPI) film. The improved chemical sensing performance of RGO demonstrates potential application in wearable chemical sensors. The RGO sheets coated on CPI film exhibited characteristic sensing properties toward H2S, ethanol, and H2. In particular, high resistance transition [(Rair-Rgas)/Rair×100] up to 0.30% was achieved towards H2S at 20 ppm.
Although graphene-based sensing layer is a probable candidate for flexible and transparent chemical sensors, irreversible sensing characteristic, in which the baseline resistance drifts with respect to chemical exposure, is a critical disadvantage. To obtain reversible chemical sensing property, we proposed conductive CPI film by embedding silver nanowires (Ag NWs) in the CPI film. The Ag NW-embedded CPI (Ag NW-CPI) film exhibited heating characteristics under the applied voltage. Therefore, the improved reversible sensing property of RGO sensors toward NO2 molecules demonstrates effective modulation of operating temperatures using Ag NW-CPI heater. The reversible NO2 sensing performance was achieved at an elevated temperature (71.7 °C) by applying 1.8 V to the Ag NW-CPI heater, thereby minimizing the baseline resistance deviation around 1–1.1%.
We also developed wearable watch-type and patch-type chemical sensor modules that can transmit sensing data via Bluetooth communication to integrate the RGO sensors. The result demonstrated that the RGO sheets formed on the CPI film by IPL can detect chemical species such as NO2 and H2S for real-time environmental and health monitoring.
9:00 PM - ED3.4.29
Effect of Plasma Power on Properties of Amorphous Silicon Carbide Hard Mask Films Deposited by Plasma Enhanced Chemical Vapor Deposition
Sungwoo Lee 1 , Jaeyoung Yang 1 , Sanghak Yeo 1 , Taekjib Choi 2 , ChulMin Youn 2
1 , TES, Yongin-Si Korea (the Republic of), 2 Nanotechnology and Advanced Materials Engineering, Sejong University, Seoul Korea (the Republic of)
Show AbstractWith the recent revolution in mobile device technology and the increasing need for higher data storage density, non-volatile memory technologies have rapidly developed. Recently, three-dimensional NAND has emerged as a mainstream technology owing to new deposition and etch technique. Such a state-of-art technology requires new hardmasks that are capable of deep etching and high aspect ratio feature. Thus, hardmasks should exhibit transparent, high selectivity, high mechanical strength, low stress, and ashable.
In this study, beyond amorphous carbon layer based-hardmask, we developed hydrogenated amorphous silicon carbide (a-SiC:H) as a new hardmask, deposited by plasmas enhanced chemical vapor deposition (PECVD). We investigated the effects of plasma power on the structural and mechanical properties of amorphous silicon carbide (a-SiC:H) films. The plasma power was varied from 100 to 1600W. Moreover, with various carbon contents ranging from 19 to 27%, the chemical composition, atomic bond structure and stress of films were investigated. It appears the power dependence for changing structure of silicon films. Also, compressive stress of a-SiC:H film was strongly dependent on the chemical state of the carbon content in the films. As a result, a-SiC:H films exhibit a suitable and effective properties which enables higher stack 3d nand and/or DRAM for hard mask application.
9:00 PM - ED3.4.30
GaAs(100) Surface Passivation with Sulfide and Fluoride Ions
Pawan Tyagi 1 2
1 , University of District of Columbia, Washington, District of Columbia, United States, 2 , Indian Institute of Technology, Kanpur, UP, India
Show AbstractInteraction of GaAs with sulfur can be immensely beneficial in reducing the surface states effects and for developing novel molecular devices, where a molecular channel can be connected to GaAs electrode via thiol functional group. However, the primary challenge lies in the increasing the stability and effectiveness of the passivated GaAs on the desired semiconductor properties. We have investigated the effect of single and double step surface passivation of n-GaAs(100) by using the sulfide and fluoride ions. Our two single-step passivation treatments involved the use of sulfide and fluoride ions individually. The first double-step passivation was performed by treating the n-GaAs surface first with sulfide ions and then fluoride ions. The second double-step passivation was performed by treating the GaAs surface first with sulfide ions and then fluoride ions, respectively. Sulfidation was conducted using the nonaqueous solution of sodium sulfide. Whereas the passivation steps with fluoride ion was performed with the aqueous solution of ammonium fluoride. Both sulfidation and fluoridation steps were performed either by dipping the GaAs sample in desired ionic solution or electrochemically. Photoluminescence was conducted to characterize the relative changes in surface recombination velocity due to the single and double step surface passivation. Photoluminesce study showed the double-step chemical treatment where GaAs was first treated with fluoride ions followed by the sulfide ions yielded the highest improvement. The time vs. photoluminescence study showed that this double-step passivation exhibited lower degradation rate as compared to widely discussed sulfide ion passivated GaAs surface. We also conducted surface elemental analysis using Rutherford Back Scattering to decipher the near surface chemical changes due to the four passivation methodologies we adopted. The double-step passivations affected the shallower region near GaAs surface as compared to the single step passivations. To understand the thermal stability of the bonds between GaAs surface and fluoride and sulfide ions we performed FTIR after heating the passivated GaAs samples.
9:00 PM - ED3.4.31
First-Principles Study of N-Type Doping in Amorphous In-Ga-Zn-O Semiconductors
. Divya 1 2 , Rajendra Prasad 3 , . Deepak 1 2
1 Department of Materials Science and Engineering, Indian Institute of Technology Kanpur, Kanpur India, 2 National Center for Flexible Electronics (FlexE), Indian Institute of Technology, Kanpur, Kanpur India, 3 Department of Physics, Indian Institute of Technology Kanpur, Kanpur India
Show AbstractAmorphous indium gallium zinc oxide (a-IGZO) is at present being extensively investigated because it exhibits high mobility values (10-60 cm2/V-sec), whereas amorphous silicon a:Si-H exhibits mobility values an order of magnitude smaller (1-2 cm2/V-sec). However, the metal-semiconductor (M-S) contacts in a-IGZO thin film transistors (TFTs) also exhibit high contact resistance when not annealed thermally. On the other hand, high annealing temperatures are not suitable for flexible substrates. Therefore, we propose an alternative method that increases the number of charge carriers at the M-S interface by n-type doping. For choosing a suitable substitutional dopant, it is desirable that the size of the dopant and the substituted cation is similar, the Gibbs free energy of formation of the oxide of the dopant is less than that of the substituted atom and the oxidation state of the dopant cation is larger. Based on these criteria, we chose several elements, namely, V, Sn and Y. Thereafter, first principles based calculations were carried out for these substitutions and it was found that V is the most efficient dopant (based on number of electrons contributed per dopant atom). Using the density functional theory calculations it was determined that V donates two electrons to the conduction band minimum (CBM) when it replaces an In or Ga atom and three electrons when it replaces Zn. Sn donates one electron to the CBM when it replaces In or Ga and two electrons when it replaces Zn and no additional electrons are added to the CBM when Y replaces In or Ga. However, one electron is made available to the CBM when Y substitutes a Zn atom. Moreover, the conduction band minima is not significantly altered when the dopant replaces any of the substitutional cation sites. This is true for all the dopants. Furthermore, the Gibbs free energy of formation of vanadium oxide (V2O5) is less than that of In2O3, Ga2O3 and ZnO. Consequently, based on our first principles based calculations, V is an ideal n-type dopant for the a-IGZO system.
9:00 PM - ED3.4.32
High Temperature Characteristics of Pt/TaSi2/Pt/W and Pt/Ti/W Diffusion Barriers for Ohmic Contacts on 4H-SiC
Robert Okojie 1 , Dorothy Lukco 2 1
1 , NASA Glenn Research Center, Cleveland, Ohio, United States, 2 , Vantage Partners, LLC, Cleveland, Ohio, United States
Show AbstractThe degradation of ohmic contacts to 4H-SiC pressure sensors over time at high temperature is primarily due to two failure mechanisms: migrating bond pad Au and atmospheric O toward the ohmic contact/SiC interface and the inter-metallic mixing between diffusion barrier systems (DBS) and the underlying ohmic contact metallization. We investigated the effectiveness of Pt/TaSi2/Pt/W and Pt/Ti/W DBS in preventing Au and O diffusion through the underlying binary Ti/W or alloyed W50:Ni50 ohmic contacts to 4H-SiC and the DBS/ohmic contact intermixing at temperature up to 700 °C.
The Pt/TaSi2/Pt/W DBS (DBS-A) was sputter deposited separately on pre-annealed alloyed W50:Ni50 at. % and Ti/W ohmic contacts on n-type 4H-SiC. Similarly, a stack of Pt/Ti/W DBS (DBS-B) was deposited on the above mentioned ohmic contacts. A 1 µm thick Au capping layer was deposited on each DBS. The samples were initially furnace annealed in Ar for 30 minutes at 650 °C, followed by soaking in air at 700 °C for 30 minutes. Auger electron spectroscopy (AES) depth profile and focused ion beam field emission scanning electron microscopy (FIB-FESEM) were used for the analysis.
For the DBS-A on the W50:Ni50 ohmic contacts, the FIB-FESEM revealed the transformation of the surface morphology from a previously smooth surface to one that was densely populated with sub-micron solid globular features, which were identified to be a Au-Si eutectic phase. The Au-Si eutectic became a nucleation site for surface oxidation, which then extended 300 nm into Au layer. The oxidation of the Au-Si eutectic at the top surface will degrade the mechanical and electrical integrity of the contact even if wire- or flip-chip bonding is successful, thereby resulting in poor device performance or failure. However, no evidence of Au or O diffusion through the DBS was observed. A similar result was obtained with DBS-A on the Ti/W ohmic contact. In both cases, however, the DBS/ohmic interface showed some intermixing between W from the DBS stack and the W50:Ni50 ohmic contact, which might result in changes in the contact resistance.
In general, the Pt/TaSi2/Pt/W DBS characteristically exhibited surface and a sub-surface Au-Si eutectic, thus presenting an active surface for oxidation.
Both the DBS-B samples on the W50:Ni50 and on the Ti/W ohmic contacts to the n-type 4H-SiC exhibited relatively smoother surface morphology, with less significant Au diffusion into the DBS, and the diffusion of O was effectively prevented.
Based on the above results the DBS-B offered better diffusion barrier characteristics and DBS-B on Ti/W and was further evaluated for 20 hrs at 700 °C. The results were comparable to the earlier thermal soak profile in which the diffusion of O was prevented and there was no further diffusion of Au into the DBS. The DBS-B/ohmic contact intermixing was minimal and the ohmic contact/SiC interface was undisturbed.
The full details of this work will be presented at the meeting.
Symposium Organizers
Rinus Lee, GLOBALFOUNDRIES
Kah-Wee Ang, National University of Singapore
Nadine Collaert, IMEC
Tony Low, University of Minnesota
Symposium Support
Applied Materials
Kokusai Semiconductor Equipment Corporation
ED3.5: III-V Growth and Interfaces
Session Chairs
Nadine Collaert
Rinus Lee
Wednesday AM, April 19, 2017
PCC North, 100 Level, Room 127 C
9:15 AM - *ED3.5.01
Addressing Challenges of III-V on Si Integration by Developing High Productivity Epi Process in Compatible 300mm MOCVD System
Zia Karim 1 , Zhongyuan Jia 1 , Subbu Tamilmani 1
1 , Aixtron Inc, Sunnyvale, California, United States
Show AbstractA great deal of interest has recently been shown in heterogeneous integration of III-V semiconductors (both As/P and Nitride) epitaxially grown on Si due to the possibility of combining the superior electronic and optoelectronic properties of III-Vs with the high manufacturability of Si-based microelectronics. Moreover, the growth of III-V semiconductors on Si with high electron mobility, high injection velocity, and high critical field (Baliga Figure of Merit) are considered promising candidates to replace Si for various applications ranging from high mobility channel to high efficiency power electronics. The large lattice and thermal expansion coefficient mismatch, along with the difference in crystal polarity between III-Vs and Si, results in different kinds of crystalline defects in heteroepitaxial layers which can deteriorate device performance and reliability. For III-V materials to become a realistic option for sub-7nm CMOS devices, growth on 300mm Si wafers meeting CMOS defect density and electrical performance must be realized.
Irrespective of the approaches for defect reduction, MOCVD processes has to be developed on 300mm wafers demonstrating good physical and device properties. Moreover, a MOCVD equipment is required for HVM manufacturing which offers low cost of ownership, high reliability and uptime, as well as ES&H compatibility. Thus, a MOCVD equipment with close coupled showerhead technology along with other equipment features will be presented in this talk.
In this paper, we also study the impact of different buffer layers approaches on the crystal quality of III-V films, grown by MOCVD on 300 mm Si wafers.
9:45 AM - ED3.5.02
Electrical Properties of GaAs, InAs, InGaAs Epitaxially Grown on 300 mm Si(001) Substrate by MOCVD
Reynald Alcotte 1 , Mickael Martin 1 , Tiphaine Cerba 1 , Jeremy Moeyaert 1 , Fares Chouchane 1 , Sylvain David 1 , Bassem Salem 1 , Franck Bassani 1 , Frederique Ducroquet 1 , Yann Bogumilowicz 2 , Thierry Baron 1
1 , CNRS, Grenoble France, 2 , CEA - LETI, Grenoble France
Show AbstractGaAs and InGaAs semiconductors integration on silicon is interesting to boost the performances of integrated circuits owing to electronic and optoelectronic properties. The major challenges to fabricate efficient high speed electronic, optoelectronic and RF devices are growing high quality materials and forming low resistive Ohmic contacts. Indeed the growth of III-V on silicon generates defects in the layer such as threading dislocations (TD), antiphase boundaries (APB) and stacking faults. These defects deteriorate the physical properties of materials and decrease the device performances. In the same way, forming low resistive contacts is mandatory to obtain high performance devices. To form Ohmic contacts different solutions could be used and/or combined: (i) high doping level in the semiconductor, (ii) inserting a doped interlayer with small band gap between metal and heavily doped semiconductor and (iii) interface optimization between metal and semiconductor i.e. metal alloying. In this contribution, we will focus on optimising the III-As/Si heteroepitaxy by metal organic chemical vapor deposition on 300 mm (100)-oriented Si substrates to reduce the structural defect density. We will show that Si(100) surface preparation is a key point to get free of APB in GaAs within a very thin layer of only 100 nm. We observed for the same doping level of n=7x1017 cm-3, an improvement of a factor of 10 for electron mobility (µ = 2000 cm2/V.s) and room temperature photoluminescence signal intensity improvement by a factor of 3 for a GaAs of 250 nm without APB compared with GaAs with APB. As we demonstrate the possibility to grow GaAs/Si(100) without APB, then we focus on obtaining the maximum doping level of n and p-type using Silane (SiH4), Disilane (Si2H6) and Selenium (Se) as donor impurities and Zinc (Zn) as acceptor impurity in GaAs, InAs and InGaAs alloys. The maximum n-type doping levels reach ~1019 cm-3 (SiH4 & Si2H6) and 2x1019 cm-3 (Se) for GaAs , 5x1019 cm-3 (Si2H6 & Se) for InAs and 2x1019 cm-3 (Se) and 5x1019 cm-3 (Si2H6) for In53Ga47As. For p-type doping levels are 2x1020cm-3 and 5x1019 cm-3 for GaAs and In53Ga47As respectively. After optimization of doping level the way of inserting a low band gap materials between the semiconductor and the metal to improve access resistance is investigated. The growth process was optimized to form a thin InAs layer (30 nm) on Si(100), GaAs and InGaAs with low surface roughness (≤ 2nm). We present and compare the contact resistivity measured by transmission line model on these different materials with and without insertion of an InAs interlayer. Without any contact optimization, such as choice of metal and annealing…, a contact resistivity of 4x10-7 Ohm.cm2 and 3x10-6 Ohm.cm2 are obtained for n-InGaAs and n-GaAs on Si respectively.
10:00 AM - ED3.5.03
Native Point Defect Formation Energies in Binary Compound Semiconductors
Ashutosh Kumar 2 1 , Oscar Restrepo 3 1 , Wolfgang Windl 1
2 , Synopsys Inc., Mountain View, California, United States, 1 , The Ohio State University, Columbus, Ohio, United States, 3 , GLOBALFOUNDRIES, Malta, New York, United States
Show AbstractPoint defect formation energies for elemental materials are easily calculated within a canonical ensemble by taking the energy difference between the system with the point defect and perfect bulk with the same stoichiometry. However, in a multi component system, such as binary semiconductors, this calculation becomes non trivial. In this case, introducing a point defect changes the stoichiometry, and thus in order to determine the energy of perfect AN-1BN, the chemical potential of an A-atom in perfect AB needs to be known. The so-called “Limiting chemical potential approach” within the grand canonical ensemble has been used for many years to calculate chemical potentials of constituent species and defect formation energies in a binary system, but we show that is in general only valid for systems with one line-compound between the elemental limits. Here, we suggest a general method to calculate chemical potentials for any binary system by equating the concentrations of respective species in the stoichiometric ratio in the compound. We further perform electronic structure calculations within Density Functional Theory to estimate the location of defect states in the material. This method has been extended to include charge transition levels and applied to calculate formation energies and defect states for various neutral point defects and their various charge states in InP and SiC.
10:15 AM - ED3.5.04
III-V Semiconductor/Oxide Interfaces upon Thermal Oxidation and High-K ALD Investigated by XPS
Andrea Troian 1 , Johan Knutsson 1 , Sarah McKibbin 1 , Aein Babadi 2 , Lars-Erik Wernersson 2 , Anders Mikkelsen 1 , Rainer Timm 1
1 Synchrotron Radiation Research and NanoLund, Lund University, Lund Sweden, 2 Nanoelectronics and NanoLund, Lund University, Lund Sweden
Show AbstractIII-V semiconductors, with high carrier mobility, in combination with Atomic Layer Deposition (ALD) of high permittivity (high-k) oxides open promising perspectives on transistor scaling beyond the 14 nm node. However, the interface between the high-k oxide and the semiconductor substrate plays a crucial role, since high defect densities still hamper device performances. Recently1 a new passivation approach has been proposed, consisting in the removal of the native semiconductor oxide followed by a controlled passivation by thermal oxidation in ultra high vacuum (UHV) conditions prior to the ALD of the high-k oxide, claiming that this process provides lower interfacial defect densities, Fermi level (FL) unpinning, and lower capacity dispersion. However, the role of the interfacial thermal oxide deposited in UHV is still controversial, and further characterization is needed. Synchrotron radiation X-ray photoelectron spectroscopy (SR-XPS) is a powerful tool to study such semiconductor-oxide interfaces, since it is surface and stoichiometry sensitive and compatible with UHV equipment2,3.
We present a systematic SR-XPS study of InAs after subsequent processing steps of the passivation procedure, performed in-situ under UHV conditions in the SR-XPS chamber: We start with an InAs(100) substrate with native oxide at its surface considering As3d, In3d and In4d core levels. The native oxide was completely removed by annealing under a flux of thermally cracked hydrogen; afterwards the sample was heated and passivated under exposure to a controlled flux of O2, it was then taken out from the UHV environment and an Al2O3 high-k oxide was grown via ALD. In addition to the XPS data, the success of the processing steps was further confirmed by scanning tunneling microscopy and spectroscopy as well as low energy electron diffraction.
We find that native and thermal oxides have a different stoichiometry: the former is formed by a combination of In-oxides and As3+ and As5+ oxides, whereas for the latter only As3+ and In2+ oxides occur. The thin thermal oxide was not stable under ambient conditions and a further oxidation was observed after air exposure, with the presence of As5+ and metallic As. The subsequent ALD of Al2O3 resulted in the nearly complete removal of all As-oxides, as expected from literature3,4. The XPS analysis at different penetration depths showed that the As3+ component is mostly present at the surface, whereas As5+ is stronger at the interface, suggesting a permeable thermal oxide layer where the further oxidation takes place also in depth. We also observe a shift by ca. -0.2 eV of the binding energy, likely caused by FL unpinning, due to the decrease of the surface state density upon native oxide removal. However, the FL pinning reoccured as soon as the thermal oxidation started.
1Ko et al., Nature, 468, 286 (2010)
2Hinkle et al., Curr. Op. Sol. St. Mat. Sci. 15, 188 (2011)
3Timm et al., APL 97, 132904 (2010)
4Tuominen et al., APL 106, 011606 (2015)
ED3.6: Semiconductor Doping
Session Chairs
Nadine Collaert
Rinus Lee
Wednesday PM, April 19, 2017
PCC North, 100 Level, Room 127 C
11:00 AM - *ED3.6.01
Surface Transfer Doping—A Novel Alternative to Classical Doping in Semiconductor Electronics
Vidhya Chakrapani 1
1 , Rensselaer Polytechnic Institute, Troy, New York, United States
Show AbstractElectronic properties of semiconductors can be controlled by introduction of appropriate dopants into the bulk lattice. In a recently discovered phenomenon, known as “surface transfer doping,” free electrons or holes can be generated in undoped semiconductor surfaces, without the introduction of foreign atoms, by controlled deposition of thin layer of chemical moieties having appropriate electronic structure. In this type of doping, the nature of electrical conductivity and the direction of electron transfer depend crucially on the relative positions of the Fermi level of semiconductor and the chemical potential of electrons in the surface chemical moieties. This doping phenomenon was first observed in undoped hydrogenated diamond, which showed a p-type surface conductivity when exposed to ambient air.1 In this case, surface conductivity develops spontaneously as a result of electron transfer from diamond to an adsorbed water film on the surface.2,3,4 Since then, this effect has been exploited for other systems, such as diamond/C60,5 graphene/C60. In addition, the process has been shown to affect electrical, optical and electrochemical properties of several technologically important materials such as single-walled carbon nanotubes,6 graphene,7 gallium nitride and zinc oxide.8 This presentation will give an overview of the recent progress in this field and its impact on the emerging technologies.
1. Gi, R. S., et al., Jpn. J. Appl. Phys. (1995) 34, 5550
2. Maier, F., et al., Phys. Rev. Lett. (2000) 85 (16), 3472
3. Chakrapani, V., et al., Science (2007) 318 (5855), 1424
4. Foord, J. S., et al., Diam. Relat. Mater. (2002) 11 (3-6), 856
5. Strobel, P., et al., Nature (2004) 430 (6998), 439
6. Chakrapani, V., et al., ECS Solid State Lett. (2013) 2 (11), M57
7. Chen, W., et al., J. Am. Chem. Soc. (2007) 129 (34), 10418
8. Chakrapani, V., et al., J. Am. Chem. Soc. (2008) 130 (39), 12944
11:30 AM - ED3.6.02
Controlling MLD Dopant Diffusion in Group IV Materials Using Inorganic Spacers
Giuseppe Alessio Verni 1 2 , Noel Kennedy 1 2 , Brenda Long 1 2 3 , Ray Duffy 2 , Justin D. Holmes 1 2 3
1 , University College Cork, Cork Ireland, 2 , Tyndall Research Institute, Cork Ireland, 3 , CRANN, Dublin Ireland
Show AbstractThe advent of non-planar device architectures, along with device scaling, has created the need for a radically new, conformal and non-destructive method for doping semiconductors. Molecular layer doping (MLD) has recently been shown to be an effective, chemical approach for doping semiconductor substrates and nanodevices, e.g. FinFETs, without causing crystal damage as seen with traditional ion-implantation techniques. MLD comprises two steps: i) functionalization of the semiconductor surface with a p- or n- dopant containing molecule and ii) thermal diffusion of the dopant atoms, by rapid thermal annealing, into the semiconductor.
However, as electronic devices are scaled towards smaller dimensions, further optimization of MLD processes is required, i.e. to achieve a carrier concentration >1020 at/cm3
at really shallow depths (< 20 nm). The depth to which dopants can be driven, and controlled, by thermal annealing has however proven to be a difficult task, particularly in high mobility semiconductors such as Ge. To-date, there have only been a few reports of shallow doping by MLD in Group IV materials.
This presentation describes the use of different surface functionalization approaches, in particular the application of inorganic spacers, and advanced annealing techniques to control the diffusion depth of dopants in Ge and Si by MLD. AFM, XPS and ECV/SIMS analysis of arsenic and phosphorous-doped substrates, as well as TEM and electrical measurements of nanowire devices will be presented.
11:45 AM - ED3.6.03
Beryllium-Doped Indium Gallium Arsenide—An Ab Initio Study for the Explanation of Anomalous Dopant Diffusion Behavior
Mahasin Alam Sk 1 , Wenyan Liu 2 , Sergei Manzhos 1 , Ignatio Martin-Bragado 3 , Siew Ann Cheong 2
1 , National University of Singapore, Singapore Singapore, 2 , NTU, Singapore Singapore, 3 , IMDEA Materials Institute, Madrid Spain
Show AbstractA roadblock in utilizing InGaAs for scaled-down electronic devices is its anomalous dopant diffusion behavior; specifically, existing models are not able to explain available experimental data on beryllium diffusion consistently.
We present density functional theory (DFT) simulations of thermodynamics and kinetics of beryllium-doped InGaAs. We calculate the energy parameters and charge states of possible diffusion mechanisms. We consider different substitutional as well as interstitial sites, their energies and diffusion barriers for diffision between them. Our results suggest that the Frank-Turnbull mechanism is not likely, instead, kick-out reactions are the dominant mechanism. Due to a large reaction energy difference, the Ga interstitial and the In interstitial play different roles in the kick-out reactions, contrary to what is usually assumed. The DFT calculations also suggest that the influence of As on Be diffusion may not be negligible.
Based on the DFT results, continuum modeling and kinetic Monte Carlo simulations are then performed. The model is able to reproduce experimental Be concentration profiles.
12:00 PM - ED3.6.04
Temperature Dependent Transport at Silicide/Silicon Interfaces
LeighAnn Larkin 1 , Mitchell Godfrey 2 , Pamela Norris 2
1 Engineering Physics, University of Virginia, Charlottesville, Virginia, United States, 2 Mechanical and Aerospace Engineering, University of Virginia, Charlottesville, Virginia, United States
Show AbstractSilicide alloys are often used as Ohmic contacts for silicon-based electronic devices, and recently were reported to possess some of the largest metal/semiconductor thermal boundary conductances. In this project, we isolate the role of composition in interfacial transport at PtxSi/silicon and PdxSi/silicon interfaces, x within the range of 1-2. The alloys of varying composition are achieved through thermomechanical processing, and are then characterized via X-ray Diffraction and Scanning Electron Microscopy. The interfacial conductance is measured as a function of temperature from 200 – 350K via Time-domain Thermoreflecctance. These results are further understood with phonon density of states approximated through Density Functional Theory.
12:30 PM - ED3.6.06
Germanium Junctions for Beyond-Si Node Using Flash Lamp Annealing (FLA)
Hideaki Tanimura 1 , Hikaru Kawarazaki 1 , Kazuhiko Fuse 1 , Makoto Abe 1 , Yoshio Ito 1 , Takayuki Aoyama 1 , Shinichi Kato 1 , Ippei Kobayashi 1 , Tsutomu Nagayama 2 , Nariaki Hamamoto 2 , Shigeki Sakai 2
1 , SCREEN Semiconductor Solutions Co., Ltd., Hikone-City Japan, 2 , Nissin Ion Equipment Co., Ltd., Kyoto Japan
Show AbstractThe high carrier mobility of Ge makes it one of the most promising materials for high performance MOSFETs. However, there are challenges in fabricating both the n+/p and p+/n junctions. In n-type junctions, it is difficult to form highly activated shallow junctions due to the low solid solubility and high diffusivity. In contrast, it is easy to form shallow p+/n junctions, but higher activation is required for high performance devices.
We report on shallow junctions with high activation in n+/p and p+/n Ge using flash lamp annealing (FLA). By reducing the knock on of oxygen during ion implantation, Rs of n+/p junctions can be reduced from 277ohms/sq to 235 ohms/sq after annealing at 800degC. Carrier concentration measurements show that a sample with low oxygen concentration has 22% higher carrier concentration than a sample with high oxygen concentration. By optimizing the ion implantation conditions, junction depths of less than 10nm can be achieved. Additionally, the diffusion length can be controlled in the nano-meter range without degrading the activation level when the annealing time is adjusted in the millisecond order. The diffusion rate is 1nm per millisecond. In p+/n junctions, the activation ratio is improved by 20% when controlling the amount of damage done to the substrate by ion implantation.
Compared with Si junctions, the resistivity of the n+/p and p+/n Ge junctions are lower by 13% and 45%, respectively. Thus, Ge is a good alternative material for sub-10nm node devices and the potential for forming ultra-shallow n+/p and p+/n nanometer scale junctions in Ge devices using FLA is high, offering the possibility of fabricating realistic monolithically-integrated Ge CMOS devices.
12:45 PM - ED3.6.07
Ab Initio Simulation of Metal Contacts to 2D Semiconductors with Electron-Phonon Interactions
Wushi Dong 1 2 , Peter Littlewood 1 2
1 , The University of Chicago, Chicago, Illinois, United States, 2 , Argonne National Laboratory, Chicago, Illinois, United States
Show AbstractContact resistance could potentially limit the performance of aggressively scaled devices based on two-dimensional (2D) materials. In this work, we present full-band atomistic quantum transport simulations of metal contact to 2D semiconductors including electron-phonon scattering. A combined approach based on the non-equilibrium Green's function formalism and a mean-field description of the electronic structure is used to calculate vertical transport in an extended device. Tight-binding parameters and electron-phonon coupling constants obtained through the maximally localized Wannier function technique enable us to model the transport at low computational costs. The long-range polar optical contribution is split from the short-range one in order to properly treat the divergence of the electron-phonon matrix elements at long-wavelength limit. Electron transport is found to happen mainly near the energy range where the bands of metal contact and 2D semiconductor cross. The dependence of contact resistance on the overlap length is also studied to determine the ultimate scalability. Our analysis of transport efficiencies provides the foundation and motivation for experimental works.
ED3.7: Process Technologies for Beyond Si
Session Chairs
Nadine Collaert
Dinesh Thanu
Wednesday PM, April 19, 2017
PCC North, 100 Level, Room 127 C
2:30 PM - *ED3.7.01
CMP Challenges for Advanced Technology Nodes Beyond Si
John Zhang 1 , Stan Tsai 1 , Jody Fronheiser 1 , Shariq Siddiqui 1 , Steven Bentley 1 , Raghuveer Patlolla 2 , Donald Canaperi 2 , Charan Surisetty 2 , Walter Kleemeier 1 , Cathy Labelle 1
1 Albany Nanotechnology Center, GLOBALFOUNDRIES, Albany, New York, United States, 2 Albany Nanotechnology Center, IBM Research, Albany, New York, United States
Show AbstractAs the scaling of the device dimensions in CMOS devices runs into physical limitations, new materials beyond Si with high electron and hole mobilities such as Ge, SiGe, and III-V materials are introduced. Challenges of CMP for these materials are reviewed in this paper. First we discussed the challenge of the new integration schemes to CMP. Loading effects can result in different growth rates for varying feature sizes, which results in a critical dimension dependent overburden. This makes it more difficult to meet the targets of the CMP process with respect to oxide loss and Ge/SiGe/III-V dishing. Secondly we discuss the challenge for the reduction of the defects during CMP for these new materials. Finally the challenge that is relevant especially for the introduction of III-V materials is studied. During the polishing of III-V materials, toxic gases as well as III-V containing liquid waste will be created. The chemical mechanism of the waste control is discussed.
3:00 PM - ED3.7.02
Surface Chemistry and Atomic Layer Etching of III-V Semiconductors in Acidic Solutions for N5 Technology Nodes and beyond
Dennis Van Dorp 1 , Sophia Arnauts 1 , Greg Quintens 3 , Thierry Conard 1 , John Kelly 2 , Frank Holsteyns 1
1 , imec Leuven & Hasselt University, Leuven Belgium, 3 , Catholic University Leuven, Leuven Belgium, 2 , Debye Institute for NanoMaterials Science, Utrecht Netherlands
Show AbstractThe scaling limit of Si-based CMOS technology is approaching. Despite the excellent properties of Si and its native oxide, the performance enhancement can no longer be guaranteed due to intrinsic mobility issues. The considerably higher mobility of III-V semiconductors has led to renewed interest and a following phase in the development of extremely scaled transistors [1,2].
Device manufacturing requires a large number of wet-chemical treatment steps (e.g. layer selective etching, trimming, recess etching, oxide removal) [3]. Due to aggressive scaling, etching control up to the (sub)atomic-layer-scale is needed. The complex nature of the III-V/solution interface (e.g. solubility of group III versus group V oxides, impact of anions on dissolution mechanisms, charge transfer reactions) makes the design of suitable wet chemical etchants challenging. Clearly, a thorough insight in the dissolution kinetics and mechanisms is required to meet the technological milestones foreseen for the near future.
In this work an overview will be given of the etching kinetics and mechanisms of In(Ga)As in acidic solutions. Two types of etching systems will be discussed. The first is based on the use of acidic H2O2 solution. Surface bond rupture by the oxidizing agent causes formation of group III and V hydroxides which subsequently dissolve in the acid. For H2SO4 (or ≤0.01M HCl) the surface is dominantly OH terminated during etching. The large electronegativity of the OH group destabilizes back bonds and induces a relatively high etch rate and surface roughening. However, for HCl concentrations >0.01M Cl- ions displace OH groups and Cl termination renders the surface hydrophobic. The lower electronegativity of the anion stabilizes surface bonds, lowers the etch rate and improves the morphology significantly. Comparable behaviour observed for GaAs, InGaAs and InAs demonstrates that solution composition is key to controlled surface treatment of III-As compound semiconductors. An alternative digital type of etching approach involves (selective) oxidation in O3/H2O followed by oxide removal in HCl solution [4]. By quantifying the dissolved oxide content by ICP-MS we were able to demonstrate that for InAs a high stoichiometry of etching is obtained and that the number of equivalent oxidized monolayers can be varied from 1-6/cycle by adjusting the O3 concentration. For trimming of semiconductor devices, some surface roughening was observed after multiple cycles due to the high solubility of As oxides in water. An important advantage of the 2-step atomic layer etching approach is that defect selective etching can be effectively suppressed.
[1] J.A. del Alamo, Nature 479 (2011), 317
[2] M. Heyns and W.Tsai, MRS Bulletin 34 (2009) 485
[3] K.A. Reinhardt and R.F. Reidy: Handbook of Cleaning for Semiconductor Manufacturing (John Wiley and Sons, U.S.A., 2011)
[4] D.H. van Dorp, S. Arnauts, F. Holsteyns and S. De Gendt, ECS J. Solid State Sci. Technol., 4 (2015)
3:15 PM - ED3.7.03
Enhanced UV-Detection with Etching Induced Ordered Nanostructures on Polar & Non-Polar Epitaxial GaN Films
Monu Mishra 1 2 , Abhiram Gundimeda 1 , Shibin Krishna 1 2 , Neha Aggarwal 1 2 , Govind Gupta 1 2
1 , National Physical Laboratory, New Delhi India, 2 , Academy of Scientific and Innovative Research, Delhi India
Show AbstractWe report the formation of wet chemical etching induced nanostructures on polar and nonpolar epitaxial GaN films. The morphological transformations from planar to faceted pyramidal, flat/trigonal rod like nanostructures along with development of porous films were observed. The oxidation states of chemically modified (etched) surface were probed via photoemission spectroscopic measurements which revealed the elimination of hydroxyl species and adsorbed water molecules in polar GaN. Further, dissociation of Ga-N bonds and traces of metallic gallium were observed on the surface of porous GaN film after repeated etching. Fermi level pinning, alteration in the surface polarity with significant change in the electron affinities were perceived. The wettability of the samples was reduced drastically and surfaces became highly hydrophilic. A great extent of stress relaxation with negligible in-plane compressive stress was pragmatic in the developed nanostructures. The temperature dependent I-V analysis displayed significant enhancement in current conduction with reduced sample resistance. UV photo-detectors based on non-polar GaN nanostructures were fabricated which divulged significant enhancement in photocurrent as well as responsivity. The in-depth analysis of the wet chemical etching induced nanostructures demonstrate that the chemically etched samples could be used as a potential template in the design/growth of III-Nitride based high performance devices.
ED3.8: New Electronics
Session Chairs
Nadine Collaert
Dinesh Thanu
Wednesday PM, April 19, 2017
PCC North, 100 Level, Room 127 C
4:30 PM - *ED3.8.01
Fabrication of Superconducting Qubits with Low Variability at 300mm Wafer Scale
Satyavolu Papa Rao 1 , Chris Hobbs 1 , Neda Forouzani 3 , Kevin Osborn 3 4 , Eric Holland 1 , Stephen Olson 2 , Matt Malloy 1 , Dominic Ashworth 1 , Brendan O'Brien 1 , Benjamin Bunday 1 , Domenico DiPaola 2 , Patrick Kearney 1 , Paul Hansen 1 , William Advocate 1 , Thomas Murray 2 , Stephen Bennett 2 , Steven Novak 2 , Martin Rodgers 2 , Brett Baker-O'Neal 2 , Brian Sapp 1 , Edward Barth 1 , Jeffrey Hedrick 1 , Ronald Goldblatt 1
1 , SEMATECH, Albany, New York, United States, 3 Laboratory for Physical Sciences, University of Maryland, College Park, Maryland, United States, 4 Joint Quantum Institute, University of Maryland, College Park, Maryland, United States, 2 , State University of New York Polytechnic Institute, Albany, New York, United States
Show AbstractSuperconducting transmon qubits have been considered as attractive candidates for building quantum information systems because of their high quantum coherence and relative ease with which they can be coupled to one another. However, for use in larger systems they must be fabricated with tighter tolerances since the physical qubits will need predictable qubit transition frequencies with a minimum threshold in coherence time. We describe the first successful fabrication of qubits utilizing 300mm wafer-scale processes, such as those utilized in advanced CMOS IC fabrication. Control of qubit operational characteristics rests on the ability to control dimensions, materials and interfaces. 193nm lithography is utilized to pattern Dolan bridge structures on 300mm wafers, permitting low variability in critical dimensions – both within-wafer and wafer-to-wafer. Room temperature measurement of arrays of Al/Al Oxide/Al Josephson junctions confirm that such fabrication techniques can lead to low variability in device properties. The fabricated chips had, in addition to the JJ arrays, many transmon qubits, some of which were tested in 3D cavities at milliKelvin temperatures. Measurements of the qubits, including transition frequency and coherence time, will be discussed. This paper also describes the fabrication of Titanium Nitride based resonators using state of the art IC fabrication equipment and processes, paving the way for 300mm wafer fabrication of 2D qubits with integrated coplanar wave-guide based resonators. The guidance provided by high resolution transmission electron microscopy (TEM) and other characterization techniques towards the choice of optimal fabrication processes will also be discussed. The paper will conclude with a discussion of the paths that are being explored to further enhance the 'fab-friendliness' of qubit architectures.
5:00 PM - ED3.8.02
High-Throughput Computational Search for Transparent Semiconducting Materials
Geoffroy Hautier 1 , Joel Varley 2 , Viet Anh Ha 1 , Anna Miglio 1 , Michiel Van Setten 1 , Gian-Marco Rignanese 1
1 , University of Catholique-Louvain, Louvain-la-Neuve Belgium, 2 , Lawrence Livermore National Laboratory, Livermore, California, United States
Show AbstractThe combination of high transparency to exceptional electronic properties such as high mobility is difficult to achieve. Transparent conducting oxides (TCOs) such as In2O3, or Ga2O3 have demonstrated such a combination of transparency and semiconducting behavior but only as electron doped, n-type materials. High-performance p-type transparent conducting materials are still widely sought for. We present a how a computationally-driven high-throughput approach can be used to search for such materials. Thousands of materials candidates are screened using ab initio computing, searching for compounds with exceptionally low hole effective mass (for high mobility), high band gap (for transparency) and dopability. We present a series of oxides materials with exceptional properties identified through our computational approach. We also analyze from our large computational database the challenges and opportunities for the development of non-oxides transparent semiconducting materials and propose a few unexpected candidates. On a more general note, we show how computed transport materials properties (effective masses, Seebeck…) can be shared on a large scale using the Materials Project platform.
5:15 PM - ED3.8.03
BAs—A Competitor for Diamond in Thermal Conductivity?
Yaxian Wang 1 , Wolfgang Windl 1
1 , The Ohio State University, Columbus, Ohio, United States
Show AbstractWe present results of ab initio calculations for the structure and energetics of native point defects in cubic boron arsenide, including vacancies, antisites and interstitials. Based on thermodynamic equilibrium and overall stoichiometry, formation energies of each defect were determined, which revealed the constitutional defects would be antisite in both B-rich and As-rich cases, while BAs antisites and B vacancies balance to keep stoichiometry. Vibrational entropies and free energies of all defects were calculated for a range of temperatures. Arrhenius fits show good agreement between fitted formation energies and 0 K total-energy values. By confirming the stable point defect in BAs and applying mass variance approximation to calculate thermal conductivity, we show BAs could probably possess an ultra high thermal conductivity.
5:30 PM - ED3.8.04
Interface and Thermal Characterisation of Diamond on CMOS Devices—CVD Diamond on HEMT
Rajesh Ramaneti 1 2 , Svetlana Korneychuk 3 , Yan Zhou 4 , Julian Anaya 4 , Paulius Pobedinskas 1 2 , Joff Derluyn 5 , Johan Verbeeck 3 , Martin Kuball 4 , Ken Haenen 1 2
1 , Institute for Materials Research (IMO), Hasselt University, Diepenbeek Belgium, 2 IMOMEC Division, imec, Diepenbeek Belgium, 3 Electron Microscopy for Materials Science, University of Antwerp, Antwerp Belgium, 4 , University of Bristol, Bristol United Kingdom, 5 , EpiGan nv, Hasselt Belgium
Show AbstractDiamond's excellent properties as a wide band gap material holds potential to a wide range of electronic applications from high power-high frequency devices (high thermal conductivity, large break down fields) to bio-sensing (biocompatibility) and quantum computation (NV centers). Diamond based devices can perform under extreme conditions - high temperature, high pressure and high radiation exposed environments without compromising on reliability. Growth of diamond is normally accomplished by CVD with microwave excitation and hot filament sources that can result in films ranging from nano-crystalline to micro-crystalline layers and even monocrystalline substrates. The diamond community's roadmap aims not only for passive integration of diamond based devices on CMOS based platforms (Beyond Moore) but also for electronics/photonics based on active diamond monolithic devices. Despite prior significant efforts, the extreme hardness, high roughness and high temperature growth creates a challenge for processing and integration with silicon based electronics. One aspect is to look at patterning approaches for interfacing diamond on CMOS. Another important aspect is to carefully study the structural and interfacial properties of the underlying device layers after diamond growth. Here we specifically consider the case of CVD diamond grown on high electron mobility transistor (HEMT) hetero-structure passivated by high k dielectrics which can be generically extended to other CMOS devices. Prior and ongoing approaches to integrate diamond on GaN have primarily been through a) Growing GaN on diamond and viceversa b) Adhesive bonding of diamond with GaN. These approaches have not translated into large scale integration of diamond with CMOS devices. Here we examine the surface treatment procedures, the thermal properties and structural interfaces of un-patterned device layers before and after diamond growth on AlGaN/GaN hetero-structures. Time-domain thermo-reflectance technique and high resolution cross-section transmission electron microscopy(TEM and EELS) have been used in this study. MWCVD diamond is grown directly onto dielectric/AlGaN/GaN layers after surface treatment and seeding (high zeta potential +50mV), followed by surface characterization using AFM (Rrms < 2 nm), contact angle (contact angles <10deg after plasma treatment) , XPS, streaming potential techniques. Diamond layers were grown up to a thickness ranging from 100 nm to 2μm. The effective thermal conductivity (k ~ 200W/m-K) and interfacial thermal boundary resistance (TBRDiamond/GaN) is studied and the possible influence of the diamond grown layers on the composition and changes in the 2DEG conductivity(~1x 1013/cm2) of the AlGaN/GaN interfaces is investigated. Our approach would allow us to realistically proceed to examine the possibility of combining heat sinks, biosensors and quantum devices based on diamond with Si based CMOS platforms.
5:45 PM - ED3.8.05
Science and Technology of Polycrystalline Diamond Films on Silicon Substrates Integrated into Schottky Diodes as an Alternative to Crystalline Diamond-Based Diodes for Electronic Power Devices
Jesus Alcantar-Pena 1 2 , Gerardo Gutierrez-Heredia 1 , Josefina Arellano-Jimenez 3 , J.E. Ortega Aguilar 3 , Dainet Berman-Mendoza 2 , Miguel Yacaman 3 , Orlando Auciello 1
1 Materials Science and Engineering, University of Texas-Dallas, Richardson, Texas, United States, 2 Investigation in Physics, University of Sonora, Hermosillo, Sonora, Mexico, 3 Physics & Astronomy, University of Texas-San Antonio, San Antonio, Texas, United States
Show AbstractThis presentation will discuss our research focused on growing ultrananocrystalline diamond (UNCD), nanocrystalline diamond (NCD) and microcrystalline diamond (MCD) films and integrating them with complimentary materials to fabricate and characterize the electrical performance of Schottky diodes with hydrogenated diamond surfaces, for application to electronic power devices, as an alternative to current commercial silicon and exploratory single crystal diamond-based devices. Growth of MCD films on Si substrates exhibiting high thermal transport (~ 1500 W/Km), high mobility (210 cm2/Vs) and promising sheet carrier concentration (6.5 x 1013 1/cm2), may provide diamond-based diodes with high heat sink thermal layers for fabrication of high performance next generation micro/nano electronic power devices on diamond films integrated on large area silicon wafers. The demonstrated multi functionalities of polycrystalline diamond films on silicon substrates may enable applications as active layer on TFTs and Schottky devices, and as heat sink layers in electronic devices. Here, we report advances on the growth of UNCD, NCD and MCD diamond films on silicon substrates, using hot filament chemical vapor deposition (HFCVD), and integrating those diamond films into Schottky diodes. The UNCD films were grown using Ar-rich/CH4/H2 chemistry, while the NCD and MCD films were grown using the H2-rich/CH4 chemistry. Characterization of electrical properties of the films shows that the electrical conductivity of these films is strongly influenced by the hydrogenated surface and grain size. The data shows that the sheet electrical properties of the films can be modified over a wide range from 350 Ω/sq to 7 MΩ/sq by changing H2 concentration on the film and grain size. Schottky diodes were fabricated, and electrical properties measured, using Hall techniques. Sheet carrier concentrations ranged from 1 x 1010/cm2 for UNCD (2-5 nm grain size) to 1 x 1014/cm2 for MCD (1-3 µm grain size) films, compared to single crystal hydrogenated diamond surface exhibiting sheet carrier concentration of 1013/cm2. Films surfaces’ chemical bonding was studied using Raman and FTIR spectroscopies. Film structures were characterized using HRTEM and XRD. The modulation of the electrical properties, via grain size, of HFCVD grown UNCD, NCD and MCD films, with electrical performance similar to that of crystalline diamond-based Schottky diodes, may accelerate practical applications of these films to a new generation of micro/nano-electronic power devices, since contrary to single crystal diamond grown only on small area crystalline diamond substrates, polycrystalline diamond films with device-like electrical properties, demonstrated in the work reported here, can be grown on 300 mm wafers (standard dimension for commercial fabrication of Si-based micro/nanoelectronic devices) with excellent uniformity.
Symposium Organizers
Rinus Lee, GLOBALFOUNDRIES
Kah-Wee Ang, National University of Singapore
Nadine Collaert, IMEC
Tony Low, University of Minnesota
Symposium Support
Applied Materials
Kokusai Semiconductor Equipment Corporation
ED3.9: 2D Electronics and Growth
Session Chairs
Thursday AM, April 20, 2017
PCC North, 100 Level, Room 127 C
9:00 AM - *ED3.9.01
Contact Resistance of Emerging Semiconductors Formed with Two Dimensional Materials
Won Jong Yoo 1
1 , Sungkyunkwan University, Suwon Korea (the Republic of)
Show AbstractTwo dimensional (2D) materials are recently being investigated very intensively, with some of them holding great promise as semiconducting materials for future nano-electronics, beyond current Si technology which face hard limitation in performance enhancement due to excessive power dissipation during high frequency operation, as they present a range of achievable bandgaps and high electrical carrier mobility, and ultra-thin body with efficient electrostatic control. These properties, combined with mechanical flexibility, enable 2D materials to be very promising candidates that can meet major requirements for electronic and photonic devices operated in emerging future mobile and IoT environment.
However, formation of proper electrical contacts to nanoscale 2D materials (e.g. transition metal dichalcogenides: TMDs) is becoming a major challenge in realizing the performance of the 2D material-based devices. According to recent studies, the observed two-terminal mobility in single-layer TMD devices is unexpectedly low [1], due to high contact resistance (Rc) induced between metal contact and TMDs. It is known that many 2D crystals are subjected to strong Fermi level pinning when they are in contact with metals. That is, the pinning is responsible for the observed high Schottky barrier height and high Rc. In this work, we investigate Schottky barrier heights at the interfaces [2] formed between mono- or bi-layer molybdenum dichalcogenides and Ti, Cr, Au, Pd. For MoS2 and MoTe2, by obtaining I – V characteristics for various temperatures. According to our results, it is interesting to find that the pinned energy level was located near the conduction band edge for MoS2 whereas it was near the intrinsic level for MoTe2.
Furthermore, we experimentally demonstrate one-dimensional (1D) electrical contact to MoS2 formed by using controllable plasma etching [3]. Interestingly, we were able to demonstrate MoS2 FET (n-type), Mo/MoS2 FET (n-type), and Pd/MoS2 FET (ambipolar), realizing efficient polarity control via depinning of Fermi level at the metallic contact interface.
Acknowledgments
This work was supported by the Global Research Laboratory (GRL) Program (2016K1A1A2912707) and Global Frontier R&D Program (2013M3A6B1078873) at the Center for Hybrid Interface Materials (HIM), both funded by the Ministry of Science, ICT&Future Planning via the National Research Foundation of Korea (NRF).
References:
[1] A. Allain, et. al. “Electrical contacts to two-dimensional semiconductors”, Nat. Mater., 14, 1195 (2015)
[2] H.-M. Li, et. al. “Metal semiconductor barrier modulation for high photoresponse in transition metal dichalcogenide field effect transistors” Sci. Rep., 4, 4041 (2014)
[3] L. Wang, et. al. “One-Dimensional Electrical Contact to a Two-Dimensional Material”, Science, 342, 614-617 (2013)
9:30 AM - ED3.9.02
Characterization of Solid-Supported Graphene, Metals, and Other Nanoscale Films and Molecular Interactions Using MP-SPR
Niko Granqvist 1 , Annika Jokinen 1 , Janusz Sadowski 1
1 , BioNavis Ltd., Tampere Finland
Show AbstractSurface Plasmon Resonance (SPR) is widely used in label-free biochemical interaction analysis. However, the physical phenomenon is not limited to biochemistry but is applicable to other nanoscale characterization of thin films [1]. Multiparametric surface plasmon resonance (MP-SPR) is a new approach to the physical phenomenon, which utilizes full SPR angular spectral measurement and among other things allows accurate nanoscale characterization of thin films, and measurement of interactions to them.
MP-SPR has now been used to characterize ultrathin single- and multi-sheet CVD-graphene, where it showed high contrast per layer, allowing accurate layer thickness and refractive index characterization [2]. The method has also been used to characterize inkjet-printed graphene (in review), showing good correlation with other methods such as AFM, profilometry and UV-VIS. The MP-SPR method has also been shown to be highly sensitive method to characterize different metal coatings, nanolaminates and other nanoscale layers prepared by different methods such as Langmuir-Blodgett [3], self-assembly [4] and spin coating [5]. The method can also be used to characterize molecular interactions to the layers in both gas- and liquid phase.
The MP-SPR method has shown good correlation with reference methods used in the studies such as QCM, AFM and Raman, and with previous literature values for similar systems. Thus the MP-SPR based characterization method for ultrathin films appears to be effective, sensitive and accurate, especially for applications requiring both measurement of the film properties and interactions of molecules with the film.
References:
[1]Albers, Vikholm-Lundin, Chapter4 in Nano-Bio-Sensing, Springer2010
[2]Jussila et al. Optica 2016,3(2),151-158
[3]Granqvist et al., Langmuir 2013,29(27),2013,8561-8571
[4]Granqvist et al., Langmuir 2014,30(10),2799–2809
[5]Vuoriluoto et al., J. Phys. Chem. B 2015, 119, 15275−15286
9:45 AM - ED3.9.03
Scalable Planar Fabrication Processes for Chalcogenide-Based Topological Insulators
Peter Sharma 1 , David Henry 1 , Erica Douglas 1 , Ana Lima Sharma 1 , Rupert Lewis 1 , Joshua Sugar 1 , Maryam Salehi 2 , Nikesh Koirala 2 , Seongshik Oh 2
1 , Sandia National Laboratories, Albuquerque, New Mexico, United States, 2 Physics, Rutgers University, Piscataway, New Jersey, United States
Show AbstractThe long spin diffusion lengths predicted for surface transport in topological insulators could lead to numerous applications. Many of the physics experiments used to show promising device concepts were conducted on exfoliated flakes from bulk material, thin films on substrates of limited dimensions, or bulk material with limited yield. A planar thin film-based technology is needed to make topological insulator devices at a large scale, which is advantageous for applications. We address the question of reliably fabricating chalcogenide-based topological insulator devices on large 3” wafers in a modern microfabrication facility. Polycrystalline and epitaxial Bi2Te3 films are studied as a prototypical example. Adhesion between the Bi2Te3 film and the substrate caused very low yield when performing photolithography of larger features. Implantation damage rendered the Bi2Te3 film susceptible to liquid infiltration and subsequent exfoliation . The gate dielectric had significantly degradation due to interdiffusion with the Bi2Te3 film. Solutions to these problems are explored and discussed.
10:00 AM - ED3.9.04
Chelant Enhanced Solution Processing for Wafer Scale Synthesis of Transition Metal Dichalcogenide Thin Films
Robert Ionescu 1 , Brennan Campbell 1 , Ryan Wu 2 , Ece Aytan 1 , Andrew Patalano 1 , Isaac Ruiz 1 , Zachary Favors 1 , Andre Mkhoyan 2 , Mihri Ozkan 1 , Cengiz Ozkan 1
1 , University of California, Riverside, Riverside, California, United States, 2 , University of Minnesota, Minneapolis, Minnesota, United States
Show AbstractIt is of paramount importance to improve the control over large area growth of high quality molybdenum disulfide (MoS2), and other two-dimensional (2D) transition metal dichalcogenides (TMDs). As a direct band gap semiconductor in monolayer form, these atomically thin materials have enormous potential for use in optoelectronics applications. In the work described here, a facile and reproducible method of producing wafer scale, atomically thin MoS2 has been developed using the incorporation of a chelating agent in a common organic solvent, dimethyl sulfoxide (DMSO). While solution processing of the MoS2 precursor, ammonium tetrathiomolybdate ((NH4)2MoS4)), and subsequent thermolysis has been used to produce large area MoS2, this work shows that the use of ethylenediaminetetraacetic acid (EDTA) in DMSO exerts superior control over wafer coverage and film thickness. Here, evidence is shown that the chelating action and dispersing effect of the EDTA is crucial in distributing MoS2 crystallites, and their precursors, during the growth process. Raman spectroscopy, photoluminescence (PL), x-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FTIR) and high-resolution transmission electron microscopy (HRTEM) suggest homogenous, single-to-few layer MoS2 on the wafer scale, resulting from this novel chelant-in-solution method.
10:15 AM - ED3.9.05
Phosphorus Substitutional Doping of Ultrathin Metal Dichalcogenides by Plasma-Assisted Chemical Vapor Deposition
Inyong Moon 1 , Won Jong Yoo 1
1 SKKU Advanced Institute of Nano-Technology (SAINT), Sungkyunkwan University, Suwon Korea (the Republic of)
Show AbstractTwo-dimensional (2D) transition metal dichalcogenides (TMDC) devices exhibit novel characteristics that are particularly suitable for next generation semiconductor device application. For the future application of 2D TMDC, one of the critical issues is doping. Existing efforts have mostly focused on external electrostatic gating1,2) or surface charge transfer doping by absorbed molecules1,2). However, the external electrostatic doping method requires complex design of functional device structures, whereas the surface charge transfer doping method shows low stability of doped materials and fast degradation of device performance. That is, it becomes a formidable challenge to develop a sustainable doping technique for 2D materials so as to realize future functional devices. Here, we report a semi-permanent and substitutional doping of phosphorus into 2D TMDC (MoS2, WSe2) by using plasma treatment and chemical vapor deposition (CVD) method, during which chalcogen atoms are terminated by argon plasma and they are replaced by phosphorus atoms during CVD process, and this substitutional doping can be evidenced by TEM, AFM and Raman mapping. Furthermore, by applying this technology, we demonstrate wide tenability of n- or p-type doping density by varying process time and temperature.
Acknowledgment
This work was supported by the Global Frontier R&D Program (2013M3A6B1078873) at the Center for Hybrid Interface Materials (HIM), funded by the Ministry of Science, ICT&Future Planning.
Reference
1. Min Sup Choi, Deshun Qu, Daeyeong Lee, Xiaochi Liu, Kenji Watanabe, Takashi Taniguchi, Won Jong Yoo "Lateral MoS2 p–n Junction Formed by Chemical Doping for Use in High-Performance Optoelectronics", ACS Nano, 8, 9332, 2014
2. Xiaochi Liu, Deshun Qu, Jungjin Ryu, Faisal Ahmed, Zheng Yang, Daeyeong Lee, Won Jong Yoo, "P-type polar transition of chemically doped multilayer MoS2 transistor", Advanced Materials, 28, 2345, 2016
ED3.10: 2D and Oxide Electronics
Session Chairs
Thursday PM, April 20, 2017
PCC North, 100 Level, Room 127 C
11:00 AM - *ED3.10.01
On the Performance of Two-Dimensional Material Devices for Electronic Applications
Gianluca Fiori 1 , Giuseppe Iannaccone 1
1 , University of Pisa, Pisa Italy
Show AbstractWe will present a detailed investigation of the potentials and perspectives of two-dimensional materials for electronic applications. Since from the isolation of graphene back in 2004, and the continuous demonstration of other one-atom thick materials, huge efforts have been addressed in order to exploit such new technological options in devices and circuits.
However, rather than hopes, we have witnessed huge hypes, while a critical discussion on the real achievable performance is a need, especially from an engineering point of view.
Through a purposely devised multi-scale approach (ranging from electronic properties of the material, up to the device level), we will provide a performance assessment of a wide range of devices and architectures presented so far in the literature, and compared with Industry requirements. In particular, we will focus on digital, as well as radio frequency applications, while exploiting heterojunction-based devices (both lateral and vertical), one of the most investigated topics at the moment by the research community involved in two-dimensional materials.
11:30 AM - ED3.10.02
Anisotropy of Electron Transport in Monoclinic β-Ga2O3
Krishnendu Ghosh 1 , Uttam Singisetti 1
1 Electrical Engineering, University at Buffalo, Buffalo, New York, United States
Show Abstractβ-Ga2O3 has immense potential for next generation power electronics due to its large bandgap and experimental demonstration of transistors with very high breakdown voltages [1]. Despite some studies on electronic structures [2] and dielectric properties [3] of this material, studies on electron transport are rare [4]. Recently we, for the first time, investigated electron phonon interaction in this material from first principles [5] and reported that long-range polar optical phonon (POP) interactions limit the low-field electron transport. However, the low symmetry of the crystal poses question on the anisotropy of the electron transport. Experimentally small (10% - 15%) anisotropy in electron mobility has been reported recently [6]. But electronic structure calculations show [2] an isotropic band near the Γ point. The natural question that follows is – what is the origin of the transport anisotropy? Understanding this anisotropy is extremely crucial for optimizing device performance. We trace its microscopic origin by probing the electron-phonon interaction from first principles. The POP interaction in a polar semiconductor is governed by the net dipole oscillation arising from the vibrational modes. Hence the infrared (IR) active modes produce strong POP coupling with the electrons. β-Ga2O3 has 12 IR active modes, 8 (Bu) of which are polarized on one plane (say, x-z) [5], while the remaining 4 (Au ) are polarized in a perpendicular direction (say, y). Also, the planar Bu modes show different IR strengths in different directions on the same plane [3, 5]. The similar direction dependencies of the POP coupling play a crucial role in introducing anisotropy to the electron transport. We will present a detailed computation of mobility based on Density Functional Perturbation Theory, Wannier-Fourier Interpolation, and Boltzmann Transport Formalism. We will also present full-band Monte Carlo simulation results under low-field in this material that reveals the origin of experimentally observed anisotropy in mobility. The mobility anisotropy is also explained analytically considering momentum and energy conservation during a scattering process including anisotropy in the POP modes. For example in case of spherical bands, an electron drifting in the z direction can get scattered strongly by phonon wave vectors which are more polarized in the z direction. For Ga2O3 the dominant POP mode (21 meV), which has a net dipole moment highly inclined along the Γ-Z direction [5], produces a higher scattering rate for low-energy electrons moving along the Γ-Z direction. This results in a lower mobility in that direction. The calculated anisotropy in mobility agrees with experimental observation.
[1] M. Higashiwaki et. al. Appl. Phys. Lett. 2013
[2] H. Peelaers et. al. Phys. Stat. Solid. 2015
[3] M. Schubert et. al. Phys. Rev. B 2016
[4] A. Parisini et. al. Semi. Sci. Tech. 2016
[5] K. Ghosh et. al. Appl. Phys. Lett. 2016
[6] M.H. Wong et. al. Jpn. J. Appl. Phys. 2016
11:45 AM - ED3.10.03
Mechanical Exfoliation of Ultra-Wide Band Gap β-Ga2O3 and Its Contact Properties
Jinho Bae 1 , Hong-Yeol Kim 1 , Jihyun Kim 1
1 , Korea University, Seongbuk-gu, SE, Korea (the Republic of)
Show Abstractβ- gallium oxide (β-Ga2O3) has received a significant attention because of its wide bandgap, 4.9 eV, which is much larger than that of other oxide semiconductors. This property leads β-Ga2O3 to be used as a switching device for high power device applications as well as a deep UV-transparent conducting material for optical/optoelectronic applications. Furthermore, β-Ga2O3 can be easily detached from bulk to quasi-2D flakes by mechanically exfoliation. Although it is essential to identify the electrical and structural properties of the contact between mechanically exfoliated β-Ga2O3 flakes and metals, most reports are limited to bulk properties. Therefore, we investigate the effects of the type of metal and annealing condition to form ohmic contact with β-Ga2O3 flakes.
In this work, samples with metal contact and β-Ga2O3 flakes were fabricated to identify contact properties. Unintentionally doped β-Ga2O3 flakes were mechanically exfoliated, then transferred onto SiO2/Si substrate with Ti/Au backgate. Ti/Au and Ni/Au were deposited on a β-Ga2O3 flake to form electrodes of different kind of metal. To identify the role of temperature and ambient in rapid thermal annealing (RTA) process, electrical properties were investigated after RTA was performed under different ambient gases and temperature. Diffusion between metal electrode and β-Ga2O3 flakes was confirmed by transmission electron microscopy and energy dispersive spectrometer. Transmission line method pattern was defined on β-Ga2O3 flakes by e-beam lithography to analyze sheet and contact resistivity were identified. Finally we confirmed the optimal condition to form ohmic contact between mechanically exfoliated β-Ga2O3 flakes and metal electrodes. The details of our experiment and results will be discussed.
12:00 PM - ED3.10.04
Growth and Characterisation of Non-Polar and Semi-Polar GaN on Si with Er2O3 Interlayer
Tomas Grinys 1 , Tadas Malinauskas 1 , Kazimieras Badokas 1 , Tomas Drunga 1 , Sandra Stanionyte 2 , Martin Frentrup 3 , Rytis Dargis 4 , Andrew Clark 5
1 , Institute of Applied Research, Vilnius University, Vilnius Lithuania, 2 , Center for Physical Sciences and Technology, Vilnius Lithuania, 3 , The Cambridge Centre for Gallium Nitride, University of Cambridge, Cambridge United Kingdom, 4 , IQE Inc., Greensboro, North Carolina, United States, 5 , IQE Inc., Bethlehem, Pennsylvania, United States
Show AbstractConventional polar group-III nitride MQW structures suffer from internal electric fields, which lead to band bending, and a decreased efficiency and spectral instability of optoelectronic devices. The internal electric fields can be reduced or totally avoided with semi-polar or non-polar GaN growth. However growth of such orientations is still costly. Integration of GaN to Si technology is a direct way for reducing the price of a new generation of devices applied in optoelectronics, photovoltaics and high power electronics. A large difference in thermal expansion, a mismatch in lattice and chemical reactivity must be solved in order to grow crack free, high quality epitaxial GaN films on Si. One possibility to integrate GaN on Si is the heteroepitaxial growth using rare earth oxides as a buffer. This study is aimed to develop growth technology of nonpolar and semipolar GaN on Si substrates using Er2O3 as buffer layer.
Si (100) substrates were overgrown with a 300 nm-thick Er2O3 (110) buffer layer by molecular beam epitaxy (MBE). Afterwards, a close-coupled showerhead metalorganic chemical vapour deposition (MOCVD) reactor was used to grow GaN on the top of these templates. The GaN structures were not coalesced in order to study the growth evolution. Growth conditions such as temperature, V/III-ratio and carrier gases were varied. The morphological, structural and optical properties of the grown epitaxial structures were investigated by X-ray diffraction (XRD), scanning electron microscopy (SEM) and photoluminescence (PL) techniques.
XRD investigation showed the polycrystalline nature of GaN layers with strongly dominant non-polar (11-20) and semi-polar (10-13) orientations. More detailed texture analyses revealed that both dominant GaN orientations are formed by growth of {0001} GaN planes parallel to the {111} facets of Si, thus causing the twinning of GaN layers. The c-axis in semi-polar GaN is inclined by 33.17° from the substrate surface normal, and is tilted towards opposite in-plane directions for different twins. The domination of semi-polar vs. non-polar orientation is strongly dependent on Er2O3 (110) in-plane orientation respect to Si (100) wafer off-cut. The growth results showed that rise of growth temperature and reduction of V/III ratio leads to stronger semi-polar GaN orientation. By analyzing SEM images taken under different sample tilt angles the facets of grown truncated pyramid GaN were identified, and 3D pyramids were reconstructed. This data was used to obtain kinetic Wulff diagrams, which were used to explain the preferential growth of (10-13) GaN. The PL spectra of semi-polar and nonpolar GaN showed a near band edge emission including luminescence from the stacking faults. A red shift was observed in spectra due to thermal induced tensile strain in GaN. Tensile strain appears during the cool down of the samples from growth temperature to room temperature, as Si has a smaller thermal expansion coefficient compared to GaN.
12:15 PM - ED3.10.05
Transparent and Flexible Tin Oxide Electrolyte-Gated Transistors
Fabio Cicoira 1 , Irina Valitova 1 , Clara Santato 1 , Francesca Soavi 2 , Prajwal Kumar 1
1 , Polytechnique Montreal, Montreal, Quebec, Canada, 2 Chemistry, Università di Bologna, Bologna Italy
Show AbstractMetal oxide semiconductors, such as ZnO, SnO, In2O3, and indium gallium zinc oxide (IGZO), are of great interest for high-performance electronic devices that can be fabricated on large areas because of their transparency, ease of process, chemical stability and high n-type mobility [1,2,3]. SnO2 is a very promising materials that already found applications in sensing, photovoltaic, optoelectronic devices and batteries.
We fabricated, both on rigid and flexible substrates, electrolyte-gated (EG) SnO2 transistors making use of high surface area activated carbon (AC), as a gate electrode, and the ionic liquid (IL) 1-Butyl-3-methyl imidazolium bis(trifluoromethylsulfonyl)imide [EMIM][TFSI], as the gating media. Thin films of SnO2 have been deposited by sol gel and water based synthesis techniques and were photolithographically patterned as transistor channel materials.
We investigated bottom-contact top-gated transistor where we varied the area of the active layer in contact with electrolyte and the area of overlap of source/drain electrodes with the gate. To shed light on the doping mechanisms of such transistors we performed electrical measurements, cyclic voltammetry and electrochemical impedance spectroscopy. We demonstrated the performance of electrolyte- gated SnO2 transistors can be tuned via patterning of the metal oxide layer. Patterned EG SnO2 transistors work in depletion mode, while unpatterned ones work in enhancement mode with electron mobility as high as 10 cm2/Vs.
We believe that these simple device architectures working at low voltages are promising for low cost, flexible, transparent large area electronics.
[1] Banger K.K. et al., Nature Materials, 10, 45–50.
[2] Hong et al. Adv Mater, 2013, 25, 3413-3418.
[3] Valitova I., Cicoira F. et al., ACS Appl. Mater. Interfaces, 2016, 8, 14855-14862.
12:30 PM - ED3.10.06
Highly Reliable Devices Using Crystalline-Indium-Tin-Zinc-Oxide Thin Film Transistors
Solah Park 1 , Kyung Park 2 , Ho-Joong Kim 1 , Jang-Yeon Kwon 1 2
1 , Yonsei University, Incheon Korea (the Republic of), 2 , Yonsei Institute of Convergence Technology, Incheon Korea (the Republic of)
Show AbstractAmong the amorphous oxide semiconductor materials, amorphous indium-gallium-zinc oxide (a-IGZO) has been intensively considered as a promising channel material in thin film transistor (TFT) for high performance displays. However, the mobility issue still remains to be solved problem, because the next-generation displays, such as ultra-high definition (UHD) displays, demand the higher mobility (>30 cm2/Vs) than conventional a-IGZO TFTs. In addition, the device stability is also one of the critical parameters for UHD displays, because the driving transistors are operated under electrical bias as well as exposure of visible light. However, it is hard to obtain the high mobility and high stability at the same time, because there is a strong trade-off relationship between the mobility and stability.
Therefore, it is necessary to develop the device with a high mobility and stability for high performance displays. Here, among the various proposed candidate materials, we pay particular attention to amorphous indium-tin-zinc oxide (a-ITZO) due to the presence of “Sn”, acted as a mobility enhancer, resulting in the higher mobility than the conventional a-IGZO. In recent, the crystalline-IGZO (c-IGZO) TFTs were proposed as a driving transistor and its reliability was superior to that of conventional a-IGZO under various stress condition with or without light illumination. However, c-IGZO TFTs have a critical drawback of reduced mobility, compared to a-IGZO TFTs.
In this presentation, we suggest the crystalline ITZO (c-ITZO) TFTs as a key material for high performance displays with high mobility and stability. We systematically investigated the characteristics of ITZO as a function of annealing temperature, especially focused on crystal structure. In addition, microstructure and band edge state were analyzed to understand the origin of improved stability, compared to conventional amorphous structure.
12:45 PM - ED3.10.07
Characterization of Plasma-Enhanced Atomic Layer Deposited Ga2O3 Using Gallium(iii) Acetylacetonate
Mei Hao 1 , Jialing Yang 1 , Brianna Eller 1 , Robert Nemanich 1 , Srabanti Chowdhury 1
1 , Arizona State University, Mesa, Arizona, United States
Show AbstractGa2O3 has been proved to be a functional interfacial layer for GaN-based transistors. Ga2O3 interlayer between GaN and oxides can improve transistors’ performance, reduce the interface density states, improve the breakdown field. Deposited amorphous Ga2O3 and epitaxial crystal Ga2O3 are working as interfacial layers differently on GaN transistors. Ga2O3, as a native oxide on GaN, has lots of special properties than other oxides.
Gallium oxide (Ga2O3) films were deposited with remote plasma-enhanced atomic layer deposition using Gallium (III) acetylacetonate (Ga(acac)3). Growth conditions including Ga(acac)3 precursor pulse time, O2 plasma pulse time, N2 purge time and deposition temperature were investigated and optimized on phosphorus doped Si (100) wafer.
PEALD Ga2O3 has a growth rate of 0.7 A/cycle within a growth window between deposition temperature 150 and 350 . The growth rate is lower at temperature < 150 and higher above 350 In addition to the growth rate, crystallization is also related to the deposition temperature. PEALD Ga2O3 is amorphous deposited at temperature lower than 500 , with a band gap of 4.1 eV determined by energy loss spectroscopy, smaller compared with a 4.9 eV band-gap of crystal Ga2O3. PEALD Ga2O3, though unintentionally doped, is a n-type wide band gap semiconductor material probably due to oxygen vacancy or other related defects. In this research band diagram of PEALD Ga2O3 is investigated on n-type, p-type Si and GaN. The density of Ga2O3 is 6.4 g/cm3 measured with x-ray reflectivity and Rutherford backscattering spectroscopy.
This research is funded by Power America program.
ED3.11: III-V/N Electronics
Session Chairs
Thursday PM, April 20, 2017
PCC North, 100 Level, Room 127 C
2:30 PM - *ED3.11.01
Monolithic Integration of III-V Materials on Si for Nano- and Optoelectronic Applications
Stephan Wirths 1 , Benedikt Mayer 1 , Johannes Gooth 1 , Svenja Mauthe 1 , Nicolas Bologna 1 , Heinz Schmid 1 , Heike Riel 1 , Kirsten Moselund 1
1 Science & Technology, IBM Research GmbH, Zurich Switzerland
Show AbstractThe semiconductor industry research plan is no longer centered exclusively on Moore’s law anymore, i.e. improving the chip performance by pushing the integration density of transistors [1]. Simultaneously the field of electronics is increasingly application-driven and is expanding to include new functionality like sensing and transmission for IoT applications. In this respect, the dense monolithic integration of III-V semiconductors on Si might become essential in order to co-integrate the required variety of additional semiconducting materials and devices, i.e. optoelectronic devices such as laser diodes. However, this co-integration is challenging from an epitaxial point of view as well as from the perspective of device processing, since traditional III-V on Si hetero-epitaxy typically suffers from lattice and thermal mismatch, resulting in defective layers. Here we report on monolithic (co)-integration of III-V compounds on Si using an epitaxial technique based on local confinement called template-assisted selective epitaxy (TASE) [2]. We found that growth dynamics strongly depend on precursor transport by vapor phase and surface diffusion, e.g. InAs TASE shows a growth rate dependence on template width due to a locally reduced V/III ratio while GaSb exhibits a nearly independent growth rate explained by the high Sb surface coverage. Moreover, by means of structural TEM analysis we were able to verify the absence of propagating dislocations and anti-phase boundaries in InAs and GaAs nanowires (NWs) grown with TASE. However, misfit dislocations, which relax the strain between the materials are present and confined to the Si – III-V interface. For InAs, a high density of planar defects (stacking faults and twins) is observed, while for GaAs and GaSb these defects can be suppressed. Electrical characterization was performed in order to assess resistivity, carrier density and mobility of the materials by transmission line and Hall measurements. The latter exhibit an electron charge density of ne = 3.9x1017cm-3 and a mobility of 5400 cm2/Vs for InAs nanostructures. Besides these promising results regarding electronic transport properties, we additionally exploit TASE for the integration of III-V NW solar cells and optoelectronics with Si. We developed vertical growth template fabrication schemes compatible with standard Si solar cell processing and grew ternary InGaP and GaAsP NWs in order to extend the spectral range of future III-V NW/Si multijunction solar cells to the visible spectrum. Moreover, we designed oxide templates suitable for the epitaxial growth evaluation of micrometer-size geometries for optoelectronic applications such as photodetectors or lasers, and evaluated PL emission from GaAs grown in these.
Acknowledgements:
This research received funding from the European Community’s Horizon 2020 projects: NanoTandem (641023), MODES (704045), PLASMIC (678567)
References:
[1] M.M. Waldrop, Nature 530, 144-147 (2016)
[2] H. Schmid et al., APL 160, 233101 (2015)
3:00 PM - ED3.11.02
Conformal GaN HEMTs for Flexible RF Power Amplifiers
Nicholas Glavin 1 , Kelson Chabak 1 , Michael Snure 1 , Elizabeth Moore 2 1 , Timothy Prusnick 2 1 , Donald Dorsey 1 , Eric Heller 1
1 , Air Force Research Laboratory, Dayton, Ohio, United States, 2 , Wyle, Dayton, Ohio, United States
Show AbstractGallium Nitride high electron mobility transistors (HEMTs) are critical, featured components for power amplifiers in high frequency radar systems. Enabling elements of the radar systems to be mechanically flexible and conformal will result in reduced c-SWAP in large aircraft platforms, allow for implementation of these systems on micro-UAVs, and increase the mechanical robustness of the electronics. In this study, GaN thin films were grown by MoCVD and HEMTs fabricated on the GaN films that were epitaxially-matched to the two-dimensional hexagonal boron nitride (h-BN)/sapphire substrate. Due to the weak van der Waals bonding of the h-BN material with the substrate, the devices were able to be lifted off and transferred to flexible substrates with the use of an elastomer stamping method. The small and large signal RF performance of the devices was characterized under uniaxial mechanical strain by conforming the transferred devices to 3D-printed platforms with different bend radii. In addition, thermal management schemes were explored in order to account for the limited thermal performance of traditional flexible substrates.
3:15 PM - ED3.11.03
Vertical GaN Schottky Barrier Diodes with Record High Current Ion/Ioff Ratio (~2.3×1010) on Free-Standing GaN Wafer
Chao Li 1 , Zhonghui Huang 1 , Jianfeng Wang 3 , Ke Xu 3 , Jin-Ping Ao 2 , Xinke Liu 1
1 , Shenzhen University, Shenzhen China, 3 , Suzhou Institute of Nano-Tech and Nano-Bionics (SINANO), CAS, Suzhou China, 2 Institute of Technology and Science, University of Tokushima, Tokushima Japan
Show AbstractGallium nitrides (GaN)-based power rectifiers (e.g. Schottky barrier diodes) have attracted much research interest in recent years, due to their ultralow conduction loss under high voltage operation for the next generation power electronic circuit. However, these devices have been mostly fabricated on foreign substrates like silicon, Sapphire, and SiC, which forces the devices to be fabricated as lateral devices. The major challenge is a high density of threading dislocation (108-1010 cm-2) originating from the strained heteroepitaxial growth on the foreign substrate. Recently, the availability of sufficiently large GaN substrates enables the homoepitaxial growth of GaN-based devices. Free-standing (FS) GaN, grown by hydride vapor phase expitaxy (HVPE), can offer a threading dislocation density less than 106 cm-2, which shows a promise of a high quality vertical FS-GaN Schottky barrier diodes (SBDs). In this work, we report the high performance vertical SBDs on 2” free-standing GaN wafer grown by HVPE, using a CMOS compatible gold-free process. The background doping concentration in the top GaN epi layer is estimated to be 6-9×1015 cm-3 using capacitance-voltage measurement at a frequency of 1 MHz. With realizing an off-state breakdown voltage VBR of 1200 V and an on-state resistance Ron of 7 mohm.cm2, the fabricated FS-GaN SBDs achieve a power device figure-of-merit VBR2/Ron of2.1×108 V2ohm-1cm-2. The fabricated GaN SBDs in this work shows the highest Ion/Ioff ratio of ~2.3x1010 among the reported ones.
3:30 PM - ED3.11.04
Analysis of Reverse Breakdown and Leakage Mechanisms of AlN Schottky Diodes Operating at Elevated Temperature
Houqiang Fu 1 , Xuanqi Huang 1 , Hong Chen 1 , Zhijian Lu 1 , Xiaodong Zhang 1 , Yuji Zhao 1
1 , Arizona State University, Tempe, Arizona, United States
Show AbstractAmong all the III-nitride semiconductors, AlN has the largest bandgap of 6.1 eV, largest critical electric field of 12 MV/cm, highest thermal conductivity of 320 W/(mK), and most stable high temperature performance. These superior material properties make AlN an attractive candidate for high performance electronic devices, especially for high power and high temperature operations. In this work, we report on the reverse breakdown and leakage mechanisms of AlN Schottky diodes at high temperature. 1-µm-thick Si-doped AlN layer ([Si]= 1018 cm−3) was grown by conventional metalorganic chemical vapor deposition (MOCVD) on sapphire substrate. The crystal quality was characterized by high resolution X-ray diffraction (HRXRD) technique. The full width at half maximum (FWHM) of (0002) rocking curve (RC) is 0.16°. X-ray Photoelectron Spectroscopy (XPS) measurement confirmed that there is almost no Ga present. These results indicate the sample is truly AlN with decent crystal quality instead of AlGaN which is often the case in MOCVD growth of AlN. Lateral Pd/AlN Schottky diodes with various devices geometries were fabricated on sapphire substrates and their temperature-dependent (i.e., 305 K to 645 K) current-voltage characteristics were analyzed. At forward bias, high ideality factors in the range of 10–25 were obtained for the devices, indicating a deviation from ideal thermionic emission model. This is consistent with previous results on AlN Schottky diodes and is attributed to the lateral nonuniformites of Schottky barrier that are caused by defects at metal/semiconductor interface or semiconductor surface states. At reverse bias, the breakdown voltage of the device shows a negative temperature dependence, indicating that the breakdown is possibly associated with surface states between Schottky contact and ohmic contact. These surface states, possibly originated from the threading dislocations accessible at the surface, dangling bonds, and ions absorbed from the environment, are commonly observed in III-nitride material and devices. Furthermore, the reverse leakage current increases with increasing temperature and is well fitted by the two-dimensional variable-range hopping (2D-VRH) conduction model, which is expressed as σ=σ0exp[–(T1/T)1/3], where σ0 is a constant and T1 is the characteristic temperature. This indicates that the reverse leakage current is indeed governed by 2D-VRH through the surface states. These results suggest that surface states may play an important role in determining the reverse breakdown and leakage current of the AlN Schottky diodes especially at high temperatures. A quantitative study of the Schottky diode at 500 K reveals a surface breakdown electric field of 120-450V/cm depending on the geometries and a surface leakage current of 0.4 µA/cm at −30V. These results will serve as the guidance for the design and fabrication of future AlN electronic devices.
Symposium Organizers
Rinus Lee, GLOBALFOUNDRIES
Kah-Wee Ang, National University of Singapore
Nadine Collaert, IMEC
Tony Low, University of Minnesota
Symposium Support
Applied Materials
Kokusai Semiconductor Equipment Corporation
ED3.12: 2D Electronics and Physics
Session Chairs
Friday AM, April 21, 2017
PCC North, 100 Level, Room 127 C
9:30 AM - *ED3.12.01
Engineering Quantum Confinement in Semiconducting van der Waals Heterostructure
Philip Kim 1
1 , Harvard University, Cambridge, Massachusetts, United States
Show AbstractThe recent development of research in 2-dimensional (2D) semiconducting materials based on semiconducting transition metal dichalcogenides (TMDCs) enables a novel engineered quantum structures. Employing functional interface realized in high-quality van der Waals (vdW) heterostructures, gate-defined electronic systems can be fabricated. In particular, spatially confined quantum structures in TMDC can offer unique valley-spin features, holding the promises for novel mesoscopic systems, such as valley-spin qubits. In this presentation, we report the fabrication of the gate-defined quantum structures formed in atomically thin TMDC heterostructures, exhibiting quantum transport phenomena and optoelectronic processes. For this work, we have developed several experimental innovations, including stamping the TMDC channel to the local gate electrodes, encapsulation of channel in 2D dielectrics, and light illumination at low temperatures, which lead to a vast improvement in the quality of the TMDC heterostructures. We report several unusual quantum transport phenomena in the TMDC heterostructures, such as the quantized conductance in gate-tunable quantum confinement in a quantum point contacts and single electron charging with tunable tunnel-coupling. We also report tunable optoelectronic processes in confined quantum structures in 2D TMDCs.
10:00 AM - ED3.12.02
Understanding Graphene's Interface with Different Dielectrics in Graphene Devices
Mona Ebrish 1 2 , Steven Koester 2
1 , IBM, Albany, New York, United States, 2 Electrical Engineering, University of Minnesota, Minneapolis, Minnesota, United States
Show AbstractRecent advances in the fabrication of graphene devices led to an urge to understand its interface properties with its surroundings. One of the most important interfaces is the interface with a dielectric. It is well known the challenge of producing a dielectric free of traps and defects. The bottom gate configuration in graphene devices is a better way to obtain a higher quality dielectric. The top gated devices with the exception of h-BN dielectric need the dielectric to be grown on the top of graphene inert surface. Previously we have demonstrated that by using temperature- and frequency-dependent capacitance-voltage (C-V) measurements, the nature of the traps near the interface between graphene and hafnium dioxide (HfO2 ) can be probed [1-2]. In this work, we compare the performance of CVD graphene back gated transistors (gFETs) using hexagonal boron nitride (h-BN) as the gate dielectric to a another back gated graphene transistors with HfO2 as the gate dielectric. Prior work using h-BN as a dielectric for gFETs has demonstrated better interface by the virtue of obtaining 3-10 times higher mobility than graphene on SiO2 [3]–[6]. In this work, we utilized locally back-gated structures which are useful to provide a one-to-one comparison between devices with different dielectrics. We show that the h-BN dielectric has reduced hysteresis compared to the HfO2 which is indicative of reduced slow charge trapping in h-BN, likely a result of its crystalline nature. In addition, more positive Dirac voltages are observed in h-BN devices compared to HfO2 ones, suggesting that the “doping” effect of the gate oxide is different between the two dielectrics. Furthermore, border traps are observed in the h-BN gated devices. In summary, the graphene interface with CVD h-BN was compared to its interface with HfO2, and the results provide important insights into the impact of h-BN on the transport and interfacial properties in graphene devices.
References:
[1] M. A. Ebrish and S. J. Koester, DRC, 2012; [2] M. A. Ebrish, et al., DRC, 2013; [3] K. K. Kim, et al., ACS Nano 6, 8593 (2012); [4] O. M. Nayfeh, et al., Appl. Phys. Lett. 102, 103115 (2013); [5] J. Lee, et al. IEEE Elect. Dev. Lett. 34, 172 (2013); [6] C. R. Dean, et al., Nature Nanotech. 5, 722 (2010).
10:15 AM - ED3.12.03
Intrinsic Roughness in Suspended van der Waals Heterostructures
Joachim Dahl Thomsen 1 , Tue Gunst 1 , Soren Schou Gregersen 1 , Lene Gammelgaard 1 , Bjarke Jessen 1 , David Mackenzie 1 , Kenji Watanabe 2 , Takashi Taniguchi 2 , Peter Boggild 1 , Timothy J. Booth 1
1 Department of Micro and Nanotechnology, Technical University of Denmark, Kgs. Lyngby Denmark, 2 , National Institute for Materials Science (NIMS), Tsukuba Japan
Show AbstractSuspended graphene is known to show intrinsic corrugations on the nanometer scale [1] that have previously been measured to have a root mean square roughness of ~1.7 Å [2]. Intrinsic roughness is a suspected key source of scattering and thus a limiter of the carrier mobility in clean graphene samples [3, 4]. Suspending graphene flakes has proven to increase the electron mobility drastically compared to graphene supported on silicon oxide [5], as adverse effects on the mobility from the silicon oxide are eliminated. Similar improvements in mobility are obtained by encapsulating the graphene in hexagonal boron nitride (hBN) [6]. In this study we measured the intrinsic roughness of suspended exfoliated graphene flakes and compare to suspended graphene/hBN heterostructures, using electron diffraction patterns from a transmission electron microscope. We find that suspended graphene/hBN heterostructures show a strong suppression in the measured RMS roughness down to ~0.12 Å. Since the roughness of hBN placed on silicon dioxide is reported to plateau at ~1 Å for hBN thicker than ~20 nm [7], suspending the heterostructures may be a viable fabrication strategy for obtaining high carrier mobility graphene devices.
References:
[1] J.C. Meyer et al, Nature 446, 60-63 (2007)
[2] D. A. Kirilenko et al, PRB 84, 235417 (2007)
[3] M. I. Katsnelson and A. K. Geim, Phil. Trans. R. Soc. 366, 195-204 (2008)
[4] E.V. Castro et al, Phys. Rev. Lett. 105, 266601 (2010)
[5] K.I. Bolotin et al, Solid State Communications 146, 351-355 (2008)
[6] A.S. Mayorov et al, Nano Lett. 11, 2396-2399 (2011)
[7] C. Dean et al (supplementary information), Nat. Nanotech. 5, 722-726 (2010)
10:30 AM - ED3.12.04
THz-TDS Carrier Mobility Mapping of Graphene—Defects and Scattering Dynamics
Peter Boggild 1 , Jonas Due Buron 1 , Patrick Whelan 1 , Dirch Petersen 1 , David Mackenzie 1 , Timothy J. Booth 1 , Peter Jepsen 2
1 Centre of Nanostructured Graphene, DTU Nanotech, Technical University of Denmark, Kgs. Lyngby Denmark, 2 Centre of Nanostructured Graphene, DTU Fotonik, Technical University of Denmark, Kgs. Lyngby Denmark
Show AbstractThe gap between the rapid upscaling of large-area graphene production compared to slow develpment of available electrical characterisation methods could become a major roadblock for emerging graphene applications. As an alternative to the often cumbersome and destructive characterisation techniques based on electrical device fabrication and measurement, THz time-domain spectroscopy (THz-TDS) [1] provides fast, non-destructive and accurate mapping of the key electrical characteristics. This is confirmed by direct comparison with micro four-point probe (M4PP) measurements, another low-invasive method already used by major semiconductor manufacturers for inline quality control. In addition to spatial maps of the sheet conductance, THz-TDS and M4PP offer unique information on defects and inhomogeneities, as well as detailed scattering dynamics in the graphene film on nm to mm length scales [2-4]. We also show that THz-TDS can be used to map the carrier density and mobility, either by transferring graphene to a substrate equipped with a THz-transparent back gate [5], or by analyzing the frequency response in detail to extract the scattering time at a constant carrier density [6]. In contrast with conventional field effect and Hall measurements, THz-TDS measures the intrinsic carrier mobility, as opposed to extrinsic device mobility derived from a conductance measurement. The frequency response allows mapping of the local scattering dynamics, i.e. insight into Drude vs non-Drude like behavior, which allows information about nanoscale line-defects to be extracted from wafer scale CVD graphene samples. Finally, the challenges of realizing in-line monitoring of the electrical properties in a graphene production scenario, and the prospects for establishing THz-TDS mapping as a measurement standard for large-area graphene films will be discussed.
References
[1] J. Buron, D. H. Petersen, P. Bøggild, D. G. Cooke, M. Hilke, J. Sun, W. Whiteway, P. F. Nielsen, O. Hansen, A. Yurgens, P. Uhd-Jepsen, Nano Letters, 12 (2012), 5074.
[2] J. D. Buron, F. Pizzocchero, B. Jessen, T. J. Booth, P. F. Nielsen, O. Hansen, M. Hilke, E. Whiteway, P. U. Jepsen, P. Bøggild, D. H. Petersen, Nano Letters, 14 (2014), 6348.
[3] M. R. Lotz, M. Boll, O. Hansen, D. Kjær, P. Bøggild, D. H. Petersen, Appl. Phys. Lett., 105 (2014), 053115.
[4] M. Boll, M. R. Lotz, O. Hansen, F. Wang, D. Kjær, P. Bøggild, and D. H. Petersen, Phys. Rev. B, 90 (2014), 245432.
[5] J. D. Buron, D. M. A. Mackenzie, D. H. Petersen, A. Pesquera, A. Centeno, P. Bøggild, A. Zurutuza, P. U. Jepsen, Optics Express, 24 (2015), 250745.
[6] J. D. Buron, F. Pizzocchero, P. U. Jepsen, D. H. Petersen, J. M. Caridad, B. S. Jessen, T. J. Booth, P. Bøggild, Scientific Reports 5 (2015), 12305.
10:45 AM - ED3.12.05
High Electrical Filed Transport and Related Thermal Spreading in van der Waals Heterostructures
Faisal Ahmed 1 , Min Sup Choi 2 , Young Kim 3 , James Hone 3 , Won Jong Yoo 1 2
1 School of Mechanical Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do, Korea (the Republic of), 2 Department of Nano Science and Technology, SKKU Advanced Institute of Nano-Technology (SAINT), Sungkyunkwan University, Suwon, Gyeonggi-do, Korea (the Republic of), 3 Department of Mechanical Engineering, Columbia University, New York, New York, United States
Show AbstractOver the last decade, numerous two-dimensional (2D) materials are explored that include metals (NbSe2), semimetals (graphene), semiconductors (MoS2, Black Phosphorus) and insulators (hexagonal Boron Nitride).1,2 These materials can be integrated into the novel heterostructures by van der Waals forces to harness desired physical characteristics, thanks to their pristine surface.1-3 In most of the previously reported studies, the solid state devices based on 2D materials are operated at low electric field and low temperature conditions to explore their inherent physics.1-4 However, in practice the functional devices are operated at higher applied field conditions. Therefore, we study the high field transport in 2D black Phosphorus (BP) devices and tried to effectively dissipate Joule heat by integrating BP with thermally favorable 2D materials to form various heterostructures. Our results reveal that few layer back gated BP device on SiO2 dielectric exhibits record high current density of 3x1010 A/m2 while enduring 7 M V/m applied field before Joule breakdown, that mainly occur due to thermal energy deposition along BP-SiO2 interface. Therefore, using 2D hBN as a substrate instead of thermal resistive SiO2 enhances power density three folds and 13% increase in breakdown temperature of BP device, thanks to the compatible structural and thermal properties of hBN with BP. Besides this, by sandwiching BP between two graphene layers also enhances the current density and field endurance, since graphene exhibits atomically smooth surface and extra high thermal conductivity. Our findings will be highly crucial to realize durable and energy efficient devices and circuits based on 2D materials.
References
[1] K. S. Novoselov et al. Science, 2016. 353, 6298. [2] M. S. Choi et al. Nat. Commun. 2013, 4, 1624.
[3] H.-M. Li et al. Nat Commun, 2015. 6, 6564. [4] F. Ahmed et al. Nanoscale, 2015, 7, 9222.
Acknowledgments
This work was supported by the Global Frontier R&D Program (2013M3A6B1078873) at the Center for Hybrid Interface Materials (HIM), funded by the Ministry of Science, ICT&Future Planning.
ED3.13: 2D Optoelectronics
Session Chairs
Friday PM, April 21, 2017
PCC North, 100 Level, Room 127 C
11:30 AM - *ED3.13.01
Strong Index Control in Graphene and TMDs for Electrooptic Modulation
Volker Sorger 1
1 , George Washington University, Washington, District of Columbia, United States
Show AbstractThe ability to modulate light using 2-dimensional (2D) materials is fundamentally challenged by their small optical cross-section leading to miniscule modal confinements in diffraction- limited photonics despite intrinsically high electrooptic absorption modulation (EAM) potential given by their strong exciton binding energies. However the inherent polarization anisotropy in 2D materials and device tradeoffs lead to additional requirements with respect to electric field directions and modal confinement. A detailed relationship between modal confinement factor and obtainable modulation strength including definitions on bounding limits are outstanding. Here, we show that the modal confinement factor is a key parameter determining both the modulation strength and the modulator extinction ratio-to-insertion loss metric. We show that the modal confinement and hence the modulation strength of a single-layer modulated 2D material in a plasmonically con- fined mode is able to improve by more than 10× compared to diffraction-limited modes. Combined with the strong-index modulation of graphene, the modulation strength can be more than 2-orders of magnitude higher compared to Silicon-based EAMs. Furthermore, modal confinement was found to be synergistic with performance optimization via enhanced light-matter-interactions. Moreover, we discuss recent results of plasmonic modulators based on Graphene’s Pauli-blocking permittivity tuning. Lastly, we show how field-induced phase changes in TMDs such as MoTe2 can lead to phase switching between the 2H and 1T’ phase. The results in a dramatic index change at visible and NIR frequencies, ideal for electrooptic modulation. These results show that there is room for scaling 2D-material EAMs with respect to modal engineering toward realizing synergistic designs leading to high-performance modulators.
12:00 PM - ED3.13.02
High Performance Photovoltaic Based on Black Phosphorus p-n Homojunction Diode
Yuanda Liu 1 3 , Yongqing Cai 2 , Gang Zhang 2 , Yong-Wei Zhang 2 , Kah-Wee Ang 1
1 Department of Electrical and Computer Engineering, National University of Singapore, Singapore Singapore, 3 School of Electronic Science and Engineering, Nanjing University, Nanjing China, 2 , Institute of Higher Performance Computing, Singapore Singapore
Show AbstractThe formation of semiconductor p-n junctions is central to optoelectronic applications such as photovoltaics and light-emitting diodes. However, due to the lack of controllable doping technique, state-of-the-art 2D p-n junctions are predominantly made of van der Waals heterostructures or electrostatic gated junctions. Here, we report on a novel aluminum (Al) atoms doping technique that enables the formation of p-n homojunction within a single black phosphorus (BP) material towards high performance photovoltaic devices. We show theoretically and experimentally the effectiveness of Al atoms as electron donors to transform the pristine p-type BP into n-type conductance. The BP homojunction diode realized in this work achieves a near-unity ideality factor along with a good on/off ratio of ~5.6×103 at a low bias of 2 V, allowing for low-power dynamic current rectification without signal decay or overshoot. Even under zero external bias, photovoltaic response with a maximum open-circuit voltage responsivity of ~15.7×103 VW-1 and short-circuit current responsivity of ~6.2 mAW-1 are demonstrated under near-infrared wavelength excitation (1,550 nm). The attainment of self-powered dynamic photovoltage and photocurrent generation is attributed to the existence of built-in electric field in the homojunction diode, indicative of its enriched potentials for a broad range of applications including energy harvesting and high signal-to-noise photodetection.
Acknowledgements
This research is supported by the National University of Singapore Faculty Research Committee Grants (R-263-000-B21-133 and R-263-000-B21-731), A*STAR Science and Engineering Research Council Grants (No. 152-70-00013 and 152-70-00017), and by the National Research Foundation, Prime Minister’s Office, Singapore under its medium sized centre program. Y.D.L. acknowledges funding of the International Postdoctoral Exchange Fellowship Program 20150023, the National Natural Science Foundation of China 61504056, the China Postdoctoral Science Foundation 2014M551558 and Jiangsu Planned Projects for Postdoctoral Research Funds 1402028B.
12:15 PM - ED3.13.03
Tuning of Structural and Optical Properties of GeSn and SiGeSn Thin Films Grown by MOCVD
Jignesh Vanjaria 1 , Tom Salagaj 2 , Nick Sbrockey 2 , Gary Tompa 2 , Hongbin Yu 1
1 , Arizona State University, Tempe, Arizona, United States, 2 , Structured Materials Industries, Piscataway, New Jersey, United States
Show AbstractGermanium Tin (GeSn) and Silicon Germanium Tin (SiGeSn) alloys represent a relatively new family of Group IV crystalline systems which can be used in Si photonics. By varying the relative compositions of Ge, Sn and Si, the band gap of the alloy can be altered and also be switched from indirect to direct. This ability confers upon the system an extraordinary flexibility for band gap and strain engineering. Thus, GexSny and Ge1-x-ySixSny alloys can potentially lead towards promising near- and mid-infrared optoelectronic devices which will create an abundance of opportunities in the fields of free-space communication, chemical sensing, energy trapping and conversion and on-chip photonics in microelectronic packages.
In this work, we report GeSn and SiGeSn thin films grown by Metal Organic Chemical Vapor Deposition (MOCVD) technique on Si (100) and plain and patterned silicon dioxide (SiO2) coated Si substrates. MOCVD was used as it is a simple and cost effective technique for the growth of thin films and allows for readily varying the composition of the films. The compositions of the thin films were varied by varying the input precursor flow rates and the furnace temperature. Structural and optical properties of the deposited films were studied by scanning electron microscopy, energy dispersive x-ray spectroscopy, X-ray diffraction, and Raman spectroscopy. SEM and EDX analyses demonstrated uniform crystalline film growth over the substrates. XRD analysis showed a shift in the (004) Ge peak for samples grown with varying operating parameters indicating the formation of GeSn and SiGeSn alloys with varying composition.
A detailed description of the growth process for the thin films will be presented. The results of the structural and optical characterization will also be presented.
12:30 PM - *ED3.13.04
Black Phosphorus Optoelectronics and Electronics
Fengnian Xia 1 , Xioolong Chen 1
1 , Yale University, New Haven, Connecticut, United States
Show AbstractBlack phosphorus recently emerged as a promising new 2D material due to its widely tuneable and direct bandgap, high carrier mobility and remarkable in-plane anisotropic electrical, optical and phonon properties. It serendipitously bridges the zero-gap graphene and the relatively large-bandgap transition metal dichalcogenides such as molybdenum disulphide (MoS2). In this talk, I will first cover the basic properties of few-layer and thin-film black phosphorus, followed by a discussion of recent observation of highly anisotropic robust excitons in monolayer black phosphorus. Finally I will present a few potential applications of black phosphorus such as radio-frequency transistors and wideband photodetectors.