Ron Fulks, Xerox Palo Alto Research Center
Gregory Parsons, North Carolina State Univ
Dave Slobodin, Silicon Light Machines
Todd Yuzuriha, Sharp Microelectronics Tech
- Applied Komatsu Technology
- Corning Inc
- Dow Chemical Co.
- Eastman Kodak Company
- Materials Research Group, Inc
- Sharp Corporation
- Xerox Corporation
Proceedings published as Volume 471
of the Materials Research Society
Symposium Proceedings Series.
In the sessions below "*" indicates an invited paper.
SESSION G1/A1: AMORPHOUS SILICON THIN FILM TRANSISTORS I
Chair: Sigurd Wagner
Tuesday Morning, April 1, 1997
Golden Gate A2
8:30 AM *G1.1/A1.1
TECHNOLOGY TRENDS IN AMLCDs, Masaya Hijikigawa, Sharp Corporation, Tenri, Nara, JAPAN.
In a rapid progress of the new information society, great development is expected for a Liquid Crystal Display (LCD) as its core device. From the features of space saving, light weight, low power consumption and excellent display performance, LCDs which become major display tool of a FPD (Flat Panel Display). The LCDs further evolves its technology and cost performance and are challenging to create a next generation display by taking a place of CRTs.
Towards the LCD development targets of ''comparable display performance to CRTs with thin shape, light weight and low power consumption'', innovative TFT-LCD technologies have been developed. The advanced technologies to improve display performance such as ''IPS'', ''VA'' and ''Super-V'' are introduced.
To expand LCD markets, the LCDs for desk top PC applications that CRTs currently occupy have been developed and commercialized. The technology trends for large size LCDs and high resolution like SXGA/UXGA are discussed.
In mobile PC market, thinner, lighter and lower power consumption LCDs are expected. The reflective color LCDs that are suitable for this application is introduced. A system integration is introduced. This is a direction that LCDs should progress in future. The application of low temperature poly-Si TFT technology makes possible to integrate peripheral circuit function such as driver IC, control and interface circuits into an LCD panel.
9:00 AM G1.2/A1.2
AMORPHOUS SILICON PHOTODIODE-THIN FILM TRANSISTOR IMAGE SENSOR WITH DIODE ON TOP STRUCTURE, Martin J. Powell, Philips Research Laboratories, Large Area Electronics Group, Surrey, UNITED KINGDOM; C. Glasse, Philips Research Laboratories, Redhill, UNITED KINGDOM; Ian D. French, Philips Research Laboratories, Large Area Electronics Group, Surrey, UNITED KINGDOM; A. R. Franklin, J. R. Hughes, J. E. Curran, Philips Research Laboratories, Redhill, UNITED KINGDOM.
We have developed a new amorphous silicon image sensor technology, with a two-dimensional matrix of amorphous silicon thin film transistors and photodiodes, where the amorphous silicon pin photodiode is fabricated on top of a thick insulating layer, which is, in turn, on top of the thin-film transistor. We call this ''diode on top'' technology or, more affectionately, as DOTTY. Key aspects in the technology development were the etching of contact holes in the thick dielectric and the introduction of crucial barrier layer on top of the thick insulator, but under the photodiode. As a result, we achieved photodiode dark currents and quantum efficiencies, which were as good as those obtained in a conventional sensor. With our technology, active areas of 93 can be achieved for a 200 m pixel pitch, compared to 50 for a conventional technology with similar design rules. This improved level of collection efficiency is important for low noise x-ray medical applications. The use of a thick insulator, with a low dielectric constant means that the additional readout line capacitance is kept to a minimum and the electronic readout noise is not increased significantly.
9:15 AM *G1.3/A1.3
a-Si TFTs MATCHED TO ULTRA-LARGE PANELS, Masakiyo Matsumura, Akihiko Saitoh, Tokyo Inst of Technology, Dept of Physical Electronics, Tokyo, JAPAN.
New methods have been required for solving a bus-line capacitance enlargement problem for ultralarge TFT-LCDs. Moving the signal bus to the facing substrate , while connecting the TFT-source to the adjacent gate bus or the parallel earth bus, is effective to reduce the crossover-related capacitance. And vertical TFT  is effective for reducing the TFT-related capacitance. Here, we present a new vertical TFT process.
Lightly phosphorus-doped a-Si (50 nm-thick) and SiN (200 nm-thick) films were successively deposited on the substrate with thick Mo gate bus. The flat Si region was crystallized by excimer-laser irradiation from the top. Thus the vertical a-Si TFT was formed at the side wall of the bus, and with poly-Si source and drain . The channel length was determined only by the bus thickness, and thus could be reduced dramatically. Intrinsic gate capacitance becomes negligibly small since it is in proportion to the square of the channel length (under the constant current conditions). Parasitic capacitances at drain-gate and drain-source are very small, since they are not overlapped. The source-gate capacitance is relatively large but will be not severe since their spacing can be enlarged and both of them are connected to buses. Good heat sink by the gate bus is another advantage.
The 0.85 m-long TFT has been operated with the current ratio of 10 at the 0.5 V drain voltage with the field-effect mobility of 0.5 cm/Vs.
9:45 AM G1.4/A1.4
VIA-HOLE ADDRESSED TFT AND PROCESS FOR LARGE-AREA a-Si:H ELECTRONICS, Helena Gleskova, Princeton Univ, Dept of Electrical Engr, Princeton, NJ; Sigurd Wagner, Princeton Univ, Dept of Electrical Engr, Princeton, NJ; Dashen Shen, Univ of Alabama, Dept of E&CE, Huntsville, AL.
a-Si:H is the semiconductor of choice for ''giant electronics''. Radically new structures and fabrication techniques are needed to enable large size at reduced cost. We describe a new, low resistance contact structure for bottom gate TFTs that makes large backplanes possible, and describe the new fabrication sequence for this structure. Analysis shows that the gate line RC constant of an AMLCD can be reduced substantially if a thick bus is run on the back of the substrate and connected to the gate line. We connect the gate and bus line through a few via holes. The transistors are addressed from the bus. We made via holes by laser drilling thin glass substrates, and made TFTs addressed from the back side of the substrate. The TFTs were fabricated using laser printing of toner etch masks. We also describe the new process sequence for making these bottom gate TFTs. The electrical performance of the via hole addressed TFTs is comparable to that of standard bottom-gate devices.
SESSION G2/A2: AMORPHOUS SILICON THIN FILM TRANSISTORS II
Chair: Gregory N. Parsons
Tuesday Morning, April 1, 1997
Golden Gate A2
10:30 AM *G2.1/A2.1
MODELING AND SCALING OF a-Si:H AND POLY-Si THIN FILM TRANSISTORS, Michael S. Shur, Holly C. Slade, Trond Ytterdal, Rensselaer Polytechnic Inst, Dept of ECSE, Troy, NY.
The characteristics of amorphous silicon (a-Si) and polysilicon (poly-Si) Thin Film Transistors (TFTs) are strongly affected by the distribution of localized states in the energy gap and may be also affected by the properties of the gate dielectric. As a consequence, in these devices, the threshold voltage of the channel formation is different from the current turn-on voltage, the field effect mobility depends on the gate bias, stress effects play a much more important role than in crystalline materials, the subthreshold slopes of the current-voltage characteristics are very large, the device capacitances may strongly depend on frequency, and the temperature dependencies of the device parameters may be completely different from those for crystalline field effect transistors. In addition, short-channel poly-Si TFTs exhibit a strong kink effect. Most of this behavior can be understood based on two dimensional simulations, which account for the distributions of the localized states in the energy gap. The insight into the device physics based on the two dimensional simulations allowed us to develop physics-based TFT models, which incorporate the gate voltage dependencies of the field effect mobility, temperature dependencies of the device parameters, contact resistances, the stress effects, the effects related to the capacitance dispersion. These device models have been implemented in our circuit simulator AIM-Spice, which incorporates an automatic parameter extractor.
In this work, we compare the current-voltage and capacitance-voltage characteristics predicted by our models with the TFT characteristics measured by different groups and compare the extracted device parameters. We also use the models in order to predict how TFT characteristics should scale with the gate length. As an example of how these models can be used for optimizing device designs in a circuit environment, we evaluate the trade-off between the design parameters of a-Si TFTs.
11:00 AM G2.2/A2.2
BURIED CHANNEL AMORPHOUS SILICON THIN FILM TRANSISTORS FABRICATED BY DC REACTIVE MAGNETRON SPUTTERING, Cory Weber, Intel Corp, Beaverton, OR; Hyun-Chul Jin, Univ of Illinois-Urbana, Dept of MS&E, Urbana, IL; John R. Abelson, Univ of Illinois-Urbana, Dept of Matls Science, Urbana, IL.
We demonstrate an inverted staggered thin film field effect transistor based on deposited silicon nitride and hydrogenated amorphous silicon, but with the conducting channel recessed away from the silicon nitride-amorphous silicon interface. The films are grown by dc reactive magnetron sputtering of a silicon target in a plasma of (Ar + H + N) or (Ar + H) for the nitride and silicon layers, respectively. To create a discontinuity in the amorphous silicon conduction band, and thus a buried channel, we vary the injected hydrogen partial pressure at constant substrate temperature, which varies the bonded hydrogen content and thus the bandgap. Electrical measurements provide strong evidence for the existence of the buried channel. Capacitance-voltage measurements exhibit three plateaus: depletion at negative gate biases, accumulation of the buried channel at gate biases 5 V, and accumulation of the surface channel (adjacent to the nitride) at higher gate biases. Transconductance measurements exhibit two distinct slopes as a function of gate bias which correspond to the effective mobility in the buried and surface channels. For a gate bias of 5 V, a record mobility of 1.75 cm/V-sec is obtained for devices grown at 230C, and an acceptable mobility of 0.5 cm/V-sec for devices grown entirely at 125C. We will discuss tradeoffs in the optimization of the band offsets and layer thicknesses, as well as methods to fabricate buried channel devices using plasma-enhanced CVD.
11:15 AM *G2.3/A2.3
PROSPECTS FOR ACTIVE MATRIX DISPLAYS ON PLASTIC, Stephen M. Gates, IBM T.J. Watson Research Ctr, Yorktown Heights, NY.
Currently, flat panel display evolution is driven by cost, performance, and power consumption. In the future, displays fabricated on unbreakable plastic will be motivated by weight reduction, ruggedness, and curved screen applications. This talk will examine the future of AM LCDs on plastic substrates, from properties of the substrate itself to the fabrication of TFTs at low temperature.
A multicomponent substrate is required, consisting of a clear polymer sheet and coatings for solvent and scratch resistance. Requirements of the ideal plastic substrate will be discussed, and current work at selected plastics manufacturers will be reviewed.
Two methods for Low Temperature TFT fabrication will be compared. Using 125C deposition of a-Si:H and SiNx, etch-stopper TFTs have been made by plasma enhanced CVD using He dilution [l] and by reactive magnetron sputtering (RMS) of a Si target . The output characteristics of both TFTs will be discussed, and pronounced differences in the gate dielectric layers will be emphasized.
11:45 AM G2.4/A2.4
THIN FILM SILICON TRANSISTORS WITH SELF-PASSIVATED COPPER GATES, Henning Sirringhaus, Antoine Kahn, Princeton Univ, Dept of Electrical Engr, Princeton, NJ; Sigurd Wagner, Princeton Univ, Dept of Electrical Engr, Princeton, NJ.
We demonstrate a new concept to solve the gate metallization problem in amorphous silicon thin film transistors (TFTs) for active matrix liquid crystal displays. With current refractory metal technology, the resistivity of the bottom-level gate lines induces RC delays which become intolerably large if the display size exceeds 15-20 inches. We demonstrate a simple self-passivation process for high-conductivity copper (Cu) gates, which does not introduce additional mask steps into the manufacturing process. Cu is passivated by a self-aligned chromium (Cr) oxide encapsulation layer formed by surface segregation of Cr in dilute Cu alloys (x = 0.1-0.2) at 400C. As evidenced by Auger electron spectroscopy and secondary ion mass spectrometry depth profiling, the encapsulation prevents Cu from diffusing into the active semiconducting layers during the subsequent PECVD and TFT fabrication steps. It also solves the problems of adhesion to the glass substrate, and of Cu oxidation. The performance of self-passivated Cu-gate TFTs is comparable to that of TFTs with standard refractory metal gates. Tests under thermal bias stress up to 100C yield no evidence of stress-induced Cu diffusion. The resistivity of the gate lines (including the encapsulation) is 6.7 cm, well below that of standard refractory metal gates. It is limited only by the solid solubility of Cr in Cu, i.e., by some residual Cr in the bulk of the line. Work is in progress to further optimize line resistivities by replacing Cr with other refractory metals with even lower solid solubilities.
SESSION G3: AMLCD MATERIALS AND PROCESSES
Chairs: Ron Fulks and Todd Yuzuriha
Tuesday Afternoon, April 1, 1997
Golden Gate A1
1:30 PM *G3.1
DEPOSITION OF PRECURSOR POLY Si FILMS FOR FLAT PANEL DISPLAY APPLICATION, Ronnie Bar-Gadda, Chandra Deshpandey, Rajiv Pethe, Norman Turner, Ernest Demaray, Kam Law, Teruo Sasagawa, Robert Robertson, Applied Komatsu Technology, Santa Clara, CA.
High mobilities achievable in poly silicon films make them an ideal candidate for fabrication of driver circuitry in active matrix liquid crystal flat panel displays. To realize this potential benefit of poly Si, it is required to establish a low temperature (C) deposition process compatible with glass substrates currently used in fabrication of FPD's. Due to this severe temperature limitation, most of the research has been directed towards deposition of precursor poly silicon film which could be subsequentaly crystallized under controlled post depositio annealing step. We have evaluated precursor poly Si film deposition using PECVD, thermal CVD as well as (modified) PVD technique. Results on deposited as well as post deposited annealed films in term of morphology, grain size, impurity content and surface roughness are presented.
2:00 PM *G3.2
SUBSTRATE ISSUES FOR ADVANCED DISPLAY TECHNOLOGIES, Dawne Moffatt-Fairbanks, Corning Inc, Corning, NY.
The glass substrate plays a crucial role in the successful performance of advanced flat panel displays (FPDs). These FPD technologies include active-matrix liquid crystal displays (AMLCD) and Plasma Displays (PDP). Although these displays are different in the way in which they operate, there are several common substrate requirements all of which are determined by the process for making the entire display. These include issues relating to substrate size, thermal shrinkage, high temperature stability, and substrate surface quality.
While AMLCD technology is now moving toward larger sizes, PDPs are currently large size displays, requiring large glass substrates. The primary issue in using larger substrates is handling the glass at high temperatures without incurring dimensional changes in the glass: this is largely an issue involving supporting the glass during subsequent processing. Minimizing thermal shrinkage of the glass, independent of the substrate size, is critical to the processing of the final display. Thermal stability of the glass at high temperatures is another important attribute of glasses for these types of displays. The strain point of the glass largely determine the magnitude of this attribute. Finally, thickness uniformity and surface flaws are critical to the performance of the final display.
Corning's Code 1737 glass substrate meets the requirements for AMLCDs and is rapidly becoming the industry standard. Corning/Saint-Gobain Code CS25 glass is a new glass that has significant benefits over soda-lime glass for PDP applications. This paper will address the above-mentioned issues in terms of these two commercially-available glasses.
2:30 PM G3.3
FLEXIBLE AMORPHOUS SILICON TFTs ON STEEL FOIL, Steven D. Theiss, Sigurd Wagner, Princeton Univ, Dept of Electrical Engr, Princeton, NJ.
For many flat panel display applications, traditional glass substrates for the TFT backplane are not sufficiently rugged. Therefore, we have begun to explore the use of steel foils as TFT substrates for emissive or reflective displays. We report the fabrication of a-Si:H TFTs on highly flexible 75 m thick stainless steel foils. This foil was chosen for its light weight (equivalent to 215 m thick glass) and its easy commercial availability. In addition, this foil provided an opportunity to evaluate TFT growth on a rough, as-rolled substrate surface. We measured the electrical performance of the lolls with regard to mechanical stress, which included bending samples to a controlled radius of curvature and dropping them from a significant height. The electrical characteristics of the as-fabricated TFTs were good and were not affected by dropping over 15 meters to a concrete floor. In bending tests down to a radius of curvature of 8.25 cm, we observed that the TFTs initially continued to function upon being bent, but failed after several minutes due to shorting through the bottom insulator. Large rms surface roughness (m) due to mill-rolling of the substrates was a strong limitation on device reliability. This resulted in a reduction of initial device yields to roughly 50, as compared to yields of nearly 100 on polished substrates. We will present the results of this work, and compare the TFT performance to those grown on 200 m thick, polished foil. We will also discuss our contribution to recent work on the successful integration of organic light-emitting diodes (OLEDs) with TFTs on steel substrates, resulting in a new, highly rugged form of emissive display.
2:45 PM G3.4
ELECTRICAL PROPERTIES OF LOW DIELECTRIC CONSTANT PLANARIZATION THIN FILMS FOR a-Si:H TFT-LCDs, Je-Hsiung Lan, T.-K. Chou, C.-S. Chaing, F.-X. Fouxel, Univ of Michigan, Ann Arbor, MI; M. J. Radler, Dow Chemical Co, Midland, MI; Jerzy Kanicki, Univ of Michigan, Ctr of Microelectronics Research, Ann Arbor, MI.
The reduction of the gate delay and increase of the aperture ratio of pixel electrode are of tremendous importance for the large area a-Si:H TFT LCDs. Solutions to both problems can be provided by introduction of the polymers which can planarize both thick metal gate lines and a-Si:H TFT structures. The latter will allow to increase the aperture ratio by placing the ITO pixel electrode above the metal bus lines. These polymers should have the electrical properties which are acceptable for TFT-LCDs, and no extra crosstalk between pixel electrode, address, and data bus lines should occur in such a display. We have evaluated the electrical properties of the planarization polymers having low dielectric constants by measuring the current-voltage (I-V) and capacitance-voltage (C-V) characteristics for metal/polymer/metal and metal/polymer/c-Si structures, respectively. From the I-V measurement, a dielectric strength of above 4x10 V/cm was found and leakage current was below 6x10. The C-V measurement results showed that dielectric constant is about 2.27 at 1 MHz and a large hysteresis occurred during forward and backward voltage scans, which was associated with the fixed charges accumulated in the polymer during the measurements. However, when a 200 silicon-dioxide layer was inserted between the polymer and c-Si substrate, the hysteresis was significantly reduced. This observation indicates that the introduction of the stable insulator layer at metal/polymer and polymer/semiconductor interfaces will prevent the accumulation of the fixed charges and could make the polymer suitable material for a-Si:H TFTs. Therefore, the double- (gate metal/polymer/a-SiN) and tri- (gate metal/a-SiN/polymer/a-SiN) layers gate insulator structures will be fabricated and the electrical performance of a-Si:H TFTs incorporating such structures will be presented. Finally, the overlap capacitances of the planarization layer between ITO pixel electrode and address/data bus lines have been calculated, and its impact on the crosstalk issue in a-Si:H TFT-LCD will be discussed.
SESSION G4: POLYSILICON AMLCD's
Chairs: Ron Fulks and Todd Yuzuriha
Tuesday Afternoon, April 1, 1997
Golden Gate A1
3:30 PM *G4.1
CRITICAL TECHNOLOGIES FOR POLY-Si TFT IN HIGH RESOLUTION AM-LCD, I-Wei Wu, Industrial Technology Research Institute, Chutung, Hsinchu, TAIWAN.
Polycrystalline silicon (p-Si) TFT offers higher aperture ratio with integrated driver circuits compared to the conventional a-Si TFT in AM-LCD application. The advantages of the p-Si TFT as the pixel switching active element will be more pronounced for AM-LCDs with large number of scan lines and/or high pixel density mainly due to the small parasitic and gate capacitance of the narrow width p-Si pixel TFT with high electron field-effect mobility.
This paper will review the challenges and critical issues associated with the technology of p-Si TFT, particularly in active silicon layer deposition, solid phase and laser crystallization, hydrogenation, leakage current, top- or bottom-gate architecture, and electrical stress induced device degradation. Issues affecting the p Si TFT cell array design are also analyzed. The effects of lithographic design rules, pixel density, storage capacitor size, display format, and gate dielectric thickness on the cell array aperture ratio will be discussed. As an example, tradeoffs in a projection display system selecting between high and low temperature processed p Si TFT LCDs in performance and cost will be presented.
Prospects of p-Si TFT technology on the regimes of dominance with respect to display panel size and pixel density will be proposed based on the comparison with performance and manufacturing cost with other flat-panel technologies.
4:00 PM G4.2
ELECTRICAL CHARACTERISTICS OF LDD POLY-Si TFTs WITH MIS-ALIGNMENT TOLERANT STRUCTURE FOR AMLCDs, Byung-Hyuk Min, Univ of Michigan, Dept of EE&CS, Ann Arbor, MI; Jerzy Kanicki, Univ of Michigan, Ctr of Microelectronics Research, Ann Arbor, MI.
In order to reduce the leakage current of poly-Si TFTs, LDD (Lightly Doped Drain) structure has been widely used as the switching device of the pixel element for AMLCDs. However, the LDD length of the source region may not be the same as that of the drain region due to LDD mask misalignment, so that the LDD poly-Si TFT exhibits asymmetrical characteristics. In this paper, we propose the LDD poly-Si TFT structure having the symmetrical characteristics. This device structure will eliminate the process misalignment.
The key feature of the proposed device is a U-shaped active island, of which lower region is overlapped with the gate electrode. Both the source and drain region are located on the same upper side of the U-shaped island, contrary to the conventional coplanar structure in which the gate is between the source and drain. It is interesting to note that in this device structure. Even if the misalignment of the LDD lithographic process could exist, because the misaligned length of both the source and drain is varied in the same direction, the LDD length of the source is always identical to that of the drain.
We have successfully fabricated both the conventional and proposed poly Si TFTs by SPC process. As expected, the proposed poly-Si TFT shows symmetrical transfer characteristics, while the conventional one does not. In addition, the leakage current is reduced considerably as the LDD length is varied from 0 m to 1.0 m. The maximum ON/OFF current ratio of about 1x10 is obtained. It is found that the proposed device maintains the symmetrical characteristics after the electrical stress, while the conventional device has asymmetrical characteristics that become worse after the stress.
4:15 PM G4.3
HOT-WIRE HYDROGEN PASSIVATION OF POLYCRISTALLINE SILICON TFT's, N. Beldi, F. Le Bihan, K. Kis-Sion, M. Sarret, Tayeb Mohammed-Brahim, F. Raoult, R. Rogal, Univ de Rennes I, URA-CNRS 1648, Rennes, FRANCE.
Hydrogen passivation is usually performed using ion implantation, or different plasma techniques to improve the characteristics of polysilicon Thin Film Transistors (TFTs). However, the high leakage current at high reverse gate voltage, which is generally not reduced after these passivations, constitutes a drawback for the use of these TFTs for pixel switching applications in flat panel displays. In this work, taking advantage of the high rate of H production by H dissociation on a hot tungsten filament, hydrogen passivation is performed in a hot-wire reactor. After optimization of the parameters: filament temperature, distance between the sample and the filament, hydrogen pressure, exposure time, passivation of polysilicon TFTs is performed at 350 during one hour.
The active layer of these TFTs is an undoped LPCVD polysilicon film, amorphous deposited and solid phase crystallized. The source and drain regions are heavily phosphorus doped. The gate insulator is an APCVD deposited SiO film. Three TFTs with the same geometry but with different active layer surface sizes, are processed. After passivation, no variation of the larger transistor characteristics have been observed. However, the threshold voltage V of the two other types of TFTs shifts to negative voltages and their electron mobility increases. These variations are more important for the small TFT. The shift of V is, however, too large. Hence, a gate voltage of -17 V is required to reach the minimum leakage current. After an annealing at 300 for 15 minutes, this gate voltage value is however reduced to -2 V. Moreover, the leakage current is nearly constant and lower than 10 A, at a drain-source voltage of 1 V, even at a gate voltage as high as -20 V. This work shows evidence for the effectiveness of the hot wire passivation technique to improve the polysilicon TFTs' performances. The dependence of the improvement on the transistor size is moreover used to discuss the possible pathways for hydrogen migration.
4:30 PM G4.4
ANALYTICAL TREATMENT FIELD EFFECT CONDUCTION IN POLYSILICON THIN FILM TRANSISTORS, William Eccleston, Univ of Liverpool, Dept of EE&E, Liverpool, UNITED KINGDOM.
Thin Film Transistors have more complex conduction processes than single-crystal devices because of grain boundaries which contain high concentrations of trapping levels, probably associated in part with the presence of amorphous silicon. Earlier theories  have depended on the assumption that because of the long Debye Length, in intrinsic silicon, these traps can be treated as though they were distributed throughout the grain. Others [2, 3] have provided an improved representation of the physical processes but have not provided closed form relationships for drain current and field effect mobility. As the concentration of channel electrons increase, the Debye Length becomes comparable with the grain size, a factor that is especially important in large-grain laser annealed materials where there may only be a single grain boundary to impede current flow. Because of the possibility of performance that is comparable to bulk silicon, with a capacity for multilayered active devices (3D), large-grain structures are extremely important. By analyzing the formation of potential barriers to current flow, with increasing gate voltage, and estimating the fraction of electrons able to cross them, is possible to develop a relationship between the terminal voltages and the resulting drain current, with field effect mobility as a parameter. The relationship between field effect mobility with both grain size and trap distribution is analyzed, the latter being represented by a characteristic temperature. The energy distribution of trapping levels is assumed to have the same form as that known to exist in amorphous silicon, and is also used in those treatments of polysilicon which assume uniformly distributed traps. The relationships are confirmed for the case where the characteristic temperature is equal to room temperature and, as expected, it reverts to being the same as the sample thin film transistor equation, first described by Weimer and still widely used in circuit design. The new equation will have wider applicability and greater accuracy than Weimer's and may, therefore, be of value in both device and circuit modeling, particularly for devices with short channels for large grain sizes.
4:45 PM G4.5
PERFORMANCE OF THIN FILM TRANSISTORS ON UNHYDROGENATED DOPED POLYSILICON FILMS OBTAINED BY SOLID PHASE CRYSTALLIZATION, K. Mourgues, Univ de Rennes I, Rennes, FRANCE; F. Raoult, Univ de Rennes I, URA-CNRS 1648, Rennes, FRANCE; L. Pichon, Univ de Rennes I, Groupe de Microelectronique & Visualisation, Rennes, FRANCE; Tayeb Mohammed-Brahim, D. Briand, Univ de Rennes I, URA-CNRS 1648, Rennes, FRANCE.
Low Temperature Polysilicon Thin Film Transistors (LTP-TFTS) are very useful for large area electronics, especially for Liquid Crystal Displays (LCD) applications. However, in the case of polysilicon obtained by Solid Phase Crystallization (SPC), hydrogen passivation of TFTs is usually necessary to improve their electrical performances. In our case LTP-TFTs do not undergo hydrogen passivation. LTP-TFTs are made through a four-mask aluminium gate process. At first, a 300 nm LPCVD amorphous silicon layer is deposited with two differently doped stacked regions of equal thickness. The 150 nm thick lower half layer is undoped, and the 150 nm thick upper half layer is heavily doped with a phosphorus concentration equal to 4 x 10. The amorphous silicon layer is crystallized by SPC technique at 600C. Therefore, a first plasma etching is performed to form source and drain windows, and a second one to ensure the active layer definition and the insulation of the structures. Then, a 60 nm thick APCVD (SiO) gate insulator is deposited at 450C. Contacts are opened by wet etchant. Finally, aluminium is thermally evaporated and etched to form electrode contacts. Our LTP-TFTs exhibit good electrical properties: a low threshold voltage (V = 1,2 V), a low subthreshold slope (0,7 V/dec), a very high field effect mobility (>100 cm/V.s), and a high On/Off state current ratio (= 10) for a drain voltage V = 1 V. It is worth noting that these results are better than those usually obtained for hydrogenated TFTs.
SESSION G5: NOVEL MATERIALS AND SYSTEMS
Chairs: Ron Fulks and Tsu-Jae King
Wednesday Morning, April 2, 1997
Golden Gate A1
9:00 AM G5.1
DIRECT WRITING OF COPPER LINES WITH 200C MAXIMUM PROCESS TEMPERATURE, Cheong M. Hong, Helena Gleskova, Princeton Univ, Dept of Electrical Engr, Princeton, NJ; Sigurd Wagner, Princeton Univ, Dept of Electrical Engr, Princeton, NJ.
We adapted a new technique for depositing copper lines, with the highest temperature reaching 200C. The technique is based on the decomposition of copper hexanoate by UV light, followed by annealing in H . We applied this copper metallization to Corning 7059 glass substrates by three different techniques, one of which is direct writing. A pattern of the solution of copper hexanoate is written on glass. Exposure to UV light at room temperature converts the copper hexanoate to a mixture of copper and copper(I) oxide. Annealing in forming gas at 200C converts the pattern to metallic copper. Two other techniques can be used to make copper patterns. Both start with a spun-on layer of the copper hexanoate. In one technique the layer is exposed to the UV light through a mask. The unexposed portions evaporate during the forming gas anneal. In the other technique the hexanoate is spun over an etch mask pattern, in our case of xerographic toner. The Cu pattern is produced by lift-off following the UV exposure. Because of shrinkage during the UV exposure, our present Cu films are grainy, yet we already have reached a macroscopic resistivity of 20 cm. Now we are experimenting with processes for better film uniformity.
9:15 AM G5.2
CONDUCTING POLYMER FILMS FOR PLASTIC LIQUID CRYSTAL DISPLAYS, Ling Huang, Catherine O'Ferral, Naval Research Laboratory, Code 6900, Washington, DC; Ranganathan Shashidhar, Naval Research Laboratory, Center for Biomolecular Science, Washington, DC; William Fritz, Steve Smith, Richard Hewitt, J. William Doane, Kent State Univ, Liquid Crystal Inst, Kent, OH.
In a conventional liquid crystal display (LCD), glass substrates coated with an indium tin oxide (ITO) layer are typically used for the application of an electric field to the liquid crystal material. For many applications, there is a need for a LCD with a plastic substrate. Polypyrrole is a conducting polymer which is known to have good chemical as well as thermal stability, and can be deposited on plastics. Hence it is a good candidate for plastic LCDs. We present here results on the development of polypyrrole films deposited on plastic substrate which are suitable for reflective LCDs, Two of the most important properties needed for LCD applications are the surface resistance and the optical transmission. We have prepared polypyrrole films by in-situ solution deposition on a plastic substrate. The deposition conditions have been optimized to achieve a range of combinations of the surface resistance and optical transparency. Typically it has been possible to obtain surface resistances of 2000 ohm/sq to 250 ohm/sq and optical transmittances (for white light) of 86 to 12. These values are indeed what are needed for reflective LCDs. We have also patterned the conducting polymer films to a resolution of 80 DPI using conventional photolithography techniques. All these properties are discussed in relation to the reflective LCD requirement. Finally, the operation of a 2x2 fully multiplexed cholesteric LCD (consisting of 25,600 pixels) fabricated from conducting polymer-based plastic substrates is described.
9:30 AM G5.3
SPRAY-DEPOSITED METAL OXIDE FILMS WITH VARIOUS PROPERTIES FOR MICRO- AND OPTOELECTRONIC APPLICATIONS: GROWTH AND CHARACTERIZATION, Alexandr Malik, Ana Seco, Rui Nunes, UNINOVA, CEMOP, Monte da Caparica, PORTUGAL; Manuela Vieira, Rodrigo Martins, FCT-UNL, Monte da Caparica, PORTUGAL.
Metal oxide thin films for different technical applications can be achieved by applying very simple technology to produce large-area thin films on glass, ceramic, and monocrystalline substrates. The goal of this paper is to demonstrate the possibility to develop high conductivity, semi insulating and dielectric thin metal oxide by spray technique. By applying this technology to the micro- and optoelectronic field, high efficiency devices such as flat panel displays, solar cells, photodetectors, light emitting diodes, and gas sensors can be developed.
Metal-oxide films (single and mixed) based on metal oxides such as Sn, Zn, and Fe were investigated. To the production we used a vertical downward liquid phase hydrolysis (spray) using a solution without previous warming up. Such an approach allows one to change the thin film properties by simple substitution of the solution in the atomizer.
A detailed investigation of the apparatus for spray technique is presented based on the influence of technological parameters (gas and solution flow rate, substrate temperature, distance between atomizer and substrate, composition by volume of solution) on the structural (x-ray and SEM analysis), electrical (resistivity, mobility, carrier concentration) and optical characteristics (refractive index, absorption, regular and diffusive reflection) of the metal-oxide films.
We developed three basic types of thin metal oxide films for different technical applications: polycrystalline transparent conductive fluorine-doped SNO2 films with a carrier concentration of more than 10 and a resistance of less than 10 Ohm X cm as a conductive electrode for optoelectronic applications; highly oriented polycrystalline intrinsic ZnO thin films with resistance of more than 400 Ohm X cm as an active layer in piezoelectric and gas sensitive devices; dielectric Fe thin films with amorphous structure as high-quality interlaminar insulant layer and element of MOS structures.
9:45 AM G5.4
DEVELOPMENT OF NOVEL LARGE AREA EXCIMER VUV AND UV SOURCES FROM A DIELECTRIC BARRIER DISCHARGE, Jun-Ying Zhang, Ian W. Boyd, Univ College London, Dept of E&EE, London, UNITED KINGDOM.
A novel large-area, high power density, high efficiency, and low cost excimer VUV and UV source, which is capable of producing providing narrow-band radiation centered around a specific wavelength tunable between the near UV ( = 354 nm) and the deep UV ( = 100 nm), is described for the first time. This new type of UV source is based on the principle that the radiative decomposition of excimer states created by a dielectric barrier discharge ( discharge) in a rare gas, such as Ar ( = 126 nm), Kr ( = 146 nm), or Xe( = 172 nm) or molecular rare gas-halide complexes, such as ArCl ( = 175 nm), KrCl ( = 222 nm), XeCl ( = 308 nm). Conversion efficiencies (from input electrical to output optical energy) as high as 22 can be achieved under optimum conditions. This powerful and economical lamp can provide a most useful UV source for low temperature photon-initiated processes. For industrial large-area processing and for the deposition of highly complex structures, the narrow band VUV and UV sources with high photon fluxes have definite advantages. Several applications of these excimer sources are reviewed, including photo-deposition of dielectric and metallic thin films, curing, surface modification, photodegradation, and etching of polymers.
SESSION G6: LIQUID CRYSTAL AND FILTER MATERIALS
Chairs: Dave Slobodin and Todd Yuzuriha
Wednesday Morning, April 2, 1997
Golden Gate A1
10:30 AM *G6.1
REFLECTIVE FLAT PANEL DISPLAY MATERIALS BASED ON LIQUID CRYSTAL-POLYMER DISPERSIONS, Greg Crawford, Brown Univ, Div of Engr, Providence, RI.
Flat panel displays have become an indispensable way to render information in any combination text, graphics, still images, and video. The necessity for thinner, lightweight, and more compact displays is primarily driven by the lucrative portable electronics market. Dispersions of liquid crystals and polymers are the front runner technology for reflective display technology because of their many positive attributes such as low power, ease of fabrication, portability, and they are adapable to flexible plastic substrates. In addition, the composite nature of these materials profoundly affects the ordering of the liquid crystal molecules and their susceptibility to external fields making them rich in physical phenomena. The presentation will emphasize the morphology and structure of polymers formed in a liquid crystal environment under various polymerization conditions, including stratified morphologies formed using conventional holographic methods. The electro-optic performance parameters will be corrleated to morphology.
11:00 AM G6.2
THE ROLE OF DISORDERED TEMPLATE SURFACES ON THE STRUCTURE AND ORIENTATION OF LIQUID CRYSTAL LAYERS, John F. Rabolt, Mei-Wei Tsao, Univ of Delaware, Dept of Materials Science, Newark, DE; William J. Miller, Univ of California-Davis, Dept of MS&CE, Davis, CA; Vinay Gupta, Nicholas L. Abbott, Univ of California-Davis, Davis, CA.
There is now emerging a view that crystalline ' 'order'' in a thin film may not be the ideal template for organization or patterning of liquid crystal layers. The challenge hence becomes one of selectively introducing disorder at a molecular level. Our approach has been to use molecular building blocks: rigid fluorocarbon helices, long flexible hydrocarbon and siloxane chains, amide groups and thiol end groups to design molecules which will self-assemble on metallic surfaces. To this end, several series of molecules have been synthesized, including thiol-derivatized PDMS and PMMA and short-chain semifluorinated thiols and disulfides. These molecules, along with their mixtures, have been self-assembled and the resulting films have been characterized by FTIR, XPS, contact angle measurements, ellipsometry and AFM with phase/amplitude detection. These well-defined surfaces were then used as alignment media for liquid crystals and a number of different aligning geometries of adjacent liquid crystal layers were found. This presentation will show that the morphology of the template layers is crucial for controlling the liquid crystal alignment processes.
11:15 AM G6.3
IMPROVING CONTRAST RATIO IN COLOR FILTERS FOR AMLCD DEVICES, Daniel Y. Pai, George J. Cernigliaro, Shipley Co Inc, Advanced Prod Res, Marborough, MA; Todd A. Richardson, Shipley Co Inc, Marlborough, MA.
The widespread use of pigmented color filters in the AMLCD Industry has focused attention on their deficiencies, which include marginal film transmittance, significant depolarization and generally poor imaging characteristics for the corresponding imaging resists. These limitations result in diminished color filter contrast and curtailed brightness for the AMLCD device. Incremental color filter contrast improvements have been generated through use of smaller pigment particles which reduce, but do not eliminate, first order light scattering. As standard pigment synthetic and grind processes give only small color contrast gains, at a cost of protracted pigment manufacture time, another route to more significant gains in color filter contrast is probably necessary. The work herein describes our attempt at defining one viable approach to real improvements in the key color filter responses of reduced depolarization and improved color contrast.
Our approach employs colorants prepared from colloidal suspensions of nanosized, monodisperse, dense silica spheres to which appropriate red, green and blue dyes are sorbed. Subsequent dispersion of each colorant nanocomposite in carrier polymer and photoimaging chemistry yields the corresponding negative-tone red, green and blue imagable photoresist. The synthesis and use of monodisperse colorant colloids has been described by Matijevic et al., for this and other related areas, but their utility is limited to applications not addressing the more advanced color filter requirements mentioned above. To those ends, our work focused on the synthesis, formulation and optical testing of nanocomposite colorant particles ranging from 10-30 nm in size, using dye chemistry which bridges compatibility between both silica nanosphere and carrier polymer, resulting in clear, highly transparent color films, Three independent optical tests comparing the color contrast of nanocomposite red films, with coatings of similar transmittance prepared from a reference red pigment dispersion, provided rationalization that light scattering is significantly reduced in the nanocomposite film, as evidenced by doubling of the color contrast ratio. Although other problems with this approach are currently being addressed, the positive gains in color contrast ratios seen for the colorant nanocomposites make likely the realization of significant improvements in luminance efficiency [Y] for color filters used in AMLCD devices.
11:30 AM G6.4
POLYACETYLENE-BASED OPTICAL FILTER MATERIALS, Ben Zhong Tang, Wan Hong Poon, Han Peng, Hong Kong Univ Sci & Tech, Dept of Chemistry, Kowloon, HONG KONG; Henry N.C. Wong, Xin-Shan Ye, Chinese Univ of Hong Kong, Dept of Chemistry, New Territories, HONG KONG; Takashi Monde, Neos Co. Ltd, Central Res Lab.
Light transmission spectra of substituted polyacetylenes continuously red-shift with increasing concentration. Changing the substituents attached to the polyacetylene backbone from aliphatic to aromatic groups can shift the cutoff wavelengths (c) of the polyacetylene solutions in the entire UV and visible spectral region. c has been found to observe a semilogarithmic dependence on the polymer concentration (c): c = logc + where and are constants. Thus the substituted polyacetyIenes represent such a group of novel materials whose optical transmission properties can be predictably "tuned" by simply changing their concentration. Unlike the unsubstituted parent polyacetylene, which is unstable and intractable, all the substituted polyacetylenes we studied in this work are stable and can form mechanically strong thin films. Because of their unique electrical and optical properties, the substituted polyacetylenes may find a wide range of applications in the electro optical industry, e.g., as large-area antistatic optical-filter coating materials.
11:45 AM G6.5
A LARGE AREA COLOR PDLC DISPLAY WITH HIGH CONTRAST AND FAST RESPONSE WITHOUT HYSTERESIS, Hongwen Ren, Qingbing Wan, Jianfeng Yuan, Ximin Huang, Kai Ma, Ruipeng Sun, Changchun Inst of Physics, Liquid Crystal Lab, Changchun, CHINA.
By choosing suitable liquid crystal materials as well as UV-curable prepolymers as a matrix, phase separation process of the mixture of liquid crystal materials and prepolymers under varied cure conditions (such as UV-light intensity cure temperature fluctuation, etc.) is studied. An excellent polymerization induces phase separation structure which is the final formation of PDLC film can be obtained by precisely controlling the cure conditions . Under this cure conditions, a 10 x1O cm effective display area PDLC film combing with color filter has been prepared. The back side near color film is coated with reflective film. When the PDLC film is in OFF state, it presents opaque intensively. When in ON state (12 voltage is applied), high purity of R. C. B three color displays can be obtained. And simultaneously its switching speeds is very fast with no hysteresis. Those film making process and testing results will be presented in our paper.
SESSION G7: FED's I
Chairs: Bruce Gnade and Gregory N. Parsons
Wednesday Afternoon, April 2, 1997
Golden Gate A1
1:30 PM *G7.1
DESIGN ALTERNATIVES FOR FIELD EMISSION DISPLAYS, Larry Dworsky, Motorola Inc, Flat Panel Div, Tempe, AZ.
The field emission display is a complex system with combined semiconductor and vacuum tube attributes. Many design decisions have secondary effects on this overall system which are often not obvious immediately. When not taken into account early in the design process, however, decisions intended to influence only one part of the display such as the cathode, the anode or the drive electronics, usually end up forcing awkward or even impossible constraints on other parts of the display. Examples of these decisions include the choice of operating anode voltage, with its effects on screen phosphor choices, package support structures, electron beam focusing, etc., and the choice of package sealing technique with its effects on temperature sensitivity of materials, gettering techniques, overall display size, ultimate package vacuum level, etc.
The purpose of this presentation is to review the fundamental structure and operation of field emission displays and then to examine some of the fundamental design alternatives and the implications of these alternatives to display performance, size and materials choices.
2:00 PM G7.2
FERROELECTRIC ELECTRON EMISSION FLAT PANEL DISPLAY, Gil Rosenman, Tel Aviv Univ, Dept of Elec Engrg-Phys Electronics, Tel Aviv, ISRAEL; Dimitry Shur, Tel Aviv Univ, Dept of Electricl Engr-Phys Electronics, Tel Aviv, ISRAEL.
Ferroelectric electron emission (FEE) is a new type of electron emission from solids. Unlike the known electron emission effects, FEE one does not need either external extraction electric field or light illumination. It occurs due to the ability of ferroelectric crystals to generate electrostatic charges and fields on their polar surfaces. Any external perturbation like temperature variation, mechanical stress or polarization reversal upsets the initial neutral charged balance and unscreened electrostatic charges (pyroelectric, piezoelectric, etc.) P appear. Estimations show that small variation of temperature about few degrees or polarization switching leads to generation of electrostatic fields on a flat ferroelectric polar surface as large as 10-10Vcm that causes field electron emission. Obviously such nontraditional conversions of external perturbation to electron emission from spontaneously polarized crystals makes it possible to develop radically new devices. Some of them were built for visualization of infrared CO laser beams, X-ray and neutron fluxes.
We developed ferroelectric flat panel display which is based on FEE under local periodical polarization reversal. Low conductivity of ferroelectrics makes it possible to retain the arising switching charge P at free polar surface just at the points where the switching occurs. Thus the obtained distribution P() ( are surface coordinates) corresponds to the distribution of the applied switching field. The switched crystal regions (domains) represent electron emission cathodes These cathodes may be individually operated by the local domain switching by using active matrices. The crystal area where a ferroelectric target may be switched practically is not limited. The presented data show that the FEE display is flat and dielectric properties of the employed ferroelectric material make it possible to build it in ''plane-to-plane'' geometry.
2:15 PM G7.3
DEVELOPMENT AND RELIABILITY ANALYSIS OF 4-INCH FULL-COLOR FIELD-EMISSION DISPLAY DEVICES, Jong M. Kim, Jin Pyo Hong, Nam S. Park, Jie H. Kang, Jung W. Kim, Jun H. Choi, Yong C. You, Youn S. Ryu, Jae E. Jang, Andrei R. Zoulkarneev, Samsung Advanced Inst of Tech, Display Materials Lab, Suwon, SOUTH KOREA.
Four-inch full-color FED devices are developed using typical Spindt microtips without a conventional resistive layer. Uniform and unique holographic lithography process is reported for the uniform microtip formation on the cathode plate, and low voltage phosphors with special surface treatments are used for anode plate. The stability of the low voltage with reliable full color images are studied. In addition, these real devices are investigated by the reliability analysis. Real panel size is 112 x 116 x 2.4 mm with 128 x 128 lines on the cathode. Each pixel is composed of 4900 tips per pixel, resulting in total number of emitters of 80 millions for color in 4'' diagonal panel. The hole size is about 1.1 0.1 m. Their related screening technologies are studied with electrical analysis. The red, green, and blue stripe widths per pixel are 120 m, 100 m, 120 m, respectively, and the gate line is 590 m in width. To seal the FED device fully, the design and process of spacer are simulated are investigated for large panel applications. The space between the cathode and anode is approximately 170 m or higher. In addition, emission profile for the color anode is well studied and the relationship between the phosphor and electron emission profile is analyzed. The anode bias of the full color panel is approximately 250 volts at anode switching The brightness at white color mode is approximately 80 cd/m. Finally, residual gas composition is also studied during the package of panel.
2:30 PM G7.4
FABRICATION AND CHARACTERIZATION OF FIELD EMITTER ARRAYS BY USING TIR HOLOGRAPHIC LITHOGRAPHY, Jun H. Choi, Jung W. Kim, Andrei R. Zoulkarneev, Jun P. Hong, Jong M. Kim, Samsung Advanced Inst of Tech, Display Materials Lab, Suwon, SOUTH KOREA.
In view of FEAs (Field Emission Arrays), hole pattern lithography is critically limiting process to fabricate FED, since this process determines the emission current and its uniformity in FEAs. The uniform hole patterning over large area is required. The conventional reduction type lithography is well developed, and is being widely used such as DRAM fabrication. However, the reduction of image field demands rigorously the required accuracy of the mechanical system over the large surface of the substrate, which is not ideal for FED fabrication.
In this article, unique TIR (Total Internal Reflection) holographic lithography is studied as a new method for FEAs fabrication. 4 basic parameters - scan speed, power of laser, focus distance, step distance - in TIR lithography are analyzed to optimize the hole patterns . The Spindt type FEAs, which have hole diameter of 1.2 m and 3 of 0.05 m by this technique are prepared and tested by SEM. And, the emission current profile on 4'' diagonal full-color FED is studied.
SESSION G8: FED's II
Chairs: Bruce Gnade and Tsu-Jae King
Wednesday Afternoon, April 2, 1997
Golden Gate A1
3:15 PM *G8.1
BAND MODEL FOR EMISSION FROM DIAMOND AND DIAMOND-LIKE CARBON, John Robertson, William Ireland Milne, Cambridge Univ, Dept of Engineering, Cambridge, UNITED KINGDOM.
There is great interest in the low electron affinity of diamond-like carbon (DLC) and diamond and their use as thin film cathodes in Field Emission Displays. However, their field emission mechanism is conterous And there is a need for an overall band model for these systems. Diamond has a low or negative electron affinity and its Schottky barriers are pinned close to its valence band edge, so that the main barrier for electrons is at the , metal/diamond contact . This barrier is greatly reduced by adding deep nitrogen donors, as their depletion layer shortens the tunneling distance, accounting for the very low emission field found by Okano . Grain boundaries in effect create a graded back contact, accounting for the increase in emission with decreasing crystallinity in CVD diamond . As DLC has narrower bandgap than diamond, its band edges lie within the diamond gap, reintroducing a barrier at the film surface but reducing it at the back. This accounts for the greater emission from undoped DLC than undoped diamond. Nitrogen doping also increases emission in DLC because N is now a shallow albeit inefficient donor, which raises the Fermi level and lowers the work function and lowers the emission barrier.
3:45 PM G8.2
ELECTRON FIELD EMISSION CHARACTERISTICS OF DIAMOND FILMS SYNTHESIZED FROM MICROWAVE PLASMA-ENHANCED CVD WITH METHANE AND NITROGEN MIXTURE, Alan R. Krauss, Dan Zhou, Argonne National Laboratory, Dept of Matls Sci & Chemistry, Argonne, IL; Timothy Corrigan, Argonne National Laboratory, Dept of Chem Technology, Argonne, IL; T. McCauley, Argonne National Laboratory, Matls Science Div, Argonne, IL; Dieter M. Gruen, Argonne National Laboratory, Dept of Matls Sci & Chemistry, Argonne, IL; R. P. H. Chang, Northwestern Univ, Materials Research Ctr, Evanston, IL; Vitaley Konov, S. M. Pimenov, A. Carabutov, Inst of General Physics, Moscow, RUSSIA; R. Fink, Dai Ishikawa, K. Morita, Nagoya Univ, Dept of Crystalline Matls Sci, Nagoya, JAPAN.
The electron field emission properties of diamond thin films prepared from CH microwave plasma-enhanced CVD have been investigated. Onset emission fields as low as 5 V m have been obtained using a parallel plate test configuration. Uniform and stable emission has been measured over the entire cathode area at current densities up to at least 0.5 m cm under a pressure of 10 Torr. By varying the deposition parameters, the emission threshold can be systematically varied from several hundred volts/m down to 5 volts/m. Secondary ion mass spectroscopy reveals that the films produced from CH and N gas mixture contain a significant amount of nitrogen, and that the retained nitrogen level strongly depends on the substrate temperature during the deposition process. On the other hand, transmission electron microscopy and electron energy loss spectroscopy demonstrate that the concentration of CH in the methane and nitrogen mixture greatly affects the microstructure of the films. The relationships between the electron field emission characteristics and the electrical conductivity, surface topography, grain morphology, and concentration of nitrogen in the films will be discussed.
4:00 PM G8.3
FIELD EMISSION FROM TETRAHEDRALLY BONDED AMORPHOUS CARBON, William Ireland Milne, John Robertson, B. S. Satyarayanan, A. Hart, Cambridge Univ, Dept of Engineering, Cambridge, UNITED KINGDOM.
The Field Emission Display (FED) has attracted much attention as one of the most promising flat panel alternatives to the active matrix liquid crystal display. A typical FED uses microcathodes made from Si or Mo tips. An alternative is to use a low work function material as the cathode. Tetrahedrally bonded amorphous carbon (ta-C) is one possible candidate. It can be deposited at room temperature using a filtered cathodic vacuum arc technique . It contains no hydrogen, unlike most conventional diamond like carbons and can have an sp bonding fraction as high as 85. The sp fraction may altered by varying the ion energy.
This paper investigates the variation of field emission from a series of ta-C films of various sp fraction. At present a typical threshold field for emission from undoped as-grown ta-C is around 15 V/m for an sp fraction of approximately 70. Nitrogen acts a donor in such a material  and the field emission as a function of nitrogen incorporation has also been investigated. As the nitrogen level increases, leading to a rise in the Fermi Level within the bandgap, the threshold field for emission reduces to approximately 2-3 V/m. As the nitrogen content in the films is increased further threshold field increases due to graphitization at high N contents.
4:15 PM G8.4
HIGH SPATIAL RESOLUTION MEASUREMENTS OF FIELD EMISSION SITE DENSITY FROM CVD DIAMOND, Willliam M. Tong, Lawrence S. Pan, Jason D. Blake, Stephen T. Bosson, Tomas E. Felter, Sandia National Laboratories, Livermore, CA.
Field emission displays are brighter, more energy efficient, and have a larger viewing angle than other approaches to flat panel displays. Interest in the use of chemical vapor deposited (CVD) diamond for field emissive displays has been motivated by observations of low threshold fields and high extracted currents. Using a point anode (50 m tip radius) translated by stepper motors (<0.l m step resolution), we have characterized the spatial distribution of emission sites from diamond films deposited by microwave CVD. Deposition parameters, such as gas composition, introduction of dopants, and substrate temperature, have been tailored to produce films with good field emission properties. We have measured threshold fields of less than 3 V/m and emission site densities in excess of 4x10. In-situ scanning electron microscopy and Auger spectroscopy were used to examine the morphological and chemical characteristics of the emitting and nonemitting sites.
4:30 PM G8.5
CHARACTERIZATION OF ELECTRON EMISSION FROM PLANAR AMORPHOUS CARBON THIN FILMS USING IN-SITU SCANNING ELECTRON MICROSCOPY, Nancy A. Missert, Thomas A. Friedmann, John P. Sullivan, Copeland R. Guild, Sandia National Laboratories, Dept 1153, Albuquerque, NM.
An understanding of the electron emission characteristics from amorphous carbon thin films is needed to assess their ability to be used in field emission flat panel displays. Electron emission characteristics combined with in-situ scanning electron microscope images have been measured on a series of amorphous carbon films grown by pulsed laser deposition. Uniform, reproducible current-voltage characteristics without morphological damage are only observed with sequential voltage ramps 5 V/sec for anode-cathode gaps of 10 - 200 m. The field threshold and emission barrier increase with laser energy density used during film growth. This dependence of emission parameters on film growth conditions appears to be correlated with the presence of conducting filaments extending through the film thickness.
4:45 PM G8.6
FIELD EMISSION ENHANCEMENT OF Mo TIP EMITTERS COATED WITH NITROGEN CONTAINING AMORPHOUS DIAMOND FILMS, Ming Q. Ding, North Carolina State Univ, Dept of MS&E, Raleigh, NC; A. F. Myers, NIST, Gaithersburg, MD; W. B. Choi, S. M. Camphausen, Jagdish Narayan, Jerome. J. Cuomo, J. J. Hren, North Carolina State Univ, Dept of MS&E, Raleigh, NC.
Our previous studies have shown that a-D films can be deposited on sharp Mo tip emitters by pulsed laser ablation, to achieve a substantial improvement in field emission. As a continouus study, we have investigated field emission performance of Mo tip emitters coated with nitrogen pressure of 5x10 Torr with a laser fluence of 25 J/cm. XPS measurements made on flat Si substrates showed that nitrogen atomic concentration in the films was about 10. High resulution TEM imates revealed that the films had a nanocolumnar microstructure and that the film at the tip was denser than that of the shank, which was similar to that observed from the amorphous diamond films. Field emission measurements from Mo tip emitters with the nitrogen doped a-D film indicated a much greater enhancement in turn-on voltage and emission current as compared with that of the a-D film coated Mo tip emitters. Such an improvement in field emission may be ascribed to a shallow N donor level in amorphous diamond environment.
OUTSTANDING YOUNG INVESTIGATOR
5:00 PM *G8.7
POLYMERIZATIONS AND PROPERTIES OF POLYMER STABILIZED FERROELECTRIC LIQUID CRYSTALS, Christopher N. Bowman, Univ of Colorado, Dept of Chemical Engr, Boulder, CO.
Polymer stabilized liquid crystals (PSLCs) have shown great potential in electro-optic and display technology. The polymer network introduced in the liquid crystal matrix dramatically increases the mechanical stability, but may also detrimentally affect other important properties. It is therefore desirable to understand how the polymer changes electro-optic and phase behavior and also how the liquid crystal influences the polymerization. This presentation will examine both the electro optical properties of polymer stabilized ferroelectric liquid crystals (PSFLCs) and the photopolymerization behavior of diacrylate monomers in a ferroelectric liquid crystal matrix. Electro-optical properties change significantly in PSFLCs and depend on the amount of monomer, the type of monomer, and the phase in which the polymerization is performed. Both ferroelectric polarization and switching speed decrease in PSFLCs; however, the magnitude of the decrease is highly dependent on the monomer and on the LC phase and temperature at which polymerization occurs. Interestingly, the polymerization behavior is also dramatically affected by the LC phase. The polymerization rate for both amorphous and mesogenic monomers dramatically increases as the temperature decreases and the order of the LC phase increases. The reasons for this rate increase, however, are not the same for both types of monomer. The rate of termination decreases for amorphous monomers in the LC media, whereas both termination and propagation increase for liquid crystalline monomers. These differences will be explained through an understanding of diffusion controlled steps in the polymerization as well as by monomer segregation in the LC environment.
SESSION G9: POSTER SESSION: NOVEL MATERIALS AND PROCESSES
Wednesday Evening, April 2, 1997
ELECTRO-OPTIC PROPERTIES FOR REVERSE MODEL POLYMER STABILIZED CHOLESTERIC TEXTURE (PSCT) SHUTTER, Qingbing Wang, Yanqing Tian, Changchun Inst of Physics, Liquid Crystals Lab, Changchun Jilin, CHINA; Ruipeng Sun, Changchun Inst of Physics, Liquid Crystal Lab, Changchun, CHINA; Xinbin Shao, Zongkai Wang, Zhenjun Ma, Changchun Inst of Physics, Liquid Crystals Lab, Changchun, CHINA; Ximin Huang, Changchun Inst of Physics, Liquid Crystal Lab, Changchun, CHINA.
Traditional polymer dispersed liquid crystal (PDLC) generally only operated in normal model, transparent only when field-on and scatting in field-off, and moreover, PDLC film always exhibit hazes in wide view angles. Z.K.Yang reported a new method of making haze-free shutter by putting cholesteric LC into polymer gels named polymer stabilized cholesteric texture (PSCT). The reverse model PSCT device is transparent at zero field and scatting when a field applied and haze free for all viewing angled . In our experiment, reverse model PSCT was obtained by doping small amount (15) diacrylate monomer in a short pitch (1.5m) cholesteric LC and polymerized in planar state. The shutters are stabilized by polymer network and the alignment layers and show transparent at zero state. We investigated effects of the content of polymer and different pitches of LC material on E-O properties of PSCT shutters. The detail results will be presented. In our studies, we found that the reverse model PSCT shutters had a memory state (scatting) after a high pulse was applied, then the shutter became normal model and showed scatting at field-off and transparent at field-on, but the operate voltage is some higher. At last, we present a reverse model PSCT shutter with good E-O properties, low operate voltage of 6 V, and high contrast ratio.
THE DEPENDENCE OF PHASE SEPARATION MORPHOLOGY OF PDLC ON THE SAMPLE PREPARATION CONDITIONS OF TFT LCD PANEL, Changho Noh, J. E. Jung, S. J. Lee, Y. W. Jin, S. J. Im, K. S. Park, D. S. Sakong, Samsung Advanced Inst of Tech, Display Lab, Suwon, SOUTH KOREA.
We have improved the electro-optical properties of PDLC material system by optimizing synthetic conditions like PDLC structure and formulation. Our PDLC materials have low saturation voltage, high contrast ratio and high reliabilities for the long-term duration test. But there are some problems remained especially for applying to TFT LCD panel, TFT LCD panel structure is different from the transparent ITO glass panel because TFT LCD panel has many opaque parts such as transistor elements, metal electrodes and black matrix. Opaque parts of TFT panel shield UV light and result in quite different PDLC phase separation behaviors from the cases of the transparent ITO glass cell.
It is necessary that we have to control sample preparation conditions which are different from transparent ITO glass cell preparation method. Changes of uv intensity and photoinitiator species were effective to obtain good results from the TFT LCD panel. We will also discuss phase separation behavior's differences and physical property changes of LC between TFT panel and ITO glass cell according to sample preparation conditions.
TRANSPARENT CONDUCTOR FOR FLEXIBLE FLAT DISPLAYS, Maxim M. Sychov, Natalia A. Stepanova, Sergey S Ryasancev, Oleg Yakunichev, Olga A. Cheremisina, Vladimir G. Korsakov, Inst of Technology, St Petersburg, RUSSIA.
At present flexible flat EL and LC displays based on polymer substrates have a large number of uses. The advantages of such type displays are the low weight and increased resistance to mechanical stresses - impacts, bends and vibrations. One of the most important problems of manufacturing of flat panels is to obtain a transparent electrode on the polymer substrates.
In this work we suggest TiN thin films as transparent conductor. 4s and 3d bonds of TiN are overlap that furnishes its high metal type conductivity - about 10 Mho/m. The polymer substrates (polymethyl methacrilate, dacron) were covered with TiN thin film by magnetron spattering in NH atmosphere. The thickness of the films was 200-400 nm. The investigations carried out allowed to optimize the covering process and obtain films with light-transparency more than 90. The films produced have high adhesion to the polymer substrates and high chemical resistance. The obtained samples were used in producing of the flexible EL panels. The panels have high flexibility and admit bends around cylinder with radius of 1 cm. The cost of TiN thin films obtaining is less than one for ITO and SnO, and technology allows to obtain samples with large area - 1 m and more.
THE CHARACTERIZATION OF AlO FILMS GROWN BY ATOMIC LAYER DEPOSITION USING Al(CH) and HO, Sun-Jin Yun, ETRI, Matls Tech Research Section, Daejon, SOUTH KOREA; Jarmo Skarp, Microchemistry Ltd, Espoo, FINLAND; Joong-Whan Lee, Electronics & Telecommunications Res Inst, Matls Technology Res Sec, Taejon, SOUTH KOREA; Hae-Rim Kim, Electronics & Telecommunications Res Inst, Semiconductor Technology Div, Taejon, SOUTH KOREA; Kyung-Ho Lee, Eaton Korea Ltd, Semiconductor Equipment Div, Seoul, SOUTH KOREA; Kee-Soo Nam, Electronics & Telecommunications Res Inst, Semiconductor Technology Div, Taejon, SOUTH KOREA.
Aluminum oxide (AlO) has become one of the attractive dielectric materials for electroluminescent display and microelectronic devices. In this work, AlO films were grown on Si(100) substrate by traveling wave reactor atomic layer deposition (ALD) which is the most promising technique to deposit a conformal layer covering even very severe morphology. The precursors were Al(CH) and HO. The AlO films were characterized using x-ray diffraction, secondary ion mass spectrometry (SIMS), x-ray photoelectron spectroscopy, and spectroscopic ellipsometry.
The AlO films were amorphous in the growth temperature ranging from 250 to 400C. The SIMS data showed that the content of H and C in the films decreased as increasing the growth temperature. The refractive index increased as increasing the growth temperature. The refractive indices were in the range of 1.64 -1.68. The rough estimation using SIMS data and refractive indices indicated that the H-content decreased to approximately 50 as increasing the substrate temperature from 250 to 400C. The characterization data of the AlO films grown using AI(CH) will be compared to those of the films grown using AlCl.
CHEMICAL VAPOR DEPOSITION OF METAL SULFIDE FILMS, Mark J. Hampden-Smith, May Nyman, Guihua J. Shang, Univ of New Mexico, Dept of Chemistry, Albuquerque, NM.
Metal sulfide films are used in a wide variety of applications including in solar cell technology as optical coatings, as host lattices for luminescent materials in flat panel displays, and as passivating agents for metal alloy surfaces. In all these cases, it is necessary to deposit metal sulfide films with a high level of control over stoichiometry, composition, crystallinity and purity. We are developing a number of general strategies to solve these problems focusing on the development of a new class of compounds, metal thiocarboxylates, and employing aerosol delivery routes to control composition. The metal thiocarboxylates undergo a clean, surface initiated thiocarboxylic anhydride elimination reaction according to the example in equation 1, which gives high purity, controlled composition metal sulfide films at low temperatures: M(SOCR) - MS + (RCO)S + nL (1). The first single-source precursors have been synthesized that deposit films of Group 2, 12 and 13 metal sulfides. In addition, complex metal sulfides have been deposited including metal thiogallates and doped ZnS. Our approach involves first understanding how to deposit the metal sulfide matrix and then the deposition of doped metal sulfide films. This talk will review some of our work in this area.
ANNEALING CHARACTERISTICS OF ELECTRON BEAM EVAPORATED MAGNESIUM OXIDE THIN FILM, Young Cheul Kang, Byung Hak Lee, Jun Bai Baik, Samsung Display Devices Co Ltd, Display R & D Center, Suwon, SOUTH KOREA.
The effect of the annealing characteristics of MgO thin film, which is used as a protecting layer and known to play an important role to lower the firing voltage in AC plasma displays, was investigated experimentally. The samples were deposited on glass substrates by an electron beam evaporation method. The thickness of MgO films deposited at the temperature of 200É was about 5,000Ê. Samples were annealed at various temperatures higher than 350É with varying heat treatment time. The characteristics of the crystallization and surface morphology of MgO films were changed by various annealing conditions, confirmed with X-ray diffraction(XRD) method and scanning and transmission electron microscopes(SEM & TEM). MgO film with the preferred crystalline direction of 111 was created with 2 hours of annealing at 550É with 220 preferred direction of as-deposited samples. Increasing the annealing time, the intensity of the XRD peak of 111 and the crystalline grain size of MgO increases. With the favorable crystalline directional change and the decrease in grain boundary area, it is considered that the characteristics of firing voltage of the plasma display panel can be improved with appropriate annealing process.
SOME NEW CHIRAL 4,5-DIALKOXY-2-PHENYLPYRIMIDING LIQUID CRYSTALLINE DISPLAY MATERIALS, Wangfang Lu, Y. J. Shang, Nanjing Univ, Dept of Chemistry, Nanjing, CHINA; Youdou Zheng, Nanjing Univ, Dept of Physics, Nanjing, CHINA; Y. M. Lu, H. Ding, Shanghai Inst of Organic Chemistry, Shanghai, CHINA.
Twenty Chiral 4'5-dialkoxy-2-phenylpyrimidines have been synthesized. One of the two alkoxy groups in these compounds is the chiral (s)-(-) CHCH(Me)CHO and another is an achiral, the -OR(C C) or the -OCHCHOR (C,C,C), respectively. Thus, these compounds prepared may be divided into the following for homologous series: R*OP-POR(I), ROP POR*(II), R*OP-POCHCHOR(III) and ROCHCHOP-POR*(IV). The total 13 compounds of II, III, and IV are all new liquid crystals, most of which exhibit SC* Phases at just above room temperature, and some have a N*-SA-SC* phase order. In this paper, the synthesis procedure, the structure analysis data and the phase behavior of title compounds are offered, and the effect of terminal group's structure and position in the molecule on phase properties is discussed.
PHASE EQUILIBRIA AND PROPERTIES OF TRANSPARENT CONDUCTORS IN THE INDIUM-TIN-ZINC OXIDE SYSTEM, George Bruce Palmer, Kenneth R. Poeppelmeier, Northwestern Univ, Dept of Chemistry, Evanston, IL; Thomas O. Mason, Doreen Edwards, Northwestern Univ, Dept of Matls Science, Evanston, IL; Toshihiro Moriga, Tokushima Univ, Dept of Chemical Sci & Tech, Tokushima, JAPAN.
The In-SnO-ZnO system was mapped using x-ray powder diffraction and electron microprobe analysis. Several new transparent conducting oxides (TCOs) were identified. Optical and electronic properties were compared to bulk samples of Sn-doped In (ITO). Reduction and heat treatment had significant effects on optical and electronic performance of these TCOs, indicating optimization of processing conditions will be required for industrial applications. Bulk ITO has a 5 cation solubility limit of SnO. Cosubstitution of ZnO and SnO in In dramatically increases the solubility limit to 30 cation dopants. This is because the combination of +2 and +4 dopants in equal amounts allows the structure to retain the same cation/anion ratio as in In. The new TCO shows optical and electronic properties similar to ITO, making it a promising possibility for commercial development. Comparison of optical and electronic properties in the series of compounds: (ZnO), x = 3,4,5,7,11 reveals trends caused by structural figures. These compounds consist of alternating slabs of In and (ZnO). The optical properties improve with higher amounts of ZnO. The electronic properties improve with lower amounts of ZnO. This suggests the In layers are the pathway for electrical conduction. The ZnO layers remain undoped and improve the optical properties of the compounds at the expense of lower conductivities (compared to ITO). The smooth trends in optical transparency and electronic conductivity suggests these materials may be useful for specialty device applications where it is desirable to tune electronic versus optical properties in phase pure materials. Significant amounts of SnO can be doped into the layered Zn/In oxide compounds. This is explained by cosubstitution of ZnO and SnO into the In intergrowth layers.
NANOMETER-SCALE INVESTIGATION OF Al-BASED ALLOY FILMS FOR THIN-FILM TRANSISTOR LIQUID CRYSTAL DISPLAY ARRAYS, Hiroshi Takatsuji, IBM Japan Ltd, Dept of Display Technology, Shiga-ken, JAPAN; Hideo Liyori, IBM Japan Ltd, Yamato Lab, Kanagawa, JAPAN; Satoshi Tsuji, IBM Japan Ltd, Display Technology, Kanagawa, JAPAN; Katsuhiro Tsujimoto, ITES Co Ltd, Shigaken, JAPAN; Koutarou Kuroda, Hiroyasu Saka, Nagoya Univ, Dept of Quantum Engr, Aichi-ken, JAPAN.
Aluminum alloy added rare earth metals (Al-Y, Al-Nd, Al-Gd) attracts attention for gate and source electrode bus-lines in this film transistor liquid crystal display (TFT-LCD) arrays. These alloys are superior to pure Al in the high resistance of stress migration such as hillock generation. Several studies concerned with high content (more than 2 atomic ) of rare earth metal elements have been reported. However, the most serious concern is the high resistivity of these alloys due to the high content of rare earth metal to improve the resistance of stress migration. Accordingly, to decrease the resistivity of these alloys thin films, heat treatment are required after wiring forming. The resistivity of these alloys depends on the heat treatment, and the resistivity can be lowered in making a heat-treatment temperature high, but the stress increase. In this study, the nanostructures of various Al-based alloys thin films of relatively low content (0.2-1.9 atm.) with rare earth elements sputter-deposited on LCD grade glass substrate have been investigated by atomic force microscopy (AFM) and cross-sectional transmission electron microscopy (TEM). The morphology of as-deposited and annealed films are characterized in detail by AFM. X-TEM observation reveals the segregation of rare earth elements due to heat treatment. In the case of adding Nd, the grain nanostructure changes dramatically in the low range content. Electrical properties of these films are also discussed.
ULTRASOUND TREATMENT: NEW PROCESSING FOR LARGE-SCALE FLAT PANEL DISPLAYS, Andrei Aleinkov, Yaroslaw Koshka, Sergei Ostapenko, Univ of South Florida, Ctr of Microelectronics Research, Tampa, FL.
UST technology - methodology and apparatus - were developed to benefit processing of large-scale flat panel display materials. UST method is based on non-contact generation of low-amplitude ultrasonic vibrations into a thin film on glass using a piezoelectric UST transducer. A computer controls `'in-situ'' and adjusts UST parameters (amplitude, frequency, and temperature) operating in a feedback loop with non-contact UST probe and non-contact temperature sensor. Computer-controlled UST station is designed for processing of large-scale wafers by delivery a homogeneous distribution of UST amplitudes and temperature. The UST station is capable for treatment of 3" to 14" diagonal samples and it can be easily scaled up by adding ultrasound transducers. UST approach utilizes a fundamental concept in solid state technology: possibility to enhance an interaction between point defects and extended lattice defects, such as dislocations, grain boundaries, precipitates. It was demonstrated a utility of UST processing for the hydrogenation improvement in polycrystalline Si thin films on glass for AMLCD applications. UST at temperatures lower than 100C promotes a dramatic reduction of film electrical resistivity as well as the increase of photoluminescence efficiency. The hydrogen passivation of grain boundary defects was directly observed by using nano-scale atomic force microscopy. A suggested UST mechanism involves three consecutive steps: (a) UST release of the trapped atomic hydrogen from electrically non-active state; (b) hydrogen diffusion by the interstitial mechanism, and (c) the capture of hydrogen at Si dangling bonds in the vicinity of grain boundaries and interfaces.
DYNAMICS OF A PLASMA PANEL DISCHARGE: CURRENT WAVEFORM AND OPTICAL EMISSION, Shan Ambalanath, Alvin D. Compaan, Alex Shvidky, Francesc Salvat, William Williamson, Univ of Toledo, Dept of Physics & Astronomy, Toledo, OH.
We have studied simultaneously the current pulse and the time-resolved optical emission from a monochrome ac plasma panel with time resolution better than 20 nsec. The current waveform shows a displacement current pulse followed by the discharge pulse. For ac driving frequencies of 5 to 50 kHz and driving voltages somewhat above threshold, the discharge pulse rise time is about 25 nsec with a decay time of about 300 nsec. The time-resolved optical emission signal could be obtained from a single pixel and spectrally isolated to any one of several strong emission lines. For a He gas fill, the optical emission at 668 nm closely follows the discharge current with a somewhat sharper rise and much sharper fall. The results of both the discharge current waveform and the optical emission signals are compared with theoretical modeling of the discharge. The discharge model is based on a fast algorithm developed by relatively new computational procedures which are applied to a local-field approximation for the plasma in the discharge pulse.
ALUMINUM METALLIZATION FOR FLAT PANEL DISPLAYS, Joo-Han Kim, Univ of Michigan, Dept of EE&CS, Ann Arbor, MI; Jerzy Kanicki, Univ of Michigan, Ctr of Microelectronics Research, Ann Arbor, MI; Willem den Boer, Optical Imaging Systems Inc, Northville, MI.
Aluminum (Al) has a major shortcoming of hillocks and whiskers formation which results in gate-line failure and lower flat panel display production yield. To reduce this problem, three methods have been proposed: (a) addition of impurities; (b) capping Al with another film; (c) anodic oxide formation. In the present study, we have adapted the latter to suppress hillocks and whiskers formation without sacrificing low resistivity of Al. The film was sputtered on 1.4 m thick thermal SiO on silicon substrates, then taper etched in the HNO with commercial Al etchant type A. The taper etch profile was controlled by etching solution temperature and the etchant composition. The tapered slopes were observed by SEM. As HNO content increased, Al etch rate increased and taper slope decreased at the same time. Aluminum oxide (AlO) layer was grown by anodic oxidation in the ammonium tartrate solution using computerized anodization setup over taper patterned Al film.
SESSION G10: POSTER SESSION:
EMISSIVE DISPLAYS AND MATERIALS
Wednesday Evening, April 2, 1997
SPUTTER DEPOSITION OF NANOCONES FOR FIELD EMISSION, Alan F. Jankowski, Lawrence Livermore National Laboratory, Dept of Chem & Matls Science, Livermore, CA; Jeffrey P. Hayes, Lawrence Livermore National Laboratory, Dept of Mechanical Engr, Livermore, CA.
Deposition into micron-sized holes is known to produce cone shapes as supported on substrates. Potential uses for the cones include field-forming devices as field ionizers and field emission cathodes. The application of such devices include flat panel displays and flash x-ray tubes. Process iterations to closely space arrays of sharp cones have been extensively documented during the past two decades using the physical vapor deposition method of evaporation. Sputter deposition is well known as a method to fill holes and trenches but has only recently been demonstrated as an alternative method to produce field emission cathodes. In a further reduction in size, we have been successful in demonstrating the ability to deposit a cone shape into a cavity with a 300nm diameter hole. Through comparison to the results of electron-beam evaporative deposition, a sputter deposited nanocone appears to be suitable for use as a field emission cathode. This work was performed under the auspices of the United States Department of Energy by Lawrence Livermore National Laboratory under contract W-7405-Eng-48.
PROFILE SIMULATION OF REACTIVE ION ETCHING FOR SILICON TIP-ON-POST AND BOTTLE-NECK STRUCTURES IN FED APPLICATIONS, Andrei R. Zoulkarneev, Jong M. Kim, Jun H. Choi, Samsung Advanced Inst of Tech, Display Materials Lab, Suwon, SOUTH KOREA.
This article describes an investigation of the reactive ion etching for silicon tip-on-post and bottle-neck structures used for fabrication of matrix cathodes for flat panel displays. The analytical study by an angular distribution of incident ion beam is presented for temporal profile simulation of silicon structure. The simulations are compared with experimental results. This comparison shows that the angular distribution matches to the incident ion flux for tip-on-post and bottle-neck structure. Reactive ion etching (RIE) is commonly used for fabrication of this structures. Understanding of BRIE through the simulation is one of the main goals of this work. We present numerical simulation by profile evolution during RIE process, based upon an original angular distribution of incident ion flux , = (1) where is Maxwellian distribution, is perpendicular velocity due to self-bias voltage in sheath region in RIE system and is number of ions arriving to the sidewall under the overhanging mask at angle . This angular distribution can be implemented to other structures like deep shadowed trenches or cavities and others with another lower limit in (1).
Experimental RIE process for testing include two steps: the isotropic etching process with parameters: pressure = 100 mTorr, power = 400 Watt at 13,48 MHz, mass flow of CF = 100 sccm, O = 10 sccm; and anisotropic process with parameters: pressure = 5 mTorr, power = 600 Watt, mass flow of CF = 50 sccm, 0 = 5 sccm . Si-wafers has structure: Si-DLC-Cr. Cr film had been etched-back after RIE.
SCANNING TUNNELING-FIELD ELECTRON EMISSION MICROSCOPE FOR DIAMOND COLD CATHODE STUDIES, F. V. Frolov, Alexander V. Karabutov, Vitaley Konov, M. S. Nunuparov, S. M. Pimenov, Inst of General Physics, Moscow, RUSSIA; I. A. Leontiev, DiaGasCrown Ltd, Moscow, RUSSIA.
A specially designed, high vacuum scanning tunneling-field electron emission microscope has been developed. It is capable to obtain three surface maps at the same place, namely:
i) local field electron emission intensity distribution,
ii) work function distribution, and
An exact comparison of the surface distributions of electron emission intensity, work function and topography allows to study the surface inhomogeneities of electronic and structural properties, geometrical and energy barrier characteristics of field electron emission centers to examine different mechanisms of low field electron emission. Wide range of voltage applied allows to investigate semi-insulating objects, including diamond films. Some results of such investigations for diamond films are discussed. It was found that field emission centers for films studied are not associated with tips of crystallites and often correspond with world function minima located in a topography pits.
MODEL FOR A FIELD-TUNED ELECTRON SOURCE USING A M-S(DIAMOND)-I(DIAMOND) COLD CATHODE, Paul H. Cutler, Peter Lerner, Nicholas M. Miskovsky, Pennsylvania State Univ, University Park, PA.
There is much interest in the development of thin-film field electron emitters using diamond and other wide-band-gap semiconductors for application in FED and at high frequency . Geis et al.  have fabricated such a device which has a threshold gate voltage of less than 8 V. A Fowler-Nordheim (FN) plot is essentially linear. To explain the observed emission at low applied fields, Geis et al. proposed a multistep model. The present authors extended and refined this model. It can be described by the following 3-step process: (1) Electrons are injected from the metallic substrate through the interface into the conduction band and/or impurity (defect) bands of diamond (semiconductor) film. (2) These carriers are transported through the film under the action of an internal field. In the case of diamond and GaN, such transport is quasiballistic . (3) The presence of a stable NEA or a small positive electron affinity allows for emission of electrons into vacuum with little or no electric field. The limiting process for emission is the efficiency of electron injection. The properties of the interface depend mainly upon the substrate (metal, n doped semiconductor, etc.), the doping level in the semiconductor, and the surface roughness at this contact. In the present work, this model has been modified with an intrinsic diamond layer coating the Nitrogen-doped diamond to field accelerate the electrons before emission at the insulator-vacuum interface. Model calculations of the I-V characteristics and the feasibility of this device to produce a field tuned electron beam with a narrow energy spread will be discussed.
THE DRIVING PULSE WIDTH DEPENDENCE OF THE HYSTERESIS EFFECT IN ZNS:MN ELECTROLUMINESCENT DEVICES: A POSSIBLE ADDRESSING METHOD FOR MEMORY TFEL DISPLAYS, Andy Y.G. Fuh, National Cheng Kung Univ, Dept of Physics, Tainan, TAIWAN.
Pronounced hysteresis effect was observed in the brightness versus pulse width response of memory electroluminescent ( EL ) devices driven near the threshold voltage. The use of this hysteresis effect to address memory type EL displays is suggested and easier to implement. The display can produce a reasonable brightness, while driven near the threshold voltage. A benefit of this technique is that the display is always operated near threshold with a relatively low dielectric stress. Longer device life is therefore expected.
Zn AND Sn - BASED THIN-FILM FIELD-EMISSION DISPLAY PHOSPHORS DEPOSITED BY RF SPUTTERING, Andrei G. Chakhovskoi, Charles E. Hunt, Univ of California-Davis, Dept of E&CE, Davis, CA; Vyacheslav D. Bondar, Lviv State Univ, Dept of Physics, Lviv, UKRAINE; Tomas E. Felter, Michael E. Malinowski, Sandia National Laboratories, Livermore, CA .
The choice of suitable phosphor materials for application in field emission displays (FEDs) is currently one of the key factors which will determine the future success of this flat panel display technology. A proper phosphors have to operate at excitation voltages accessible in a flat panel display and, at the same time, be compatible with the field emission array (FEA). In this work, a large group of candidate phosphors for application in FEDs are examined. Thin films of Eu and Zn activated SnO2, ZnO:Zn:Eu and ZnGa2O4 are deposited using RF diode or magnetron sputtering on quartz substrates. Depending on deposition technique and subsequent annealing in the temperature range from 450 to 900 ° C, the brightness and the output color of the thin films vary. Films with red, purple, blue, light blue and green output color are fabricated. Sample screens with the phosphor coated area from 0.25 to 1 cm2 are prepared. Screens are tested with an electron gun at screen currents up to 50 µA and acceleration voltages between 200 and 8,000 V. The luminance and the chromaticity of the phosphors are studied as a function of both anode current and acceleration voltage. Brightness up to 1300 candelas per square meter is achieved. The characteristics of the phosphors are compared to those obtained from standard cathode ray tube screens.
RARE EARTH DOPED POROUS SILICON PREPARED BY ELECTRO-CHEMICAL METHOD, W. H. Zheng, Hong Kong Baptist Univ, Dept of Chemistry & Physics, Kowloon, HONG KONG; M. L. Gong, Hong Kong Baptist Univ, Dept of Chemistry, Kowloon, HONG KONG; D. L. Lian, Hong Kong Baptist Univ, Dept of Physics, Kowloon, HONG KONG; W. K. Wong, Hong Kong Baptist Univ, Dept of Chemistry, Kowloon, HONG KONG; Kok Wai Cheah, Hong Kong Baptist Univ, Dept of Physics, Kowloon, HONG KONG.
We have carried out an investigation of the electrochemical doping of porous silicon with rare earth elements which are Er, Pr, and Ho. Er was chosen for the main material of our work as it is the best characterized of the rare earth ions in Si. Porous silicon (PS) was fabricated from both n type and p-type silicon wafers by mean of electrochemical anodization in hydrofluoric acid. The method of low constant current or voltage electrochemical doping is used to inject the rare earth element into porous silicon. Moreover, photoluminescence (PL) in visible range showed a clear blue shift after doping.
Typically porous silicon was fabricated from n-type silicon wafer in 1:1 of volume ratio of 50 wt HF acid to pure ethanol (98), the current density was 20 mA/cm and the etching time is 30 min. Then a thin layer of the rare-earth metal was coated onto the surface of porous silicon by means of low constant current or voltage electrochemical doping. The constant current is in the range of 0.15 mA/cm to 1.5 mA/cm, and the constant voltage is from 4 V to 8.8 V. Doping time is from 10 min to two hours. X-ray Photoelectronic Spectroscopy (XPS) showed that at least 3 percentage concentration of rare earth element has been incorporated into porous silicon layer. In the doping process, the pH of electrolyte must be over than two in order to have successful doping. We attributed this to H ion which quench the PL intensity and compete with rare earth ions in the electrochemical process. Therefore, a special electrolyte was selected to decrease the chemical reactivity of H. After that, the doped porous silicon was annealed by Rapid Thermal Oxidization ( RTO). Furthermore, luminescence is observed around 1.54 m and is assigned to optical transitions from intra-4f energy levels. In conclusion, by choosing certain electrolyte, we successfillly doped rare earth elements into porous silicon by electrochemical method.
SYNTHESIS OF SULFIDE-BASED PHOSPHORS USING RAPID EXOTHERMIC REACTION TECHNIQUES, Carlos F. Bacalski, Univ of California-San Diego, Dept of Applied Mech & Engr Sci, La Jolla, CA; Indrakanti S.R. Sastry, Univ of California-San Diego, Dept of Matls Science, La Jolla, CA; Joanna M. McKittrick, Univ of California-San Diego, Dept of Applied Mech & Engr Sci, La Jolla, CA.
Sulfide based phosphors exhibit high cathodoluminescent efficiencies and brightness and are of particular interest for use in display devices. Typical synthesis routes involve reacting precursors at high temperatures (900C), often under a HS stream, for several hours. Novel techniques utilizing alternate reaction pathways are being explored in order to reduce processing times. Two potential methods are combustion synthesis of metal nitrate/fuel mixtures and rapid metathesis reactions between metal chlorides and sodium sulfide. Both techniques are driven by highly exothermic reactions which raise the temperature enough to promote solid-state reactions. These techniques have been used to synthesize green emitting SrGa:Eu and blue emitting ZnS:Ag,Cl.
MICROSTRUCTURE AND LUMINESCENCE PROPERTIES OF ZnS:Cu POWDERS AND ELECTROLUMINESCENT LAMPS, Luigi Sangaletti, Univ di Brescia, Dipart di Chimica e Fisica Materiali, Brescia, ITALY; Laura E. Depero, Univ di Brescia, Dept di Chimica e Fisica per i Materiali, Brescia, ITALY; Livio Antonini, Roberto Fantini, ELCOM Laboratories, Nave, ITALY; Marco Bettinelli, Univ di Verona, Istituto Policattedra, Verona, ITALY.
Electroluminescent (EL) devices based on ZnS phosphor materials in the form of thin and thick films represent an area of increasing technological and market interest for electronics, nautical, aeronautical, and automobile industries. The future market of these systems will depend on the capability to increase their halflife and brightness and to produce high quality ZnS based powders. The size and microstructural properties of ZnS powders can dramatically affect the performance of EL lamps. The present study reports on a microscopy and diffraction study of commercially available Cu-doped ZnS powders, along with an optical spectroscopy study of EL lamps fabricated with these powders. The results allow to identify a correlation between the microstructure and the optical properties (i.e., photoluminescence) of the ZnS powders. It is found that the best powders for EL lamps are those displaying a prevalent cubic, i.e. zincblend, structure, while the poor performances of the mixed phase (cubic + hexagonal) are tentatively ascribed to the quenching of luminescence due to the defects introduced in the cubic structure by stacking faults along the <111> direction, resulting in a considerable amount of hexagonal phase, as detected by XRD. The mostly cubic powders have been selected to realize EL lamps. The optical properties of these lamps have been investigated by photoluminescence and electroluminescence spectroscopes with the aim to identify the degradation mechanisms leading to a decrease of brightness. The results show that the spectral features are not affected by aging, but the measured reduced brightness seems to indicate that additional quenching of luminescence is induced by degradation on a microscopic scale of the active layer an the lamps.
ELECTRON FIELD EMISSION FROM CALCIUM CARBONATE WHISKERS COATED WITH A THIN LAYER OF GOLD, Dan Zhou, Dieter M. Gruen, Alan R. Krauss, Argonne National Laboratory, Dept of Matls Sci & Chemistry, Argonne, IL; Liqing Wen, Carlos A. Melendres, Argonne National Laboratory, Dept of Chem Technology, Argonne, IL.
We present cold cathode electron emission results for CaCO whiskers coated with a thin layer of Au. The CaCO whiskers were grown on a Ni substrate by the electrochemical deposition from a mixture of CaCl, MgCl, and NaHCO in ultrahigh purity distilled water. After growth, a 100 thick gold layer was deposited onto the whiskers by a sputtering method. The morphology and the crystalline structure of the CaCO whiskers with gold coating were examined by SEM, EDS, TEM and XRD. The electron field emission characteristics of the samples were investigated using a parallel plate electrode geometry with a 100 m gap between the anode (tip) and cathode (sample) with an applied potential up to 1500 volts. Without the gold coating, no emission was observed. With the coating, the emission threshold was found to be 3 V/m, based on the parallel plate geometry, although there is significant field enhancement at the emitting surface associated with the whisker structure. Electron emission was measured up to a current density of 0.5 m/cm, and was found to be very stable. The deposition method provides a simple, reliable, inexpensive means of producing uniform large area cold cathode electron emitters for applications to devices such as flat panel displays.
REGULAR ZnS NANOSIZE DOTS ARRAYS FORMED IN POROUS ALUMINUM ANODIC OXIDE FILMS, Nikolai Korkin, Belarusian State Univ, Dept of Microelectronics, Minsk, BYELARUS; Victor Surganov, Alexander Poznyak, BSUIR, Dept of Microelectronics, Minsk, BYELARUS.
Nanometer size structures are becoming very perspective materials for physics and chemistry, optics, electronics and nanotechnology because they show to exhibit exotic electrical and optical properties, chemical reactivities. Anodic alumina films (AAF) with regular porous structure are very attractive for using as a matrix to form quantum size dots arrays of different materials (metals, semiconductors, dielectrics). This paper presents novel regular nanosize dots arrays of zinc sulfide formed in pores of AAF by electrochemical techniques. Experimental samples were silicon wafers with aluminum layer deposited by magnetron sputtering. Anodic alumina matrix films were formed in phosphoric and tartaric acid aqueous solutions under a constant current density. ZnS nanosize dots arrays were formed in the pores of AAF by alternative current deposition process in aqueous solution based On ZnSO and Na components. Composition anal luminescence properties of experimental samples prepared were studied. Electron-probe analysis and x-ray diffraction measurements carried out show that material which was deposited in pores of AAP is a modification of ZnS. Intensive luminescence at wavelength of 490 nm was established under photo-excitation by ultraviolet light.
SITE-DEPENDENT PHOTOLUMINESCENCE AND DEGRADATION OF SrS:Ce, D. R. Tallant, Carleton H. Seager, K. Vanheusden, W. L. Warren, Sandia National Laboratories, Albuquerque, NM; J. A. Tuchman, S. D. Sillman, D. T. Brower, Optex Communications Corp, Rockville, MD.
Photoluminescence (PL), optical absorption by photothermal deflection spectroscopy (PDS), and electron paramagnetic resonance (EPR) data for unaged and ambient-aged SrS powders with 450 ppm to 7500 ppm cerium show complex behavior related to several types of cerium sites. Optical absorption peaks at 375 and 430 nm in unaged SrS:Ce increase as roughly the 0.6 power of cerium concentration, while a 490 nm absorption band increases superlinearly, suggestive of cerium cluster site formation. EPR data indicates that the proportion of axial symmetry and clustered ion sites increases relative to cubic sites with cerium concentration. PL behavior depends on excitation wavelength. With visible and near ultraviolet excitation, PL intensities increase with activator concentration but have a sublinear dependence. With far-ultraviolet excitation, concentration quenching of the PL intensity is evident at 7500 ppm cerium. These differences in behavior are believed to be related to bandgap versus bound-state excitation processes. EPR data shows that four months ambient aging results in a factor of five reduction in EPR active, cubic cerium sites for the powders with lower total cerium (450 ppm and 3000 ppm) and an increase in sulfur vacancies, but in the 7500 ppm cerium powder, axial sites are preferentially lost. PL intensities decrease in the powders with lower total cerium by more than the reduction in site concentrations indicated by EPR. In these powders, aging apparently results in the development of excitation trapping sites as well as the destruction of emitting cerium sites. PL intensity decreases less with aging in the 7500 ppm cerium powder than in the powders with lower cerium content.
SESSION G11: POSTER SESSION:
THIN FILM TRANSISTORS
Wednesday Evening, April 2, 1997
PHOTO AND THERMAL STABILITIES OF CHLORINE-DOPED AMORPHOUS SILICON TFTs, Chiwoo Kim, Ju-Hee Kim, Samsung Electronics Co Ltd, LCD R&D Group II Special Div, Kyungki-Do, SOUTH KOREA.
Amorphous silicon (a-Si:H) deposited from SiH and H gas mixture by PECVD process is normally used in TFT-LCD as channel of TFT. Under high temperature and bright backlight condition, the contrast ratio as well as other display qualities are degraded significantly due to the instabilities of a-Si:H against light and heat. In this study, the deposition properties, photo and thermal sensitivities of the Cl doped a-Si is discussed. TFT-LCD panels are fabricated for various deposition conditions and the display qualifies are studied.
A NOVEL MULTI-CHANNEL POLY-SI THIN FILM TRANSISTOR IMPROVING HYDROGENATION PASSIVATION, Cheol-Min Park, Jae-Hong Jeon, Juhn-Suk Yoo, Min-Koo Han, Hong-Seok Choi, Seoul National Univ, Dept of Electrical Engr, Seoul, SOUTH KOREA.
Polycrystalline silicon (poly-Si) thin film transistors (TFTs) have attracted considerable interest in a large area flat panel displays. However, in poly-Si TFTs, grain boundaries may exert a profound influence on the device characteristics. The hydrogen passivation of grain boundaries may be a critical process to improve the performance of poly Si TFTs. The identification of a dominant hydrogenation mechanism and path may be important to optimize the hydrogenation process of poly-Si TFTs. It is well known that hydrogen from the plasma migrates through the gate oxide into the poly-Si channel region. Multichannel structure TFT has been reported to increase the hydrogenation effects due to the expanded hydrogenation path. In this paper, we have proposed a novel multichannel poly-Si TFT of which structure may be more effectively hydrogenated than conventional multichannel poly-Si TFT, so that the performances of the device such as field effect mobility and threshold voltage are considerably improved. We also verified the dominant hydrogenation path. The new multichannel TFT has teeth of comb in gate electrode. The new gate structure may increase hydrogen radical flux into poly-Si channel layer so that hydrogenation is carried out effectively in a short period for the proposed TFT. We examined the hydrogenation effects on the various multichannel structured poly-Si TFTs. In order to investigate the hydrogenation effects, the poly-Si TFTs of 15 m channel length and 40 m channel width, which consists of single stripe width of 3 m, 5 m, and 8 m, respectively, are used. Compared with the conventional device, the new device is more effective for increasing the carrier mobility. After 90 min. hydrogenation, the threshold voltage of the device with the stripe of 3 m is 2 V, while those of the devices with the stripe of 5 m and 8 m are about 2.5 V and 3.5 V respectively. In conventional multichannel poly-Si TFT, the threshold voltage is 4.2 V after same time hydrogenation. The field effect mobility of proposed device increases faster than that of conventional one as the width of poly-Si stripe is decreased. These results show that new multichannel poly-Si TFT active layer absorbs more hydrogen radicals through the gate oxide than the conventional multichannel TFT, and relatively long channel devices can be hydrogenated effectively. Besides the improvement of the device characteristics, our experimental results show that the dominant hydrogenation path is the diffusion through the gate oxide.
LOW TEMPERATURE CRYSTALLIZATION OF AMORPHOUS SILICON FILMS BY MICROWAVE HEATING , Jeong No Lee, Yoon Chang Kim, Yong Woo Choi, Byung Tae Ahn, KAIST, Dept of MS&E, Taejon, SOUTH KOREA.
Microwave heating was utilized for the first time for solid phase crystallization of amorphous silicon films. The amorphous silicon thin films were deposited by PECVD at the deposition temperature of 100 to 400 C. And the films were annealed by microwave heating below 600 C in nitrogen. And the crystallinity of the films were examined by Raman and X-ray diffraction. Microwave heating lowered annealing temperature and reduced annealing time. For example, the films deposited at 400 C were fully crystallized in 3 hr at 550 C below which glass is available as a substrate. The crystallization time increased slightly as the deposition temperature decreased. The amorphous silicon films were crystallized at lower temperature comparing to conventional heating due to the interaction between microwave and silicon atoms. The effects of deposition temperature of PECVD amorphous silicon films on the low-temperature crystallization will be presented.
PROCESSES FOR SELF-ALIGNED a-Si:H THIN FILM TRANSISTORS, Chien-Sheng Yang, North Carolina State Univ, Dept of E&CE, Raleigh, NC; Gregory N. Parsons, Chris B. Arthur, Walter W. Read, North Carolina State Univ, Dept of Chemical Engr, Raleigh, NC.
Novel self-alignment processes for inverted staggered a-Si:H tri-layer thin film transistors have been developed. Self-aligned TFT's can be used to simplify processing and reduce gate length, allowing improved performance active matrix devices. Various processes that we have explored for self-aligned devices include: 1) back-side photoresist exposure for self-aligned channel length definition; 2) a controlled top nitride wet overetch for contact area definition; 3) n+ a-Si:H lift-off for self-aligned source-drain formation; 4) a photoresist trim using oxygen plasma to increase the overlap between source/drain and gate regions; and 5) selective area deposition for self-aligned source-drain. TFT's fabricated in our lab at a constant 250 C with a conventional SiNx/a-Si/SiNx tri-layer design show linear mobility as high as 1.1 cm2/Vsec and an on/off current ratio of 10E7. We find back-side exposure (broadband UV for 420 second) and a nitride overetch can be used to transfer the gate metal pattern to the top nitride. For the lift-off process, n+ a-Si:H and source/drain metal can be deposited to form the TFT without a critical alignment. Self-aligned device results and a comparison with conventional tri-layer TFT's will be presented.nonlinear optical response of thin films, composed from small Co particles embedded in nonmagnetic Cu matrix. The films of about 200 nm thick were prepared on glass substrates. The relative concentration of Co was varied from 20 to 60 persent. The main nonlinear-optical method used in this work was optical second harmonic generation (SHG), which is known to be a powerfull probe of surfaces, interfaces, thin films, etc. The output of a Q-switched YAG laser at 1064 nm served as a fundamental radiation, the SHG radiation generated by the film was selected by interference filter and detected by a PMT and gated electronics. The nonlinear-optical Kerr effect and the diffuseness of the SHG were studied for various angles of incidence of the fundamental beam as functions of Co concentrations. The results obtained are compared with ones obtained by linear-optical spectroscopy.
EXCIMER LASER STIMULATION OF NUCLEATION IN LIQUID AND SOLID PHASE CRYSTALLIZATION FOR AMTFT LCD FABRICATION, Michael D. Efremov, V.A.Volodin, Inst of Semiconductor Physics, Novosibirsk, RUSSIA; V.V.Bolotov, Institute of Sensor Microelectronics, Omsk, RUSSIA.
The regimes of critical nuclei introduction into thin amorphous silicon films on glass substrates were elaborated both using excimer nanosecond laser treatments and RTA. The high mobility poly-Si/glass structures were obtained in the case of stimulated nucleation in liquid and solid phase regimes at temperatures below 100C and 550C accordingly. Application of 5ns pulse of excimer laser allow to decrease the temperature of treatments. Combined method of excimer laser and RTA treatments were used for solid phase crystallization at significantly reduced time. In all cases, preliminary introduction of critical nuclei leaded to the significant improvement of electrical properties of obtained poly-Si structures. Active matrix TFTs was created on the basis of poly-Si structures with relationship between on/off current in the range of 106-107.
THE PERFORMANCE OF POLYCRYSTALLINE SILICON THIN-FILM TRANSISTORS AND CMOS DRIVING CIRCUITS WITH VARIOUS ACTIVE FILMS, Juhn-Suk Yoo, Cheol-Min Park, Cheon-Hong Kim, Min-Koo Han, Seoul National Univ, Dept of Electrical Engr, Seoul, SOUTH KOREA.
The AMLCD (Active Matrix Liquid Crystal Displays) panels are utilizing poly-Si TFTs (Polycrystalline Silicon Thin Film Transistors) as the switching element for both pixel array and drive circuits integrated on one substrate. In this paper, we have investigated the characteristics of poly-Si TFTs and CMOS circuits with various active films prepared by different deposition processes and annealing methods. We have correlated the properties of poly-Si TFTs, such as mobility, threshold voltage and ON- OFF-current level, to the dynamic performance of the CMOS circuits. The active poly-Si films used are deposited 500 and 100 thick by LPCVD for high temperature (<600C) process and by PECVD for low temperature (<400C) process using SiH, Si, and SiF gases. For high temperature process, the active film was recrystallized by SPC (Solid Phase Crystallization) and SPC+ELA (Excimer Laser Annealing) and the source/drain doping was performed by ion implantation. For low temperature process, the active film was recrystallized by ELA and the source/drain doping was performed by ion shower. The devices with laser annealed active films have much higher field effect mobility and ON/OFF current ratio than those with SPC film, due to low intragranular defect state density. The devices with Si deposited film have higher mobility and subthreshold slope than those with SiH deposited film because of the large poly-Si grains and less grain boundary defects. The results indicate that laser annealed Si poly-Si film is suitable for pixel element TFTs. However, the CMOS ring oscillator composed of laser annealed Si poly-Si TFTs operates at higher VDD with lower frequency than that of laser annealed SiH TFTs; therefore it is inefficient for high speed operation and low power consumption. The negative threshold shift of the NMOS (V = 3 V), due to excessive positive hydrogen ions in Si film and gate oxide interface, may have caused charge leak through NMOS to ground at V = 0 V input. We conclude that the property of the poly-Si film may have controversial influence on the performance of pixel TFTs and drive circuits, and that it should be optimized for AMLCD application. We have also examined the performance enhancement of the device and circuits after hydrogenation and dehydrogenation.
ENHANCEMENT OF ON/OFF CURRENT RATIO OF POLY-SILICON TFT BY SELECTIVE LASER-INDUCED CRYSTALLIZATION OF ACTIVE LAYER, Jae-Hong Jeon, Cheol-Min Park, Hong-Seok Choi, Cheon-Hong Kim, Min-Koo Han, Seoul National Univ, Dept of Electrical Engr, Seoul, SOUTH KOREA.
Polycrystalline silicon (poly-Si) thin film transistors (TFTs) have received increasing interest because of their possible application in flat panel AMLCD (active matrix liquid crystal display). However, the large leakage current of poly-Si TFT may cause charge loss in pixel elements which consequently deteriorates image quality. LDD structure or OFF-set structure has been employed to reduce the leakage current of poly-Si TFT. These structures also have the problem which reduces ON-current considerably due to the extra resistance and may require any additional masking step. Purpose of this paper is to propose the new poly-Si TFT which reduces the leakage current without any additional masking step. We employ the XeF excimer laser ( = 351 nm) crystallization method and adopt coplanar structure with transparent ITO gate electrode. The laser annealing step for the crystallization of active layer is carried out after the gate oxide and ITO gate deposition. The laser with the energy density of 350 mJ/cm is irradiated from the top of ITO gate. Most energy of laser is transmitted to the active layer through the transparent gate and gate oxide, but both channel edges receive negligible energy because the ITO gate over the edges is intentionally designed to block the transmission of laser energy. Transmittance of ITO film at the wavelength of 351 nm is more than 80. However, it is noticeable that transmittance of ITO film exposed to hydrogen plasma is less than 30 so that we can selectively crystallize the active layer by exposing ITO gate only over the channel edges to hydrogen plasma. We adopt photoresistor reflow method to realize ITO gate selectively exposed to hydrogen plasma. Therefore, any additional photo masking step is not required and misalign problem compared with conventional LDD or OFF-Set TFT is eliminated. When active layer is crystallized by excimer laser annealing, both edges of active channel region adjacent to source and drain are not crystallized and highly resistive a-Si edges reduce the leakage current remarkably. In ON-state, the charge inversion of a-Si edges connects the main channel of poly-Si active layer to source and drain. ON-current is not decreased because channel is clearly formed between source and drain and both a-Si edge regions are very short compared with poly-Si channel region. We will also report the fabrication results.
NOVEL METHOD FOR FORMATION OF LARGE GRAINED, SILICON THIN FILMS ON AMORPHOUS SUBSTRATES, Rajiv K. Singh, Univ of Florida, Dept of MS&E, Gainesville, FL; Soon Moon Jung, Univ of Florida, Dept of MS&E, Gainesville, FL; John W. Viatella, Rolf E. Hummel, Univ of Florida, Dept of MS&E, Gainesville, FL.
In this talk we describe a novel solid-phase crystallization method to synthesize large-grained, textured silicon films on amorphous substrates at relatively low processing temperatures (<550C). This method is based on the use of roughened single crystal silicon seed which is pressed onto the amorphous silicon surface. The composite structure is then annealed at low temperatures (<550C) for times ranging from 2 to 10 hrs in a furnace so that crystallization from the surface layers is achieved. X-ray diffraction measurements showed that the films processed by the surface- seeded crystallization (SSC) method exhibited a (110) texture. Transmission electron microscopy revealed the presence of very large  grains (> 10 m) for films crystallized by the SSC method. Hall measurements conducted on boron-doped films showed excellent hole mobility with values exceeding 180 cm&/V sec, which was almost a factor of six higher than that found in polycrystalline films obtained from standard procedures.
VERY-LOW SURFACE ROUGHNESS IN LASER CRYSTALLIZED POLYCRYSTALLINE SILICON, K. Mourgues, Univ de Rennes I, Rennes, FRANCE; L. Pichon, Univ de Rennes I, Groupe de Microelectronique & Visualisation, Rennes, FRANCE; F. Raoult, Tayeb Mohammed-Brahim, D. Briand, O. Bonnaud, Univ de Rennes I, URA-CNRS 1648, Rennes, FRANCE; D. Lemoine, Univ de Rennes I, LPS-INSA, Rennes, FRANCE; Pierre Boher, Marc Stehle, Jean Louis Stehle, SOPRA, Bois Colombes, FRANCE.
Excimer laser (ECL) crystallization of silicon films on low-temperature substrates is one of the most promising techniques for large-area polycrystalline silicon films. Crystallization techniques using pulsed-ECL were extensively studied. They are characterized by films with high structural and electrical properties but low uniformity. In this way, the technology using single-shot ECL with very large excimer laser (VEL) may be very promising. It was used for the crystallization of amorphous undoped films deposited by PECVD or by LPCVD. The LPCVD technique is the most commonly used deposition technique of silicon. It presents numerous advantages and the hydrogen content in the films, known to constitute a drawback in the crystallization process leading to an increased surface roughness, is negligible (1 at.). However, even with these low hydrogen content LPCVD films, high surface roughness is observed after the laser crystallization. Hence, surface roughness appears as one of the major problems to be solved in the high performance TFTs realization from laser crystallized films.
In this work, the reduction of the surface roughness, determined from Atomic Force Microscopy observations, is presented. This reduction originated from the use of a cap layer before a single-shot VEL annealing and a special etch treatment to remove it. The mean height of the roughness is then reduced, from 30 nm without the cap layer, to 2.5 nm. Using these low surface roughness polycrystalline films, TFTs are then realized.
SESSION G12: PHOSPHOR MATERIALS
Chairs: Rameshwar N. Bhargava and Dave Slobodin
Thursday Morning, April 3, 1997
Golden Gate A1
8:30 AM *G12.1
SURFACE CHARGING OF PHOSPHORS AND ITS EFFECTS ON CATHODOLUMINESCENCE AT LOW ELECTRON ENERGIES, Carleton H. Seager, William L. Warren, D. R. Tallant, Sandia National Laboratories, Albuquerue, NM.
Measurements of the threshold for secondary electron emission and shifts of the carbon Auger line position have been used to deduce the surface potential of several common phosphors during irradiation by electrons in the 0.5-5.0 keV range. All of the insulating phosphors display similar behavior: the surface potential is within 1 V of zero at low electron energies. However, above 2-3 kV it becomes increasingly negative, reaching hundreds of volts within 1 keV of the turn-on energy. The electron energy at which this charging begins decreases dramatically after Coulomb aging at 17 A/cm for 30-60 min. Measurements using coincident electron beams at low and high electron energies to control the surface potential were made to investigate the dependence of the cathodoluminescence (CL) process on charging. Initially, the CL from the two beams is identical to the sum of the separate beam responses, but after Coulomb aging large deviations from this additivity are observed. These results indicate that charging has important, detrimental effects on CL efficiency after prolonged e-beam irradiation. Measurements of the electron energy dependence of the CL efficiency before and after Coulomb aging will also be presented, and the implications of these data on the physics of the low-voltage CL process will be discussed.
9:00 AM G12.2
FULL-COLOR THIN-FILM ZnGaO PHOSPHORS BY ION IMPLANTATION, Nader M. Kalkhoran, Spire Corp, Optoelectronics Dept, Bedford, MA; Dhrupad Trivedi, Ward D. Havlerson, Spire Corp, Bedford, MA.
Full-color cathodoluminescence (CL) characteristics of ion implanted ZnGaO phosphors have been investigated. The host ZnGaO thin films have been deposited on glass and silicon substrates by RF sputtering. We have demonstrated high brightness red (R) and green (G) CL in ZnGaO films implanted with Eu and Mn ions, respectively. Blue (B) emission has been achieved by Ce ion implantation or by high temperature annealing of the as deposited films. According to the 1931 CIE chromaticity chart, RGB emissions of ion implanted thin-film ZnGaO phosphors are well saturated and enclose a larger area surrounding the central ''white'' zone than standard CRT phosphors. Multicolor emission from a single phosphor layer has been demonstrated by co-implantation of different activator ions into the film. Our results indicate that CL emission is critically dependent on process parameters, including film stoichiometry, ion implantation dose and energy, and annealing temperature.
Selective ion implantation of multicolor activators into a thin film phosphor host can replace multiple phosphor deposition and patterning steps. Most luminescence centers can be implanted at a depth in the host material which is well-matched to the limited penetration range of electrons under typical field emission display (FED) drive voltages or uv excitation in plasma display panels (PDPs).
In this paper, we will present our latest results on producing high brightness thin film phosphors based on ion-implanted ZnGaO. Effects of sputter deposition, ion implantation, and post-implant annealing conditions on CL emission of these phosphors will be discussed.
9:15 AM G12.3
DEPOSITION AND CHARACTERIZATION OF Eu:Y0 RED-PHOSPHOR THIN FILMS, D. Kumar, Rajiv K. Singh, Paul H. Holloway, Univ of Florida, Dept of MS&E, Gainesville, FL.
Thin film phosphors are very promising for the fabrication of flat panel field emission displays (FEDs). In the present paper we have reported the growth and characterization of Er:Y phosphor thin films. The effect of surface roughness and crystallinity on the brightness of phosphor films have been studied. A post annealing treatment of the films have been found to result in the realization of Er:Y films with 70 brightness compared to powder materials. The interesting feature of our work is the realization of Er:Y with improved structural and physical properties with the help of silver doping. The improvement in the properties is thought to be brought about by the enhanced oxygenation, improved epitaxy, and reduced charge buildup in the phosphor films in presence of silver.
9:30 AM G12.4
DEVELOPMENT OF HIGH-EFFICIENCY ZnSiO:Mn THIN FILMS FOR FLAT PANEL CATHODOLUMINESCENT DISPLAYS, Jiang Liu, D. C. Morton, M. R. MIller, U.S. Army Research Laboratory, Fort Momouth, NJ; Yabo Li, Eric W. Forsythe, Gary S. Tompa, Structural Materials Industries Inc, Piscataway, NJ.
ZnSiO:Mn thin films were developed and studied as thin film phosphors for flat panel cathodoluminescent displays. Compared to conventional powder phosphors, crystallized thin film phosphors can have the advantages of high electrical and thermal conductivities, high energy saturation limit, and high screen resolution. A high-efficiency thin film phosphor is also ideal for field emission flat panel displays since there is less surface area to outgas and it is unlikely to release particles which could result in contamination to the emitters. The ZnSiO:Mn thin films, ranging from 0.5 to 1 m in thickness, were grown using metal organic chemical vapor deposition (MOCVD) and annealed in an N2 environment at 850- 1100C for 1 to 60 minutes. Crystallized films with improved electrical conductivity were obtained and studied by SEM, EDS, RBS, and x-ray diffraction. With an emission peaked at 525 mn, these thin films showed very encouraging cathodoluminescent performance. Under the excitation of a electron beam, a luminescence value of 62 Cd/m and an efficiency of 1.3 Lm/W were obtained at an accelerating voltage of 1500 V and current density of 10 A/cm. This is 15 of the performance of its equivalent powder type phosphor or about 10 of the value of commercial ZnS powder phosphors. The luminescent decay time of ZnSiO:Mn thin films were also well controlled in the range of 2 to 10 ms by varying deposition parameters. This overcomes the long decay limitation of the comparable powder phosphor in a practical application.
SESSION G13: NANOCRYSTALS AND EL
Chairs: Carleton H. Seager and Dave Slobodin
Thursday Morning, April 3, 1997
Golden Gate A1
10:30 AM *G13.1
DOPED NANOCYRSTALLINE PHOSPHORS FOR NEXT GENERATION DISPLAYS, Rameshwar N. Bhargava, E. Goldburt, R. Hodel, B. Kulkarni, J. V. Veliadis, Nanocrystals Technology, Briarcliff Manor, NY.
The phosphor technology needs significant improvement to meet the challenge of the emerging multimedia displays. A typical phosphor consists of a host for the absorption of the electron or UV energy and transferring it to an activator ion which generates visible light. To increase overall efficiency of the light generation at different electron accelerating voltages (FEDs, CRTs) or UV excitation (plasma displays), both host excitation and subsequent transfer to the activator need to be improved. For efficient host excitation, particularly at low accelerating voltages, the nonradiative contribution from surfaces of the phosphor particles must be decreased In our case, this is achieved by preparing phosphor particles with size below the Bohr diameter () and concurrently incorporating an impurity.
In visible line-emitting phosphors, the activators (impurities) are transition or rare-earth metals which possess d or f localized outer-shell electrons. In these impurities the optical transition is atomic-like and highly localized. Because of this strong localization, the transfer of excited s or p electrons from the host to d- or f-like electronic states of the impurity remains slow, leading to low efficiency and saturation. To overcome this, we have introduced a new concept of confining the localized activator in a quantum dot. In these doped nanocrystals (DNC), the intermixing of s-p (host) and d-f (activator) occurs efficiently due to quantum confinement. This hybridization leads to enhanced transfer rates to the activator and simultaneously shortens the luminescent lifetime . The luminescent properties of these DNC phosphors and optimization of these phosphors for applications to various active displays will be discussed.
11:00 AM G13.2
NANOCRYSTALLINE SILICON-BASED FLAT-PANEL DISPLAYS, Nader M. Kalkhoran, Spire Corp, Optoelectronics Dept, Bedford, MA; Fereydoon Namavar, Spire Corp, Bedford, MA.
Recent discovery of visible-emission in nanocrystalline forms of silicon, e.g., porous silicon, can potentially lead to many advanced optoelectronic devices, including a new class of flat panel displays. The new displays may feature monolithic integration of light-emitting pixels and associated driver electronics on a single substrate using relatively simple and cost-effective fabrication processes. In the past few years, our research group has prepared porous silicon layers with strong visible photoluminescence (PL) and has demonstrated one of the first solid state electroluminescent (EL) devices in bulk monocrystalline Si material. Individual porous Si-based light-emitting devices have been fabricated monolithically along with standard Si electronics on a single substrate, using conventional Si device processing steps. We have extended our work beyond bulk Si and have demonstrated visible PL in thin films of porous polycrystalline Si (PPSI) formed on glass substrates. Very recently, our group has demonstrated the first electrically induced visible luminescence in PPSI films formed on ITO-coated glass faceplates. The EL emission peaks at about 670 nm and can be viewed clearly in ambient light through the glass faceplate.
In this paper, we will discuss our most recent findings and the potential display applications of both bulk and thin film porous Si. We will also address some of the challenges involved in fabricating devices using these new materials and propose a pixel arrangement for a monolithically integrated PPSI-based active-matrix thin-film electroluminescent (TFEL) display.
11:15 AM G13.3
ELECTROLUMINESCENT DEVICES FABRICATED FROM SILICON AND GERMANIUM NANOCRYSTALS EMBEDDED IN VARIOUS HOST MATRICES, Gildardo R. Delgado, Univ of California-Davis, Dept of Applied Science, Livermore, CA; Howard W. H. Lee, Khashayar Pakbaz, Lawrence Livermore National Laboratory, Photonics Group, Livermore, CA.
Electroluminescent (EL) devices were fabricated with Si nanocrystals produced by ultrasonic fracturing of porous silicon (PSi) as well as silicon and germanium nanocrystals synthesized through a control chemical reaction. The active EL material consists of Si and Ge nanocrystals embedded in various host matrices such as polyvinylcarbazole (PVK), polymethylmethacrylate (PMMA), silica sol-gels and other organic polymers and small organic molecules. Several device configurations were used to induce EL processes that rely on radiative electron-hole recombination within the nanocrystals. We report on the optical and electrical properties of these devices. We also compare and contrast device performance between LEDs fabricated with PSi and Si nanocrystals/host, including efficiencies, PL and EL spectra. Applications for these EL devices include highly efficient light emitting diodes. The cost and ease of processing of these material systems make them potentially ideal for flat panel display technologies.
11:30 AM G13.4
MOCVD SrS:Ce FOR APPLICATIONS IN ELECTROLUMINESCENT DEVICES, Denis Endisch, Karl Barth, Janice Lau, Greg Peterson, Univ of Albany, Dept of Physics, Albany, NY; Alain E. Kaloyeros, SUNY-Albany, Dept of Physics, Albany, NY; Dick Tuenge, Christopher N. King, Planar America Inc, Beaverton, OR.
SrS:Ce is an important material for full color electroluminescent (EL) flat panel displays. Using a combination of SrS:Ce/ZnS:Mn and appropriate color filters, high quality full color displays have been demonstrated. Major issues for commercially viable process integration of SrS:Ce are the combination of high luminance, high growth rate, and process temperatures below 600C for compatibility with low cost glass substrates.
This work describes the process development and optimization of metal organic chemical vapor deposition (MOCVD) of SrS:Ce. MOCVD is a promising candidate because it can provide the required growth rates and allows control of crystal structure and stoichiometry. Growth of SrS:Ce was performed at process temperatures below 600C using Sr(tmhd), Ce(tmhd), and HS as precursors. Film analysis included Rutherford backscattering (RBS), x-ray diffraction (XRD), atomic force microscopy (AFM), and EL measurements. Results on the correlation between process parameters, film structure, grain size and EL performance will be presented.
11:45 AM G13.5
ATOMIC-LEVEL STRESS AND PHOTOLUMINESCENCE EFFICIENCY IN Ce-ACTIVATED SrS, William L. Warren, Karel Vanheusden, D. R. Tallant, Carleton H. Seager, Sandia National Laboratories, Albuquerque, NM; S.- S. Sun, Planar America Inc, Beaverton, OR; Erkki Soininen, Planar International Ltd, Espoo, FINLAND; Sorin Costiner, Carnegie Mellon Univ, Dept of Mathematical Sciences, Pittsburgh, PA.
Cerium activated SrS materials are efficient blue emitters in both thin film and powdered form for use in electroluminescent full-color displays. In this study, we characterize Ce doped, sputter-deposited SrS thin films with electron paramagnetic resonance (EPR) and photoluminescence. We find that the environment of the Ce ion in these polycrystalline thin films is an axially distorted octahedron and, thus, is not cubic. Our EPR data suggest that the degree of axial distortion (microscopic strain) in this octahedron strongly depends on both the growth direction and the thickness of the SrS thin film. For instance, films deposited on Si are oriented along the  direction and those deposited on glass are oriented along the  direction. Our measurements also show that photoluminescent efficiency increases as the amount of distortion in the local Ce environment rises. This observation implies that it may be possible to tailor atomic level stress by appropriate choice of substrate and improve the luminescence output of SrS:Ce thin films.
SESSION G14: NOVEL APPROACHES TO PHOSPHORS
Chairs: Carleton H. Seager and Dave Slobodin
Thursday Afternoon, April 3, 1997
Golden Gate A1
1:30 PM *G14.1
SEARCH OF NEW LUMINESCENCE MATERIALS IN La(Gd,Y,Ce,Sr)Al(B,Si,Mo,Ta,Zr) OXIDES WITH COMBINATORIAL SYNTHESIS, Xiao-Dong Sun, Chen Gao, Lawrence Berkeley National Laboratory, Inst of Molecular Design, Berkeley, CA; Jingsong Wang, Lawrence Berkeley National Laboratory, Berkeley, CA; Peter G. Schultz, Univ of California-Berkeley, Dept of Chemistry, Berkeley, CA; X.-D. Xiang, Lawrence Berkeley National Laboratory, Inst of Molecular Design, Berkeley, CA.
Oxides are attractive host materials for the development of new advanced phosphors due to their high chemical and thermal stability and the wide range of physical and structural properties associated with them. Recently we discovered a new class of efficient tricolor luminescence materials with combinatorial approach . Here we report the follow-up search of phosphors with metal oxides hosts of various components and stoichiometries with thin film combinatorial synthesis. An extensive search is carried out on rare earth elements (Eu, Tm) activated La(Gd,Y,Ce,Sr)Al(B,Si,Mo,Ta,Zr) oxides with a systematic variation of components and stoichiometries. A few compositions are identified out of thousands of samples of various components and stoichiometries in the libraries as efficient luminescent materials.
2:00 PM G14.2
COMBINATORIAL SYNTHESIS OF HIGH-DENSITY PHOSPHOR LIBRARIES, Xin Di Wu, Ian Campbell, Earl Damielson, Eric McFarland, Greg Wallace-Freedman, Youqi Wang, W. Henry Weinberg, Jenny Wu, Symyx Technologies, Sunnyvale, CA.
New and improved phosphor materials are needed for low-voltage field emission and plasma displays. In order to speed up discovery and optimization of the phosphors, we have developed an automated combinatorial approach to synthesize and characterize large numbers of chemical compounds in parallel. Using thin film deposition techniques we have synthesized phosphor libraries with host oxide lattices confining La, Y, Mg, Sr, Ca, B, Al, Ga, In, and Sn doped with Eu, Tb, Tm, Ce, and Mn over a large range of concentrations. Libraries containing approximately 25,000 distinct mixtures of the above elements were deposited on a three inch diameter substrate. Post-deposition processing was carried out in oxygen or air at temperatures over 800C. High-throughput screening was used to identify the chromaticity and relative efficiencies. Correlations were made between thin film phosphors and powder phosphors to confirm that Me optical emissions are identical and that relative luminosity of thin film phosphors can be utilized for screening purposes. After finding target phosphors on the thin film libraries, powder phosphors with the same compositions are also synthesized for detailed characterization. This protocol will be discussed in detail with particular attention paid to a subset of red, blue, and green phosphors, i.e., lead phosphors from the high-density library.
2:15 PM G14.3
PHOTOLUMINESCENT MN-DOPED ZNS NANOCLUSTERS SYNTHESIZED WITHIN BLOCK COPOLYMER NANOREACTORS, Ravindra S. Kane, Robert E. Cohen, MIT, Dept of Chemical Engr, Cambridge, MA; Robert Silbey, Masaru Kuno, Moungi G. Bawendi, MIT, Dept of Chemistry, Cambridge, MA.
Mn-doped ZnS nanoclusters have been synthesized within microphase separated films of diblock copolymers containing carboxylic acid units on one of the blocks. Zinc was selectively sequestered into the acid containing domains by treating the films with diethylzinc. Manganese was loaded by subsequent treatment of the films with aqueous manganese acetate solutions. The manganese ions displace a fraction of the zinc ions, and the extent of loading can be controlled by varying the loading time, and the concentration of the manganese acetate solution. The extent of loading was tracked using ICP discharge emission spectroscopy. The doped nanoclusters were formed by subsequent treatment with HS. The size of the doped ZnS nanoclusters could be controlled by carrying out the HS exposure in the presence of a coordinating base.
The Mn-doped nanoclusters have been characterized by UV-vis and fluorescence spectroscopy. The photoluminescence spectra show the characteristic manganese emission. Excitation spectra in conjunction with UV-vis spectra for doped ZnS nanoclusters of different sizes demonstrate that manganese emission occurs by excitation of the ZnS nanocluster. Lifetime measurements are being carried out to deduce whether the excited state lifetimes in our doped ZnS clusters vary significantly from the manganese lifetimes in bulk Mn-doped ZnS. These, along with quantum yield, and cathodoluminescence experiments will determine the potential for these nanocomposite films to be used as phosphors.
2:30 PM G14.4
LOW-TEMPERATURE DEPOSITION OF CaGaS BY AEROSOL-ASSISTED CVD USING NOVEL PRECURSORS, Guihua J. Shang, Klaus Kunze, Mark J. Hampden-Smith, Univ of New Mexico, Dept of Chemistry, Albuquerque, NM.
There has been increasing interest in group 13 chalcogenides, ME and M (M = Ga, In, E = S,SE) because of their applications in photovoltaics, switching devices, and the passivation of GaAs films. In addition, suitably doped (e.g., Ce-doped) group 2 metal thiogallates MGa is attracting more attention as a novel phosphor material with a great deal of potential application in Flat Panel Display. In this work, the novel compounds of Ga and Ca were synthesized and were demonstrated to be suitable for deposition of CaGa thin films at an unprecedented low temperature (e.g., 465C) with uniform morphology. The similar organic ligands (thiocarboxylate) were employed for both metals to circumvent problems of ligand exchange when Ga-, Ca containing molecular precursors are mixed for the deposition. It is shown that these ligands undergo a facile elimination of small molecule leading to a high purity (C- and O-free) CaGa films. The control of the composition, crystallinity, and morphology of the final films by appropriately changing the relative concentrations of precursors and deposition conditions will be discussed. The Ce-doped CaGa film deposition by AACVD will be also covered.
SESSION G15: PHOSPHOR MATERIALS AND PROCESSING
Chairs: Rameshwar N. Bhargava and W. L. Warren
Thursday Afternoon, April 3, 1997
Golden Gate A1
3:15 PM G15.1
TRICOLOR PHOSPHORS FROM COMBINATORIAL THIN FILM AND SOLUTION LIBRARIES, Xiao-Dong Sun, Chen Gao, Lawrence Berkeley National Laboratory, Inst of Molecular Design, Berkeley, CA; Jingsong Wang, Lawrence Berkeley National Laboratory, Berkeley, CA; Peter G. Schultz, Univ of California-Berkeley, Dept of Chemistry, Berkeley, CA; X.-D. Xiang, Lawrence Berkeley National Laboratory, Inst of Molecular Design, Berkeley, CA.
A major challenge in materials science is the development of new phosphors for advanced display technologies including plasma, field emission, electroluminescent, and CRT projection displays. Although the photophysical processes leading to luminescence are well understood, the specific spectral properties, luminescence efficiencies and stabilities which result from a given excitation mechanism depend on complex interactions between the host lattice, sensitizer, and luminescent center. Consequently, the discovery and optimization of new phosphors is highly empirical. To facilitate this process we have used both thin film deposition and a novel solution-based inkjet approach to generate combinatorial libraries of phosphors. A class of phosphors based on rare- earth-activated refractory metal oxides, La(Gd, Sr)AlO, has been identified which is the only known highly efficient (near 100 quantum yield for red and green and 60 for blue) isostructural (perovskite) tricolor phosphor system under both UV and x-ray excitation with thermal quenching temperatures around 300 C. These properties, plus the chemical stability and low cost synthesis, suggest the potential applications of this class of phosphors as appealing alternative phosphors in high energy excitation displays, such as x-ray, cathodoluminescent, and plasma (147 nm excitation) displays.
3:30 PM G15.2
FABRICATION AND CHARACTERIZATION OF COLOR PHOSPHORS PREPARED ELECTROPHORETICALLY FOR 4-INCH-FED APPLICATIONS, Jin Pyo Hong, Yong C. You, Nam S. Park, Jun H. Choi, Jong M. Kim, Samsung Advanced Inst of Tech, Display Materials Lab, Suwon, SOUTH KOREA.
Color phosphors have: been successfully deposited on indium-tin glasses by utilizing an electrophoretic process for the application to prototype 4 inch full-color FED devices. The deposition suspension was prepared with an appropriate amount of color phosphors with 1-3 m size, isopropanol, charger and binder. Various parameters, such as deposition time, angle, baking, and applied voltages were systematically performed to this end. As a result, each phosphor exhibited uniform form of about 4 8 m thickness over the whole plate. The deposited phosphors were investigated and compared both in the vacuum chamber and in fully sealed 4" FED conditions. In addition, they have been extensively characterized by SEM, ICP and Nanosurf Scanning Methods. It was confirmed that the phosphor quality in real devices was significantly affected by deposition conditions.
3:45 PM G15.3
THE APPLICATION OF POLY(PHENYLENE) TYPE POLYMERS AND OLIGOMERS IN ELECTROLUMINESCENT COLOUR DISPLAYS, Stefan Tasch, Wilhelm Graupner, Technical Univ Graz, Inst for Solid State Physics, Graz, AUSTRIA; S. Hampel, C. Hochfilzer, Technische Univ Graz, Inst for Solid State Physics, Graz, AUSTRIA; Farideh Meghdadi, Guenther Leising, Technical Univ Graz, Inst for Solid State Physics, Graz, AUSTRIA.
We present the application of ladder-type poly(paraphenylenes) and oligophenyl electroluminescence devices. Both organic semiconductors are very suitable for realizing blue light-emitting diodes due to their high photoluminescence efficiency (), high environmental stability, and good charge transport properties. The external quantum efficiency of these EL devices can be improved up to 2.5 by using multilayer structures and/or polymer blends with new charge-transport materials. A very efficient conversion of the bright blue emission of these EL devices can be realized by covering the device with highly fluorescent dye/matrix layers, which are excited by the blue emission and emit photoluminescence light in a lower energetic range, i.e., longer wavelength. The generated light can be subsequently spectrally purified with a minimal intensity loss by using a suitable dielectric mirror/filter. Applying this technique, we were able to produce emission colors throughout the visible spectral range and to realize bright RGB emission. The quantum conversion efficiency from blue into the other emission colors can exceed 80. We discuss the realization of monochrome displays using polyphenylene EL devices and describe polychrome flat colors displays based on the presented color conversion technique.
4:00 PM G15.4
LUMINESCENT STUDIES OF FLUORESCENT CHROMOPHORE-DOPED SILICA AEROGELS FOR FLAT PANEL DISPLAY APPLICATIONS, Sally A. Cahill Glauser, Univ of California-Davis, Dept of Applied Science, Livermore, CA; Howard W. H. Lee, Lawrence Livermore National Laboratory, Photonics Group, Livermore, CA.
Aerogels represent a novel class of open-cell nanoporous materials with remarkable optical, electronic, thermal, and structural properties. Many of these properties are ideal for host matrices in which luminescent materials are incorporated for flat panel display (FPD) applications. Some of these properties include low weight, minimal optical and electronic interaction with the chromophore, and physical robustness. We studied the optical properties of silica aerogels doped with a variety of luminescent materials including Er3+, rhodamine 6G, fluorescein, and chloroaluminum phthalocyanine. We report on the photoluminescence and absorption spectra, the photoluminescence excitation spectra, and the photoluminescence decay of these doped aerogels, and evaluate their performance for FPD purposes. We contrast the optical properties of these doped aerogels with those observed for each chromophore and find that silica aerogels serve as an ideal host matrix. Our results demonstrate the potential utility of these silica aerogels as host materials for fluorescent dyes and other luminescent materials for display and imaging applications.