Robert McDonald, Intel Corp
Gabi Neubauer, Intel Corp
Tom Remmel, Motorola Inc
Larry Wagner, Texas Instruments Inc
- AMRAY, Inc.
- Cameca Instruments, Inc.
- Digital Instruments, Inc.
- Intel Corporation
- JEOL USA, Inc.
- NSA Nissei Sangyo America Ltd.
- Philips Electronic Instruments Co.
- 1997 Spring Exhibitor
In sessions below "*" indicates an invited paper.
SESSION O1: MICROCONTAMINATION
Chairs: Richard B. Gregory and Robert C. McDonald
Wednesday Morning, April 2, 1997
8:30 AM *O1.1
ISSUES AND PERSPECTIVES IN MATERIALS AND FAILURE ANALYSIS FOR GIGA-SCALE INTEGRATION, Masataka Hirose, Hirsohima Univ, Dept of Electrical Engr, Hiroshima, JAPAN.
Scaling-driven front end processing is getting sensitive to materials surfaces and interfaces, where microcontamination, atomic scale morphology, compositional profile, dopant distribution and built-in stress are key issues in determining the device performance and reliability. In fact sub-nm-to-nm depth resolution is needed to quantify the localized stress or suboxide states in the ultrathin SiO/Si interfaces, impurity profiles in ultrashallow junctions or in gate oxides, and the extent of surface damage induced by reactive ion etching. Also, nanometer scale horizontal resolution is necessary for characterizing surface or interface microroughness, impurity segregation at grain boundaries, or dielectric breakdown spots. In addition, important is to apparently enhance detectability of localized impurities or defects by chemically or physically modifying device structures or by employing the difference method in which a specific signal from processed wafer is compared with that of a reference wafer. In this context, materials and failure analysis in leading-edge process technologies such as 2-5 nm thick gate oxides, 0.1 m poly-Si gates, ultrashallow (20-30 nm) junctions, and advanced isolation will be discussed in connection with novel analytical technique. Emerging silicon process technology which will open up potential alternate pathways for future microfabrication or nanofabrication is also discussed.
9:00 AM *O1.2
APPLICATION OF WET CHEMI CAL ANALYSIS FOR IC PRODUCTION, Marjorie Balazs, Balazs Analytical Lab, Sunnyvale, CA.
The useful application of wet chemical (solution) techniques of analysis for the semiconductor industry has grown with the complexity of the manufacturing of integrated circuits. Where once it was thought that the use of these methods of analysis would diminish, the advent of new sophisticated analytical instruments now makes these methods not only useful but often the method of choice. This paper will include a summary of the numerous measurements now made for QC/QA and microcontamination identification throughout the fab. Specific examples and data will be given for measurements made on components, thin films, cleanrooms, reactors, gases and incoming materials of all kinds including construction materials. Sensitivity levels and applications for state of the art techniques will be touched upon as we look to the future of the involvement of these techniques for future production requirements.
9:30 AM O1.3
ON-LINE ANALYSIS OF TRACE HEAVY METALS IN HF AND OTHER SEMICONDUCTOR PROCESSING CHEMICALS BY ANODIC STRIPPING VOLTAMMETRY USING ULTRAMICROELECTRODE ARRAY (UMEA), Stan Tsai, Samantha Tan, ChemTrace Corp, Hayward, CA; Anthony Flannery, Christopher Storment, Gregory Kovacs, Stanford Univ, Cntr for Integrated Systems, Stanford, CA.
A new version of chemically resistant mercury ultramicroelectrode sensor (Hg-UME) was developed for the measurement of trace heavy metals in semiconductor processing chemicals. The original UME sensor did not have a chemically inert coating and was developed for application with water matrices. The new development involved the deposition of a new dielectric coating (SiC) which enabled the Hg-UME sensor to be used directly in corrosive semiconductor processing chemicals including hydrofluoric acid. A pocket-size potentiostat was also developed to drive the UME sensor, thus making this analytical technique portable and suitable for on-line analysis. The method detection limits achieved for trace heavy metals (Cu. Pb, Cd, Zn, Bi, Ti) were in the sub-ppb range for chemicals such as HF, BOE and HNO. Characterization of the UME sensor indicated that the electrochemical sensor was accurate, reproducible and robust, thus meeting the essential criteria of an on-line monitor.
9:45 AM O1.4
CALIBRATION OF TXRF PRIMARY STANDARDS USING HEAVY ION BACKSCATTERING SPECTROMETRY (HIBS), Richard B. Gregory, D. Werho, S. N. Schauer, X. Liu, G. F. Carney, Motorola Inc, Mesa, AZ; J. C. Banks, J. A. Knapp, B. L. Doyle, Sandia National Laboratories, Albuquerque, NM; Alain C. Diebold, SEMATECH Inc, Dept of Analytical Tech Infrastructure, Austin, TX.
Heavy Ion Backscattering Spectrometry (HIBS), developed at Sandia National Laboratories for SEMATECH, provided an independent means (based upon first principles) for checking the accuracy of primary standards used for the calibration of TXRF (Total Reflection X-ray Fluorescence) instruments within Motorola Semiconductor Products Sector. Calibration standards provided by users of the four TXRF instruments were analyzed by HIBS. Using the HIBS measurements plus TXRF intensities measured on one of the TXRF instruments, values for the standards were adjusted and new sensitivity factors for TXRF were calculated. All four TXRF instruments were then recalibrated using the standards whose values had been re-assigned on the basis of HIBS analysis. The HIBS analysis provided independently obtained evaluations of the standards. The subsequent recalibration of the TXRF instruments resulted with self-consistency of analyses from all four TXRF labs.
10:30 AM *O1.5
ANALYTICAL REVIEW TOOLS FOR DEFECT REDUCTION: W ETCH BACK, A CASE HISTORY, Yuri S. Uritsky, Applied Materials Inc, Dept of Core Technologies, Santa Clara, CA; L. Chen, Applied Materials Inc, Santa Clara, CA; Viren V.S. Rana, Applied Materials Inc, Dielectric CVD Div I, Santa Clara, CA; Alfred Mak, Applied Materials Inc, Santa Clara, CA; S. Ghanayem, Applied Materials Inc, Dielectric CVD Div I, Santa Clara, CA; C. Richard Brundle, C.R. Brundle and Associates, San Jose, CA; Patrick D. Kinney, MicroTherm LLC, Minneapolis, MN.
At 0.1 m particle size, the high contrast and resolution of a FE SEM column is essential for relocating particles on an 8-inch wafer when a low accuracy light scattering map is the only input information. Once re-located, EDS is the traditional analysis approach, but at 0.1 ]mum a smaller volume probe, such as Scanning Auger Microscopy, SAM, is really needed. Two approaches are possible and are reviewed: add a small Auger analyzer to an existing 8 SAM.
The power of combining SEM/EDS/SAM is illustrated through a case study on the W Etch Back process (WEB), designed to reduce particle defect problems. In this (dirty) RIE process SF6 is used and F radicals attack not only chamber components, but also the TiN ''glue'' layer beneath the W, generating particles and a low volatility TiFx by-product. TiFx, in turn, reacts with hardware, producing Ti/Al based particles. The detailed nature of these particles (indicating the mechanism stated above) was established by SAM. In addition, it was shown that a low level surface contamination of the complete monitor wafer occurred due to the residual presence of the low-volatile TiFx by-product in the processing chamber.
Finally we discuss a new 6-8-12 wafer-marking technology, designed to significantly reduce the difficulties of locating small particles for SEM, SAM, AFM analysis, etc. Diamond indentation marks can be place accurately anywhere on the wafer, including around individual particles. The particles are located using a high sensitivity, wide field of view, optical system with CCD camera incorporated into the tool, plus acceptance and processing of initial light scattering files (Tencor, KLA, etc.). It may also be used for marking pieces of a wafer, if the subsequent analytical instrument cannot accommodate a full 8 wafer.
11:00 AM O1.6
ORGANIC CONTAMINATION ANALYSIS ON 8" Si WAFERS BY TOF-SIMS, C. Richard Brundle, C.R. Brundle and Associates, San Jose, CA; Yuri S. Uritsky, Applied Materials Inc, Dept of Core Technologies, Santa Clara, CA.
The ''standard" particle analysis approach of SEM/EDS is inadequate for characterizing ''particles'' which turn out to be small thin-film particles of organic/polymeric material. Other techniques, such as XPS or Static SIMS are much more appropriate but, until recently, have not existed in 8 compatible form. In the course of evaluating a recently developed 8 TOF-SIMS system, we examined contamination originally detected (in the standard manner) by a Tencor 6200 Surfscan (laser light-scattering) as ''Particles,'' and subsequently shown by SEM/EDS to be extremely thin patches with submicron to 30 microns diameter, which gave no additional EDS signal over wafer background. The SIMS results, taken both in imaging and high-resolution spectral modes, reveal that the patches are hydrocarbon fluoroether mixtures. The fluoroether was easily shown to be Krytox. In addition it was revealed that the whole monitor wafer was contaminated to a low level (5 monolayer) by the Krytox, indicating a significant vapor pressure source within the process chamber concerned. With this information the source of the Krytox was easily determined. These results demonstrate the power of coupling high mass resolution Static SIMS to the more traditional techniques when doing organic characterization.
11:15 AM O1.7
HIGH-SENSITIVITY TXRF USING SYNCHROTRON RADIATION, Piero Pianetta, S. Brennan, S. Ghosh, N. Takaura, Stanford Univ, Stanford Synchrotron Radiation Lab, Stanford, CA; Alice Fischer-Colbrie, Hewlett Packard Co, Matls Characterization Group, Palo Alto, CA; S. S. Laderman, Hewlett Packard Co, Palo Alto, CA; D. Wherry, S. Barkan, Kevex Inc, San Carlos, CA; A. Shimazaki, Toshiba Corp, Kanagawa, JAPAN.
Trace impurity analysis is essential for the development of competitive silicon circuit technologies. Current best methods for chemically identifying and quantifying surface and near surface impurities include grazing incidence x-ray fluorescence techniques using rotating anode x ray sources. To date, this method falls short of what is needed for future process generations. However, the work described here demonstrates that with the use of synchrotron radiation (SR), Total Reflection X-ray Fluorescence (TXRF) methods can be extended to meet projected needs of the silicon circuit industry through at least the remainder of this century. To date, SRTXRF has achieved a sensitivity for transition metals of 3 x 10 atoms/cm, as determined from Fe, Ni and Zn standards. This talk will discuss the methodology used for the SRTXRF measurements which have been developed at the Stanford Synchrotron Radiation Laboratory (SSRL) for both transition metals.and low Z elements such as Na, Mg and Al. The integration of this specialized technique with its high cleanliness requirements into the synchrotron radiation facility will be described, including the performance of the new equipment recently installed at SSRL.
11:30 AM O1.8
TRACE ELEMENT ANALYSIS WITH A NOVEL ACCELERATOR MASS SPECTROMETER AT THE NAVAL RESEARCH LABORATORY, Kenneth S. Grabowski, David L. Knies, Graham K. Hubler, Naval Research Laboratory, Washington, DC; Harald A. Enge, Deuteron Inc, Sherborn, MA; Terry M. DeTurck, Donald J. Treacy, Univ of Maryland, Dept of Chemistry, College Park, MD.
Improved trace element analysis tools are needed to develop ULSI materials and devices. A novel accelerator mass spectrometer facility at the Naval Research Laboratory offers some unique capabilities. This new facility will become operational in 1997 and will offer sub ppb sensitivities, 10-m image resolution, and depth profiling capabilities. It will perform similar to a dynamic secondary ion mass spectrometer (SIMS), but with a number of improved features. The instrument combines a modified commercial SIMS (Physical Electronics, Model 6300) as a source of secondary ions, with a 3-MV tandem accelerator as an improved detector. The accelerator will fragment molecular ions and reduce background signals. A unique feature of this instrument is its ability to acquire multiple masses in parallel. This improves quantification by continuous normalization to a matrix signal, and improves practical sensitivity when numerous species need to be monitored. This capability is enabled by use of a unique Pretzel magnet as a recombinator of low energy secondary ions. The Pretzel will serve as a notch mass filter to remove or diminish intense matrix-related beams, yet will recombine all desired beams for simultaneous transmission through the remainder of the system. Subsequent optical and steering components are all electrostatic to maintain parallel transmission of the multiple mass beams. A spherical electrostatic analyzer with 2.2-m radius and 30 bend provides energy discrimination (E/E 800), while a 33-ton split-pole magnetic spectrograph provides mass dispersion with high resolution (M/M 2500) along its 1.5-m-long focal plane. The spectrograph can measure over a factor of eight range in mass. Thus, elements from Si to U could be simultaneously measured. All major components of the facility have been delivered and are currently being installed and tested. Recent results will be presented.
11:45 AM O1.9
ANALYSIS OF CONTAMINANTS IN IC PROCESSING CHEMICALS AT THE SUB-PART-PER-TRILLION LEVEL, DaXue Xu, Russell F. Pinizzotto, Univ of North Texas, Dept of Materials Science, Denton, TX; Jennifer A. Sees, Texas Instruments Inc, Dallas, TX.
Particle contamination control in microelectronics fabrication is a critical issue. With high chemical sensitivity and spatial resolution, transmission electron microscopy (TEM) is an ideal tool for particle analysis. We have developed a TEM technique for the analysis of particulate contaminants in liquids (or gases) with an elemental detectability limit as low as 0.1 parts per trillion (ppt) and a particle concentration detectability limit as low as 1 particle/ml for particles greater than 0.2 m. This technique can provide morphological and compositional information as well as information about the contamination source. Particles in the liquids are collected by filtration through 0.2 m Nuclepore polycarbonate filters. TEM samples are prepared using an extraction replication method. Two important processing chemicals, HO (from manufacturer A) and HF (from manufacturers B and C), and DI HO were studied. For H0 A, tin and iron oxide/hydroxide particles were identified which may come from the pipes used in the distillation process during HO production. HF from manufacturer A contains mainly an amorphous, viscous material with Si, Sb, Cl, S, and Al identified by XEDS. Other types of as yet unidentified large particles were also observed. The HF from manufacturer C is significantly cleaner, consistent with the fact that the manufacturing yield is higher. For DI HO, spherical particles composed of light elements were observed. Particle contaminations on a new type of electronic device were also investigated. Devices were rinsed in ultrapure water. The water was filtered and the particles were collected on a polycarbonate filter. Clusters of very fine particles composed of Si and/or Al were observed.
SESSION O2: METROLOGY AND DEFECTIVITY
Chairs: Ercan Adern and Gabi Neubauer
Wednesday Afternoon, April 2, 1997
1:30 PM *O2.1
DIRECTION, IMPACT, AND INFRASTRUCTURE NEEDS FROM THE METROLOGY ROADMAP, Alain C. Diebold, SEMATECH Inc, Dept of Analytical Tech Infrastructure, Austin, TX.
The 1997 Metrology Roadmap and Roadmap Supplement to the National Technology Roadmap for Semiconductors is being developed during the first half of 1997. The 1997 Roadmap will have some key changes in direction. For example: the implementation of sensor based process control will be an evolutionary process; correlation of electrical and physical measurement must be improved; and there is a gap in the capabilities for meeting future imaging needs for detection, CD control and analysis. The infrastructure for metrology must also be developed. Suppliers do not have the resources to take new research and move it into R&D and then prototype stage. Reference materials for many areas such as shallow junctions, implant dose, sub 5 nm gate dielectrics, surface contamination, etc must also be developed. This talk will begin with an overview of the Metrology Roadmap. Examples of interest to the audience such as particle analysis will be used to illustrate the information in the roadmap. Key future needs such as improved imaging capability will be dicussed. The talk will end with an overview of the infrastructure needs for metrology.
2:00 PM O2.2
METROLOGY OF THIN TITANIUM FILMS FOR ULSI PROCESSING, Ercan H. Adem, Advanced Micro Devices, Sunnyvale, CA.
Titanium films are widely used as sacrificial barrier or as part of a stack diffusion barrier layer in ULSI metallization. Controlling the thickness of titaniium films during deposition is of paramount importance. In this paper, we will discuss issues of metrology of physical vapor deposited (PVD) titanium films in the thickness range of 10 nm to 100 nm. Metrology tools used include x-ray fluorescence (XRF) and a 4-point probe. Also discussed will be the apparent change in sheet resistance as a function of post-deposition time in ambient air.
2:15 PM O2.3
OPTIMIZATION OF ELLIPSOMETRY FOR THICKNESS DETERMINATIONS OF ULTRA-THIN DIELECTRICS (<50), Simon J. Fang, Texas Instruments Inc, Dallas, TX; Ji-Feng Ying, Calvin X. Fang, C. Robert Helms, Stanford Univ, Dept of Electrical Engr, Stanford, CA.
According to 1994 National Technology Roadmap for Semiconductors (NTRS), the thickness of gate oxide will be reduced to 50 by the year 2001. In 1994, Momose even demonstrated the possibility of 0.1 micron devices using 15 gate oxides, which was previously considered impossible. Since several angstroms of error in gate oxide thickness can lead to large deviations in electrical characteristics, determining oxide thickness accurately becomes a critical issue. In practice, only capacitance measurements, transmission electron microscopy (TEM), and ellipsometry can deliver the resolutions in thickness measurements required for the NTRS roadmap. Compared to TEM and capacitance measurements, ellipsometry is more suitable for processing control because no further sample preparations are required. However, several problems still present on ellipsometric measurements for thin dielectrics. These problems include erroneous assignment of film index, the uncertainties of alignment and substrate index, and the ignorance of the roughness on ellipsometric modeling. In this work, we begin with discussions of these problems. Among these factors, the roughness has the greatest effect in the thickness measurements. By knowing the quantitative correlation of roughness measured by AFM and ellipsometry, the influence of roughness on the measurements of thin dielectric thickness will be illustrated. Reviews of the optical constants of Si/SiO system are also provided. We suggest that a more accurate Si index is required. The measurement of thin oxide index is also discussed. Additionally, issues about the preparation of the reference sample are provided in this paper. Based on this knowledge, we are able to develop a strategy to apply ellipsometry for ultrathin dielectric thickness control.
2:30 PM O2.4
A COMPARATIVE INVESTIGATION OF DEFECT REVIEW BY SEM/EDS AND SEM/AES, Paul L. King, Ercan H. Adem, Advanced Micro Devices, Sunnyvale, CA.
Commercial instrumentation is now available which allows defect review of six- and eight-inch wafers with elemental analysis carried out by Auger electron spectroscopy (AES). PHI's SMART200 incorporates UHV design, a CMA electron analyzer, a field emission electron source, and an interferometer based wafer stage into a system that introduces practical AES to the task of defect review. Defect files generated by review stations such as KLA, Inspex and Tencor are supported. We present case studies of full wafer defect review which illustrate the advantages and tradeoffs of particle analysis by EDS and by Auger electron spectroscopy. Defect reviews performed with the SMART200 system are compared with results from a comparable EDS-based review (a Philips platform with a Noran or EDAX EDS system). One example of patterned wafer review and one example of unpatterned wafer review are presented. Practical analysis is emphasized with each wafer review being limited to four hours. The conclusions reached by each separate analysis are compared with the more informed story drawn with access to both data sets.
2:45 PM O2.5
PRECISION / ACCURACY STUDY AND APPLICATIONS OF SCANNING PROBE MICROSCOPY, Wei Chen, Motorola Inc, Mesa, AZ; Joe Hooker, Motorola Inc, Materials Research & Strategic Technologies, Mesa, AZ; Jim Mohr, LATG, Logic R&QA PAL, Chandler, AZ.
A study has been carried out in which Atomic Force Microscopy (AFM) measurement accuracy and precision have been examined. For AFM measurement precision, surfaces of epi-Si, poly-Si and Al bond pads covering over three orders of magnitude of surface root-mean-square roughness range have been imaged under the same imaging repeatedly over a period of a year. A standard deviation of the measurement results was obtained which is of great practical importance since it sets the measurement error bars for the corresponding surface roughness ranges studied. Results from over fifty measurements revealed that the average root-mean-square surface roughness for specific epi-Si, poly-Si and AlCuSi bond pads to be 0.075nm, 6.11nm, 16.21nm with corresponding standard deviations of 1.3%, 5%, 6%, respectively. Measurement accuracy was studied by measuring NIST height standards (1nm, 10nm and 100nm in height) periodically . The accuracy within the height range studied is better than 1.5%. Other issues investigated were the impact of probe tip size on measured surface roughness and scan linearity of the piezoelectric tube which will be discussed in the presentation. A summary of surface morphology measurements from over 20 key materials used in the semiconductor industry will be presented. In addition, application of Electric Force Microscopy, Magnetic Force Microscopy towards semiconductor materials/ devices characterization will be discussed as well.
3:30 PM *O2.6
SEMICONDUCTOR DEFECTS AND THEIR CHARACTERIZATION: FUTURE CHALLENGES, Dieter K. Schroder, Arizona State Univ, Dept of Elect Engr, Tempe, AZ.
Defects play an increasingly important role in semiconductors as device dimensions shrink. A key device degradation traced to metallic contamination is oxide integrity. Silicon suppliers produce wafers with less than 10 cm metallic contaminants. Bulk metal impurities are as low as 10-10 cm. Maintaining such low levels requires careful processing and effective gettering. In this talk I address the role of defects in semiconductors and their effect on device degradation. I will discuss the source of defects, typical defect densities, and defect types, as well as the more important defect characterization techniques, including haze test, deep-level transient spectroscopy, recombination/generation lifetimes, total reflection x-ray fluorescence, and scanning tunneling/atomic force microscopy. I will give typical sensitivities of these measurement techniques and discuss the reasons for such limits. For example, recombination/generation lifetime measurements can detect metallic contamination in the 10 cm range. However, surface effects can corrupt such measurements if not carefully controlled. I will show examples of how such measurements can be used as yield predictors. Finally I will give some examples of prominent defects in silicon, including oxide precipitates and iron contamination. Even surface roughness and native oxide can be thought of as a defect because it influences device performance.
4:00 PM O2.7
AN ELYMAT EVALUATION OF SILICON LIFETIME DEGRADATION RESULTING FROM VARIOUS PROCESSING STEPS, Jack H. Linn, George V. Rouse, William J. Wereb, Robert W. Leggett, Harris Semiconductor, Palm Bay, FL.
Contamination by trace metallic impurities is a well known yield limiting factor in semiconductor processing. Metallic impurities can easily be introduced unintentionally at various processing steps, including wet etches and cleans, dry resist stripping and etching, ion implantation, and high-temperature oxidation and diffusion. Some trace metallic impurities, present as single interstitial metal atoms or as microscopic precipitates, enhance minority carrier recombination, thus reducing the recombination lifetime. Therefore, the concentration of these defects is inversely proportional to the recombination lifetime. The Electrolytic Metal Analysis Took, or ELYMAT, makes use of lifetime measurements to detect certain metallic impurities and oxygen precipitates in the bulk and near-surface layer of silicon wafers. Surface impurities can also be measured, but require a thermal activation procedure to diffuse them into the bulk of the silicon. The system utilizes a focused laser to generate minority carriers in a thin surface layer on the front side of the wafer. Under bias, the minority carriers diffuse through the wafer and either recombine through the crystal defects or are collected at the backside of the wafer. The resulting current is measured for each scanned point and a high-resolution map proportional to the lifetime distribution across the wafer is obtained. This paper will present lifetime measurement data from silicon wafers processed through a variety of different processing steps and tools. Data from wafers processed through oxidation and diffusion tubes, wet etch tanks, spray-acid tools (SATs), spin rinse dryers (SRDs), dry etchers and strippers, and implanters will be compared to unprocessed and annealed control wafers. Data will also be presented which demonstrate that wafers requiring a thermal activation (e.g., wet etch, dry etch, implant, etc.) must be subjected to specific thermal recipes and equipment in order to minimize cross contamination.
4:15 PM O2.8
CHARACTERIZATION OF LOCAL ELECTROPHYSICAL PROPERTIES OF ELECTRICALLY ACTIVE DEFECTS AT INSULATOR-SEMICONDUCTOR INTERFACE, Vladimir M. Popov, Research Inst of Microelectronic Devices, Physical & Chemical Research Ctr, Kiev, UKRAINE.
Electrically active defects (EAD) at insulator - semiconductor (IS) interface are one of the best important surface irregularities which play an essential role in submicron IC performance and reliabilIty. Method for determination of local electrophysical parameters of EAD responsible for the values of bulk generation lifetime of minority carriers in metal insulator-semiconductor (MIS) structures has been developed. The new technique enables to study Internal properties of submicron size EAD using test structures with electrodes which have much higher dimensions than the defects being investigated. The method is based on analysis of pulse-modulated dynamic unsteady-state current-voltage characteristics (DUCVC) of MIS structures. The essence of the method Is that special conditions in MIS structures are created owing to which local EAD properties can be strictly distinguished from integral properties of the whole structures. The main advantage of DUCVC over high-frequency capacitance-voltage (CV) methods consists in much higher sensitivity to generation processes in MIS structures. It was found that various properties of IS/MIS structures are significantly altered in EAD regions. Among then are fixed and mobile (ionic) charges In oxide, fast surface states density, the doping concentration, and others. The local fluctuations of these parameters in EAD regions in some cases differ more than one order of magnitude from their mean values in IS/MIS structures in whole. DUCVC, CV, DLTS, and SEM (EBIC mode) methods were used in complex for better understanding of EAD features in Si-SiO structures in a wide range of SiO2 thickness (30-1000A). We have found that the main contribution to minority carriers generation processes in Si-SiO structures is introduced by special kind of EAD which are situated in the vicinity of the silicon surface. A combination of pulse-modulated DUCVC and DLTS methods was shown to reveal the characteristics of deep levels in EAD in silicon controlling the generation of minority carriers in IS/MIS structures. For the purpose of direct measurements of local electrophysical parameters of IS structures, special microprobe has been designed. The tip of the microprobe was covered by liquid metal and allowed nondestructive testing of IS structures with 2-5 m locality. As a result, local properties of single defects and lateral distributions of electrophysical parameters of defect-free regions in Si-SiO interfaces in IC test structures were examined. Local fluctuations of fixed oxide charge, fast surface states charge, and bulk generation lifetime of minority carriers have been measured. We have found that local fixed oxide charge density in Si-SiO structures exhibits a variation near the electrode edges. This effect was shown to depend on stress distributions induced in Si SiO interfaces by fine patterned aluminium and polysilicon film edges.
4:45 PM O2.10
ENVIRONMENTAL INFLUENCE ON THE MEASUREMENTS OF OXIDE FILMS, Boyang Lin, George Brown, Texas Instruments Inc, Dallas, TX; Michael F. Pas, Texas Instruments Inc, Semiconductor Process & Device Center, Dallas, TX; Roger Verkuil, Greg Horner, Michael Peters, Keithley Instruments, Cleveland, OH.
Measurements of oxide quality are necessary in monitoring oxide furnace performance. Traditionally, to carry out the measurements, MOS capacitors have to be fabricated, which requires additional equipment and can be time consuming. It is possible to develop oxide testing systems that can measure oxide properties without the need of fabricating real MOS capacitors. Such equipment is now available and its applicability to furnace monitoring is tested in our fabrication facility. One of the important parameters in monitoring oxide quality is the value of the flat band voltage (Vfb). We find that Vfb can change by as much as 0.2 V during exposure to the fab environment as the wafer awaits testing. This change is too much for reliable furnace monitoring. We find the change in Vfb is not due to organic adsorption, since using resist strip 2001 at elevated temperatures does not reverse the change. On the other hand, leaving a wafer alone inside a wet box for 15 minutes duplicates the Vfb change. This shows that the adsorption of water molecule is the culprit. The change in Vfb is independent of the oxide thickness, indicating that water molecules are on the surface of the oxide. A calculation of the potential change due to HO dipoles on the oxide surface shows that the amount of water molecule absorbed is approximately 3El3/cm for a 0.2 V change in Vfb. The change in Vfb can be avoided by keeping wafers in a dry air or nitrogen environment. It can also be avoided by heating the wafers in air before testing. With these changes, this equipment has become a convenient tool in measuring Vfb. The measured Vfb, as well as other oxide parameters, such as the oxide thickness, interface trap density, and mobile charge density will be compared with traditional C-V measurements.
SESSION O3: POSTER SESSION:
MATERIALS AND FAILURE ANALYSIS POSTERS
Chairs: Robert C. McDonald, Gabi Neubauer, Tom Remmel and Larry Wagner
Wednesday Evening, April 2, 1997
TECHNIQUES AND APPLICATIONS OF THE BACKSIDE EMISSION SPECIMEN PREPARATION SYSTEM, Shane P. Roberts, South Bay Technology Inc, San Clemente, CA.
New improvements in specimen preparation have allowed for analysis of encapsulated integrated circuits by the use of emission microscopy techniques. This paper presents a new specimen preparation system which allows for the rapid preparation of packaged devices for backside inspection for many different configurations. Preparation of specimens is done without damaging the leadframe or device, maintaining the original failure mechanism for identification. With this new technology, backside emissions normally trapped by multilevel metallization schemes in frontside emission microscopy can readily be obtained and collected. Mechanisms of thinning, specimen preparation procedures, and equipment design and applications will be discussed.
ELEMENTAL AND STRUCTURAL CHARACTERIZATION OF NiPtSi THIN FILMS, Steve Kilgore, Thomas Anderson, Naresh Saha, Mark R. Schade, Justin Zimmer, Motorola Inc, Comm & Signal Tech Group, Phoenix, AZ.
Sputter-deposited and thermally annealed NiPtSi thin films have been used more than thirty years as Schottky barrier diodes or ohmic contacts on Si surfaces. Variances in Pt elemental distribution throughout the Ni-rich silicide serves to change the Schottky barrier heights and hence influence dielectric characteristics. Both high resolution SEM and AFM studies were employed to quantify changes in surface grain structure as a function of processing and chemical etching. AES studies quantified the relative distributions of Ni, Pt, And Si within the as-deposited and the silicided films.
DIELECTRIC LAYER ASSESSMENT USING QUADRUPOLE SIMS: A TOOL FOR PROCESS MONITORING AND IMPROVEMENT, Gary R. Mount, Mauro R. Sardela, Charles Evans & Associates, Redwood City, CA.
The effectiveness of a device dielectric layer stack in resisting the migration of mobile ions is important in achieving high product yields and good field performance. Two significant dielectric layer properties in resisting migration are layer thickness and composition. The measurement of the finished device dielectric stack by Quadrupole SIMS can be a valuable on-going process assessment tool. Quadrupole SIMS depth profiles can show layer thickness, composition, and the presence of mobile ion (Li, Na and K) contamination. Careful analysis using a strict protocol assures accurate thickness determination, quantification and minimizes the movement of mobile ions during the measurement. The resulting profile can be a valuable tool for the assessment of the general level of mobile ion contamination, the effectiveness of the BPSG or PSG layer in gettering these contaminants, and the results of any process changes on contamination levels. Contaminant reduction programs can be evaluated with these profiles. An on-going monitoring program is highly recommended since it can assure that the effects of intended and unintended process changes are known.
USING SURFACE SENSITIVE MICROSCOPIES FOR CHARACTERIZING BIASED DEVICES, Raymond J. Phaneuf, Margret Giesen, M. L. Hildner, Ellen D. Williams, Univ of Maryland, Laboratory for Physical Sciences, College Park, MD; Harald Ibach, Forschungszentrum Julich GmbH, IGV, Julich, GERMANY.
We demonstrate the capabilities of photoemission electron microscopy (PEEM) and scanning tunneling microscopy and spectroscopy (STM,STS) in providing spatially resolved information about the composition, topography and electronic structure and lateral electrostatic fields on devices under applied electrostatic bias. The sensitivity of PEEM to surface statederived variations in photothreshold with doping makes it a useful probe of doping profiles and oxide patterns on devices. Features within PEEM images of a Si-pn junction change in a predictable manner with applied electrostatic bias between p and n regions, allowing the lateral surface fields to be probed. We show that STS allows direct measurement of the electrostatic potential across a biased device, and allows features within STM ''topographical'' scans to be correlated to the region of the device across which the electrostatic potential drop occurs.
CORRELATION OF MICRO-RAMAN STRESS MEASUREMENTS OF A SiO/Si SYSTEM TO FINITE ELEMENT SIMULATIONS, Calvin J. Doss, Nancy Fang, Robert McFadden, Wayne Ford, Jorge Garcia, Intel Corp, Hillsboro, OR.
The local mechanical stress induced in a silicon substrate by a silicon dioxide film is studied using micro-Raman spectroscopy and finite element analysis. In a series of experiments, samples were prepared by depositing various silicon dioxide films on a silicon substrate to give different room temperature residual film stresses. A trench in the oxide film was then cut out to produce a stress variation in the Si substrate across the trench. The stress distribution across the trench was obtained by collecting the stress-induced Raman peak shift of the 520 cm silicon phonon band, and fitting the relative Raman peak shift to the corresponding finite-element-calculated Raman frequency-shift profiles, which includes all the necessary corrections to account for laser intensity, penetration depth, and spot size. This study demonstrates that the oxide film stresses obtained using the micro-Raman spectroscopy are in good agreement with the blanket film stresses from curvature measurements. Furthermore, the results show that the local stress in the silicon increases as the trench spacing becomes smaller.
SESSION O4: MATERIALS AND PROCESS CHARACTERIZATION
Chairs: Mark Anthony and Tom Remmel
Thursday Morning, April 3, 1997
8:30 AM *O4.1
INTEGRATION OF MATERIAL CHARACTERIZATION, COMPUTER MODELING AND FAILURE ANALYSIS FOR ULSI PACKAGING DEVELOPMENT, Paul S. Ho, Univ of Texas-Austin, Dept of MS&E, Austin, TX.
As ULSI chip technology advances toward higher performance and density, this requires increasing improvements in the functional design, performance, yield and reliability for electronic packages. To meet the demand for faster development cycle, lower cost and improved reliability, the development of advanced packaging structures will require an optimal combination of materials characterization, computer modeling and yield/reliability analysis. An integrated strategy can be formulated where the database for materials to be used is established as input for computer modeling of the structural integrity of electronic packages under processing and operating conditions. This is followed by experimental verification of the modeling results using test structures subject to yield and reliability tests. Results from these studies can establish a framework integrating material characterization, computer modeling and failure analysis for development of advanced packaging structures. This approach will be illustrated using results from recent studies of liquid encapsulants and their applications for plastic flip-chip packages.
9:00 AM O4.2
THERMAL DIFFUSIVITY MEASUREMENT OF LOW-DIELECTRIC CONSTANT MATERIALS USING PHOTOTHERMAL DISPLACEMENT CHARACTERIZATION, Ennis T. Ogawa, Univ of Texas-Austin, Austin, TX; Chuan Hu, Univ of Texas-Austin, Dept of MS&Er, Austin, TX; E. Todd Ryan, Univ of Texas-Austin, Ctr for Matls Science, Austin, TX; Paul S. Ho, Univ of Texas-Austin, Dept of MS&E, Austin, TX.
Understanding the fundamental aspects of thermal response in low dielectric constant materials will be important for the development of advanced interconnect structures in microelectronics applications. In particular, we have developed a photothermal method for measuring the thermal diffusivity of polymeric thin films. A salient feature of this technique is its ease of sample preparation and its potential for studying more complicated multilevel structures. The key to this technique is the detection of the thermal expansion of a sample upon absorption of a modulated source of electromagnetic radiation (HeCd). Signal detection is accomplished by the use of a low power HeNe laser which reflects at some angle with respect to the sample normal. This probe is used to scan the surface displacement across the central portion of the heated area. The reflected beam signal is directly related to the slope of the surface displacement at the probe laser spot and shows, among other parameters, a dependence on the modulation frequency. This beam is subsequently monitored by a quad-cell position sensitive detector (PSD) and a lock-in amplifier. Measurements of the in- and out-of-phase components of the deflected beam at various modulation frequencies and radial positions generate the thermal diffusivity value after comparison to numerically obtained results. We have demonstrated this method by measuring the thermal diffusivity of a 75 m, free-standing sheet of Upilex polyimide to be about 3.0 x 10 /s. Measurements performed within the frequency range of 50 to 400 HZ are consistent to within 5, and site-to-site repeatability at fixed frequency is about 2. Furthermore, the observed value is in good agreement with thermal diffusivity values obtained by other methods. We shall present our results and analysis on similar materials and describe progress towards understanding the characteristics of thinner films as well as layered structures typical to microelectronics technology.
9:15 AM O4.3
NANOINDENTATION HARDNESS OF SOFT ALUMINUM BLANKET FILMS AND INTERCONNECT LINES ON HARD SUBSTRATES, Ting Y. Tsui, Advanced Micro Devices, Dept of Matls Technology Development, Sunnyvale, CA.
Nanoindentation is a common technique for measuring the hardness of thin films. However, when the film is very thin, accurate measurements are sometimes difficult to obtain because the substrate can influence the indentation load- displacement behavior. The actual film hardness are usually consider as a value approaches asymptotically small indentation depths. In order to obtain such results, a large number of indentations made at different depths and large specimen area is required. The hardness measurements of truely localized area such as interconnect lines become almost impossible to achieve. Here, we address the source of substrate effect due to pile-up for soft aluminum films deposited on hard silicon substrate with silicon oxide barrier layer. A detailed scanning electron micoscopy examination of the nanoindentations reveals that the actual hardness is constant when the indentations are within the film thickness. This suggests local hardness of very small structures such as interconnect lines can now be determined by performing a single indentation at any depths less than the film thickness. The edge effect from the interconnect lines will also be discussed.
9:30 AM O4.4
CHARACTERIZATION AND OPTIMIZATION OF POLSILICON PROPERTIES FOR MICROMECHANICAL DEVICES, Katrina M. Edenfeld, Thomas Wiegele, Laurie Goldstein, Motorola Inc, Advanced Custom Technologies, Mesa, AZ.
Surface micromachined polysilicon is a widely used structural material for micromechanical systems due to its mechanical properties and ease of process integration. In most micromechanical structures, a designer’s primary concern relates to how the polysilicon film will react once it is released from underlying layers. In this context, an understanding of average stresses and strains, as well as their gradients along the film thickness, are critical to assessing a structure’s performance as it interacts with the physical world. In most micro-accelerometers, for example, the motion of a movable mass is measured in response to an inertial load in order to create an electrical output that is proportional to the acceleration. Depending on the design, average stresses and stress gradients can “artificially” move the mass, creating a false signal, or “offset”, which must be compensated for electrically. Minimizing this effect implies less required circuitry, which directly translates to a smaller device size and therefore a lower cost. The importance of material type and processing technique is clear. An accurate measurement of the material’s Young’s modulus is essential for most analytical techniques used to measure stress and stress gradients. In addition, as feature sizes continue to decrease, the measurement of local material properties becomes increasingly important. It is no longer adequate to obtain average film properties over a single wafer. Rather, location-dependent information must be obtained in order to more accurately model the device and predict its performance. Nano-indentation is an ideal tool for acquiring this type of data. Polysilicon films were deposited with varying conditions and exposed to different thermal cycles to determine the optimum processing conditions. The elastic response of each film was determined through indentation measurements using an atomic force microscope (AFM)- based indenter. This system also allows precise location of indent as well as convenient measurement of indent geometry, surface roughness and average grain size.
10:15 AM *O4.5
ANALYTICAL CHALLENGES OF (Ba,Sr)TiO3 BASED DRAMs, Mark Anthony, Texas Instruments Inc, Dallas, Tx.
As DRAM densities increase, capacitance levels must remain roughly constant even though the projected capacitor area decreases dramatically (60% every 3 years). Retaining capacitance under these conditions requires the introduction of new high permittivity materials such as (Ba,Sr)TiO3 (BST) rather than conventional oxide/nitride dielectrics. Implementation of this material poses unique analytical challenges. The dielectric and leakage properties of BST vary with composition, and very tight measurement and control of the stoichiometry is required during deposition. BST will be deposited primarily by CVD methods in oxygen bearing ambients on three dimensional structures, and the total capacitance is a combination of the coverage on all sides of the structure. Composition variations along the sidewalls of these 0.18 um structures are very difficult to address experimentally, but the sidewalls will represent the bulk of the capacitance. The electrode and diffusion barriers associated with BST must remain conductive during the CVD deposition, and physical and electrical characterization of their oxidation resistance is critical. Finally, the proposed electrodes (Pt, Ru) and dielectric (BST) represent several materials that are not conventionally considered fab-friendly. An understanding of the impact of contamination with these materials is required, both on the underlying CMOS transistor performance and possible cross-contamination during shared production tool usage. Controlled contamination studies of these materials requires the complementary use of several methods (TXRF, ICP-MS, HIBS) for effective evaluation. These issues will be discussed in light of the manufacturing challenges required for efficient DRAM implementation.
10:45 AM O4.6
SIMS ANALYSIS OF ENERGY CONTAMINATION AND CHARGE EXCHANGE DURING ION IMPLANTATION, Zhiyong Zhao, Varian Associates Inc, Ion Implant Systems, Gloucester, MA; C. Magee, Evans East, Plainsboro, NJ; James Jillson, Ronald Eddy, Varian Associates Inc, Ion Implant Systems, Plainsboro, NJ.
Reduction of energy contamination during ion implantation is becoming increasingly critical for device performance. Modern implanters are, therefore, being developed with better pumping capacity and novel beam line designs to keep possible charge exchange to a minimum, especially wide photoresist covered wafers. A protocol has been established using a Quad. SIMS which yields 1-2 of repeatability. This high precision performance gives the confidence in the analyst and enables detailed study of energy contamination in ion implantation. In addition, it provides a way of investigating the charge exchange mechanism of implant ions in the beam line. Due to the much improved consistency in SIMS measurement, very low levels of contribution from different charge states can be distinguished. For multiply charged ion implants data will be presented in which detailed charge distributions are observed and the absolute amount of energy contamination level is determined using a bare wafer as a control. The possible charge exchange mechanisms are discussed based on the depth and the amount of contaminants.
11:00 AM O4.7
CHARACTERIZATION OF TITANIUM NITRIDE LAYERS WITH GRAZING-EMISSION X-RAY FLUORESCENCE SPECTROMETRY, Guido Wiener, Philips Research Laboratories, Dept of Prof Instr Research, Eindhoven, NETHERLANDS; S. J. Kidd, Univ of Strathclyde, Dept of Physics & Appl Chemisty, Inverness, SCOTTLAND; H. Paul Urbach, Philips Research Laboratories, Eindhoven, NETHERLANDS; Pieter K. de Bokx, Philips Research Laboratories, Dept of Prof Instr Research, Eindhoven, NETHERLANDS.
Grazing-Emission X-Ray Fluorescence (GEXRF) spectrometry is the latest development in analytical X-Ray Fluorescence (XRF) instrumentation. It combines the advantages of classical wavelength dispersive XRF and (angle dependent) Total-Reflection X-Ray Fluorescence (TXRF) analysis. GEXRF is sometimes referred to as TXRF “reversed optics” because x-ray tube and detector have exchanged their positions. Hence, in GEXRF samples are irradiated at approximately right angles and fluorescence radiation is detected at grazing angles (around the critical angle of total external reflection). The total-reflection mode applied both in TXRF and GEXRF allows a substantial suppression of background radiation scattered in the sample bulk and, thus, low detection limits can be obtained. Owing to the “reversed optics” geometry in GEXRF the application of wavelength dispersive detection is possible. The much better resolution of crystal monochromators at long wavelengths compared to energy dispersive detectors used in TXRF makes the light elements as well as L- and M-lines accessible to characterization with GEXRF. Moreover, by scanning the emission angle additional information like density and thickness of layered samples can be obtained. The principles and design of a laboratory GEXRF spectrometer will briefly be discussed. The application of GEXRF for the characterization of titanium nitride layers prepared by reactive magnetron sputtering will be presented. Chemical composition as well as physical properties of the layer (thickness and density) are obtained as a function of the position on the sample.
11:15 AM O4.8
RBS AND XRD CHARACTERIZATION OF RIS Ta-N FILMS, Terry L. Alford, Arizona State Univ, Dept of Chem Biochem & Matls Engr, Tempe, AZ; Tom Remmel, Motorola Inc, MRST/MCL, Mesa, AZ.
Ta-N is a candidate for application in emerging semiconductor processes, including barriers for copper metallization and electrodes for high dielectric constant memory elements. Resistivity and stability of the Ta N film are key attributes in assessing the applicability of the material. These properties are very much a function of the physical and chemical character of the Ta-N films. This study focuses on characterization of Ta N films formed by reactively ion sputtering of a Ti target in an Ar/N gas. Stoichiometry was measured using RBS and phase identification was accomplished using x-ray diffraction. Differences in stoichiometry and microstructure are correlated with process parameters and film resistivity.
11:30 AM O4.9
COMPOSITION AND INTERFACE CHARACTERIZATION OF HETEROJUNCTIONS IN MICROELECTRONIC DEVICE STRUCTURES, Mauro R. Sardela, Andrei V. Li-Fatou, Charles Evans & Associates, Redwood City, CA.
Alloy composition and interface sharpness are two crucial parameters in the prediction of semiconductor heterostructure bandgap offsets and in bandgap engineering of optoelectronic devices. These two parameters - stoichiometry and interface mixing - were investigated in epitaxial multilayered SiGe/Si(Ge) junction devices and superlattices. Three different secondary ion mass spectrometry (SIMS) methods were employed in order to separate compositional variations and Ge segregation from analytical artifacts such as matrix effects and ion knock-on processes. An improved SIMS technique, based on reduced impact energy and reduced angle of incidence of the primary sputtering beam, was developed. Depth resolution in the characterization of SiGe/Si interfaces were demonstrated to improve by a factor of 2-3 over conventional SIMS approaches. In this case, interface sharpness for structures grown at 550C was solely limited by the segregation decay length during growth processes. Thickness dependence of interface abruptness was also investigated in 50-periods 3-nm-thick SiGe/Ge(001) superlattices.
11:45 AM O4.10
THE EFFECT OF VARIABLE BPSG/PSG COMPOSITION ON CMP ETCH RATES, Gary R. Mount, Alice Wang, Victor K. Chia, Charles Evans & Associates, Redwood City, CA.
CMP etch back on interlevel dielectric layers provides a well planarized surface and meets low thermal budget requirements. However, CMP etch rates are dependent on boron and phosphorous concentrations in BPSG, and on phosphorous concentrations in PSG. At concentrations over 3 wt, a 1 change in stoichiometry can lead to over a 1 change in CMP etch rate. Predictable CMP etch rate and final planarized film thickness therefore requires good control over stoichiometry both across the wafer and through the film. To assess this control, accurate characterization is required. Boron and phosphorous quantification done by wet chemistry uses relatively large areas of a wafer limiting cross wafer characterization effectiveness and it does not show stoichiometry changes through the thickness. Quadrupole SIMS is shown to be an effective tool for characterizing cross-wafer and in-depth concentrations for both BPSG and PSG. An assessment of the Quadrupole SIMS depth profile accuracy and precision is presented. The implications of B and P concentration changes as a function of depth on CMP etch rates is discussed.
SESSION O5: FAILURE ANALYSIS
Chairs: Valluri R. Rao and Larry Wagner
Thursday Afternoon, April 3, 1997
1:30 PM *O5.1
FAILURE ANALYSIS CHALLENGES FOR ULSI, Dave Vallett, IBM Corp, Essex Junction, VT; R. Anderson, Sandia National Laboratories, Albuquerque, NM; M. Bahrami, Digital Semiconductor, Hudson, MA; R. Clark, Intel Corp, Folsom, CA; G. Gilfeather, Advanced Micro Devices, Austin, TX; T. Hasegawa, National Semiconductor Corp, Santa Clara, CA; C. Henderson, Sandia National Laboratories, Albuquerque, NM; S. Pabbisetty, Texas Instruments Inc, Houston, TX; M. Thayer, Advanced Micro Devices, Austin, TX; W. Tomschin, Hewlett Packard Co, Corvallis, OR; Larry Wagner, Texas Instruments Inc, Dallas, TX; J. Wilson, Digital Semiconductor, Hudson, MA; D. Yim, Advanced Micro Devices, Sunnyvale, CA.
The ability to analyze failures in ULSI components to their root cause is being threatened in a number of areas. This presentation addresses the major challenges facing the failure analysis industry as seen by the SEMATECH Product Analysis Forum (PAF). Of primary concern are the areas of fault localization and inspection. Traditional hardware-based fault localization techniques (e.g., voltage contrast, liquid crystal, etc.) are obsolete on products with area-array I/O in flip-chip configurations. Relatively rapid inspection of localized faults with optical microscopy is at risk as structures and defects approach resolution limits. These and other development needs will be discussed. The need for strong interdisciplinary cooperation between industry, academia, the national laboratories, and equipment suppliers to take solutions beyond proof-of-concept to fully-engineered and supported laboratory tools is emphasized.
2:00 PM *O5.2
ELECTRICAL FAULT ISOLATION TECHINQUES FOR ULSI IC's, Valluri R. Rao, Intel Corp, Santa Clara, CA.
With the relentless push towards sub 0.2 m technologies and deep submicron designs, IC electrical Fault Isolation (FI) and Failure Analysis (FA) is becoming extremely challenging. With clock frequencies climbing to 500 MHz and above, the number of metal interconnect layers increasing to 5 and above, and metal pitches shrinking, existing FI/FA tools and techniques are being taxed to the limits. In this paper we will discuss FI techniques that will address some of these issues. Techniques utilizing electron beams, ion beams and photon beams both for electrical probing and circuit modifications will be discussed.
2:30 PM O5.3
MEGABIT DRAM DEVICE FAILURE DISTRIBUTIONS AND LOCALIZED SILICON SUBSTRATE DEFECTS, M. McQueen, Fernando Gonzalez, Micron Technology, Boise, ID; George A. Rozgonyi, North Carolina State Univ, Dept of MS&E, Raleigh, NC.
The simultaneous upgrading to 8-inch wafers and introducing new processing equipment has increased the number of device failures significantly over the 6-inch wafer generation. Device failure distribution patterns on wafer yield maps give valuable clues as to the failure modes of DRAM devices. Some of these patterns can be traced back to the starting silicon as the root cause of the failures. Representative substrate defects include Oxidation-Induced Stacking Faults (OSF) arranged in an annular ring pattern. It is demonstrated by failure analysis of the ring defect that two types of effects are possible: either the individual OSF defects encompass the near-surface region, causing an overlapping ringed failure pattern, or the defects are buried below the surface, producing a yield improvement inside the OSF region.
A similar type of failure distribution has also been found earlier in the process sequence, resulting in poor gate oxide integrity. The wafer failure pattern has been used to trace the origin of the poor gate oxide to the silicon polishing manufacturing process. The failure analysis data on OSF can be compared to the in-line process monitor using Laser Microwave Photoconductance Decay (LMPCD). The deprocessed sample with the OSF pattern will indicate the size of the stacking fault. The bit mapping of the different die around the OSF ring can show the edge of the ring pattern even within the array of a given die. The GOI maps and static refresh maps correlate with the physical defect at the substrate level. In this report, we present the failure analysis and LMPCD results to correlate the surface silicon defects with the full CMOS devices.
3:15 PM *O5.4
RECENT DEVELOPMENTS IN FOCUSED ION BEAM TECHNIQUES FOR FAILURE ANALYSIS, Phillip E. Russell, North Carolina State Univ, Dept of Matls Science, Raleigh, NC; T. J. Stark, Materials Analytical Services, Raleigh, NC.
Recent developments in FIB have included optics and automation improvements as well as technique development. Ion beam optics have improved rapidly in the past decade to the point where the beam size and profile does not dramatically limit its use in failure analysis.. Many recent improvements in FIB processing are in the area of chemical enhancement, where the incident ions initiate chemical reactions with surface adsorbates. These reactions can broaden the effectiveness of FIB milling and/or deposition, by, for example, selectively changing the material removal rate of the components in the sample, or by selectively depositing material to the sample. We have developed the use of water vapor in chemically assisted FIB processes such as passivation removal, resist cross sectioning, and insulator deposition. Carbon based materials show a highly enhanced removal rate in the presence of water ; whereas metallization lines show dramatically reduced removal rates. This allows for selective removal of passivation and/or dielectrics to open access windows or prepare cross sections. The use of water vapor has also proven to greatly reduce redeposition problems when performing cross sectional analysis of delicate photoresist structures; greatly extending the confidence in using such sections for metrology. The use of water or oxygen can aid in the deposition of insulating materials from silicon containing precursors such as TEOS. In this case the additional oxygen appears to increase the resistance of the material being deposited.
3:45 PM O5.5
THE APPLICATION OF TRANSMISSION ELECTRON MICROSCOPY ANALYSIS TO DEFECT REDUCTION AND YIELD ENHANCEMENT IN CMOS VLSI, Lesley J. Elliott, Digital Equipment Corp, Hudson, MA; Jamie H. Rose, Digital Equipment Corp, Digital Semiconductor, Hudson, MA; Rich Shuman, Tongo Ngo, Mike Foley, Randy C. White, Digital Equipment Corp, Hudson, MA.
Defect reduction and yield enhancement are critical to the quality and reliability of today's CMOS VLSI technologies. In this paper we demonstrate the application of Transmission Electron Microscopy (TEM) analysis to specific defect sites in SRAM structures. Failures such as vertical and horizontal doublets, stuck-at and data retention bits are isolated and identified using functional and/or I testing. Once we gather specific failure data, we investigate certain area(s) of the bit cell further. We use the Focused Ion Beam (FIB) to prepare cross-sectional TEM samples targeting these fault isolated sites. We present the TEM observations and analysis of several of these failure sites. We also show the effectiveness of TEM analysis when high resolution SEM and FIB work cannot conclusively identify the failing layer.
4:00 PM O5.6
HIGH-SPATIAL RESOLUTION MICROANALYSIS OF PLATINUM SILICIDE CONTACT SPIKING IN A STEM, Alastair J. McGibbon, National Semiconductor Corp, Dept of Process Development, Greenock, UNITED KINGDOM; Pat Nicholson, Stephen McVitie, Univ of Glasgow, Dept of Physics & Astronomy, Glascow, UNITED KINGDOM; Calum McLeod, Kevin Yallup, National Semiconductor Corp, Greenock, UNITED KINGDOM; Mark Redford, National Semiconductor Corp, Dept of Analog Process Tech Dev, Greenock, UNITED KINGDOM.
In this paper, we discuss the detection and subsequent observation of silicide spiking in doped silicon epilayers at contact structures. Spiking can seriously affect electronic properties such as subthreshold leakage in CMOS and emitter-base leakage in bipolar devices. However, although observations have been made in polysilicon, less work has been carried out on the nucleation and propagation of spikes in doped single crystals. The analysis of spikes, which can be wide but can propagate as much as 1 micron into the substrate, requires the application of high spatial resolution () compositionally sensitive imaging and microanalysis in a dedicated scanning transmission electron microscope (STEM). To facilitate the analysis of specific device regions, electron transparent cross-sectional membranes of fabricated devices were prepared using a focused ion beam (FIB). This approach provides accurate selectivity of regions of interest and precise control of specimen thickness for compositional microanalysis. The principal techniques applied in the STEM are energy-dispersive x-ray (EDX) microanalysis and high-angle annular dark-field (Z-contrast) imaging. We discuss the way in which these techniques can be used to complement each other to provide information on spiking nucleation together with defect density, orientation, and composition as a function of fabrication conditions. We conclude the paper with a general discussion on the way in which such analyses can be used in future in the general study of silicide/silicon interfaces in ULSI devices.
4:15 PM O5.7
INTERFACIAL STRUCTURE AND REACTION IN SUBMICRON IC DEVICES STUDIED BY HIGH RESOLUTION AND ENERGY FILTERING TEM, Holin Chang, Fu-Rong Chen, National Tsing Hua Univ, Dept of Nuclear Engr & Physics Engr, HsinChu, TAIWAN; L. Chang, National Science Council, Engineering Div, Taipei, TAIWAN; J. J. Kai, National Tsing Hua Univ, Dept of Nuclear Engr & Engr Physics, Hsinchu, TAIWAN; Eugene Tzou, Jianming Fu, Zheng Xu, John Egermeier, Fu-Sen Chen, Applied Materials Inc, PVD Products Business Group, Santa Clara, CA.
Al metallization requires robust barriers to prevent the interdiffusion of Al and Si atoms, which causes junction leakage (commonly called ''spiking''). TiN/Ti is commonly used a diffusion barrier to prevent the interdiffusion between aluminum and silicon in very-large-scale integrated circuit (VLSI) technology. In order to investigate the failure mechanism of TiN/Ti barrier to develop a more robust barrier, two sets of samples referred to as nonstuffing and double oxygen stuffing were processed on Applied Materials Endura 5500 systems. Coupling with Gatan imaging filter (GIF), high resolution TEM becomes more powerful; it gives both structural and compositional information simultaneously with about subnanometer and nanometer resolution, respectively. We have applied the HRTEM and GIF techniques to investigate the interfacial reaction of contact metal Al with the TiN/Ti barrier layer and substrate Si in a 0.5 m device. From the information of the high resolution image and the O, Ti, N, Si, and Al elemental maps, we are able to understand the interfacial reaction and interdiffusion among these elements after a high temperature thermal stress test. In nonstuffing sample, Al reacts with TiN becomes AlN in the interface and Al leakage was observed. We show that the oxygen-stuffing processes after each TiN/Ti deposition enhances the barrier capability against Al/Si interdiffusion.
SESSION O6: EMERGING ANALYTICAL METHODS
Chairs: Robert C. McDonald, Gabi Neubauer,
and Tom Remmel
Friday Morning, April 4, 1997
8:30 AM *O6.1
NEW CHARACTERIZATION TECHNIQUE DEVELOPMENTS FOR THE ULSI ERA, Thomas J. Shaffner, Texas Instruments Inc, Materials Science Laboratory, Dallas, TX.
Materials and device characterization serve the essential role of defining how a manufactured integrated circuit differs from its intended design and function. Over the years, a variety of techniques based on probes of electrons, ions and photons have evolved to fill this need. Each has a specialized application for resolving specific manufacturing problems related to smaller geometry, material impurities and silicon crystal defects. The acclaimed National Technology Roadmap for Semiconductors (NTRS) projects that high density integrated circuit dimensions will shrink beyond 0.18 mm by the year 2000 in spite of formidable challenges in materials technology, manufacturing complexity, and escalating costs. Techniques of characterization are at the cutting edge of such developments, because the dimensions of killer defects are typically much smaller than the circuit features themselves. Down-sizing drives requirements for atomic resolution imaging, as well as parts-per-trillion dopant and impurity measurements. Inspection of circuit yield loss by transmission electron or scanning tip microscopes requires an interplay with focused ion beam (FIB) cross sectioning tools capable of intersecting a predetermined single bit failure site. Requirements for parts-per-trillion dopant and impurity measurement are being addressed by improved ion mass spectrometries, including accelerator-based, time-of-flight, and laser-assisted configurations. Thin gate and capacitor dielectrics require new heavy ion and forward scattering techniques for stoichiometry and light element control. This presentation will illustrate how these are addressing stragetic needs of the industry, and outlines some of the challenges characterization specialists face.
9:00 AM *O6.2
DEVELOPMENT OF SOFT X-RAY MICROSCOPY FOR MATERIALS ANALYSIS, Howard A. Padmore, Lawrence Berkeley National Laboratory, Dept of Adv Light Source, Berkeley, CA.
The field of spectromicroscopy, the combination of spectroscopy with x ray microscopy, has been enabled by the advent of third generation synchrotron radiation sources such as the Advanced Light Source (ALS) at Berkeley. We are developing several x-ray microscopes for a range of applications and the characteristics of these instruments will be described here. Part of this program is centered around the surface analysis problems of the microelectronics and micromagnetics industry, and this has required the construction of microscopes with highly specialized design requirements. The first of these systems is designed to achieve 1 m spatial resolution, and will use XPS and secondary electron detection mechanisms. It also has wafer handling, in-situ fiducialization, optical microscopy, and coordinated ion beam etching, integrated with Kirkpatrick-Baez (K-B) grazing incidence microfocusing optics. A highly efficient bending magnet beamline design is used based on an entrance slitless SGM, and together with the K-B mirror pair, will provide sufficient flux to perform scanning X-ray Photoelectron Spectroscopy (XPS) at a spatial resolution of 1 m over 50 m areas in times of typically less than 1 minute. This instrument will be described, and initial performance data will be presented. For higher resolution, zone plate focusing optics are used on high intensity undulator sources. One instrument, a scanning transmission x-ray microscope (STXM) is in routine operation. A second zone plate based system is being commissioned, and differs from the STXM in that it will operate at UHV and will be able to perform XPS at 0.1 m spatial resolution. Performance data will be presented. A further way of obtaining spatially resolved chemical information is to image the electron yield of an irradiated surface, using a small electrostatic focusing electron microscope. Spectral information is obtained by recording frames of information at incrementally higher energies through an absorption edge. X-ray absorption is used in a similar way to XPS in that local x-ray absorption data can be used in a ''fingerprinting'' manner to elucidate the type of elemental and chemical states that exist at the surface. Data will be presented showing resolution of 0.2 m over a 50 m field of view, and surface chemical speciation at <1 m spatial resolution. One advantage of this method over the previously described scanning methods is that it is a full field imaging technique, and therefore data is taken over a large field in parallel. This method is therefore especially suited for situations where sparse defects have to be found and measured. We are in the process of constructing a second PEEM for operation at higher voltage. This will give higher throughput, and is expected to give a spatial resolution of 20 nm. At the end of 1997 we will add a chromatic aberration compensating system to this microscope that will improve the expected resolution to a predicted value of <4 nm.
9:30 AM O6.3
NEAR FIELD OPTICAL SPECTROSCOPY FOR DECANANO-SCALE CHARACTERIZATION OF MICROELECTRONIC MATERIALS AND DEVICES, Walter M. Duncan, Texas Instruments Inc, Corp Research & Development, Dallas, TX.
Increases in density of integration and concomitant reductions in minimum feature size have driven requirements for spatial resolution in analytical and metrological instrumentation for microelectronic structures to well below the limit set by far field diffraction of visible light. With the exception of scanned probe microscopy, analytical and metrological instruments with spatial resolutions adequate for the current generation of complementary metal oxide semiconductor (CMOS) structures all rely on ion or electron methods. Conventional ion or electron based methods are destructive and instrumentation has a high cost of ownership. Hence, it is the goal of our work to develop nondestructive near field scanning optical microscopy/spectroscopy (NSOM/S) instrumentation and applications as an alternative to electron and ion methods. Imaging capabilities of near field scanning optical microscopy approach 0.02 m and combined with spectroscopic analysis potentially provides chemical analysis of defects, particles, and thin films with ultrahigh spatial resolution. We have investigated factors influencing both topological and optical imaging using NSOM tips (adiabatically tapered and metal coated fiber). Whereas atomic force measurements with optimized tips yield orders of magnitude higher resolution images than NSOM fiber tips, topological information is essential for interpretation of optically generated images particularly in the case of microelectronic structures which exhibit significant topological relief. Topological information results from the requisite feedback loop employed to hold the tip to sample distance constant. Results using optical and nonoptical feedback approaches will be presented. Several microelectronic systems have been examined in this work as vehicles to elucidate topological resolution and NSOM imaging modes. Partially fabricated SiO/Si CMOS structures with vias, moats and mesas have been examined. Corrugated surfaces resulting from 2 dimensional misfit relaxation during growth of layers have also been studied. Fluorescence imaging and Raman scattering modes have been demonstrated and applications to chemical and defect identification and strain mapping will be discussed.
9:45 AM O6.4
NEAR FIELD OPTICAL MICROSCOPY AND SPECTROSCOPY OF SEMICONDUCTORS, Nigel Cave, Ran Liu, Juan Carrejo, Wei Chen, Tan-Chen Lee, Motorola Inc, Mesa, AZ.
Near-field optical microscopy and spectroscopy has been applied for the analysis of semiconductor materials and devices. This paper will present the results from this work, especially concentrating on areas where the optical contrast mechanisms allow information to be gained that current electron and scanning probe microscopies can not provide. These areas include fluorescence imaging, photoluminescence spectroscopy and imaging, Raman spectroscopy and magneto-optical imaging using the Faraday and Kerr effects.
10:30 AM *O6.5
QUANTITATIVE COMPARISON OF 2D DOPANT PROFILES OBTAINED BY SCANNING CAPACITANCE MICROSCOPY AND TCAD PROCESS SIMULATION, Clayton C. Williams, J. S. McMurray, J. Kim, Univ of Utah, Dept of Physics, Salt Lake City, UT; J. Sinkman, IBM Microelectronics, Dept C3T, Essex Jct, VT.
Recent advances in quantitative 2D dopant profiling have provided for the first time a means to directly compare the predictions of 2D SUPREM4 with measured 2D Scanning Capacitance Microscopy (SCM) profiles. Test structures with 0.6 micrometer gates are imaged by SCM and quantitatively converted to dopant density using a physical model of the SCM tip/semiconductor interaction. Model parameters are adjusted so that the SCM 2D profile fits the vertical SIMS profile far from the gate edge. The fit to the vertical SIMS has an average error of less than 16 over the 10/cm to 10/cm range. The agreement is still quite good an order of magnitude below the lower end of this range. Those model parameters are then used to convert the full 2D SCM data to a 2D dopant profile. These results are then compared directly with a 2D SUPREM4 simulation of the process. The agreement between the SCM profile and the SUPREM4 profile is generally good, but there are some systematic differences that can be seen. The technique and the state of the art of SCM dopant profiling will be described. The possibility of calibrating TCAD simulators with the SCM method will also be discussed.
11:00 AM O6.6
TWO DIMENSIONAL DOPANT PROFILING: THE CHALLENGES OF SCM, Gari Harris, Motorola Inc, Matls Characterization Lab, Mesa, AZ.
Scanning Capacitance Microscopy (SCM) has evolved as a major technique for measurement of 2-D dopant profiles in semiconductor devices. This paper describes the motivational need for quantitative and reliable SCM within the semiconductor industry as well as practical considerations in applying the technique. To date, quantification of SCM data is unproven and reproducibility of the technique needs to be demonstrated; the major challenges include the dielectric oxide, the scanning tip and the quantification methodologies. Dielectric oxide quality, cleanliness and surface passivation formed by a variety of methods are discussed. The durability of various tips is addressed as a function of scanning time, and the effect of tip force on the capacitance information is examined. Quantification techniques using simple empirical quantification are applied to a matrix of implanted and annealed one-dimensional SCM profiles; the results are compared to secondary ion mass spectrometry (SIMS) and spreading resistance profiling (SRP) data. Finally, quantified SCM images of sub-micron devices are shown illustrating features that previously could not be modeled or viewed by any other analytical technique. These images are now being used to aid more precise modeling of dopant behavior.
11:15 AM O6.7
APPLICATIONS OF THE SCANNING CAPACITANCE MICROSCOPE TO MATERIALS CHARACTERIZATION AND FAILURE ANALYSIS, CURRENT ISSUES AND RESULTS, Andrew N. Erickson, Digital Instruments Inc, Santa Barbara, CA.
Since the introduction of the Scanning Capacitance Microscope as a commercial tool, a search for useful applications has been initiated. While this search is far from complete, several modes of characterization of front end processes and back end failure mechanisms have been found. The cross sectional characterization of MOSFET structures such as LDD location and Gate Length have been measured using the SCM. The technique has also been used to characterize programmable array logic PALs for threshold shifts. DRAM cells have also been characterized using plan view and cross sectional sample preparation techniques. The variety of these and other uses show that SCM can be a versatile analytical tool for the semiconductor industry. While the tool has shown utility, there are still difficulties involved in the measurements. These complications have forced the users to focus on the technique in contrast to achieving results. To permit more ease of use, it is necessary to improve both the tips and the samples used for measurement. In this talk, both issues will be discussed in context of the applications which have been realized to date. Further discussion may focus on interpreting results associated with shallow doped structure and current works in progress.
11:30 AM O6.8
ULSI-DEVICE CHARACTERIZATION USING CONDUCTIVE SCANNING PROBES., Wilfried Vandervorst, Thomas Trenkler, Peter De Wolf, Trudo Clarysse, IMEC, MAP/ARS, Leuven, BELGIUM; Louis Hellemans, Katholieke Univ Leuven, Dept of Chemistry, Leuven, BELGIUM.
Direct characterization of ULSI-devices is a crucial asset to enhance process development, improve insight in processing technology and to aid in failure analysis. Conductive scanning probes are the ideal tool to sample with high spatial resolution ( 5-10 nm) the (two-dimensional) carrier distribution in a device (using NanoSRP) as well as to understand its operation by mapping the potential distribution inside an active structure (using Nanopotentiometry). In the case of NanoSRP the conductive AFM-tip is used to determine the local resistivity by measuring the spreading resistance underneath the tip whereas in Nanopotentiometry the tip is used as a local voltage probe to determine the local potential below the tip while the device is active. In both cases the measurements are performed on the cross section of a device and the spatial resolution is set by the actual tip radius. Presently a resolution as small as 10 nm has been achieved. Our recent work on the characterization of 0.25 µm transistors shows the ability to identify processing failures (non-symmetrical source/drain profiles due to a lack of rotation during a 7ƒ implant) and to determine the potential distribution in the channel region of a transistor with this distribution varying according to the applied source/drain and gate biases visualising the on/off switching of the device. These potential distributions coupled with the two-dimensional carrier distributions determined using NanoSRP can be used to evaluate and calibrate the predictions made using process and device simulators.
11:45 AM O6.9
TWO-DIMENSIONAL JUNCTION PROFILING ON ULSI SILICON DEVICES BY TRANSMISSION ELECTRON MICROSCOPY, Corrado Spinella, CNR, IMETEM, Catania, ITALY.
We present recent developments of the sample preparation technique used to obtain the morphological and electrical characterizations of typical ULSI devices. The technique is based on the selective chemical etch of doped silicon regions, coupled with transmission electron microscopy (TEM) analyses for imaging the sample morphology. The chemical solution used for the etching process is a mixture of HF, HNO, and ChCOOH. Although chemical staining has been used since the early days of device fabrication, its application to samples thinned to allow TEM analysis is not straightforward, and requires a detailed knowledge of the etch process. In this work we discuss the principles of the technique focusing our attention on its sensitivity and reproducibility. The delineation of silicon regions doped with boron occurs under a strong ultraviolet illumination. In the presence of a pn junction, the etching selectivity extends up to the junction depth, while in pp structures the sensitivity limit is equal to 110 cm. The delineation of n-doped silicon regions occurs in the absence of any particular illumination source and for doping concentrations larger than 1 X 10. The experimental results are interpreted by taking into account the role of light-generated free carriers. The high spatial resolution (5 nm) and feasibility of this technique are demonstrated by discussing specific applications concerning the characterization of the emitter-base region in a high-speed bipolar device and of the source-drain region in Flash memories.