Meetings & Events

spring 1998 logo1998 MRS Spring Meeting & Exhibit

April 13 - 17, 1998 | San Francisco
Meeting Chairs: John A. Emerson, Ronald Gibala, Caroline A. Ross, Leo J. Schowalter

Symposium E—Low-Dielectric Constant Materials and Applications in Microelectronics IV


Chien Chiang 
Intel Corp 
Santa Clara, CA 95052 

Paul Ho
Dept of MS&E
Univ of Texas-Austin
MC R8650
Austin, TX 78712-1100

Toh-Ming Lu 
Dept of Physics 
Rensselaer Polytechnic Inst 
Science Ctr 1C25 
Troy, NY 12180 

Jeffrey Wetzel
Matls Research & Strategic Technologies
Motorola Inc
MD K-10
Austin, TX 78721

Symposium Support 
*AlliedSignal, Inc. 
*Applied Materials, Inc. 
*Bell Laboratories, Lucent Technologies 
*Dow Chemical Company 
*Intel Japan 
*Novellus Systems, Inc. 
*Schumacher, Unit of Air Products & Chemicals 
*Texas Instruments, Inc. 
*Watkins Johnson Company 

Proceedings published as Volume 511 
of the Materials Research Society 
Symposium Proceedings Series.

* Invited paper

Chair: Chien Chiang 
Tuesday Morning, April 14, 1998 
Pacific H
8:30 AM *E1.1 
OVERVIEW OF PROCESS INTEGRATION AND RELIABILITY ISSUES FOR LOW K DIELECTRICS IN ADVANCED MULTILEVEL INTERCONNECTS. R.H. Havemann, M.K. Jain, W-Y. Shih, C. Jin, R.S. List, A.R. Ralston, M.C. Chang, E.M. Zielinski, G.A. Dixit, A. Singh, S.W. Russell, J.F. Gaynor, and A.J. McKerrow, Silicon Technology Development, Texas Instruments, Inc., Dallas, TX. 

The era of silicon Ultra-Large-Scale-lntegration has spurred an ever-increasing level of functional integration on-chip, driving a need for greater circuit density and higher performance. While traditional transistor scaling has thus far met this challenge, Interconnect scaling has become the performance- limiting factor for new designs. Both interconnect resistance and capacitance play key roles in overall performance, but modeling simulations have highlighted the importance of reducing parasitic capacitance to manage crosstalk, power dissipation and RC delay. New materials with lower permittivity are needed to meet this challenge. This paper will summarize the process integration and reliability issues associated with the use of novel low k materials in multilevel interconnects. 

9:00 AM E1.2 
LIQUID-PHASE DEPOSITION OF LOW-k ORGANIC SILICON-OXIDE FILMS. Kouichi Usami, Kazuhito Sumimura, Satoshi Sugahara and Masakiyo Matsumura, Tokyo Institute of Technology, Dept of Physical Electronics, Tokyo, JAPAN. 

We have studied liquid-phase deposition1) of low-k silicon-oxide films from CH3Si(OC2H5)3 solution at room temperature. We added a small amount of NH4OH and HCOOH in H2O for acceleration of chemical reactions, and also ethylene glycol for surfactant. AES spectrum for the as-deposited film indicated that the film had predominantly Si, O and C with their composition ratio of 1: 1.5: 1. FTIR spectrum showed strong absorption peaks at 1280cm-1 and 780cm-1 and also at 1050cm-1, indicating that dominant chemical bonds were Si-CH3 and Si-O. XPS spectrum indicated that almost all Si atoms bond with three O and one CH3. Incorporation of dense CH3 groups resulted from the chemical property that H2O can break Si-OC2H5 bonds but not Si-CH3 bonds. The Si-CH3 bond remained in the film even after annealing at 600ºC. Dielectric constant, low-field (=100kV/cm) resistivity and breakdown field-strength (at 1A/cm2) were 4.2, 1x1013cm and 0.9MV/cm, respectively, for the as-deposited film. 400ºC annealing improved them to 2.6, 1x1015cm and 2.1MV/cm, respectively. Reference 1) K.Usami et al., AMLCD*97, pp.195-198. 

9:15 AM E1.3 
PROPERTIES DEVELOPMENT DURING CURING OF LOW-DIELECTRIC CONSTANT SPIN-ON GLASSES. Robert F. Cook, Eric G. Liniger, David P. Klaus, Eva E. Simonyi, Stephan A. Cohen, IBM Research, Yorktown Heights, NY. 

Spin-on glasses have potential as low dielectric-constant interconnection materials in semiconductor structures. Such glasses are usually dissolved in a solvent, spun on semiconductor wafers in thin-film form and then cured to form a glass via bulk polymerization. The thin-film electrical and mechanical properties development is very sensitive to the curing conditions. In particular, the tendency of films to fracture on cooling from the curing temperature depends critically on variations in curing time and temperature. In this paper, the behavior of silsesquioxane spin-on glasses as a function of curing conditions is examined, with particular attention to the trade-off between stress-corrosion cracking and dielectric behavior. 

9:30 AM E1.4 

Dielectric properties for three different polysilsesquioxanes (PSSQ) (hydrido, methyl, and phenyl) have been investigated as a function of temperature, upon curing under various conditions. The methyl-PSSQ exhibits the lowest dielectric constant, which is nearly independent of cure temperature in the range 210 - 450 C. Moreover, The measured dielelectric constant decreases gradually with increasing temperature from ca. 2.8 at 0 C to 2.6 at 100 C. No such temperature dependence is seen for hydrido-PSSQ. The temperature-dependent dielectric properties are attributed to the characteristics of the oscillator strengths for vibrational motions in these polymers (particularly the Si-O-Si bends). 
Quantum chemistry calculations of the structures and vibrational frequencies and oscillator strengths for model molecules are compared with the experimental data in order to elucidate the local conformations of PSSQ molecules and to confirm the nature of the temperature dependence of dielectric constants. 

9:45 AM E1.5 

Hydrogen-Silsesquioxane (HSSQ) spin-on polymer is one of the promising low-k dielectric polymers as interlayer dielectric for multilevel interconnects. The material has a dielectric constant of 2.8 along with other desirable properties such as excellent gap-fill capability, good adhesion to metals as well as oxides, low electrical leakage, and high crack resistance. However, the major concern regarding this material is its thermal stability. Upon high temperature exposure, the material undergoes shrinkage as well as loss of the silicon-hydrogen groups. The shrinkage may cause bowing of the vias while the latter can result in an increase in its dielectric constant. In this work, we report an alternative curing approach - electron beam curing, which is found to significantly improve thermal stability as well as dimensional integrity of the hydrogen silsequioxane polymer without sacrificing other properties. For example, after exposure to 450ºC for 30 min., the e-beam cured HSSQ retains 90% of the Si-H bonds and shows less than 1% of shrinkage, compared to 55% of Si-H bond retention and 4% of shrinkage for the thermally-cured film. In addition, e-beam curing enhances oxygen-plasma resistance and reduces outgassing of the HSSQ polymer thin film. 

10:30 AM *E1.6 
FUNDAMENTAL ASPECTS OF POLYMER METALLIZATION. Franz Faupel, Thomas Strunskus, Michael Kiene, Axel Thran, Conrad von Bechtolsheim, University of Kiel, Dept of Materials Science and Engineering, Kiel, GERMANY. 

Involving results from new key experiments and from earlier work it is shown how structure and formation of metal-polymer interfaces are controlled by the preparation process and the nature of the materials involved. Emphasis is put on noble-metal deposition onto fully cured polyimides and polycarbonates. Valuable information originates from radiotracer measurements of metal diffusion at the interface, structural investigations by means of cross-sectional electron microscopy, and computer simulations on the interplay of atomic metal diffusion and aggregation. Moreover, X-ray photoemission spectroscopy has largely contributed to our present understanding of the interfacial chemistry and the early stages of interface formation. Reactive metals always form relatively sharp interfaces with polymers, although the initial growth of Cr on polyimide recently proved to be different from the layer by layer mode. Metals of lower reactivity, on the other hand, diffuse into polymers at elevated temperatures and have a very strong tendency to agglomerate. The extent of diffusion appears to be determined by the initial stage of the deposition process. Here sticking coefficients recently measured for metals on virgin polymer surfaces deviate markedly from unity. Diffusion into the polymer increases strongly at low deposition rates, where a large fraction of isolated metal atoms is able to diffuse into the polymer before being trapped by other atoms at or near the surface. No significant diffusion is expected from a continuous metal film as a consequence of the high cohesive energy of the metal. The model emerging from these observations allows us to predict the salient features of interface formation between metals and polymers in general and particularly with respect to the new low-k polymers. 

11:00 AM E1.7 
RELATION AMONG THE FILM PROPERTIES, STRUCTURE AND PROCESS OF F-DOPED SILICON DIOXIDE FILMS. SangWoo Lim, Yukihiro Shimogaki, Yoshiaki Nakano,*, Kunio Tada*, and Hiroshi Komiyama, Univ of Tokyo, Dept of Chemical System Engineering, *Dept of Electronic Engineering, Tokyo, JAPAN. 

We studied the reduction mechanism of the dielectric constant of F-doped silicon dioxide films. From the estimation of the dielectric constant at each frequency using CV measurement, Kramers-Kronig relation and the square of the refractive index, we suggest that the dielectric constant due to ionic and electronic polarization is not the dominant factor in decreasing the dielectric constant. It is important to remove OH in films to obtain very low dielectric constant F-doped silicon dioxide films, because Si-OH is the main factor of the orientational polarization in silicon oxide films made by PECVD. To investigate the reaction mechanism which controls the film structure, we changed the residence time of gas in chamber by varying the flow rate. When the residence time in chamber decreases, the film deposition rate increases. We tried to explain flow rate dependency of the deposition rate using a simple CSTR (continuous stirred tank reactor) model. It can be concluded that SiH4 directly reacts at the surface to deposit the film, and the deposition path through the intermediate can be negligible in our PECVD system. Step coverage analysis using test structure or trench was also carried out to examine the surface chemistry. 

11:15 AM E1.8 
NEWLY DEVELOPED LOW-K AND LOW-STRESS FLUORINATED SILICON OXIDE UTILIZING TEMPERATURE-DIFFERENCE LIQUID-PHASE DEPOSITION TECHNOLOGY. Ching-Fa Yeh, Yueh-Chuan Lee and Su-Chen Lee, Department of Electronics Engineering & Institute of Electronics, National Chiao-Tun University, Hsinchu, Taiwan, CHINA. 

To meet the requirements of low-K and low-stress intermetal dielectric (IMD) for future ULSI devices, a novel temperature-difference liquid-phase deposition (TD-LPD) method is proposed. The deposition solution of supersaturated silicic acid with high concentration of fluorine can be achieved by raising deposition temperature larger than 15C from dissolution temperature (0C). Therefore, TD-LPD SiOF as an IMD is expected to have excellent properties. 
In this study, the excellent properties like deposition rate, fluorine concentration, dielectric constant, stress and the reliability issues are verified. The deposition rate increases exponentially from 30 to 700 A/hr with temperature difference increasing from 15 to 35C. For TD-LPD SiOF film deposited at 25C, the fluorine concentration determined by X-ray photoelectron spectroscopy is 6.46 A.C.%. The dielectric constant (K) and the stress are as low as 3.40 and 32MPa tensile, respectively. The reliability problems of TD-LPD SiOF are also investigated in terms of thermal stability and moisture resistance. After 400C annealing in N2 ambient, the dielectric constant further decreases to 3.34 due to removal of OH bonds. The thermal stability can be up to 700C, beyond which the K value becomes increased due to escape of fluorine. The stability obviously shows sufficient for TD-LPD dielectric applied as an IMD. As for moisture resistance, after TD-LPD SiOF being stressed in boiling water for 1 hour, its dielectric constant only increases slightly to 3.45. Generally an IMD is required to endure repeated cycles of thermal annealing and moisture stress. The K value and the electrical properties less vary in the second cycle in comparison with the first cycle. A feasible mechanism describing the less variation is first proposed. 

11:30 AM E1.9 
LOW-DIELECTRIC CONSTANT SiO2 FILMS FOR ULSI INTERCONNECTIONS PREPARED BY CF4. Shu Qin, Yuanzhong Zhou, and Chung Chan, Plasma Science and Microelectronics Laboratory, Northeastern University, Boston, MA; Paul K. Chu, Department of Physics & Materials Science, City University of Hong Kong, Kowloon, HONG KONG 

The multilevel interconnections have been used in ultra-large-scale integrated circuits (ULSI). To minimize the crosstalk and RC time delay, it is necessary to keep interlayer dielectric capacitance low. This can be implemented through the introduction of low-dielectric constant interlayer films. The properties and the fabrication techniques of the interlayer dielectrics have to meet the following requirements: (1) a low dielectric constant, (2) good electrical and mechanical properties, (3) a high planarization and narrow gap filling capability, and (4) a low process temperature. So far, the existing techniques cannot satisfy all of the above requirements due to the limitations of the physical mechanisms. Plasma ion implantation (PII) doping technique has been utilized to prepare the low-dielectric constant (low k) SiO2 films as the high quality interlayer dielectrics for ULSI applications. The SiO2 films are fluorinedoped/carbon-doped by PII with CF4 plasma in an ICP plasma reactor. The dielectric constant of SiO2 films was significantly reduced from 4.10 to 3.50 after 5 minute PII. An analysis of a double layer model indicates that a high quality dielectric layer with a dielectric constant down to 2.8 can be achieved by an optimized PII process. Contrasting to other conventional low-k material techniques, PII process also consistently improve other electrical properties of SiO2 films such as bulk resistivity and dielectric field breakdown strength. The etching effect of CF4 PII may be beneficial to planarization and gap filling of dielectric interlayers. 

11:45 AM E1.10 
POROUS ALUMINA AS LOW-K MATERIAL FOR INTERCONNECT DIELECTRIC. S.Lazarouk, P. Jaguiro, S. Katsouba, Belarusian State University Informatics and Electronics, Minsk, BELARUS. 

Improvements in electronics require increased speed, decreased dimensions. But as dimensions decrease interconnect problems are the most severe limiting factor in IC. Interconnect delay can be minimized by using low-dialectric constant materials for interconnect dielectric. In order to replace SiO2 with low-k material based on porous alumina we have developed the technology of in-built aluminum interconnects based on electrochemical Al anodization processes. In our technology aluminum, which is between the inerconnect line, is converted in to oxide by using porous electrochemical anodization. Thus we obtain aluminum lines, which are in-built in porous alumina. By using the special regimes of anodization we have obtained the dielectric constant value in the range 3.0 - 4.0. The relief step height for one interconnect level is less than 0.2 mm for 1.0 mm-thick Al films. The process of porous anodization allows to obtain planar surface by using this process for each layer of interconnects and interlevel insulation with in-built contact pillars. The developed processing technique has been tested for CMOS submicron technology. 
Chair: Toh-Ming Lu 
Tuesday Afternoon, April 14, 1998 
Pacific H
1:30 PM *E2.1 
EVALUATION OF LOW DIELECTRIC CONSTANT MATERIALS FOR INTER-LEVEL DIELECTRIC APPLICATIONS. Huei-Min. Ho*, Robert J. Fox, Sematech, Austin, TX. *on assignment from Intel Corporation. 

In the last few years, research and development activities on low k dielectric materials for inter-level dielectric applications have increased significantly. Numerous materials at various dielectric constant levels, e.g., k<4.0, k<3.0, k<2.5, and k<2.0, have been proposed and many of them have been evaluated at SEMATECH. The approaches taken at SEMATECH for low k material evaluation include: a) material property characterization, b) one- and two-level metal module evaluation with Al/RIE architecture, and c) one- and two-level metal module evaluation with Cu/Damascene architecture. In this paper, the characterization techniques developed for low k material evaluation, along with data collected, will be presented. Current techniques have mainly targeted spin-on polymer materials, and the need to develop advanced techniques for on-wafer and porous material measurements have become imminent. Module evaluation includes physical observations and electrical testing. It has demonstrated that low k materials can be successfully integrated into back-end-of-line (BEOL) processes with sound structural and electrical integrity. The results, using Al/RIE architecture, have shed light upon the validity of some typical concerns of low k material properties, such as Tg, fluorine content, etc. Electrical tests have also proven sensitive to issues associated with low k material integration. Representative results of module evaluation and achieving low k BEOL integration will also be discussed. 

2:00 PM E2.2 
PHASE SEPARATION OF BEHAVIORS OF POLYIMIDE BLENDS. Chul Hae Ryu and Young Chan Bae, Hanyang Univ, Dept of Industrial Chemistry, Seoul, KOREA. 

The industry has recognized the need of developing low dielecrtic materials and developed various low dielectric materials. Low dielectric constant interlayer(ILD) materials are required for the advanced silicon integrated electronics such as those in the ultra large scale integration(ULSI) era. As minimum features are reduced to the micron and submicron range, line width control over high steps and different parts of the wafer topology becomes increasingly difficult. With the increase in the integration of electronic devices, and the need to reduce overall sizes, companies are now moving to multilevel metalization. Some of the current materials and processing technologies are unable to overcome the difficulties for the production of the next multilevel of integrated circuits where higher speed and density are demanded. Many researchers have studied and focused on low dielectric polymer films in order to overcome the difficulties of high density. Polyimides and polyimide blends have been the most concerning materials of them and studied in many cases. Polyimides and polyimide blends have some desired properties which include low dielectric constants, low moisture absorption, very high thermal stability, high glass transition temperature, good mechanical properties, chemical resistance, capacity to planarize topographical features(perfect flat surface regardless of the complexity of the underlying topology), and low thermal expansion coefficient in order to be useful for inerlayer dielectric (ILD) applications. In this study, we investigated phase behaviors of various compositions of polyimide/other polymer blends using thermo-optical analysis technique and DSC. Theoretically, we employed the extended Flory-Huggins theory to describe and predict phase behaviors of the given systems. Our proposed model gives qualitative thermodynamic properties of those blends. 

2:15 PM E2.3 

A means of generating foams of high temperature polymers, i.e. polyimides, has been developed for use in ILD applications in chip manufacture. The foams are generated by preparing phase separated block copolymers with the majority phase comprised of polyimide and the minor phase consisting of a thermally labile block. Thin films of the copolymers can be made and the thermally labile segment removed via appropriate thermal treatments. The pore sizes of these foams is in the nanometer range. New materials generated by the use of structurally branched labile blocks will be discussed. 

2:30 PM E2.4 
LOW-DIELECTRIC NANOPOROUS THIN FILMS FROM ORGANIC/INORGANIC HYBRIDS. Julius F. Remenar, James L. Hedrick, Craig J. Hawker, Robert D. Miller, and Mikael Trollsas, IBM Almaden Research Center, San Jose, CA. 

Thin films consisting of nanofoamed poly(methylsilsesquioxane) have been prepared from organic/inorganic hybrid solutions. Low molecular weight hyperbrancbed poly(caprolactones) are incorporated into partially precondensed methylsilsesquoxane. Upon heating, the glass resin cross-link around the organic polymer templates. Thermal decomposition of the polymer produces 100  pores identical in shape and size to the initial hybrid morphology. The resulting films have dielectric constants < 2.1 and exhibit properties suitable for use in interconnect devices. Data including density, morphology, and surface characteristics of the new materials will be presented. 

2:45 PM E2.5 
DIELECTRIC PROPERTIES OF MICROCHANNEL PLATE (MCP) GLASS. T.E. Huber, Leo Silber, Frank Boccuzzi, Polytechnic University, Brooklyn, NY. 

MCP's consist of borosilicate glass arranged in a 2D low density honeycomb structure. The void volume fraction is approximately 75%. Our samples had a lattice spacing of 10 and 50 micrometers. We have measured the anisotropic MCP's real and imaginary dielectric constant for a wide range of frequencies up to the far-infrared. The measurements are interpreted in terms of the Rayleigh and Maxwell-Garnett dielectric constant of composites. 

3:30 PM *E2.6 

Dielectric constants of less than 2.0 have been achieved using pulsed plasma enhanced chemical vapor deposition (PECVD). Systematic variation of the pulsing rate produces controlled changes in deposition rate and film characteristics. The plasma modulation also exploits the kinetic differences in the production and destruction of reactive species resulting from different monomer gases, making precursor gas choice particularly important for pulsed PECVD. In addition, because of their high global warming potentials, it is desirable to avoid perfluoronated compounds (PFCs) as precursors. Thus, alternative feed gases for CFx deposition have been explored. Deposition rates, composition, thermal stability, adhesion and global warming impact for a variety of non-PFC precursors have been measured. In particular, HFC (hydrogenated fluorinated compounds) have been shown to lead to substantially improved deposition rates and thermal stability and have a significantly reduced global warming impact. Changing the pulse duty cycle within a single deposition provides a simple way to produce a graded interface for improved adhesion. Electron Spin Resonance (ESR) shows that pulsed PECVD produces less dangling bond defects than traditional continuous PECVD. Solid-state F-19 NMR measurements provide much more extensive resolution of bonding environments in the fluorocarbon films than is provided by x-ray photoelectron spectroscopy (XPS). Atomic Force Microscopy (AFM) and contact angle measurements show surface morphology is also strongly influence by the pulse cycle. 

4:00 PM E2.7 
FABRICATION AND CHARACTERIZATION OF SPIN-ON SILICA XEROGEL FILMS. A. Jain, S. Nitta, V. Pisupatti, W.N. Gill, J.L. Plawsky, P.C. Wayner, Jr., Rensselaer Polytechnic Institute, Dept. of Chemical Engineering, Troy, NY. 

Silica-based xerogel films suitable as interlayer dielectrics have been made through an ambient pressure, spin-coating process. The procedure involves a two-step catalysis sequence followed by spin coating in a controlled atmosphere. When the desired film thickness is reached, the films are aged in a controlled atmosphere within the spin coater. The porous surface is rendered hydrophobic via a silylation procedure and then the film is dried at temperatures up to 200 C in the ambient atmosphere. 
Film thickness, porosity, and dielectric constant have been measured using null and spectroscopic ellipsometries and Rutherford Backscattering. The three techniques are in good agreement and indicate film porosities in a range between 65 - 90%. The thickness and porosity can be independently controlled. FTIR studies indicate negligible residual bound water and no adsorbed water, even when the films are exposed to the ambient environment. The dielectric constants obtained from ellipsometry are compared with those measured directly using MIS structures. These measured values are compared with predicted values based on effective medium models.

The films have been annealed in vacuum and air at temperatures up to those commonly found in back end of the line processing. Both thickness and porosity remain unchanged. Film uniformity marginally increases upon annealing. Cu and Al films have been deposited on the xerogel surface. Heat treated samples then show significant diffusion of Cu into the film indicating the need for an effective diffusion barrier. 

4:15 PM E2.8 
NANOPOROUS SILICA FOR LOW  DIELECTRICS. T. Ramos, K. Rhoderick, R. Roth, S. Wallace, J. Drage, J. Dunne, D. Endisch, R. Katsanes, N. Viernes and D.M. Smith, Nanoglass LLC, Sunnyvale CA. 

The requirements for materials with dielectric constant much less than 4 for use in semiconductors in the near future has now been clearly established. There are a number of candidate materials with K in the range of 2.5 to 4 but these suffer from a number of potential problems including the fact that most are only a one technology node solution since the dielectric constant is fixed for each material. In contrast, NanoPorous silica offers the ability to tune the dielectric constant from near 1 to over 3 and thus offers the capability to used for a number of future technology nodes. Considerable progress has been made in development of NanoPorous silica thin films (also known as aerogel or xerogels) for ILD and IMD applications. Recently, emphasis has changed from fundamental materials properties studies to the development of processes for depositing very high purity films with thickness and dielectric constant uniformity of better than 2% on 200 mm wafers. Film properties and the process flow for deposition and post-deposition curing will be presented. Trade-offs between pore size, density, mechanical strength and dielectric constant will be elucidated. Also, a review of results for integration of this material into semiconductor devices will be presented. 

4:30 PM E2.9 
POROUS SILICA: A POTENTIAL MATERIAL FOR LOW DIELECTRIC CONSTANT APPLICATIONS. Edward D. Birdsell, Rosario A. Gerhardt, Georgia Institute of Technology, School of Material Science and Engineering, Atlanta, GA. 

Porous silica thin films for use as interlevel dielectrics in integrated curcuits and multichip modules have beeznunder consideration for a number of years. Their use in microelectronics has been limited due to difficulties in obtaining a homogeneous and reproducible pore microstructure and the inherent misture adsorption the porosity entails. Highly porous (15% dense) silica thin films with  < 2 have been produced using a colloidal sol-gel process. This process uses relatively inexpensive, commercially available colloidal silica and pottassium silicate. These films are deposited by spin coating. The parameters for spin coating (spin speed, gelation time, gel composition, etc.) have been optimized and coherent films with thicknesses ranging from 0.