Meetings & Events

Spring 1999 logo1999 MRS Spring Meeting & Exhibit

April 5-9, 1999 | San Francisco
Meeting Chairs: Katayun Barmak, James S. Speck, Raymond T. Tung, Paul D. Calvert



Symposium N—Advanced Interconnects and Contacts

Chairs

Dan Edelstein 
IBM T.J. Watson Research Lab 
Yorktown Heights, NY 10598 
914-945-3051

Takamaro Kikkawa
Res Ctr for Nanodevices & Systems
Hiroshima Univ
Hiroshima, 739 JAPAN
81-824-24-7879

Mehmet Ozturk 
Dept of Electrical and Computer Engr 
North Carolina State Univ 
Raleigh, NC 27695-7911 
919-515-5245

King-Ning Tu
Dept of MS&E
Univ of California-Los Angeles
6532 Boelter Hall
Los Angeles, CA 90095-1595
310-206-4838

Elizabeth Weitzman
Adv Products R&D Lab
Motorola Corp
Austin, TX 78721
512-933-5464

Symposium Support 
*Advanced Micro Devices, Inc. 
*IBM T.J. Watson Research Center 
*Novellus Systems, Inc.

Proceedings published as Volume 564 
of the Materials Research Society 
Symposium Proceedings Series.

* Invited paper
SESSION N1: SILICIDES-TITANIUM AND 
COBALT SILICIDE 
Chair: Mehmet Ozturk 
Monday Morning, April 5, 1999 
Golden Gate B2 (M)
8:30 AM N1.1 
STRESS ENHANCED ARSENIC DIFFUSION IN TITANIUM-SALICIDED JUNCTION BY IMPLANTATION INTO C-49 Ti SILICIDE AND RTA. Dong Kyun Sohn , Ji-Soo Park, Jong-Uk Bae, Yun-Jun Huh, Jae Jeong Kim, LG Semicon Ltd, R&D Division, Cheongju, KOREA.

In this work, we studied a low reverse leakage current in n+/p titanium-salicided shallow junction using C-49 Ti-silicide as a diffusion source. After formation of source/drain regions, Ti deposition and a rapid thermal annealing (RTA) were performed to form C-49 Ti-silicide. Subsquently, arsenic ions were implanted and 2nd RTA was carried out at 850C to form low resistive C-54 Ti-silicide. In spite of no additional drive-in process following to 2nd annealing, the implanted As diffused quite well into Si substrate and thus the reverse leakage current of the n+/p junctions was greatly reduced by two order of magnitude, not only area but also perimeter or corner intensive patterns. By an analysis of secondary ion mass spectroscopy, the junction depth is 0.13 m for conventional salicided source/drain region, while deepened to 0.2 m after implantation with 35 keV, 1e15/cm2 followed by 2nd RTA. This result is in disagreement with previous works. That is to say, in conventional implant through metal (ITM) or silicide as diffusion source (SADS) using Ti-silicide process, the high chemical affinity of As, P and B to the Ti-silicide resulted in dopant trapping during silicidation, and only a small pecentage of th was diffused into the silicon substrate. Therefor it has been known that Ti or Ti-silicide cannot be used as diffusion source for silicided juction. However in this work, we find out that C-49 Ti-silicide acts quite well as a diffusion source of As ions, which were totally confined inside of Ti-silicide. The reason of fast diffusivity is attributed to the generation of high tensile stress induced by As implantation, while normal C-49 Ti-silicide film constantly shows compressive stress.

8:45 AM N1.2 
THE INFLUENCES OF STRESS ON THE GROWTH OF Ti SILICIDE THIN FILMS ON (001)Si SUBSTRATES. S.L. Cheng , S.M. Chang, H.Y. Haung and L.J. Chen, Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu, Taiwan, REPUBLIC OF CHINA.

Low-resistivity C54-TiSi2 is currently the most widely used silicide for the self-aligned technology of ULSI circuits. However, as the device dimensions scale down to deep submicron region, problems related to stresses can occur in semiconductor device fabrication. Therefore, it is of much interest to investigate further the effects of stresses on the titanium silicide reactions. In this paper, results from an investigation on the formation of titanium silicides on stressed (001)Si are reported. Stress measurement by a laser beam method showed that compressive stresses of 100-550MPa and tensile stresses of 690-870MPa were present in the SiO2 films and the CoSi2 films on the backside of the blank (001)Si wafers at room temperature, respectively. Therefore, the SiO2 and CoSi2 films induced compressive and tensile stresses, respectively, on the front sides of silicon substrate. From cross-sectional TEM observation, the thicknesses of amorphous interlayers were found to be thicker and thinner in the tensilly and compressively stressed samples, respectively. In addition, the grain size of C49-TiSi2 was found to decrease with the tensile stress level and increase with the compressive stress level. Therefore, the tensile stress present in the silicon substrate promotes the formation of a-interlayer and decreases the grain size of C49-TiSi2, which increases the nucleation density of the C54-TiSi2 phase. As a result, the transformation of C49 to C54-TiSi2 phase is enhanced. In addition, the thicknesses of TiSi2 films were found to decrease and increase with the compressive and tensile stress level, respectively. The results indicated that the compressive stress hinders the migration of Si through the Ti/Si interface so that the formation of TiSi2 films was retarded. In contrast, the tensile stress promotes the Si diffusion. As a result, the formation of TiSi2 is facilitated.

9:00 AM N1.3 
INFLUENCE OF THE JUNCTION IMPLANTATION ON THE STRESS INDUCED DEFECTS DURING THE Ti- AND Co/Ti-SILICIDATION. An Steegen , Hugo Bender, Karen Maex, Imec, BELGIUM.

When scaling down the device dimensions and increasing the pattern density, the local mechanical stress in the silicon substrate induced during the Ti- and Co/Ti-silicidation increases. For sub-micrometer wide silicide lines, the stress can exceed the critical shear stress on the <110> active slip system in the silicon substrate. This results in the heterogeneous nucleation of 60 dislocations in the silicon substrate underneath the silicide line. In case of an undoped silicon substrate, these dislocations nucleate at the edge of the field oxide lines and they are parallel with the <110> oriented line edge. During a junction implantation, if the annealing conditions are insufficient, defects in the form of interstitial dislocation loops are created in the silicon substrate. This type of dislocations are also called end of range dislocations. This paper will investigate the effect of an As and BF2 junction implantation and the effect of the end of range dislocations on the stress developed during the silicidation reaction and on the nucleation and growth of the stress induced 60 dislocations during the silicidation reaction.

9:15 AM N1.4 
EFFECTS OF ION METAL PLASMA (IMP) TITANIUM DEPOSITION ON Ti SILICIDE FORMATION. Anna Sabbadini , Camillo Bresolin, Valter Cusi, Tina Marangon, STMicroelectronics, Agrate Brianza, ITALY.

Low resistance, self aligned titanium disilicide (TiSi2) gate interconnections and active area can be produced by Rapid Thermal Annealing (RTA) of a thin titanium layer deposited by Physical Vapour Deposition (PVD) on patterned poly and silicon, and subsequent unreacted Ti on dielectric wet chemical stripping. In order to transform the initial TiSi2-C49 highly resistive (60-90 uOhm cm) phase into a stable, low resistive (12-20 uOhm cm) C54 structure, a second RTA is required in the temperature range 700C-900C (N2). Successful Ti silicide formation and phase conversion are known [1-5] to depend on active area and poly dimensions, substrate doping, implant preamorphization and starting titanium layer film properties. In this work, standard PVD titanium, Coherent PVD titanium and Ion Metal Plasma (IMP) Ti thin films were implemented to form TiSi2 on poly lines as narrow as 0.2 um and monosilicon lines down to 0.35 um minimum dimension. In addition to an electrical characterisation of TiSi2 at different line widths, AFM, SEM, TEM and XRD analyses on flat and patterned wafers are presented to investigate and compare basic film properties. As most interesting result IMP Ti was found to develop a TiSi2 final sheet resistance on narrow poly lines (0.2 um) substantially below reference values, indicating a potential key advantage of IMP technique over the other PVD methods. Finally, a short discussion is proposed to support possible explanations of observed results in relation to measured film properties. [1] L. Van den Hove et al. in Reduced Thermal Processing for ULSI, (1988) Plenum Press; [2] K. Maex, Mat. Sci. and Eng., R11 (1993) 53; [3] Q.Z. Hong et al., Thin Solid Film 253 (1994), 479; [4] K. Maex, Conf. Proc. ULSI-X 1995 MRS; [5] M.D. Naeem et al., Appl. Phys. Lett. 66(7), (1995) 877

9:30 AM N1.5 
PREVENTION OF CORNER VOIDING IN SELECTIVE CVD OF TITANIUM SILICIDE ON SOI DEVICES. Jer-shen Maa , Bruce Ulrich, Lisa Stecker, Greg Stecker and Sheng Teng Hsu, Sharp Microelectronics Technology, Camas, WA.

Selective deposition of titanium silicide has been demonstrated on Si film with thickness less than 100. One may assume that the selective CVD silicide can be easily applied to SOI devices. One reason is that in SOI devices the junctions are located sidewise under the spacer region, therefore the junction leakage is no longer an issue as in contrast with bulk device with very shallow junctions. However, in the application to SOI device consisting of very thin Si layer, voids were observed at the bottom corner of the spacers. These voids were found to cause significant reduction of device drain current and in extreme cases cause electrical discontinuity. A special test structure was then chosen to monitor this voiding phenomenon in more details. It was observed that the formation of voids were affected strongly by the thickness of the Si film of the SOI wafer. The problem became serious when the thickness was less than 200. This problem can be partially resolved by adjusting the deposition condition and limiting the silicide thickness. The sheet resistance of the silicide was limited to about 8-10 ohm/sq. However this was very sensitive to the thickness uniformity of Si film of the SOI wafer and to the Si loss during the device processing steps. This problem was resolved by depositing a selective Si layer prior to silicide deposition. The reason of void formation as well as the effectiveness of this Si film will be discussed.

10:15 AM *N1.6 
THE FUTURE OF TITANIUM SILICIDE FOR CONTACTS IN CMOS TECHNOLOGY. Ronnen Roy , C. Cabral Jr., C. Lavoie, IBM Research Division, Yorktown Heights, NY.

This talk examines the challenges for silicide contacts in current and future CMOS technology and assesses the capability of TiSi2 to meet the technology requirements. Specific issues such as maintaining low resistance in narrow lines, Source/Drain silicon consumption, and silicide thermal budget, are discussed. In this regard, the salient features of variations of the basic titanium silicide process, such as alloying, implantation, selective CVD, and laser silicidation, are evaluated. Data is presented from recent experiments to assess progress in each approach to meeting the necessary goals. Recent attempts to improve the conventional salicide process have focused on introducing impurities into the Ti/Si system either by implantation into the Si, interface layers between the Si and Ti, or by alloying the Ti overlayer with an additional element. The C54 yield improves in such processes, while in other respects, these variations use the same salicide process as conventional TiSi2. In selective CVD TiSi2, unlike conventional salicide, the amount of Source/Drain silicon consumption during silicidation can be decoupled from the silicide thickness, while the C54 yield is also higher than salicide. The sensitivity to growth on highly doped silicon needs to be minimized to provide a robust process. In the case of pulsed laser annealing, the silicide can form by reaction of the Ti overlayer with a thin Si molten layer beneath. The result of this in terms of S/D and polysilicon gate consumption and C54 formation are discussed.

10:45 AM N1.7 
FACILITATED C54-TiSi2 FORMATION WITH ELEVATED DEPOSITION TEMPERATURE: A STUDY OF CO-DEPOSITED LAYERS. Shun-ichiro Ohmi and Raymond T. Tung, Bell Labs Lucent Technologies, Murray Hill, NJ.

TiSi2 is one of the most widely used contact, gate, and local interconnect materials in ULSI devices, because of its low electrical resistivity and high thermal stability. The formation of the low resistivity C54-TiSi2 phase on narrow silicon lines however, remains a serious issue, even though recent proposals such as pre-amorphization, high temperature sputtering and Mo implantation have demonstrated considerable improvements. In this work, the C49 to C54 TiSi2 phase transformation is further investigated using co-deposited TiSix thin films. Various profiles of TiSix (x = 03.0) layers were artificially created by co-deposition under UHV conditions on the surfaces of crystalline or amorphized Si substrates at temperatures up to 400C. The deposition temperature was found to have a strong effect on the subsequent silicide reaction. Layers deposited at room temperature did not transform to the C54 phase below 650C, while those deposited at >250C began transformation at <600C. The flux ratio of the co-deposition also has an effect on the silicide reaction, but in an unexpected way: the optimum concentration to form C54 TiSi2 phase was x = 1.5 for room temperature deposition, while it was largely insensitive to x for samples deposited at 400C. Surprisingly, the incorporation of a small amount of Mo had little effect on the C54 transformation in layers deposited at elevated temperatures. Results obtained from TEM, RBS, XRD, and sheet resistance measurements will be presented along with a discussion of the underlying mechanisms. It appears that a high deposition temperature widens the process window for Ti silicide and this finding may impact Ti salicide/polycide technologies.

11:00 AM N1.8 
ROLE OF MOLYBDENUM DOSE ON THE TiSi2 PHASE TRANSFORMATION KINETICS. E. Kuryliw , Eaton Thermal Processing Systems Division, Peabody, MA and University of Florida, Gainesville, FL; Aditya Agarwal, Eaton Semiconductor Equipment Operations, Beverly, MA; ? K.S. Jones, University of Florida, Gainesville, FL; P. Frisella and J. Zhang, Eaton Thermal Processing Systems Division, Peabody, MA; M. Walsh, Eaton Implant Systems Division, Beverly, MA; S.B. Herner, Applied Materials, Santa Clara, CA.

The effect of implanted molybdenum dose on the TiSi2-C49 to C54 phase transformation has been analyzed. P+-type wafers were implanted with Mo in the dose range of 3  1012 to 3  1014/cm2. Titanium deposition was performed followed by anneals between 550-850C. Unlike previous works, some of the Mo implants were left unannealed prior to Ti deposition. A 25C reduction in the transformation temperature was observed over samples not containing molybdenum. Increasing the molybdenum dose led to a decrease in the time to transformation at a given temperature. The chemical effect of Mo was separated from possible damage enhanced transformation by regrowing the amorphized region. The effect of amorphizing the Mo-implanted silicon surface prior to Ti deposition was studied as well as the differences between Si+ and Ge+ amorphizing species. Both amorphizing species were found to retard the transformation process when compared to non-amorphized samples, though Si+ had a less deleterious effect. A direct formation of the C54 phase was observed on undoped samples when the unannealed implanted Mo dose was 3  1014/cm2.

11:15 AM N1.9 
THE FORMATION OF C54 TiSi2 IN THE PRESENCE OF IMPLANTED OR DEPOSITED MO. M. Roux, A. Mouroux and S.L. Zhang , Royal Institute of Technology, Department of Electronics, Kista, SWEDEN.

The presence of Mo, either implanted in Si substrate prior to Ti deposition or deposited at the interface between Ti and Si, leads to the formation of C54 TiSi2 at 600C that is about 100-150C lower than for the C49-C54 phase transformation. A template mechanism has been suggested to be responsible for this enhancement effect in the case of an interposed layer of Mo. In this work, a comparative study is presented to correlate the enhancement effect(s) induced by implantation or deposition of Mo. It is confirmed that either way of the Mo additions leads to the enhanced formation of C54 TiSi2. It is shown that the C54 TiSi2 formed with the implanted Mo of a nominal dose of 51014 at/cm2, displays similar microstructure properties to that formed with the deposited Mo of 0.09 nm average thickness. The preferential orientation of the C54 TiSi2 formed changes from <110> to <010> when the amount of Mo is increased; it is <110> oriented in the samples received Mo implantation or with 0.09 nm Mo interlayer, as well as in the reference sample without any Mo. It becomes <010> oriented when the Mo interlayer is 0.7-0.9 nm thick. After annealing at 600C for 30 min, the C54 TiSi2 is detected in the samples with implanted Mo or 0.7-0.9 nm Mo interlayer. The C54 TiSi2 does not form in the reference sample below 700C. With the 0.09 nm Mo, the formation temperature for the C54 TiSi2 is 650C. Since the sample that received Mo implantation was annealed at 900C for 30 min to remove implantation damage, discrete MoSi2 (either C11b or C40) crystallites can form at the Si surface prior to Ti deposition. The MoSi2 can then act as seed for the growth of C54 TiSi2.

11:30 AM N1.10 
ENHANCEMENT OF THE FORMATION OF TiSi2 C54 PHASE ON CO-SPUTTERING DEPOSITED Ti-Ta-Si FILM. Wei-Chang Wang and Fon-Shan Huang , Institute of Electronic Engineering, National Tsing-Hua Univ., Hsin-Chu, TAIWAN.

The phase formation during rapid thermal annealing of Ti-Ta-Si film on Si from co-sputtering Ta and Ti targets is studied. Two different Ta targets were used. One of them is Ta slice, the other is Ta film previously deposited on a Si wafer. The samples A and B were fabricated by sputtering Ta film and Ta slice, respectively. The thickness of the sputtering-deposited films are 260A, 1500A, and 2800A. The controlled sample was prepared by co-sputtering Si and Ti. All the samples were then rapid thermal annealed at 550C to 800C, from XRD, resistivity, TEM, SIMS, and RBS measurements. We found the formation of TiSi2C54 phase is dependent on the Ta target and thickness of the Ti-Ta-Si film. The dominant diffraction peaks of TiSi2C54(311) and Cu54(040) were observed for the samples A(1500A) with RTA at 600C that is 150C lower than what is usually needed for C49-C54 phase transformation. RBS and SIMS give the evidence that a large amount of Si atoms are already mixed with Ta and Ti atoms before the RTA. The ratio of number of these atom is Ti:Ta:Si=48:1:51 in the Ti-Ta-Si films. Meanwhile, the C54 phase formation temperature is about 650C for the samples A with thickness 260A. But, for samples B, high concentration of Ta atoms in the film favors to form Ta silicides during RTA. We found the peaks of Ta3Si(313), TaSi2(101), TiSi2C49(131) and other Ta silicide in XRD. The SIMS shows that the nitrogen atoms diffuse into Ti-Ta film during the RTA process. It prevents the silicide formation on the top of the thick film.

11:45 AM N1.11 
THE REDUCTION OF THE PHASE TRANSITION TEMPERATURE OF TiSi2 BY INTRODUCING AN Ta INTERLAYER ON Si(111). Bokhee Jung, Woochul Yang*, R.J. Nemanich*, Young Do Kim and Hyeongtag Jeon , Division of Materials Science Engineering, CPRC, Hanyang Univ, Seoul, KOREA; *Dept of Physics, North Carolina State Univ, Raleigh, NC.

Titanium silicide exhibits special interests due to its low electrical resistivity and high thermal stability. TiSi2 is polymorphic material, which exists a high resistivity base-centered orthothombic C49 phase (60-90 cm) and the low resistivity face-centered orthothombic C54 phase (15-20 cm). The transition temperature of C49 phase to C54 phase of TiSi2 is about 650C, and the Ti film thickness, interconnection line width and Si substrate orientation affect this transition temperature. Recently it has been reported that the transition temperature of TiSi2 can be reduced through introducing refractory metals of Mo, W, Nb, and Ta between the Si substrate and Ti layer. Two mechanisms were suggested to explain the roll of the refractory metals in this TiSi2 formation. One is the densifying nuclei by grain refinement and the other is the crystallographic template mechanism. But it has not been verified which one is really dominating the phase transition of TiSi2. In this study, the Ta layer was applied as an interlayer because it forms TaSi2 which exhibits the low resistivity (35 cm) and the small lattice mismatch between the basal plane of hexagonal TaSi2 and the (010) planes of C54 phase. Therefore introducing the Ta interlayer can lower the transition temperature of TiSi2 without increasing resistivity significantly. In this experiment, 100  Ti on top of Ta (5,10 ) interlayers were deposited on the n-type P-doped Si(111) substrates. The evaporation system equipped with dual e-beam was operated at the base pressure of 8x10-10 torr to deposit Ta and Ti. Following the metal deposition, the samples were annealed at the temperatures between 500C and 750C by in-situ for 10 minute. The physical and electrical properties of these samples were analysed by using four-point probe, XRD, SEM, AFM, AES, and TEM. In our results, the transition temperature of TiSi2 was reduced by about 100C through introducing 5  and 10  thickness of Ta interlayers. Also SEM and TEM exhibited the suppression of the silicide agglomeration at high temperature. This paper will discuss the effect and mechanism of Ta interlayer during the TiSi2 transition. 

SESSION N2: COBALT AND NICKEL SILICIDE 
Chair: Takamaro Kikkawa 
Monday Afternoon, April 5, 1999 
Golden Gate B2 (M)
1:30 PM N2.1 
GROWTH PROCESSES OF TiSi2 AND CoSi2 STUDIED BY IN SITU TRANSMISSION ELECTRON MICROSCOPY. F.M. Ross , R.M. Tromp, M.C. Reuter, IBM Research Division, T.J. Watson Research Center, Yorktown Heights, NY and P.A. Bennett, Department of Physics, Arizona State University, Tempe, AZ.

As integrated circuit dimensions become smaller, the ability to control the microstructure of the materials used in interconnects and contacts is becoming increasingly important. Especially significant are the nucleation and growth processes which control the formation of desirable silicide phases during integrated circuit processing. We have therefore been studying the formation kinetics of Ti and Co silicides in real time in an in situ transmission electron microscope. The microscope has a UHV specimen environment to which several evaporators have been added, enabling metals to be deposited on a clean Si substrate either within the microscope polepiece or in an adjacent chamber. Images recorded in real time during deposition and subsequent heating allow us to observe the kinetics of silicide formation with reasonably high resolution. For the Ti/Si system, we have measured the kinetics of the C49-C54 phase transition in ultra pure Ti films and in films with varying amounts of oxygen and alloying metals. The behaviour of the reaction front depends strongly on impurity content: it moves smoothly in pure TiSi2 but shows interesting grain boundary pinning in oxygen-containing films. We have also observed step dynamics at the TiSi2/Si interface during the growth of the C54 phase. For the Co/Si system, high temperature Co deposition in the microscope results in the formation of CoSi2 islands. We find that island nucleation and growth are controlled by the initial configuration of surface steps and the subsequent diffusion of Si adatoms across the surface. We will describe these experiments and discuss the significance of the results for the control of microstructure in silicide films.

1:45 PM N2.2 
XPS AND AFM STUDIES OF CoSi2 GROWTH INTO THE Si SURFACE. J.S. Pan , Jian-Hui Ye, Institute of Materials Research & Engineering, SINGAPORE; C.H.A. Huan, A.T.S. Wee, National University of Singapore, Department of Physics, SINGAPORE.

CoSi2 is one of the leading candidates for self-aligned silicide (salicide) application in ULSI devices. Its low electrical resistivity, ease of formation on narrow Si lines, compatibility with shallow junction formation using silicide-as-doping-source (SADS), resistance to etching etc. makes it very attractive for devices with sub-quarter-micron design rules. There have been many reports on the synthesis of CoSi2 by solid phase reaction (SPR) technique, a common technique used for silicide growth, which entails the deposition of a pure metal layer on a silicon substrate at room temperature and the reaction of the metal with the Si substrate during a subsequent anneal resulting in the growth of silicide phase. However, few studies have been done under ultrahigh vacuum (UHV) conditions.