Paul C. McIntyre Stanford University
Joan M. Redwing The Pennsylvania State University
Volker Schmidt Max-Planck-Institut für Mikrostrukturphysik
Silvija Gradecak Massachusetts Institute of Technology
JEOL USA Inc
First Nano, a division of CVD Equipment Corp
AA1: III-V Nanowire Devices
Tuesday AM, April 14, 2009
Room 3008 (Moscone West)
9:30 AM - **AA1.2
Position Controlled Growth of III-V Semiconductor Core-shell Nanowires Grown by Selective Area MOVPE and Their Device Applications.
Takashi Fukui 1 , Katsuhiro Tomioka 1 , Shinjiro Hara 1 , Kenji Hiruma 1 , Junichi Motohisa 1 Show Abstract
1 Research Center for Integrated Quantum Electronics, Hokkaido University, Sapporo, Hokkaido, Japan
Semiconductor nanowires have stimulated extensive interest in recent years because of their unique properties and potential applications as building blocks for nanoscale electronic and photonic devices. Realization of high quality, highly uniform, single-crystalline, reproducibly identical nanowires is a challenging task and one of the key hurdles for future development of nanotechnology. The significance of such controlled growth of nanowires would increase multifold if they were realized using a catalyst-free growth technique.We report on the systematically controlled growth of GaAs and InP and related III-V compound semiconductor nanowire arrays by catalyst-free selective area metalorganic vapor phase epitaxy on partially masked (111) oriented substrates. First we discuss about nanowire growth mechanism for GaAs. GaAs NWs include many twining defects, which are strongly related to the surface reconstructions. Growth modes change from initial tetrahedral growth to NW growth by introducing these defects.The length, diameter, shape and position of the nanowires were precisely controlled by optimization of the growth conditions and mask patterning. Manipulation of the growth conditions also enabled us to deliberately define the nanowire growth along either the axial or the radial direction, which has significant potential for the realization of novel nanostructures.Next, we report the fabrication of InP/InAs/InP core-multishell nanowire arrays. Low temperature photoluminescence measurements indicate successful formation of InAs quantum well tubes with thicknesses of several mono-layers on InP nanowire sidewalls. For device application, we fabricated single InGaAs nanowire-top-gate metal–semiconductor field-effect transistors (MESFETs). The top-gate MESFETs exhibited a peak transconductance of 33mS/mm and a current on–off ratio of 103. Finally, we introduce other applications of nanowires using this technique, such as, optically pumped GaAs/GaAsP core-cell nanowire lasers, fabrication of InP core-shell p-n junction nanowire solar cell, uniform GaAs and InAs nanowire array formation on Si (111) substrates, MuAs/GaInAs heterostructure nano-cluster formations on GaAs and their magnetic domain characterization.
10:00 AM - AA1.3
Optical Anisotropy of Semiconductor Nanowire Ensembles.
Silke Diedenhofen 1 , Otto L. Muskens 1 , Erik P.A.M. Bakkers 2 , Jaime Gomez Rivas 1 Show Abstract
1 , FOM Institute for Atomic and Molecular Physics AMOLF, Eindhoven Netherlands, 2 , Philips Research Laboratories Eindhoven, Eindhoven Netherlands
Artificial materials fabricated from anisotropic building blocks like nanowires and nanotubes are of special interest for several applications like optical sensors, broadband antireflection coatings, and nano-photovoltaic devices. Nanowire materials hold merit due to their extreme tuneability by changing their dimensions and alignment. Samples with a high density of aligned nanowires are characterized by a strong optical form birefringence, i.e. different refractive indices for different polarizations of light. Here, we present measurements of the in-plane birefringence of GaP nanowires. The nanowires are grown in the vapor-liquid-solid growth (VLS) mode by metal-organic-vapor phase epitaxy (MOVPE) on a (100) GaP substrate. Scanning electron microscopy (SEM) images show that most of the wires are grown under an angle of 35 ° with respect to the substrate surface. Ensembles of semiconductor nanowires form a birefringent material consisting of two different in-plane refractive indices. The birefringence parameter Δn, defined as the difference between these two indices, of the nanowire layer was determined using transmission measurements. Linearly polarized light from a diode laser emitting at a wavelength of 690 nm transmitting through the nanowire layer is measured under normal incidence for crossed and parallel polarization. From these measurements, we determine the retardation as a function of the azimuthal angle of the nanowire sample. The birefringence in the nanowire layer is shown to depend on the GaP filling fraction of the wires, and accordingly to the wire diameter. Strongest birefringence was observed for a sample with a filling fraction of around 35 ± 5 % being 0.209 with an error of 10 %.1Nanowires can be grown of any semiconductor of groups IV, III/V, and II/VI on any crystalline surface, which allows the synthesis of birefringent media from visible to infrared wavelengths.1 O. L. Muskens, S. L. Diedenhofen, M. H. M. Van Weert, M. T. Borgström, E. P. A. M. Bakkers, and J. Gómez Rivas, Adv. Funct. Mater., (2008), 18, 7, 1039
10:15 AM - AA1.4
Optical Properties and Carrier Dynamics of Ensembles of InP Nanowires Grown on Non-single-crystal Platforms.
Takehiro Onishi 1 2 , Andrew Lohn 1 2 , Nobuhiko Kobayashi 1 2 Show Abstract
1 Electrical Engineering, University of California, Santa Cruz, Santa Cruz, California, United States, 2 Advanced Studies Laboratories, NASA Ames Research Center, Moffett Field, California, United States
Optically active InP nanowires were grown on a quartz substrate covered with a layer (100 nm) of hydrogenated amorphous silicon (a-Si:H) by metalorganic chemical vapor deposition (MOCVD), demonstrating that single-crystal semiconductor nanowires can be formed on non-single-crystal surfaces. Scanning electron microscopy (SEM), X-ray diffraction (XRD), Raman spectroscopy, cathodeluminescence (CL) were used to characterize the structural and optical properties of the nanowires. The nanowires on a-Si:H grew in random directions with high density. The XRD profile suggests that nanowires having either hexagonal-close-packed or face-centered cubic lattices are present. Two distinct cross sectional geomotries of nanowires are observed amongst each other which is further evidence for the separate crystallographic habits found in the XRD profile. The Raman spectrum shows peaks associated with transverse optical (TO) and longitudinal optical (LO) branches of InP. The TO Raman peak closely matches that of bulk InP and the slightly larger shift in the LO mode could be caused by thermal expansion due to the green probe (514 nm) laser excitation. CL of a single InP nanowire was used to study the variations in luminescence along the long axis of the tapered nanowire from the base (~250 nm in diameter) to the tip (~10 nm in diameter). The luminescence intensity does not vary significantly in the growth direction of the nanowire. When probed at various positions along their length the wires emit from the entirety of their structure and without substantial variation along the long axis. This data suggests that recombination is slow enough to allow the carriers to diffuse the complete length of the nanowires (~2 µm) before recombining. Microscopic carrier recombination dynamics of the nanowires will be discussed with the view towards nanowire-based optical sensors using InP and other materials. Kobayashi N. P., Wang S. Y., Santori C., Williams R. S., “Growth and characterization of indium phosphide single-crystal nanoneedles on microcrystalline silicon surfaces,” Applied Physics A 85 1-6 (2006).
10:30 AM - AA1.5
Electrical Characterization of Single GaSb Nanowire Field Effect Transistor.
Wei Xu 1 , Alan Chin 2 , Laura Ye 2 , Cun-Zheng Ning 1 2 , Hongbin Yu 1 Show Abstract
1 Center for Solid State Electronics Research & Department of Electrical Engineering, Arizona State University, Tempe, Arizona, United States, 2 Center for Nanotechnology, NASA Ames Research Center, Moffett Field, California, United States
Among III–V compound semiconductors, GaSb has the potential to be a promising candidate for high speed electronic and long wavelength photonic devices, due to its high mobility and low band gap. In this work, we present the fabrication and electrical characterization of GaSb nanowire Field Effect Transistor (FET). The GaSb nanowires are synthesized using the self-catalyzed vapor-liquid-solid approach  and are unintentionally doped. Following the growth, the wires are removed from the growth substrate, suspended in alcohol, and dispersed onto SiO2 substrates for device fabrication. The Au/Cr contacts are fabricated using Electron Beam Lithography (EBL), followed by thermal evaporation and lift-off. Charge transport in unintentionally doped nanowires can have different regimes of operation, and these regions can be distinguished through voltage and temperature dependent study. The temperature dependent current-voltage characteristic shows asymmetric current through the device due to asymmetric back to back Schottky contacts at the two ends of the wire. By applying the Arrhenius plot, the Schottky barriers can be estimated to be 0.49eV and 0.53eV, which are close to reported values measured from the bulk material. Due to the unintentionally doped nature and the presence of trap states of the wire, a transition from linear IV curve at small bias to the Space-Charge-Limited Current (SCLC) at higher bias was clearly observed. Analysis of the voltage and temperature dependencies of the SCLC showed that the nanowire surface traps are distributed in energy with a characteristic depth of ~0.12eV after annealing. The gate response results indicate the unintentionally doped nanowire to be n-type. This work provides a method on analyzing the nanowire Schottky current-voltage characteristics and the space-charge-limited current behavior, which can be commonly observed on characterizing the unintentionally doped nanowire devices. Further details of this approach and additional experimental and simulation results will be presented.. P. S. Dutta and H. L. Bhat, J. Appl. Phys. 81 (9), 1 May 1997.S. Vaddiraju, M. K. Sunkara, A. H. Chin, C. Z. Ning,G. R. Dholakia, and M. Meyyappan, J. Phys. Chem C111(2007)7339
10:45 AM - AA1.6
Extracting Carrier Concentration and Mobility from Space-Charge-Limited Transport in InAs Nanowires.
Aaron Katzenmeyer 1 3 , M. Eugenia Toimil-Molares 1 , Jeffrey Cederberg 2 , Francois Leonard 1 , A. Alec Talin 1 Show Abstract
1 , Sandia National Laboratores, Livermore, California, United States, 3 Electrical and Computer Engineering, University of California, Davis, California, United States, 2 , Sandia National Laboratores, Albuquerque, New Mexico, United States
Semiconductor nanowires continue to fascinate researchers, who are often motivated by the combination of high crystalline quality and nanoscale dimensions not easily accessible by ‘top-down’ lithographic means. In order for these nanostructures to have technological impact, their basic electrical characteristics have to be measured accurately and reproducibly; however, bulk techniques such as Hall measurements, cannot be easily implemented with nanowires due to small dimensions. Frequently, carrier type, concentration and mobility are determined from the transfer characteristics of a nanowire FET device. The results, however, can be strongly affected by the nanowire and the dielectric/nanowire surface and interface states, respectively. Here, we report on electrical characterization of VLS grown InAs nanowires using two distinct methods and compare their results. In the first approach, we fabricate nanowire FETs using Si/SiO2
substrates and Au/Ti source-drain contacts using standard processing techniques. In the second approach we contact individual nanowires directly on the growth substrate using a W microprobe inside of a SEM. The transport for these in-situ contacted nanowires is initially ohmic, but becomes space-charge-limited at higher bias. Using a recently developed theory for space-charge-limited transport in nanowires,1
we extract the mobility and carrier concentration. Both methods indicate that the carrier concentration increases with decreasing nanowire diameter, while the mobility is reduced. Effective carrier concentration ranged from 5 x 1016
and mobility from 2400 – 3 cm2
/Vs for wires of radius 110 – 20 nm respectively.
1. A. A. Talin, F. Leonard, B. S. Swartzentruber, X.Wang, S. D. Hersee, Phys. Rev. Lett., 101, 076802 (2008)
11:30 AM - AA1.7
High-Speed and Low-Power Performance of n-type InSb/InP and InAs/InP Core/Shell Nanowire Field Effect Transistors for CMOS Logic Applications.
Mohammad Khayer 1 , Roger Lake 1 Show Abstract
1 Electrical Engineering, University of California Riverside, Riverside, California, United States
InSb and InAs are being considered as attractive candidates for the channel of next generation field effect transistors (FETs). Intel and Qinetiq report that InSb-based FETs can achieve equivalent high performance with lower dynamic power dissipation to complement scaled Si-based devices (Intel and Qinetiq, IEEE IEDM, 2005). Although there are several reports in literature on the experimental realizations of these nanowire (NW) FETs, there are few attempts to theoretically model them. In this work, we model and theoretically investigate the performance metrics of highly scaled n-type InSb/InP and InAs/InP core/shell NWFETs using an 8-band k●p model and a semiclassical ballistic transport model. We present the ON-current, intrinsic cut-off frequency, gate-delay time, power-delay product, and energy-delay product of NWFETs with two NW diameters of 10 nm and 12 nm, which operate in the quantum capacitance limit. For all devices, drain bias voltage is fixed at 0.5 V and the gate bias voltage has been taken where the flat-band condition is met. A gate length of 10 nm is considered for each NWFET. The NWs simulated in this work are all  oriented. We find that the power-delay product values of 2x10-20-4x10-20 J of the NWFETs at source Fermi energy of 0.1 eV are all closely matched to the reported value of 5x10-20 J for a 3 nm NW diameter Si NWFET with a 10 nm gate length (J. Knoch, et al., IEEE EDL, 2008). The corresponding gate-delay times of 3-5 fs are also closely matched to the reported value of 5 fs for the 3 nm NW diameter Si NWFET with a 10 nm gate length. However, the ultra-small diameters of 3 nm necessary for Si NWFETs to obtain the reduced power-delay product and gate-delay time are not required for InSb and InAs NWFETs. Moreover, the energy-delay product values of 4x10-33-6x10-33 Js for these NWFETs with a source Fermi energy of 0.2 eV are found to be closely matched to the projected experimental curve for III-V planar n-channel HEMTs (R. Chau, et al., IEEE TNT, 2005) with 10 nm channel width. The energy-delay product values of 1x10-32-2x10-32 Js with 12 nm diameter InSb and InAs NWFETs with a source Fermi level of 0.3 eV are found to be 10 times smaller than the projected experimental curve for planar n-channel Si MOSFETs (R. Chau, et al., IEEE TNT, 2005). The ON-current varies from 7-58 μA with a source Fermi energy range of 0.1-0.3 eV. With higher Fermi energy, multiple conduction modes are occupied and larger ON-current is obtained. The intrinsic cut-off frequency ranges from 8-15 THz with source Fermi energy ranging from 0.1-0.3 eV, which is good for RF application. For all devices, with a source Fermi energy range of 0.1-0.3 eV, the power-delay product varies from 2x10-20-97x10-20 J, gate delay time ranges from 2-19 fs, and the energy-delay product varies from 7x10-35-1x10-32 Js. These NWFETs provide both ultra low-power switching and high speed.
11:45 AM - AA1.8
Growth and Optical Properties of GaN Nanodisks in GaN/AlGaN Nanowires.
Florian Furtmayr 1 , Christoph Stark 1 , Martin Stutzmann 1 , Sonia Conesa-Boj 2 , Francesca Peio 2 , Jordi Arbiol 2 , Joan Ramon Morante 2 , Martin Eickhoff 3 Show Abstract
1 Walter-Schottky-Institut, Technische Universität München, Garching Germany, 2 EME/XaRMAE/IN2UB, Dept. d'Electrònica, Universitat de Barcelona, Barcelona Spain, 3 I. Physikalisches Institut, Justus-Liebig-Universität, Giessen Germany
We report on the growth of self assembled GaN/AlGaN and GaN/AlN nanowires with embedded GaN nanodisks by plasma assisted molecular beam epitaxy (PAMBE) on Si(111) substrates. Due to their low density of structural defects, they present a promising approach for the realization of improved optoelectronic devices for light emission or for chemical sensors using the high surface to volume ratio of nanowires.For the formation of nanodisks (NDs), GaN nanowires (NWs) with a length of 400 nm and diameter of 25 nm were grown, directly followed by the quantum well structure. In the investigated samples, GaN multi quantum wells with different thicknesses (1.5 nm – 4 nm) were formed between barriers of 8 nm AlN or AlxGax-1N in different Al-compositions. The samples were analyzed by high resolution transmission electron microscopy (HRTEM) and low temperature photoluminescence (PL).The PL emission energy from the ND part can be influenced by variation of the Al-content in the barrier, i.e. the Al flux during growth. In this work an increase of the beam equivalent pressure (BEPAl) from 1.5 x 10-8 mbar to 6 x 10-8 mbar results in an increase of the emission energy from 3.53 eV to 3.70 eV. Its intensity exceeds the emission from the GaN NW itself (3.40 eV – 3.47 eV) by about a factor of ten. The full width at half maximum is as low as 21 meV (at 4K) for the sample with the smallest Al-concentration and rises with increasing Al-concentration up to 77 meV. Due to the presence of polarization fields, the emission shows a red shift with increasing well-thickness. The temperature-dependent quenching of the QD emission is found to be less pronounced than that of the GaN NWs.HRTEM analysis of the GaN/AlN nanowires reveals well defined flat GaN disks with sharp interfaces embedded in AlN and shows a slight reduction of the ND diameter towards the top. The c lattice parameter (which is 0.518 nm for unstrained GaN) is found to be 0.500 nm for the GaN NDs and 0.495 nm for the AlN barriers, showing that GaN is under tensile strain inside the NDs and pseudomorphically adapted to the AlN barriers. Whereas the radial growth rate of the GaN part is almost zero, we find a radial growth of the AlN region with a rate of 11% of the axial growth, leading to the formation of an AlN shell around the whole NW and, due to the enlarged NW diameter, to an increase of the diameters of the following NDs. However, the thicknesses of the individual wells are constant.As a radial growth of GaN depends on the incoming Ga-flux, these results open up the possibility to form core shell structures with quantum wells on the non polar side facets of the nanowires.
12:00 PM - AA1.9
Spatially-Resolved Cathodoluminescence Study of GaN, GaN/AlGaN, and GaN/InGaN Core-Shell Nanowires
George Wang 1 , Qiming Li 1 , A. Alec Talin 2 , Andrew Armstrong 1 , M. Eugenia Toimil Molares 2 Show Abstract
1 , Sandia National Laboratories, Albuquerque, New Mexico, United States, 2 , Sandia National Laboratories, Livermore, California, United States
GaN, GaN/AlGaN, and GaN/InGaN core-shell nanowires grown by Ni-catalyzed metal-organic chemical vapor deposition were studied by spatially-resolved cathodoluminescence (CL). For GaN nanowires, band-to-band luminescence at 362 nm and defect-related yellow luminescence at 550 nm are observed. Point defects, which lead to the yellow luminescence, possibly deplete free carriers near the nanowire surface. This depletion is evidenced by the existence of a critical GaN nanowire radius, below which yellow luminescence dominates. The thickness of the surface depletion layer is estimated to be ~15 nm based on an analysis of the 362 and 550 nm luminescence intensities as a function of nanowire diameter. GaN/AlGaN and GaN/AlN core-shell nanowires are observed to exhibit stronger band-to-band emission at 362 nm as compared with GaN nanowire without an AlGaN shell. The enhanced band-to-band emission is attributed to the passivation of the surface states of GaN nanowires. Electrical measurements further suggest an improvement in the conductivity related to the presence of an AlGaN or AlN shell layer. GaN/InGaN multi-quantum well core/shell nanowires were also investigated by spatially resolved CL, the results of which reveal a strong dependence of shell layer growth rate on the GaN nanowire facet orientation. The morphology revealed by the spatially resolved CL results is confirmed by cross-sectional scanning TEM studies. Sandia is a multiprogram laboratory operated by Sandia Corporation, a Lockheed Martin Company, for the United States Department of Energy under contract DE-AC04-94AL85000.
12:15 PM - AA1.10
Modeling and Design of Dislocation-Free Nanostructured InGaN-Based Light Emitting Devices
Zhiwen Liang 1 3 , Robert Colby 1 3 , Dmitri Zakharov 1 3 , Isaac Wildeson 2 3 , R. Edwin Garcia 1 3 , Eric Stach 1 3 , Tim Sands 1 2 3 Show Abstract
1 Materials Engineering, Purdue University, West Lafayette, Indiana, United States, 3 Birck Center for Nanotechnology, Purdue University, West Lafayette, Indiana, United States, 2 School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana, United States
The production of InGaN-based Light Emitting Diodes (LEDs) of low dimensionality constitutes a radical departure from conventional thin-film LED fabrication approaches, for it has the potential of delivering dramatically improved efficiencies. Through the careful incorporation of indium into a gallium nitride nano-pyramidal structure base, the band gap (the color) of the device can be engineered, and thus light emission over the entire visible spectrum can become possible. The main advantage of this approach is the suppression of dislocation formation, particularly in the region where electron-hole pair recombination takes place. The aforementioned processing technique favors the introduction of a significantly large fraction of surfaces that greatly relaxes the processing stresses on the LED structure and diminishes the possibility of nucleating defects. Kinetic and thermodynamic factors such as spinodal decomposition of the InGaN system limits indium incorporation, which combined with the underlying thermal and piezoelectric stresses can lead to a potential decrease in the quantum efficiency of the overall structure. In the present paper, by carefully exploring the effect of topology and thermal annealing, the nucleation of dislocations in GaN-based nanostructures is investigated to provide conditions that favor the emission of light at a tailored frequency. A computational analysis based on the finite volume method is used to implement a phase field description that couples the effect of strain and spinodal decomposition as the pyramids attempt to relax. Simulations show preferential segregation of InN in those regions that are stress-free. The effect of annealing temperature is summarized in time-temperature transformation (TTT) diagrams. Comparisons against bulk, thin film behavior, and experimental data are made. Improved designs that will lead to an optimal InN distribution are proposed. This material is based on work supported by the Department of Energy under Award No. DE-FC26-06NT42862
12:30 PM - AA1.11
Deep Level Optical Spectroscopy of GaN Nanowires.
Andrew Armstrong 1 , Qiming Li 1 , A. Alec Talin 2 , George Wang 1 Show Abstract
1 , Sandia National Laboratories, Albuquerque, New Mexico, United States, 2 , Sandia National Laboratories, Livermore, California, United States
GaN nanowires (NWs) are attractive elements for nanoscale electronic and optoelectronic application, but currently little is known about the physical origin of defects in these nanomaterials. Here, we have used photoconductivity deep level optical spectroscopy (DLOS) to measure the optical ionization energy (Eo) and Franck-Condon shift (dFC) of band gap states in vapor-liquid-solid grown GaN NWs. Unintentionally doped, n-type NWs were individually contacted for DLOS analysis at 300K, and photoluminescence (PL) spectra of single NWs were also taken. DLOS revealed a minority carrier deep level near Ec - 0.8 eV (where Ec is the conduction band minimum) that is near a surface state predicted to pin the Fermi level for n-type, c-plane GaN surfaces . DLOS spectra of GaN and AlGaN/GaN core-shell NWs will be compared to investigate the possible surface nature of this defect. In addition, a band gap state at Ec – 2.81 eV (dFC = 0.28 eV) was observed via DLOS, and a broad defect band centered at 2.25 eV was detected by PL. The associated defects are not particular to the surface based on their similarity to previous reports for thin film GaN. Further, their strong degree of phonon-coupling suggests that the Ec - 2.81 eV level and the 2.25 eV PL band stem from the same defect, which is likely related to either carbon impurities  or gallium vacancies .1 Van de Walle et al., J. Appl. Phys. 101 081704 (2008).2 Klein et al., Appl. Phys. Lett. 79, 3527 (2001).3 Reshchikov et al., MRS Symp. Proc. 93, I6.19 (2002).
12:45 PM - AA1.12
Controlled Growth and Characterization of Non-tapered InN Nanowires on Si(111) Substrates by Molecular Beam Epitaxy.
Yi-Lu Chang 1 , Arya Fatehi 1 , Zetian Mi 1 Show Abstract
1 , McGill University, Montreal, Quebec, Canada
InN nanowires self-catalytically grown on Si substrates, with emission wavelengths at ~ 1.6 µm, promise a new generation of on-chip nanoscale lasers, in addition to their growing importance for the development of future nanoscale electronic and biosensing devices. However, there still lacks a fundamental understanding of the growth mechanisms of InN nanowires on Si. The resulting nanowires generally exhibit tapered morphology, leading to uncontrolled electrical and optical properties. In this context, we have performed a detailed investigation of the molecular beam epitaxial (MBE) growth and characteristics of InN nanowires directly on Si(111) substrates. With the use of an in situ deposited indium seeding layer, we have achieved superior quality InN nanowires with completely eliminated tapered morphology, which exhibit an extremely narrow photoluminescence linewidth of ~ 25 meV at room temperature. The wire densities can also be controllably varied from ~ 5/µm2 to ~ 500/µm2. InN nanowires are grown on Si(111) substrates using radio-frequency plasma-assisted MBE in the temperature range of 440 – 520 °C under N-rich conditions. The indium flux was varied in the range of 0.3 – 1.0 ×107 Torr. A nitrogen flux of 1.6 sccm and a plasma forward power of 425 W were used. A thin (~ 1 – 6 monolayer) indium layer is first deposited on Si substrates, which serves as seeds for the nucleation of InN nanowires. Such an indium layer also minimizes the formation of a SiNx interface between the Si and InN nanowires. InN nanowires are characterized by field emission scanning electron microscopy, transmission electron microscopy, and photoluminescence measurements. The wires are of wurtzite structure and well separated, with the c-axis oriented vertically to the Si(111) substrate. Compared to the commonly observed tapered morphology of InN nanowires on Si, such nanowires are straight, with identical top and bottom sizes. The InN/Si interface also contains very low defect densities and few stacking faults. By varying the thickness of the indium seeding layer as well as the growth conditions, InN nanowires with diameters in the range of 20 – 200 nm, heights from ~ 0.5 to 2 µm, and areal densities from ~ 5/µm2 to ~ 500 µm2, can be achieved. Additionally, such InN nanowires exhibit strong photoluminescence emission, with a peak wavelength at ~ 0.75 eV. An extremely narrow linewidth of ~ 25 meV is also measured from an InN nanowire ensemble at room temperature, compared to the commonly observed 50 – 100 meV, which further confirms the extremely high quality and significantly reduced tapering and broadening. The temperature-dependent bandgap, electron concentration, and transport properties of such high quality, nontapered InN nanowires on Si are being investigated. These results, together with the achievement of InN/InGaN core-shell and well-in-a-wire nanoscale heterostructures, will be presented.
Paul C. McIntyre Stanford University
Joan M. Redwing The Pennsylvania State University
Volker Schmidt Max-Planck-Institut für Mikrostrukturphysik
Silvija Gradecak Massachusetts Institute of Technology
AA6: Poster Session: Semiconductor Nanowires II
Wednesday PM, April 15, 2009
Salon Level (Marriott)
9:00 PM - AA6.1
Reduced Thermal Conductivity in Large-area Vertically-aligned Silicon Nanowires.
Ting-Kang Chen 1 , Min-An Tsai 1 , Peichen Yu 1 Show Abstract
1 Photonics, National Chiao-Tung University, Hsinchu Taiwan
Since silicon is widely used in the integrated circuit (IC) industry, the ability to tailor the thermoelectric properties of bulk silicon using its nanostructures can enable a variety of exciting applications, such as efficient thermo-photovoltaic devices, and monolithically- integrated electronic and optoelectronic device cooling. In late 2007, scientists have reported that a single silicon nanowire (Si NW) with a diameter less than 52nm exhibits a low thermal conductivity ~1.6 W/mk and ZT ~1 at room temperature, suggesting the potential of using Si NWs for efficient thermoelectric energy conversion. In order to realize a practical thermoelectric device based on Si NWs, it is essential to fabricate large-area and highly-oriented Si NW arrays on silicon substrates. In this paper, we demonstrate the preparation of vertically-aligned Si NWs with diameters of tens of nanometers, heights ranging from tens of micrometers to over 100 μm, and most importantly, an area over 5x5 cm^2. Characterizations using a hot-disk slab-module system show the thermal conductivity reduced by 13.4% for the fabricated Si NW samples, compared to that of bulk silicon. Two-dimensional microscale heat-transfer analyses of Si NWs based on the equation of phonon radiative transfer are in progress and will be presented. The high-aspect-ratio and vertically-aligned Si NW arrays were fabricated using a silver-induced wet deposition and wet chemical etching method. The surface morphology and the etching length depend on the concentration of both AgNO3 and HF solution, the etching temperature, and etching time. The concentration of AgNO3 affects the structure of the nanowire arrays because the porosity is determined by the density of deposited Ag particles. A Hot Disk 2500 slab-module system was then employed to measure the thermal conductivity of the fabricated NWs. During the measurement, the sensor was sandwiched between two samples, while the other side of samples was insulated by a material with a low thermal conductivity in order to reduce the heat losses to the surroundings. We measured the increment in temperature versus time for two uniformly-distributed Si NW samples with heights of 32 μm and 43 μm fabricated on 650-μm-thick Si substrates, while two pieces of bare 650-μm-thick Si substrates were used for control experiments. Preliminary characterizations show that the Si NW samples exhibit a reduced thermal conductivity of 116 W/mK, compared to that of bulk Si, ~134 W/mK. Moreover, the thermal conductivities and thermal diffusivities obtained from Si NW samples were lower than bare Si substrates for all nine individual experiments. In summary, we have successfully fabricated large-area, high-aspect-ratio Si NW arrays, and measured their thermal properties using a Hot Disk system. The Si NW samples exhibit a reduced thermal conductivity, compared to that of bulk Si, showing great potential for next-generation thermoelectric devices.
9:00 PM - AA6.10
Enhancement-Mode Si Nanowire Field Effect Transistors on a Flexible Plastic Substrate
Eun-Ae Chung 1 2 , Jamin Koo 1 , Myeongwon Lee 1 , Dong-Young Jeong 1 , Sangsig Kim 1 Show Abstract
1 Department of Electrical Engineering and Institute for Nano Science, Korea university, Seoul Korea (the Republic of), 2 Process Development Team, Memory R&D Center, Samsung Electronics Co., Ltd, Hwasung, Gyeonggi-Do, Korea (the Republic of)
Silicon (Si) nanowire field-effect transistors (NWFETs) with channels of the n+-p-n+ segments of single-crystalline Si nanowires (NWs) were fabricated on a flexible plastic substrate, and their electrical characteristics were investigated. P-type Si NWs utilized in this study were manufactured by the conventional top-down approach, and arsenic implantation was performed subsequently for the formation of the n-type region in these p-type Si NWs. The implanted NWs were transferred onto a plastic substrate for large scale integration. Si NWFETs fabricated by this approach exhibited outstanding controllability and reproducibility of doping and reliable ohmic contacts.The Si NWFETs formed on a plastic substrate revealed their excellent enhancement-mode characteristics and high on/off current ratios. Strong inversion and clear saturation were observed in the NWFETs. These characteristics of geometrically well-defined and doped Si NWs make it possible to manufacture integrated nanoscale electronics in mass production at low cost without any additional alignment processes of NWs.
9:00 PM - AA6.12
Control of Growth Mechanisms and Orientation in Epitaxial Si Nanowires Grown by Electron Beam Evaporation.
Alessia Irrera 1 , Emanuele Pecora 1 2 , Francesco Priolo 1 2 Show Abstract
1 , MATIS CNR-INFM, Catania Italy, 2 , Physics and Astronomy Department , University of Catania, Catania Italy
The growth mechanisms of epitaxial Si nanowires (NWs) grown by electron beam evaporation (EBE) and catalyzed through gold droplets are identified. Electron beam evaporation (EBE) is a quite important physical method, as opposed to CVD, much less expensive than MBE, well diffused, and, being a non-UHV technique, with a much higher throughput, which makes it interesting for industrial applications. NWs are seen to grow both from adsorbed Si atoms diffusing from the substrate and forming a dip around them, and from directly impinging atoms. The growth of a 2D planar layer competing with the axial growth of the NWs is also observed and the experimental parameters determining which of the two processes prevails are identified. NWs with (111), (100) and (110) orientation have been found and the growth rate is observed to have a strong orientation dependence suggesting a microscopic growth mechanism based on the atomic ordering along (110) ledges onto (111)-oriented terraces. By properly changing the range of experimental conditions we demonstrate how it is possible to favor the axial growth of the NWs, define their length in a wide range between 100 nm and 1400 nm. Finally we demonstrate how to control the crystallographic orientation ((111), (100) or (110)) of the NWs by properly varying the deposition conditions. In particular we show how the (111)-oriented NWs can be transformed from being the 90% of the total population to being only the 20%.
9:00 PM - AA6.13
HWCVD-grown Silicon Nanocrystals : A Study of the Effect of Annealing on Structures Evolved with Varying Growth Rates.
Prantik Mahajan 1 , Tarkeshwar Patil 1 , Subhananda Chakrabarti 1 Show Abstract
1 Centre for Nanoelectronics, Dept. of Electrical Engineering, Indian Institute of Technology, Bombay, Powai, Mumbai - 400076, Maharashtra, India
In the past few decades, silicon nanocrystals fabricated using different processes such as PECVD, LPCVD and Laser Ablation have received considerable attention mainly because of their potential application in devices such as semiconductor memories, photodetectors, solar cells, far infrared sensors and Thin Film Transistors (TFTs). But no effort has been made to tailor the size and shape of the nanocrystals which may ultimately be useful in achieving tunable devices. Hence, the novel approach of growing silicon nanocrystals by depositing thin films at low temperature using Hot Wire Chemical Vapor Deposition (HWCVD) process has been studied. The primary advantage of this HWCVD technique is that it allows deposition at low temperatures, which on one hand is economical and on the other ensures a controlled growth. In HWCVD, the deposition rate can be regulated by controlling the hot wire filament power as well as the gas flow rate. We tried to investigate the effect of variation in deposition rate of amorphous silicon and subsequent annealing in formation of silicon nanocrystals using HWCVD technique. HWCVD was used to deposit a Si3N4/nc-Si/Si3N4/nc-Si structure on n-type (100) Silicon at low temperature (i.e., at 350°C). Our aim was to study the variation in evolution of the nanocrystals, if any, with varying growth rates. In our experiments, we varied the deposition rate of amorphous silicon by cracking Silane for different times as well as varying the gas flow rate, keeping the thickness of the amorphous silicon layer constant. The samples were then annealed at temperatures of 800°C and 900°C respectively in a quartz tube furnace in Ar ambient for 30 mins. AFM studies revealed a tendency of formation of silicon nanocrystals after annealing of the as-deposited samples, particularly in those with higher deposition rates. RMS surface roughness was found to increase with increasing annealing temperature (ranging from 0.316 nm in the as-deposited one to 0.617 nm in its annealed version at 900°C for the sample with the highest deposition rate i.e. 1.5 Å/sec). The vertical and horizontal dimensions of the nanostructures range from 0.366 nm to 4.382 nm and 7.813 nm to 204.832 nm respectively, across the different samples. With progressive annealing the nature of the nanocrystals changed from wires to clustered dots which were nearly spherical in shape, an interesting feature on which no reports have been made as yet. The sample was also characterized by Confocal Micro Raman and XRD techniques. The FWHM from the Micro Raman data at room temperature and at liquid nitrogen temperature (77K) were found to be 2.4 cm-1 and 3.4 cm-1 respectively (which are the lowest reported FWHMs till date), with the amorphous silicon peak at 520 cm-1. XRD analysis also corroborates our findings and testifies to the presence of silicon nanocrystals. The above results will be presented and discussed.
9:00 PM - AA6.15
Synthesis and Magnetic Properties of (Fe, Co):Si Nanowires.
Han-Kyu Seong 1 , Tae-Eon Park 1 , Myoung-Ha Kim 1 , Il-Soo Kim 1 , So-Jing Shim 1 , Heon-Jin Choi 1 Show Abstract
1 Department of Materials Science and Engineering, Yonsei University , Seoul Korea (the Republic of)
Spintronic devices, which simultaneously manipulating both charge and spin in a single semiconductor medium, are one of the possible candidates for substituting current silicon-based complementary metal-oxide-semiconductor (CMOS) devices. Among these, Si-based spintronics is much less developed compared with those based on the diluted magnetic semiconductor (DMS) in III-V group, due to limitation in Si-based magnetic materials. In the present work, we studied the synthesis and magnetic properties of transition metal (Fe, Co):Si nanowires. We fabricated single crystalline Si nanowires on Si substrate in a chemical vapor transport system. After treated in BOE to remove the native oxide layer of the as-grown Si nanowires, the substrate and metal sources (FeCl3 and/or CoCl2) were placed in a reactor, respectively. The transition metal doped M1-xSix (M : Fe or Co, x = 0 ~ 4) nanwoires were synthesized by transporting metal sources onto the as-grown substrate under pressure of 200 torr at 600 ~ 800 0C. The diameter and length of these nanowires were from 50 nm to 150 nm and tens of micrometers, respectively, while holding the single crystallinity. We also synthesized single crystalline MSi silicide nanwoires and FeSi/Si longitudinal heterostructure nanowires by controlling the processing conditions. Magnetic characterization of the nanowires using a superconducting quantum interference device (SQUID) and x-ray magnetic circular dichroisn (XMCD) showed that transition metal have local magnetic moments.
9:00 PM - AA6.16
Non-catalytic CVD Growth of Single-crystal Germanium Nanowires.
Byung-Sung Kim 1 , Jong Woon Lee 1 , Tae Woong Koo 2 , Jae Hyun Lee 1 , Jae Hyun Ahn 3 , Young Chai Jung 3 , Sung Woo Hwang 3 , Dongmok Whang 1 2 Show Abstract
1 SKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon Korea (the Republic of), 2 School of Advanced Materials Science and Engineering , Sungkyunkwan University, Suwon Korea (the Republic of), 3 Research Center for Time Domain Nano-functional Devices (TiNa) & School of Electrical Engineering, Korea University, Seoul Korea (the Republic of)
Germanium nanowires (GeNWs) are promising building blocks for high-speed switching devices and optoelectronic applications. Additionally, the excitonic Bohr radius of bulk (24.3 nm) Ge is significantly larger than that of Si (4.9 nm), hence resulting in more prominent quantum size effects. GeNWs have been usually synthesized by metal-catalyzed growth methods based on the vapor-liquid-solid (VLS) mechanism. However, a metal-free approach for controlled nanowire growth is highly desired since unavoidable metal impurities in metal-catalyzed nanowires may be detrimental to their commercial devices. Here, we report non-catalytic growth of metal-free single crystalline GeNWs by low-pressure chemical vapor deposition (LPCVD) process. In addition, carrier doping of the GeNWs was also performed using dopant gas during CVD growth and field effect behavior of the metal-free GeNWs with different doping levels was also investigated.
9:00 PM - AA6.17
Synthesis and Characteristic of Si Nanowires with sub < 5 nm
Myoung-Ha Kim 1 , Ungkil Kim 1 , Il-Soo Kim 1 , So-Jung Shim 1 , Han-Kyu Seong 1 , Heon-Jin Choi 1 Show Abstract
1 Materials Science and Engineering, Yonsei university, Seoul Korea (the Republic of)
The downscaling of electronic devices is critical issue in modern information industries. In this regard, semiconductor nanowires have drawn considerable attention as the building blocks for electronic devices on a nanometer scale with superior performance. Especially, Si nanowires are attractive due to their compatibility with CMOS semiconductor technology. Meanwhile, quantum sized nanowires (i.e., the nanowires having comparable size to their Bohr exciton radius) are attractive since they may have novel physical and chemical properties. In this work, we synthesized the quantum-sized Si nanowires by vapor-liquid-solid (VLS) growth process using Al and Ti as a catalyst. The average diameter of Si nanowires is 5 nm with narrow size distribution. Transmission electron microscopy analysis indicated that the Si nanowires are single crystalline with growth direction of  while that of Si nanowires having the diameter > 100 nm was  or . The surface of nanowires was flat with the thickness of native oxide layer of under 1 nm. The optical and electrochemical properties of Si nanowires were investigated and the results will be discussed toward development of novel Si based nano devices.
9:00 PM - AA6.18
Controlled diameter of Silicon Nanowires Using CVD
Jun-Hyoung Chang 1 , Woo-Jin Lee 1 , Suk-In Hong 1 Show Abstract
1 Chemical and Biological Engineering, Korea Univ., Seoul Korea (the Republic of)
Silicon nanowires were grown on the gold deposited silicon wafer by thermal evaporation of SiO + BO powders at 1300 celsius degrees. The changes of pressure in alumina tube has influence upon diameter of silicon nanowires which were synthesized. it were linear dependence between the diameter of nanowire which were synthesized on the substrates and changes of pressure.for 15min under flowing gas mixture of 5% H2-Ar The SiO + BO powders and were placed inside of alumina tube, which were heated by the tube furnace. Prior to observe relationship between the growth of silicon nanowires and process pressure at changes in vacuum pressure, grown silicon nanowires at different vacuum pressure for 300, 450, 600, 750, 900 mTorr and 1atm. The changes of pressure in alumina tube has influence upon diameter of silicon nanowires which were synthesized on alumina plate and gold deposited Si wafer. it were linear dependence between the diameter of nanowire which were synthesized on the both substrates and changes of pressure.
9:00 PM - AA6.19
Time and Temperature Dependence of the Growth of Ge Nanowires.
Joon-Shik Park 1 2 , Duck-Jin Kim 3 , James Groves 2 , Nae-Eung Lee 3 , Woo-Kyeong Seong 1 , Hyo-Derk Park 1 , Bruce Clemens 2 Show Abstract
1 , Korea Electronics Technology Institute, Seongnam Korea (the Republic of), 2 Dept. Materials Science and Engineering, Stanford University, Stanford, California, United States, 3 , Sungkyunkwan University, Suwon Korea (the Republic of)
Despite significant recent activity, there remains a need for clarification of interplay between various growth parameters resulting in favorable Ge nanowire growth conditions. In particular, the growth rate as a function of time and temperature has not been widely explored and, unlike the case for Si nanowire growth, the growth activation energy has not been reported. To address this need, Ge nanowires were grown at different temperatures and times to illuminate the growth rate behavior. We use scanning electron microscopy (SEM) and x-ray diffraction to examine the resulting nanowires. Nanowires were grown in a pressure of 30 Torr of a mixture of 10.4 % GeH4 in Ar, at temperatures ranging from 250 °C to 300 °C. A 3 nm thick Au film catalyst deposited on a (111) p-type Si wafer was used as a growth substrate. For all temperatures, the growth rate was observed to decrease with time, with the largest growth rate decrease occurring for the highest growth temperatures. Over the temperature range studied, the growth rate increases with temperature, with a maximum growth rate of over 35 nm/s observed for short times (~ 2 minutes) at 300 °C. The activation energy extracted from these measurements is compared to the gas decomposition and growth processes to illuminate the growth-limiting step. From these results, we find that copious quantities of Ge nanowires can be reproducibly produced at growth times of the order of 2 to 20 minutes at growth temperatures of 280 °C to 300 °C. These process conditions for growth of Ge NWs could be used for fabrications of boron doped Ge nanowires and Ge/Si hetero-structure nanowires for nanowire field effect transistors applications. *Corresponding authors: firstname.lastname@example.org and email@example.com< Acknowledgements >This work was supported by “International Semiconductor Collaboration Research” of "System IC 2010" project of Korea Ministry of Knowledge Economy. The authors thank government for financial supports. Also, we thank Linyou Cao of Prof. Brongersma Group of Stanford University for helpful discussion about nanowire synthesis.
9:00 PM - AA6.2
Fabrication of Highly-Textured Polycrystalline Silicon TFTs Using Single-Crystalline Si Nanowire Seed Templates
Donghun Lee 1 , Hyun-Seung Lee 1 , Gil-Sung Kim 1 , Geunhee Lee 1 , Moon-Ho Jo 1 Show Abstract
1 Materials Science and Engineering, Pohang University of Science and Technology (POSTECH), Pohang Korea (the Republic of)
Crystallization of amorphous Si thin films at low temperature is important due to their applications into Si solar cells and Si thin-film transistors. Among a number of growth processes to achieve large-grained polycrystalline Si thin films, crystallization of amorphous Si using the local nucleation seeds is of particular interest, because it can offer advantageous solid-phase crystallization at the controlled sites at low temperatures. In this study, we report solid-phase epitaxial growth of amorphous Si thin films using single-crystalline Si nanowires as seed templates. We have synthesized the arrays of vertically-aligned single-crystalline Si nanowires using Au-catalyst assisted chemical vapor deposition, followed by amorphous Si thin film deposition on the synthesized nanowire templates. Upon thermal annealing processes, we observed that amorphous Si thin films crystallize into highly textured polycrystalline Si thin films in excellent epitaxial relations with single-crystalline Si nanowires in a layer-by-layer fashion. We also discuss the electrical characteristics observed from Si thin-film transistors based on these highly-textured polycrystalline Si channels.
9:00 PM - AA6.20
Synthesis and Characterization of SnO2 Nanowires by Thermal Evaporation
Won-Sik Kim 1 2 , Daihong Kim 1 2 , Myung Yang 1 2 , Seong-Hyeon Hong 1 2 Show Abstract
1 Department of Materials Science and Engineering, Seoul National University, Seoul Korea (the Republic of), 2 Nano Systems Institute- National Core Research Center, Seoul National University, Seoul Korea (the Republic of)
Semiconductor-type metal oxide nanowire sensors are the most promising devices among the solid state chemical sensors, because they have many advantages such as a large surface to volume ratio, a Debye length comparable to the nanowires radius, and low power consumption. Therefore, the synthesis of one-dimensional nanostructures has been widely explored in the semiconductor-type metal oxide systems such as SnO2, ZnO, In2O3, Ga2O3, etc. Among those materials, SnO2 nanowires as a wide band gap semiconductor (3.6 eV at 300 K) have been extensively studied because of its high gas sensitivity.Among the various nanostructures, a vertical and epitaxial nanowire growth has been studied in the systems such as Ge on Si, In2O3 on YSZ, ZnO on GaN or sapphire. However, a vertical and epitaxial grown SnO2 nanowire is very limited. In case of ZnO nanowires, the growth direction was  in most of cases, but S. Bubak et al. recently reported that SnO2 nanowires showed the different morphologies depending on the substrate and substrate orientations.In this study, SnO2 nanowires were synthesized using a thermal evaporation method and the various oriented TiO2 single crystal were used as the substrate because they have the same crystal structure with SnO2. In the thermal evaporation process, a high process temperature (>1123 K) generated too high Sn vapor and resulted in a randomly grown nanowires. Furthermore, it is difficult to control the growth rate. Thus, we decreased process temperature to 1073 K and adjusted the other factors (gas flow and pressure) to provide an appropriate quantity of Sn vapor. The phase and morphology of the obtained SnO2 nanowires were characterized by using XRD and FE-SEM. Moreover, a pole figure analysis was performed to confirm the in-plane relationship, and growth direction of nanowire was investigated by HR-TEM. The synthesized nanowires showed different orientations depending on the substrate orientations. A jungle gym like-structure was observed on the (001) and (110) TiO2 substrate. On the other hand, SnO2 nanowires were vertically grown on the (101) TiO2 substrate. XRD (θ-2θ) analysis showed that SnO2 nanowire on (101) TiO2 substrate has (101) preferred orientation (out-of-plane). The in-plane orientation between SnO2 nanowire and (101) TiO2 was also well matched. The detailed microstructure and growth mechanism will be discussed in this presentation.
9:00 PM - AA6.21
Seeded ZnO Nanostructures Epitaxially Grown on Si (100) Substrates by Chemical Vapor Deposition.
Zhuo Chen 1 , Tom Salagaj 2 , Christopher Jensen 2 , Karlheinz Strobl 2 , Mim Nakarmi 1 , Kai Shum 1 Show Abstract
1 Physics, Brooklyn College - CUNY, Brooklyn, New York, United States, 2 , First Nano, a Division of CVD Equipment Corp., Ronkonkoma, New York, United States
Various ZnO nanostructures such as nanowire-networks and vertical nanorods were epitaxially grown on pre-seeded Si (100) substrates by Chemical Vapor Deposition (CVD) method with a mixed ZnO-powder/C-powder solid source. Crystalline ZnO seeds were prepared and controlled by the rapid thermal annealing (RTA) treatment of e-beam deposited amorphous ZnO thin films with various thicknesses. Both epitaxial film and pre-deposited ZnO seeds were characterized by Atomic Force Microscopy (AFM), Scanning Electron Microscopy (SEM), and photoluminescence (PL) spectroscopy. Excellent optical characteristics of these nanostructures such as PL line width, linearity of PL intensity as a function of excitation power density were obtained.
9:00 PM - AA6.22
Rapid Flame Synthesis of Dense, Aligned α-Fe2O3 Nanoneedle Arrays.
Pratap Rao 1 , Xiaolin Zheng 1 Show Abstract
1 Mechanical Engineering, Stanford University, Stanford, California, United States
One-dimensional iron oxides (α-Fe2O3 and Fe3O4) are of practical interest because of their potential application as recording media due to their magnetic properties and anisotropy, and in chemical looping combustion as oxygen carriers to facilitate the sequestration of CO2.α-Fe2O3 nanoneedles have been synthesized by the oxidation of solid elemental iron in air or other oxidizing atmospheres. These experiments were carried out on hotplates or in tube furnaces between the temperatures of 700 and 900°C and yielded axial growth rates of α-Fe2O3 nanoneedles that were on the order of 1 μm per hour. Herein, we report a new flame synthesis method for producing dense, aligned arrays of crystalline α-Fe2O3 nanoneedles with an axial growth rate of approximately 1 μm per minute, almost two orders of magnitude larger than those demonstrated previously. Specifically, the α-Fe2O3 nanoneedles are synthesized by the oxidation of untreated Fe foils and wires in the post-flame region of a methane-hydrogen-air premixed flame. The rhombohedral α-Fe2O3 nanoneedles, characterized by SEM, TEM and XRD, are single crystals or bicrystals having a  growth direction, with bases of around 250 nm width that split into multiple nanowires of 35 nm average diameter. The synthesized nanoneedles grow perpendicular to the iron substrate and form a dense, well-aligned array. The growth of α-Fe2O3 nanoneedles occurs between the gas phase temperatures of 700 and 1000°C with the largest average surface density, in excess of 10 nanoneedles per square micron, observed at 900°C. The growth rate of α-Fe2O3 nanoneedles is insensitive to the post-flame oxygen concentration as the flame stoichiometry is varied from oxygen rich to oxygen lean, indicating that iron acts as the deficient, rate-limiting species during the growth. The growth mechanism of the α-Fe2O3 nanoneedles is likely to be “tip growth”, where iron from the substrate diffuses along the surface of the nanoneedles and is oxidized and incorporated into the growing nanoneedle crystal at the tip.Moreover, the current flame synthesis method, when applied to Cu and Zn, yields CuO and ZnO nanoneedles that grow at similarly large axial growth rates, suggesting that there is great potential for the economical, scalable flame synthesis of other metal oxide nanostructures.
9:00 PM - AA6.23
Electric and Magnetic Properties of Co Doped ZnO Nanowires Prepared by a Template Approach.
Ionut Enculescu 1 , Elena Matei 1 , Marian Sima 1 , Simon Granville 2 , Jean-Philippe Ansermet 2 , Lucian Ion 3 , Stefan Antohe 3 Show Abstract
1 , National Institute for Materials Physics, Magurele, Ilfov Romania, 2 , Ecole Polytechnique Federale de Lausanne, Lausanne Switzerland, 3 , University of Bucharest, Faculty of Physics, Bucharest Romania
We employed template replication by electrochemical deposition as the technique to prepare Co doped zinc oxide nanowires. Polycarbonate nanoporous membranes obtained by swift heavy ions irradiation and subsequent etching were used as templates. The pores were filled with the desired material by electrochemical deposition from an aqueous bath. ZnO nanowires with cobalt content of up to 10% were obtained in this way. In a first step the properties of the nanowires were investigated by scanning electron microscopy, energy dispersive X ray analysis and optical spectroscopy (absorption and luminescence). We investigated the effect of preparation condition (i.e. deposition potential, deposition bath composition, temperature) on properties such as morphology, structure or composition of the nanowires. One of the most important results was the possibility to control the Co content by simply changing the electrodeposition conditions, enabling us to prepare ZnO nanowires with segments or layers with different dopant concentrations.Magnetic measurements showed that at lower Co concentrations (x<0.05) the samples present a Curie-Weiss paramagnetic behavior while at higher Co concentrations (x>0.07) a ferromagnetic type behavior was observed at temperatures lower than 150K.Transport properties of such nanostructures were measured. Thus, the I-V characteristics of wire arrays are linear for applied voltages less than 10 V, while showing a supra-ohmic behavior at higher bias. A defect controlled electrical conduction was observed in a wide temperature range, from 300 K to 40 K. Magnetoresistance measurements were performed at different temperatures. The results are discussed in correlation to growth conditions and structural and morphological data.
9:00 PM - AA6.24
Formation of Iron Oxide Nanocrystals in Inorganic Electrospun Nanofibers.
Nate Hansen 1 , Jeanne Panels 1 , Jung Lee 1 , Alexander Naydich 1 , Yong Joo 1 Show Abstract
1 Chemical Engineering, Cornell University, Ithaca, New York, United States
Both monoaxial and hollow coaxial silica and carbon nanofibers containing iron oxide nanocrystals have been synthesized by combining the sol-gel synthesis, electrospinning, and thermal treatment. Tetraethyl-orthosilicate [TEOS] and polyacrylonitrile [PAN] solutions containing iron oxide precursor such as iron nitrate and iron acetylacetonate were electrospun and thermally treated to produce silica and carbon nanofibers with iron oxide nanocrystals. In addition, coaxial electrospinning where mineral oil and TEOS or PAN solution with iron oxide precursor were used as core and skin layer was utilized to obtain hollow silica and carbon nanofibers containing iron oxide nanocrystals. X-ray diffraction (XRD), transmission electron microscopy (TEM), and superconducting quantum interference devices (SQUID) have been used to characterize the crystal structures and magnetic properties of resulting multifunctional silica and carbon nanofibers. We demonstrate that the size, location, and phase of iron oxide comprising the nanocrystals can be tuned by varying the iron precursor concentration and the thermal treatment time, temperature and/or atmosphere.
9:00 PM - AA6.25
Catalyst Free Growth and Optical Properties of ZnO Nanoneedles by Plasma Assisted Molecular Beam Epitaxy.
Thomas Wassner 1 , Bernhard Laumer 1 , Stefan Maier 1 , Martin Stutzmann 1 , Martin Eickhoff 2 Show Abstract
1 Walter Schottky Institut, Technische Universität München, Garching Germany, 2 I. Physikalisches Institut, Justus-Liebig-Universität Giessen, Giessen Germany
ZnO nanoneedles were grown on (11-20)-sapphire substrates by plasma assisted molecular beam epitaxy without the use of a catalyst. After formation of a wetting layer the nanoneedles grow homogenously on the substrate as shown by scanning electron microscopy images. High resolution transmission electron microscopy images of single needles reveal a high crystal quality and a sharp tip with a tip diameter of approximately 3 nm. The epitaxial relationship to the substrate was determined by high resolution X-ray diffraction and found to be Al2O3 ‖ ZnO[11-20], the same as for continuous layers. The influence of the II-VI ratio and the substrate temperature on the growth process and a possible growth mechanism will be presented. In addition, optical properties, analyzed by low temperature photoluminescence spectroscopy, will be compared with those of continuous ZnO epitaxial films.
9:00 PM - AA6.26
On Bio-inspired Synthesis of Single Crystalline Sodium Titanate and Sodium Tungstate One-dimensional Nanostructures Using Oyster Shell.
Kyubock Lee 1 , Seungwoo Lee 1 , Seungbin Park 1 Show Abstract
1 , KAIST, Daejeon Korea (the Republic of)
There is growing interest in one-dimensional nanostructures consisting of various multicomponent oxides, such as perovskite-type oxide, spinel-structured oxide, alkali metal titanate, and various tungstate nanorods or nanowires with the merits of their useful properties containing ferroelectricity, multiferroicity, catalytic activity, photoluminescence, and so on. The synthetic methods of multicomponent oxide materials with unidirectional morphology in nanoscale, however, is limited to some solid or liquid state reactions because of problems in controlling composition, stoichiometry, and crystal structure. Novel synthesis using oyster shell is described in this study for the fabrications of single crystalline Na2Ti6O13 nanorods and Na2W4O13 nanowires. The oyster shell was used as a source of both sodium and carbon dioxide, which have a crucial effect on unidirectional growth of single crystalline Na2Ti6O13 and Na2W4O13 from TiO2 and WO3, respectively. Most of TiO2 particles were converted to single crystalline Na2Ti6O13 nanorods with photocatalytic activity. Single crystalline Na2W4O13 wires were grown even in millimeter scale from WO3 particles and showed photoluminescence. There are a lot of advantages using oyster shell for the synthesis of sodium metal oxide one-dimensional nanostructures: (a) an eco-friendly method using renewable resources; (b) low processing temperature with high yield; and (c) no requirement of additional processes such as separation or washing. Further works for the applications of this method to perovskite-type oxide or spinel-structured oxide are now in progress. This work suggests a new approach for using biological material for the crystal growth of nanostructured materials.
9:00 PM - AA6.27
Oxide Nanotube Synthesis via Vapor-Liquid-Solid Mechanism
Chaoyi Yan 1 , Pooi See Lee 1 Show Abstract
1 School of Materials Science and Engineering, Nanyang Technological University, Singapore Singapore
Nanotubes of different oxide materials (i.e. In2Ge2O7 and GeO2) were synthesized via vapor-liquid-solid (VLS) mechanism. For the growth of In2Ge2O7 and GeO2 nanostructures, corresponding source powders (indium oxide, carbon and germanium for In2Ge2O7; germanium oxide and carbon for GeO2) were put at the central high temperature region of the horizontal quartz tube furnace, silicon substrates at low temperature region were used to collect the products. Indium germanate semi-nanotubes grew through a self-catalytic process where indium serve as catalysts for In2Ge2O7 nanotube growth. Although germanium was incorporated in the liquid catalyst particle during growth, it will completely precipitate when cooling down, according to Ge-In binary phase diagram. The compositions of the catalyst particle and nanotube were confirmed using XRD and EDS attached to TEM. Instead of nanowire or complete nanotubes, the nucleation of unique semi-nanotube structure was explained by the anisotropic adsorption process. Fabrication of single crystalline GeO2 nanotubes were also realized using Au as catalyst. A diffusion limited process suggests the possibility of nanotube growth via VLS mechanism. And indeed, we observed that the diameters of the nanotubes were typically larger than those of nanowires. Considering the longer diffusion distance for larger catalyst size, the chances of nanotube nucleation are higher. Ideally, with other growth conditions being fixed, there should be a lower bound of the catalyst diameter, below which nanotube growth is not possible. With comprehension of the diffusion limited process, we suggest that growth parameters can be tuned to control the nanotube synthesis.
9:00 PM - AA6.28
Structural Properties of Vertically Aligned ZnO Nanorods Grown on Ti Films by MOCVD.
Changa Ha Kwak 1 , Sooyoung Seo 1 , Seonhyo Kim 1 , Sunhong Park 2 , Sangwook Han 3 Show Abstract
1 Department of Materials Science and Engineering, Pohang University of Science and Technology(POSTECH), Pohang, GyungBuk, Korea (the Republic of), 2 New Materials & Components Research Center, Reach Institute of Industrial Science & Technology, Pohang, GyungBuk, Korea (the Republic of), 3 Institute of Proton Accelerator, Chonbuk National University, Jeonju, Chonbuk, Korea (the Republic of)
One-dimentional (1D) nanostructures, such as nanowires, nanorods and nanotubes, have attracted great attention as building blocks for nano-scale electronics and photonics as well as fundamental research area. ZnO have direct bandgap(3.36eV), piezoelectric, thermal stability and also easily forms 1D nanostructures that were widely studied for their practical applications to UV-LEDs, sensors and solar cells. Although ZnO nanorods were fabricated by various methods, including VLS (vapor-liquid-soild), MOCVD, PLD and aqueous solution, vertically aligned ZnO nanorods have been synthesized on a few substrates, including Al2O3, Si, GaN and recently ITO substrates. For more practical applications of ZnO nanorods, it is necessary to synthesize vertically well aligned ZnO nanorods on various substrates. However, the growth of vertically-well aligned ZnO nanorods with high quality is difficult because the growth is affected by substrate conditions, such as surface roughness, lattice mismatch between ZnO nanorods and the substrates and surface charge. In this study, we present the high quality ZnO nanorod growth on Ti buffer layers. The Ti buffer layers were synthesized by a sputtering procedure. The Ti buffer layers can play a role as metal electrodes or Ohmic contact layers. The Ti layer thickness were a few tens nanometers with roughness of a few nanometers. Transmission electron microscope (TEM) measurements revealed that Ti layers were epitaxially grown on the substrate. The nanorods on the Ti layers had a uniform size of 50-100 nm with length of a few micrometers. X-ray diffraction (XRD) from the ZnO nanorods revealed that the nanorods well aligned along the c-axis with a wurtzite structure. The residual strain and the mosaicity of the nanorods were very similar to the ZnO nanorods growth on sapphire substrates. In the presentation, we will also discuss the surface roughness contribution to the ZnO nanorod growth on Ti buffer layers in details.
9:00 PM - AA6.29
Electronic Structure of Hydrothermal Growth of ZnO Nanowire Arrays Studied by Angle-dependent X-ray Absorption Spectroscopy.
Cheng-Ying Chen 1 , Chin-An Lin 1 , Jr-Hau He 1 , Jian-Wei Lo 1 Show Abstract
1 Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taipei Taiwan
The electronic structure of a nanometer-scale material differs from that of the bulk material [1, 2]. Recently, one-dimensional and quasi-one-dimensional nanostructures have attracted a great deal of attention due to their potential as building blocks for electronics and photonics novel devices [3, 4]. Moreover, ZnO is a potentially important material due to its electrical and optoelectronic characteristics. With paying more attention to ZnO nanostructure-based optoelectronics-devices, it is demanded to understand the electronic structure of ZnO nanowire arrays (NWAs). In this work, angle-dependent x-ray absorption near-edge structure (XANES) at the O K and Zn L3 edges was performed to investigate the electronic structures of well-aligned ZnO NWAs by hydrothermal growth. The ZnO NWAs with the different tip morphology were fabricated with Au island films as a catalyst by hydrothermal method. Scanning electron microscope (SEM) characterizations have shown that ZnO NWAs were 3-4μm in length and 100 nm in diameter. Transmission electron microscope characterizations have indicated ZnO NRA is of hexagonal (wurtzite) structures and grows along the c-axis direction. The previous studies reported that the tip surfaces of the NWAs on the different substrate were terminated by Zn and O for  and [000 ] orientations, respectively [5-7]. According to the dipole-transition selection rule, O K and Zn L3 edge XANES indicated the unoccupied O 2p and Zn 4p derived states and the unoccupied Zn s- and d-derived states, respectively . The intensity of the O K-edge XANES spectra was enhanced at small photon incident angles. O K-edge XANES spectra showed substantial enhancement of O 2p derived states near the conduction band minimum (CBM). With the incident angle increasing, the intensity of Zn L3 edge XANES spectra increased, indicating that the number of unoccupied Zn 4s and 4d states near CBM was reduced in the tip region of the NWAs.References S. M. Lee, Y. H. Lee, Y. G. Hwang, J. Elsner, D. Porezag, and T. Frauenheim, Phys. Rev. B 60, 7788 (1999) H. L. Liu, C. C. Chen, C. T. Chia, C. C. Yeh, C. H. Chen, M. Y. Yu, S. Keller, and S. P. Den Baars, Chem. Phys. Lett. 345, 245 (2001)  D. Appell, Nature (London) 419, 553 (2002) X. F. Duan, Y. Huang, Y. Cui, J. F. Wang, and C. M. Lieber, Nature (London) 409, 66 (2001) W. Go pel, J. Pollmann, I. Ivanov, and B. Reihl, Phys. Rev. B 26, 3144 (1982) A. Wander, F. Schedin, P. Steadman, A. Norris, R. McGrath, T. S. Turner, G. Thornton, and N. M. Harrison, Phys. Rev. Lett. 86, 3811 (2001) Y.Sun, D. Jason Riley, and M. N. R. Ashfold, J. Phys. Chem. B 110, 15186 (2006) P. J. Møller, S. A. Komolov, and E. F. Lazneva, J. Phys.: Condens. Matter 11, 9581 (1999)
9:00 PM - AA6.3
Axial Heterostructures in Silicon Nanowires by Pulsed Laser Deposition: Doping and Si/Ge Superlattices.
Bjoern Eisenhawer 1 , Gerald Broenstrup 1 , Andreas Berger 1 3 , Vladimir Sivakov 1 3 , Xavier Maeder 2 , Johann Michler 2 , Silke Christiansen 1 3 Show Abstract
1 , Institute of Photonic Technology, Jena Germany, 3 , Max-Planck-Institute of Microstructure Physics, Halle Germany, 2 , EMPA - Swiss Federal Laboratories for Materials Testing and Research, Thun Switzerland
Making use of silicon nanowires (NWs), generated by the vapour-liquid-solid (VLS) growth process, in devices for micro-, opto- and large area electronics such as transistors, light-emitting diodes and solar cells, requires the control of p-and n-doping in a wide range of concentrations. Moreover, Si/Ge superlattices in the NWs may be interesting for the aforementioned device applications. To realize the different doping requirements, various approaches have been tested so far, e.g. implantation of dopants into the NWs after the growth process is finished and their thermal activation by subsequent annealing or co-doping during vapour phase deposition. A comparably unexplored approach that will be reported in this paper is based on the ablation of doped target materials (e.g. p- and n-doped silicon wafers) in a pulsed laser deposition (PLD) experiment. We will report on the vapour-liquid-solid (VLS) growth of doped silicon NWs by ablating doped silicon targets for the supply of doped silicon that is incorporated in the gold droplets that catalyze the 1D NW growth. Using the same PLD approach, Si/Ge superlattices are also realized by alternating Si and Ge targets. Successful doping of PLD grown NWs as well as pn-junction realization by this method is proved in I-V measurements of single probed NWs in a scanning electron microscope as well as of ensembles of several thousands of NWs in a probe station. The abruptness of the interfaces (Si/Ge or p-n) that can be achieved by VLS growth of NWs in PLD experiments is determined by analyzing the Si/Ge superlattices in transmission electron microscopy (TEM).
9:00 PM - AA6.30
Growth of Horizontal ZnO Nanowire Arrays On Any Substrate.
Rusen Yang 1 , Yong Qin 1 , Zhong Lin Wang 1 Show Abstract
1 Materials Science and Engineering, Georgia Institute of Technology, Atlanta, Georgia, United States
Due to their diverse and unique semiconductive, optic, piezoelectric and pyroelectric properties, ZnO nanowires (NWs) have found wide applications for electronics, optoelectronics, sensors and energy science. Single ZnO NW has been manipulated between two electrodes to fabricate diode, FET, gas sensor, and pressure sensor. For practical applications, growth of aligned, patterned and controlled NW arrays is vitally importance for applications such as DC nanogenerator driven by ultrasonic wave, solar cell, nanolasers, and field emitters. Laterally aligned ZnO NW arrays in parallel to substrate offer a benefit of fabricating integrated nanodevice arrays, but there are only a couple of reports about the growth of laterally aligned NWs with only very limited control. We reported here a universal method to synthesize laterally aligned and patterned ZnO NW arrays on any substrate. The orientation control is achieved using the combined effect from ZnO seeds layer and the catalytically inactive Cr layer for NW growth. The growth temperature is so low so that the method can be applied to a wide range of materials that can be inorganic, organic, single crystal, polycrystal or amorphous. The laterally aligned ZnO NW arrays can be employed for various applications, such as gas sensor, field effect transistor and nanogenerator. Flexible electronic application will also benefit from the growth of laterally aligned ZnO NW arrays on polymer substrates. This technique establishes a general approach for fabricating integrated nanodevices at a large scale. Yong Qin, R.S. Yang, and Z.L. Wang, The Journal of Physical Chemistry, in press. http://www.nanoscience.gatech.edu/zlwang/
9:00 PM - AA6.31
Rapid Synthesis of High-Aspect Ratio ZnO Nanowires by a Catalyst-Free, Low-Power Induction Heating Process
Joachim Pedersen 1 , Kwok Siong Teh 1 Show Abstract
1 School of Engineering, San Francisco State University, San Francisco, California, United States
ZnO quasi-one-dimensional structures such as nanowires, nanobelts, nanorods, and nanotubes generate research interest due to their potentials applications as nanolasers, electro-optical switch, biochemical sensors, and hydrogen storage media. We present in this paper a rapid and catalyst-free method of synthesizing high-aspect ratio ZnO nanowires on Si (100) using a low-power (65W) induction heating process. Our preliminary results showed that we have successfully grown ZnO nanowires oriented in the <0001> crystallographic directions via a vapor-solid (VS) mechanism. During the heating process, Zn powder was vaporized on inductively heated Ni in a controlled Ar/O2 environment. Spontaneous formation of ZnO nanowires was achieved on a cooler Si (100) surface via a condensation process. The induction heating process was performed for 5 minutes, yielding ZnO nanowires up to 5 um in length. X-ray diffraction (XRD), energy dispersive spectrometry (EDS), and scanning electron microscopy (SEM) investigations revealed that the as-synthesized ZnO nanowires were grown in <0001> direction and have nominal diameter of 100nm and length up to 5um. We also studied the growth of ZnO nanowires using either 1:99 (1% O2) or 0:100 (0% O2) O2:Ar mixtures. It was observed that O2 content significantly influenced the morphology of ZnO nanowires: higher O2 content (1% O2) encouraged the formation of tetrapods and other nanostructures, while lower O2 content (0% O2) favored the growth of ZnO nanowires. When grown at 1% O2, majority of the as-grown structures were nanoscale ZnO tetrapods (200-300nm diameter) and other hierarchical micro and nanostructures of ZnO. Small-diameter (20nm) and long (5-10um) nanowires were observed to grow from the top facets of these micro and nanostructures. On the other hand, when the process chamber was completely purged with Ar prior to and during ZnO synthesis (i.e. 0% O2), only ZnO nanowires were formed. These nanowires have nominal diameters of 60-100nm, with a sharp and tapered tip extruding from the top end of the nanowires. Post-synthesis annealing temperatures also influenced the geometry and type of ZnO nanostructures formed. At 1% O2, the quantity and density of ZnO nanowires increased with increasing annealing temperatures ranging from 650C, 750C, to 850C. At 0% O2, the role of annealing temperature was more subdued in that higher annealing temperature (850C) only seemed to increase the diameters of the ZnO nanowires (300nm), and has no observable effect on the quantity and areal density of ZnO nanowires.In conclusion, we have successfully demonstrated a rapid and catalyst-free method of depositing ZnO nanowires on Si with induction heating. We have grown c axis-oriented ZnO nanowires of up to 5um long within 5 minutes in 0% and 1% O2 environment. Lower O2 content and post-annealing at 850C both favored the formation of ZnO nanowires over other types of nanostructures.
9:00 PM - AA6.32
Effect of Sapphire Nitridation on Nucleation of ZnO Crystals Grown by Halide Vapor Phase Epitaxy.
Naoki Yoshii 2 , Tetsuo Fujii 1 3 , Rui Masuda 1 , Yoshinao Kumagai 1 , Akinori Koukitu 1 Show Abstract
2 Technology Develoment Center, Tokyo Electron Ltd., Nirasaki, Yamanashi, Japan, 1 Department of Applied Chemistry, Graduate School of Engineering, Tokyo University of Agriculture and Technology, Higashikoganei, Tokyo, Japan, 3 Research and Development Headquarters, ROHM CO., LTD, Kyoto, Kyoto, Japan
In this study, we select the halide vapor phase epitaxy (HVPE) method to grow ZnO crystal because of the availability of high temperature growth due to the chloride chemistry. When ZnO crystal is grown on Al2O3 substrates at a high temperature of around 1273 K, weak stickiness of ZnO against Al2O3 substrates becomes an issue. Nitridation treatment of Al2O3 substrates is one of the effective techniques to change the surface condition of Al2O3 substrates, leading the possibility for an improvement in stickiness, crystal orientation and quality of ZnO crystal. Regarding halide vapor phase epitaxy (HVPE), however, the influence of Al2O3 nitridation treatment for ZnO crystal has not been investigated yet. HVPE-ZnO growth was carried out in a horizontal hot-wall quartz reactor at 1273 K. ZnCl2 and H2O were used as Zn and O sources, respectively. ZnCl2 was synthesized by the reaction of high purity Zn metals and Cl2 gas, and then ZnCl2 was transported to growth region with N2 gas as a carrier gas. All substrates were optical-grade polished sapphire (10 x 10 mm) with (11-20) orientation (a-face). Nitridation treatment of Al2O3 substrates was conducted by two different methods. One method is thermal treatment at 1273 K in NH3 gas with H2 gas for 20 - 60 min. The other method is micro wave (2.45 GHz) plasma treatment with N2 gas at 523 K for 20 min. We found that in the case of HVPE, the thermal nitridation treatment of Al2O3 substrates leads to a smaller size of ZnO crystals as well as a higher ZnO nuclei density compared to the case without nitridation treatment. These trends may be attributed to the difference of the wettability for ZnO crystals between nitrided Al2O3 and Al2O3 substrate without nitridation treatment. Regarding crystal quality, nitridation treatment of Al2O3 substrate causes deterioration of the crystal quality of ZnO deposited by HVPE. This is due to the change of the Al2O3 surface with a-face into AlN structure with c-face by nitridation treatment, which was confirmed by reflection high-energy electron diffraction (RHEED). Also, the surface condition of nitrided Al2O3 substrates has been investigated by X-ray photoelectron spectroscopy (XPS). In the thermal treatment with NH3 gas at 1273 K, only Al-N peak was observed and N concentration was about 20 atom% for nitrided Al2O3 surfaces. In contrast, in the plasma treatment with N2 gas at 523 K, Al-N peak and N-O peak were detected and the nitrided Al2O3 surface contained N concentration of 2-5 atom%, suggesting that the existence of ion species generated by N2 gas plasma and low temperature treatment lead to generation of N-O peak and low N concentration.
9:00 PM - AA6.33
Synthesis and Electrical Characterization of Tin Oxide Nanostructures.
Olivia Berengue 1 , Cleocir Dalmaschio 3 , Daniel Stroppa 2 , Tiago Conti 3 , Adenilson Chiquito 1 , Edson Leite 3 Show Abstract
1 Physics, Universidade Federal de São Carlos, São Carlos Brazil, 3 LIEC - Chemistry, Universidade Federal de São Carlos, São Carlos Brazil, 2 , Brazilian Synchrotron Light Laboratory, Campinas Brazil
It is well known that nanostructured oxide materials find unique applications such as in electronics and optoelectronics due to their fascinating physical and chemical properties. Among them, tin oxide nanostructures as SnO, SnO2, Sn3O4 are attractive materials because of its interesting properties which make them promising materials for microelectronics applications, including gas sensors and field effects transistors. Besides these enormous potential applications of tin oxide nanostructures, it is still a challenging task to obtain the complete characterization of their structural and electronic properties, especially when the quantum mechanical interactions cannot be neglected. In this sense, Sn3O4 nanowires were grown by a carbothermal evaporation process of SnO2 powders in association with the well known vapour-solid mechanism (VS). The nanowires’ crystal structure was investigated by X-Ray Diffraction (XRD), Transmission Electron Microscopy (TEM) and Low Energy Electron Spectroscopy (EELS) confirming the Sn3O4 triclinic structure. Raman Spectroscopy was used in order to obtain information on the nanowires’ crystalline quality providing data on nanowires’ structure. The presence of sharp peaks in the Raman spectra is an evidence of the growth of high quality crystalline structures. The electrical characterization (current-voltage curves) of individual Sn3O4 nanowires was performed at different temperatures. The experiments revealed a semiconductor – like character as evidenced by the resistance decreasing at high temperatures. The resistivity measurements seem to be in good agreement with the current-voltage response confirming the semiconductor - like behavior: the resistivity decreases as the temperature was increased. The experiments were performed with UV illumination and the electrical properties were changed which in turn, is an evidence of a potential application as UV sensors.
9:00 PM - AA6.35
First Principle Studies on the Structural Transition of ZnO Nanowires at High Pressure.
Yousong Gu 1 , Zhanjun Gao 1 , Xiaoqin Yan 1 , Yue Zhang 1 Show Abstract
1 Department of Material Physics and Chemistry, University of Science and Technology Beijing, Beijing, Beijing, China
The structural transition of ZnO nanowires from wurtzite to rocksalt structure at high pressure has important implication in the applications of ZnO nanowires in nanodevices. In this work, the structural transition of ZnO nanowires under high pressure have been studied by first principle calculations, and the transition pressures were evaluated for nanowires with different diameters. The calculations were performed under the density functional theory by the VASP package. PAW (Projected Augmented Wave) pseudo potential, PBE (Perdew-Burke-Ernzerhof) type of exchange correlation, and LSDA+U type on-site Coulomb interaction are employed in the calculation. The calculation were performed with periodical boundary conditions: nanowires were placed inside a big rectangle box and the minimum separation between the nanowires was larger than 10Å. Ground state energies of ZnO nanowires were calculated for a series of nanowires with different unit cell volume (realized by apply a series of scaling factors to the lattice constants). The transition pressures were determined from the slope of the common tangent of the energy versus volume curves of the two phases. Two set of nanowires with 24 and 37 atoms in each monolayer were calculated to study the effect of diameter on the structural transition.The transition pressures from wurtzite to rocksalt structure are 8.70 and 9.45 GPa for the two types of nanowires, comparing to the transition pressure of 10.85 GPa for bulk ZnO as calculated in the exact same setting. It can be see that the transition pressure of ZnO nanowires is lower than that of the bulk, and it decrease as the diameter of the nanowires decreases. Our calculation results show that the structural transition pressure of ultra thin nanowires (a couple of nanometers in diameter) is lower than that of the bulk. This may be due to the fact that barrier against atomic movement in structural transition is lowered in ultra thin nanowires.The chemical bonding of the nanowires were studied by examining the atomic position and electronic density distribution. The results show that the surface atoms are moved to form a dense and compact surfaces and the bonds between the surface atoms are stronger than that in the bulk. The surface atoms are quite different from the bulk, in respect to charge distribution and energy levels.
9:00 PM - AA6.36
Anisotropic ZnO Nanowires by Oblique-angle Sputtering and Hydrothermal Process.
Chun-Han Huang 1 , Yi-Feng Lai 1 , Chuan-Pu Liu 1 , Yu-I Shih 1 , Yuh-Chieh Lin 1 Show Abstract
1 Department of Material Science and Engineering, National Cheng-Kung University, Tainan Taiwan
We demonstrated anisotropic growth ZnO nanowire by oblique-angle sputter and hydrothermal process. In typically sputtered ZnO film, ZnO(0002) always grows perpendicularly as prefer orientation, we successfully changed the ZnO(0002) direction from perpendicular to lateral by changing the incident sputtering beam, but our results were very different to typical structures by OAD. In this research, argon/hydrogen mixture gas was chosen as bombardment and reduction source, the temperature changed from 210°C to 450°C. The anisotropic ZnO nanowires were grown on these films by hydrothermal process, two kinds wires appeared, one remained high angle, the other changed their directions with different buffer layer temperature, which can be explained by twinning mechanism and defect formation. We consider the twin formation was more stable at high temperature, because the film will become polycrystalline at low temperature. The other kind wire should be attributed to dislocation density, which is due to oblique incident sputter beam and caused the different growth rate between incident and shadowed side. This mechanism made columnar grain bend to the side with lower growth rate at lower temperature, which is much different to typically oblique-angle deposited structures.
9:00 PM - AA6.37
Characterization of Low-Temerature Growth ZnO-Modified TiO2 Nanowires.
Micah Eastman 1 , Haiyan Li 1 , Jun Jiao 1 Show Abstract
1 , Portland State University, Portland, Oregon, United States
We report the synthesis of ZnO-modified TiO2 nanowires by a solution-based process. The synthesis takes place below 200 C in an alkali solution and results in both nanowire and nanoparticle precipitates. A variety of methods were used to characterize the material and other resulting byproducts: Raman spectroscopy with a 532 nm excitation wavelength was used to verify the crystalline phase of the nanowires; Transmission electron microscope imaging verifies the morphology of the materials and high resolution imaging allows for structural identification of the wires and particles; Electron energy loss and energy dispersive x-ray spectroscopy allow for identification of the resulting compounds and their impurities. In addition, the effectiveness of nitric acid is explored as a post-growth treatment to remove residual alkali on the surface of the nanowires and particles. Trends in the electron energy loss and Raman spectroscopy indicate that the modification of the wires predominantly takes place on the surface, rather than in the nanowire bulk.
9:00 PM - AA6.38
Atomic Layer Deposition (ALD) Assisted Synthesis of Nanowires and Nanotubes
Todd Waggoner 1 , Brian Pelatt 1 , Ashley Mason 1 , Sean Smith 1 , John Conley 1 Show Abstract
1 Electrical Engineering and Computer Science, Oregon State University, Corvallis, Oregon, United States
As a result of self-limiting surface reactions of purge separated reactants, atomic layer deposition (ALD) allows for layer-by-layer deposition of highly conformal thin films. The high conformality of ALD creates the potential for many interesting routes to nanostructure synthesis. In this work, ALD was used (i) to deposit a conformal thin film ZnO seed layer that was used to achieve highly selective patterned growth of ZnO nanowires, without the use of a metal catalyst, directly on both inorganic substrates (Si or glass) as well as flexible organic surfaces (such as Kevlar and Spectrafiber) and (ii) to create core-shell nanowire heterostructures by coating ZnO nanowires with thin film dielectrics (Ta2O5 and Al2O3). Vertical oriented (+/- 30 degrees from normal) ZnO nanostructures were grown via either (i) a high temperature (~900C) vapor phase method involving carbothermal reduction of a ZnO/graphite mixture or (ii) a low temperature (<= 90C) solution phase method involving an aqueous solution of Zn(NO3)2, hexamethylene tetramine, and polyethylene imine heated for ~5-10 minutes in a 1200W microwave oven. ZnO nanostructure morphology was found to be sensitive to ZnO seed layer preparation, substrate, and growth method. Vapor phase nanowires were found to have improved crystalline properties and higher aspect ratio. Solution phase permitted growth of nanowires on flexible substrates for energy harvesting investigations. ALD ZnO, Al2O3, and Ta2O5 thin films were deposited using either Zn(C2H5)2, Al2(CH3)6, or TaCl5 as the metal precursor with water as the oxidant. Conformal ALD ZnO seed layer coating of Si islands on a silicon on insulator substrate (SOI) was used to directly grow electrically integrated ZnO nanobridge structures. Nanobridges are characterized electrically for use in sensor applications. Core-shell nanowire structures were created by coating ZnO nanowires with either Ta2O5 or Al2O3. These structures are being investigated as a way to create nanotube structures and to reduce surface recombination in the encapusulated ZnO nanowires
9:00 PM - AA6.39
Preparation of Polymorph-Controlled Copper Phthalocyanine Nanocrtyals/Nanowires by Seed-Crystal-Induced Reprecipitation Method.
Koichi Baba 1 , Kenji Sugai 1 , Hitoshi Kasai 1 2 , Yousuke Miyashita 3 , Hidetoshi Oikawa 1 , Hachiro Nakanishi 1 Show Abstract
1 , Institute of Multidisciplinary Research for Advanced Materials, Tohoku University, Sendai, Miyagi, Japan, 2 , PRESTO, Japan Science and Technology Agency, 4-1-8 Honcho, Kawaguchi, Saitama, Japan, 3 , Analysis Technology Center, Research and Development Management Headquarters, FUJIFILM Corporation, 210 Nakanuma, Minamiashigara, Kanagawa, Japan
Copper phthalocyanine (CuPc) is an excellent organic semiconductor and its optoelectrical properties have been studied extensively due to its potential applications to electronic and photovoltaic devices such as field-effect transistors and solar cells. Recently, promising results have been reported for organic filed-effect transistors based on single-crystalline CuPc ribbons . Usually, CuPc ribbons, rods, and wires in nanoscale are prepared using organic vapor-phase deposition (OVPD). However, OVDP are carried out under high temperature condition (e.g. above 100 °C), thus thermal sensitive polymorph of CuPc are limited to their preparation. To date, CuPc nanorods (α-form) and submicrometer-sized ribbons (β-form) prepared by OVDP have been reported, but the other attractive polymorph such as ε-from, which has high photoconductivity, has never reported. On the other hand, our group has been extensively studying the optoelectrical properties of size- and morphology-controlled organic nanocrystals/nanowires, prepared by a wet process what we call the reprecipitation method . Recently, we have succeeded in the preparation of polymorph-controlled CuPc nanocrystals/nanowires using a newly developed technique, named seed-crystal-induced reprecipitation method. In this method, the crystal growth of α-, β- and ε-form of CuPc nanocrystals/nanowires were induced by each seed-crystal respectively. In this presentation, their size, morphology and optical properties are discussed using scanning electron microscopy observation, powder X-ray diffraction pattern analysis, and absorption spectra analysis. Polymorph-controlled CuPc nanocrystals/nanowires, especially ε-form, may have an opportunity to develop the high performance field-effect transistors and solar cells in near future. The present work was supported by NEDO’s Nanotechnology Program.  Q. Tang et al., Adv. Mater., 18, 65 (2006).  K. Baba et al., Jpn. J. Appl. Phys. 46, 7558 (2007).
9:00 PM - AA6.40
Diameter-tunable Growth of Inorganic Semiconductor Nanowires Over Size-controlled Gold Nanodots via a Contact-printing Method.
Sang Ho Lee 1 , Youn-Su Kim 1 , Seung Kyo Lee 1 , Beong Ki Cho 1 , Won Bae Kim 1 Show Abstract
1 , Gwangju Institute of Science & Technology (GIST), Gwangju Korea (the Republic of)
One-dimensional (1D) inorganic nanostructures such as wires, rods, belts, and tubes whose lateral dimensions fall anywhere in the range of 1 to 100 nm have received steadily growing interests owing to their peculiar anisotropic shape, fascinating electrical, thermal, and mechanical properties. The diameter-controlled growth of these 1D nanostructures is essential to applications in nanoscale devices because their physical and electrical properties are diameter dependent . In this research, we show a novel method to control the diameter of 1D nanostructures by demonstrating a series of SnO2 nanowires (NWs) having different but controlled diameters. These NWs are synthesized via a carbothermal reduction process on Au metal catalysts whose dimensions are pre-determined through a contact-printing method by using nanoscale stamps that are made of vertically-aligned carbon nanotubes (CNTs) in anodic aluminum oxide (AAO) template. The diameters of CNTs are readily regulated by adjusting the pore sizes of AAO matrix in three types of electrolytes: sulfuric acid, oxalic acid, and phosphoric acid [2-4]. As a result of controlling the sizes of Au catalysts from the CNT stamps, the diameters of NWs could be readily changed from 30 to 70 nm with very narrow size distribution. This method may be applicable to preparations of various 1D nanostructure materials with monodisperse size distribution.Acknowledgement This work was supported by the Korea Science and Engineering Foundation (KOSEF) NCRC grant funded by the Korea government (MEST) (No. R01-2008-006-03002-0) and by the Program for Integrated Molecular System (PIMS/GIST).References S. Barth, H. Shen, and S. Mathur, Small 7, 713 (2005). H. Masuda and F. Hasegwa, J. Electrochem. Soc. 144, L127 (1997). H. Masuda and K. Fukuda, Science 268, 1466 (1995). Y. Li, M. Zheng, L. Ma, and W. Shen, Nanotechnology 17, 5101 (2006).
9:00 PM - AA6.5
Large-Scale Integration of High-Performance Silicon Nanowire Field Effect Transistors for Logic and Memory.
Qiliang Li 1 2 , Curt Richter 2 , Xiaoxiao Zhu 1 2 , Yang Yang 1 2 , Dimitris Ioannou 1 , Hao Xiong 2 , Doo-Won Kwon 2 , John Suehle 2 Show Abstract
1 Electrical and Computer Engineering, George Mason University, Fairfax, Virginia, United States, 2 Semiconductor Electronics Division, National Institute of Standards and Technology, Gaithersburg, Maryland, United States
Self-assembled nanowire field effect transistors (NWFETs) have been of great interest as an important active building block for applications in nanoelectronics. Previous pioneering studies have demonstrated high-performance nanowire and nanotube field effect transistors with subthreshold swing (SS) improved to 100 mV/decade and on/off current ratio about 1E5. Yet a CMOS-compatible process for large-scale integration of self-assembled NWFETs which outperform planar MOSFETs with SS ≈ 60s mV/decade is still not found. The ultimate device electrical properties strongly depend on the details of the device structure and the quality of semiconductor/dielectric interface which is directly affected by fabrication processes. Most of the current research on self-assembled nanowire devices involves harvesting nanowires from the preparation substrate, and suspending them in liquid to form a nanowire solution before the manipulation by using fluidic alignment, dielectrophoresis or nanoscale probe methods. Such processes are likely to introduce debris, particles and other unknown materials surrounding the nanowires and contaminate their surface. The use of electron beam microscopy to examine the nanowire’s position during the nanowire alignment may be a further source of contamination. Additionally, the effectiveness of cleaning the nanowires after such manipulations is very limited. The nanowires, which are held on the surface weakly via electrostatic force, can easily be lost under aggressive cleaning, particularly under sonication conditions. Therefore it is highly likely that the nanowire surface will be left contaminated when the device is made. Such a contaminated surface will dramatically increase the nanowire device interface states, which can seriously deteriorate the device performance, as indicated by the transistor subthreshold swing.We report the fabrication and characterization of self-assembled Si nanowire field effect transistors (NWFETs) with excellent current-voltage characteristics, large on/off current ratio (≈ 1E7) and sharp subthreshold swing. The Si nanowire devices are fabricated on a whole wafer by using a self-aligned technique with standard photolithographic alignment and metal lift-off processes, enabling the large-scale integration of reproducible, high-performance nanowire devices with an average SS of 61 mV/decade at room temperature. With the assistant of bottom gate the average of SS is improved to 45 mV/decade, which advances beyond the 60 mV/dec limit of conventional planar MOSFETs set by Fermi distribution. Our approach clearly shows that the self-assembled NWFETs are compatible with CMOS large-scale integration and ready for high performance logic, memory and sensor applications.
9:00 PM - AA6.6
Measurements of Liquid Silicon Resistivity on Silicon Microwires.
Gokhan Bakan 1 , Adam Cywar 1 , Cicek Boztug 1 , Mustafa Akbulut 1 , Helena Silva 1 , Ali Gokirmak 1 Show Abstract
1 Electrical and Computer Engineering, University of Connecticut, Storrs, Connecticut, United States
Interest in achieving high mobility silicon thin film transistors (TFTs) for large area electronics has motivated studies on crystallization of amorphous and polycrystalline silicon for several decades. Most crystallization techniques involve growth from the melt which has led to increased interest in the properties of molten silicon. Electrical resistivity of liquid silicon has been reported since 1960’s, measured using the electrodeless rotating magnetic field method or the four point probe method on a macroscopic molten silicon volume. In this work, liquid silicon resistivity is obtained by performing a wafer-level measurement technique on nanocrystalline silicon (nc-Si) microwires with various dimensions, using a conventional probe station and standard semiconductor electrical characterization tools. Si microwires are defined by patterning a nc-Si film which is deposited in a low pressure chemical vapor deposition (LPCVD) system at 560 °C with high-level in-situ boron doping (~5x1020 cm-3) on Si substrate with thermally grown oxide. Si wires with various design widths (300 to 500 nm) and lengths (0.5 to 5.5 µm) are defined using photolithography and reactive ion etch. Actual wire widths are ~ 250 nm (ΔW) narrower than design widths due to overexposure of features on mask and wafers. The film thickness is measured as 128±9 nm using atomic force microscopy. Ti/Ni electrodes are formed by photolithography, metal evaporation and lift-off processes to ensure reliable ohmic contacts between the electrical probes and the Si wires. The Si wires are treated as linear resistors in both solid and liquid phase with uniform cross-section along the wire length. The total measured resistance (RSi) values depend on three unknown parameters: a constant contact resistance Rc, the difference between design width and actual width (ΔW), and the silicon resistivity ρ. Rc is extracted as the vertical intercept of RSi(L). ΔW and ρ are obtained from the slope of RSi(L) for sets of wires with various widths. The extracted solid silicon resistivity from wafer level method and from four point probe measurements are 11.5 ± 0.5 mΩ.cm and 12 mΩ.cm respectively. Wires are molten by a high voltage pulse from a pulse generator and the pulse voltage and current are monitored using a high speed oscilloscope. A sharp increase in current followed by a plateau marks the melting of the whole wire. The liquid silicon resistivity is calculated from the liquid silicon resistances by using the same method which is used to extract the solid silicon resistivity. The resistivity of liquid silicon is determined to be 75±4.6 µΩ.cm which is in close agreement with previously reported values. This micrometer scale, wafer-level technique is a convenient way of measuring liquid silicon resistivity and it can potentially be extended to the characterization of other liquid physical properties and to other materials.
9:00 PM - AA6.7
Fabrication and Characterization of Axial pn Junctions in Silicon Nanowires.
Tae-Woong Koo 1 2 , Jae-hyun Lee 3 , Young Chai Jung 2 4 , Sung-Woo Hwang 2 4 , Dongmok Whang 1 2 3 Show Abstract
1 School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon Korea (the Republic of), 2 , Research Center for Time-domain Nano-functional Devices, Seoul Korea (the Republic of), 3 SKKU Advanced Institute of Nanotechnology, Sungkyunkwan University, Suwon Korea (the Republic of), 4 School of Electrical Engineering, Korea University, Seoul Korea (the Republic of)
Biplolar junction devices realized from silicon nanowires is an important topic for photonics and solar applications. Both axial and core shell junction structures have been realized successfully, providing interesting transport results. We will present quantitative analysis on axial silicon nanowire pn junctions. Several contact pads were made on 20μm long silicon nanowires with p+n+ junction in the middle, and the current voltage (I-V) characteristics were measured between various combinations of contact pads. The diameter of the nanowire ranges from 45 to 50 nm. While the measured I-V between the contacts across uniform region without junction showed linear behaviors, the I-V measured between the junction shows diode characteristic. The measured I-V was fit with an ideal diode current in series with a resistor, and the saturation current was obtained as a result of fitting. It is possible to obtain the doping concentration from the value of the saturation current, if bulk values of diffusion constant and diffusion length are used.
9:00 PM - AA6.8
Fabrication of Si Nanowires on Insulator by Nickel Silicide-Mediated Lateral Growth
Nian-Huei Chen 1 , Liu Che-Yu 1 , Shen Fang-Yee 1 , Hsu Chih-