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Spring 2010 Logo2010 MRS Spring Meeting & Exhibit

April 5-9, 2010 | San Francisco
Meeting Chairs: Anne C. Dillon, Robin W. Grimes, Paul C. McIntyre, Darrin J. Pochan

Symposium I : Materials for End-of-Roadmap Scaling of CMOS Devices

2010-04-07   Show All Abstracts

Symposium Organizers

Andrew C. Kummel University of California-San Diego
Heiji Watanabe Osaka University
Iain Thayne University of Glasgow
Prashant Majhi SEMATECH/Intel
I1: Si MOSFET
Session Chairs
Andrew Kummel
Wednesday PM, April 07, 2010
Room 2012 (Moscone West)

9:00 AM - I1.1
Interfaces Chemistry and Lanthanum Diffusion in Poly-Si/TiN/La2O3/HfSiON/SiON/Si Stacks.

Rachid Boujamaa 1 2 3 , Nevine Rochat 2 , Roland Pantel 1 , Chantal Trouiller 1 , Eugenie Martinez 2 , Olivier Renault 2 , Blanka Detlefs 4 , Sylvain Baudot 1 , Virginie Loup 2 , Francois Martin 2 , Mickael Gros-Jean 1 , Francois Bertin 2 , Catherine Dubourdieu 3
1 , STMicroelectronics, 850, rue Jean Monnet, 38926 Crolles France, 2 , CEA, LETI, MINATEC, F38054 Grenoble France, 3 , LMGP, CNRS, Grenoble INP, 3 parvis L. Néel, BP 257, 38016 Grenoble France, 4 , European Synchrotron Radiation Facility, 6 rue Jules Horowitz, F-38000 Grenoble France

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9:15 AM - I1.2
Exploration of Higher-k Dielectrics for the Advanced Gate Stacks Using Combinatorial Pulsed Laser Deposition.

Martin Green 1 , Kao-Shuo Chang 1 2 , Peter Schenck 1 , Ichiro Takeuchi 2
1 Materials Science and Engineering, NIST, Gaithersburg, Maryland, United States, 2 , U of Maryland, College Park, Maryland, United States

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9:30 AM - I1.3
Cerium Dioxide High-k Thin Films Derived from Sol Gel Route as a Gate Dielectric in Advanced HK/MG Stacks.

Ashok Mahajan 1 , Anil Khairnar 1 , Vijaya Toke 1
1 Dept of Electronics, North Maharashira University, Jalgaon, Maharashtra, India

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9:45 AM - I1.4
Oxygen Vacancy Mediated Dielectric Breakdown in High-k Gate Stacks.

Blanka Magyari-Kope 1 , Yoshio Nishi 1
1 Electrical Engineering, Stanford University, Stanford, California, United States

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10:00 AM - **I1.5
Identifying Atomic Structure of the Electrically Active Defects in Gate Dielectric Stacks.

Gennadi Bersuker 1
1 , SEMATECH, Austin, Texas, United States

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10:30 AM - I1.6
Structures, Defects, and Electrical Properties of Amorphous Hafnia and Hafnium Silicates.

Chin-Lung Kuo 1 , Tsung-Ju Chen 1
1 Materials Science and Engineering, National Taiwan University , Taipei Taiwan

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10:45 AM - I1.7
Initial ALD on Hydroxylized Si (001) Surface for Al2O3 Thin Film Growth With Tri-methylaluminum: A First Principles Study.

Dae_Hee Kim 1 , Dae-Hyun Kim 1 , Yong-Chan Jeong 1 , Hwa-Il Seo 2 , Yeong-Cheol Kim 1
1 Department of Materials Engineering, Korea University of Technology and Education, Cheonan Korea (the Republic of), 2 School of Information Technology, Korea University of Technology and Education, Cheonan Korea (the Republic of)

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11:00 AM - I1
BREAK

11:15 AM - I1.8
Improvement of the Electrical Quality of LaAlO3/Si Structures Using Atomic Oxygen Treatments.

Sylvain Pelloquin 1 2 , Guillaume Saint-Girons 2 , Carole Plossu 1 , Nicolas Baboux 1 , David Albertini 1 , Genevieve Grenet 2 , Guy Hollinger 2
1 Composants Nanoélectroniques, Institut des Nanotechnologies de Lyon , Villeurbanne France, 2 Hétéroépitaxie et Nanostructures, Institut des Nanotechnologies de Lyon , Ecully France

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11:30 AM - **I1.9
Interfacial Layer Scaling Strategies for Metal Gate / High-k Stacks on Silicon.

Martin Frank 1 , Takashi Ando 1 , Changhwan Choi 1 , Kisik Choi 2 , Chiara Marchiori 3 , Jean Fompeyrine 3 , Vijay Narayanan 1
1 , IBM T.J. Watson Research Center, Yorktown Heights, New York, United States, 2 , GLOBALFOUNDRIES Inc., Yorktown Heights, New York, United States, 3 , IBM Research GmbH, Zürich Research Laboratory, Rüschlikon Switzerland

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12:00 PM - I1.10
Stability of Rare-earth Scandate Dielectrics on Si(100).

Matthew Copel 1 , Nestor Bojarczuk 1 , Lisa Edge 1 , Supratik Guha 1 , Barry Linder 1
1 , ibm, Yorktown Hts, New York, United States

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12:15 PM - I1.11
Optimization of Composition Ratio in La–Al–O Gate Dielectrics for Advanced Metal/Higher–k Devices.

Hiroaki Arimura 1 , Takashi Ando 2 1 , Stephen Brown 2 , Andrew Kellock 3 , Alessandro Callegari 2 , Matthew Copel 2 , Richard Haight 2 , Heiji Watanabe 1 , Vijay Narayanan 2
1 , Graduate School of Engineering, Osaka University, Suita, Osaka, Japan, 2 , IBM T. J. Watson Research Center, Yorktown Heights, New York, United States, 3 , IBM Almaden Research Center, San Jose, California, United States

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12:30 PM - **I1.12
Remote Control of High-k Si Gate Stack Properties.

Naoto Umezawa 1
1 , National Institute for Materials Science, Ibaraki Japan

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I2: Novel Devices
Session Chairs
Iain Thayne
Wednesday PM, April 07, 2010
Room 2012 (Moscone West)

2:30 PM - **I2.1
High Mobility Channel Materials and Their Integration on Silicon.

Eugene Fitzgerald 1
1 DMSE, MIT, Cambridge, Massachusetts, United States

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3:00 PM - I2.2
Ultra-shallow NiPt Silicide Contacts for Sub-10 nm MOSFETs.

Bin Yang 1 , Paul Solomon 2 , Christopher D'Emic 2 , Zhen Zhang 2 , Chrisitan Lavoie 2 , Yun Wang 3 , Yu Zhu 2 , Dae-gyu Park 2
1 , GlobalFoundries, Yorktown Heights, New York, United States, 2 T.J. Waston Research Center, IBM, Yorktown Heights, New York, United States, 3 , Ultratech, San Jose, California, United States

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3:15 PM - I2.3
Study of Metal/High-k (ALD-Al2O3 ) Interfaces.

Lior Kornblum 1 , Michael Lisiansky 2 , Yakov Roizin 2 , Moshe Eizenberg 1
1 Department of Materials Engineering, Technion - Israel Institute of Technology, Haifa Israel, 2 , Tower Semiconductors Ltd. P.O. Box 619, Midgal haEmek Israel

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3:30 PM - **I2.4
Tunneling MOSFETs Based on III-V Staggered Heterojunctions.

Peter Asbeck 1 , Lingquan Wang 1 , Siyuan Gu 1 , Yuan Taur 1 , Edward Yu 2
1 ECE, UCSD, La Jolla , California, United States, 2 ECE, University of Texas, Austin, Austin, Texas, United States

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4:00 PM - I2.5
Transport Properties for Si Nanowire-channel MOSFETs Formed With Electron-beam-lithographically Patterned Ultra-narrow <100> and <110> Si Wires.

Sejoon Lee 1 , Youngmin Lee 2 , Han Tae Ryu 2 , You-mee Hyun 2 , Deuk Young Kim 2 , Hyunsik Im 2 , Toshiro Hiramoto 3
1 Quantum-functional Semiconductor Research Center, Dongguk University, Seoul Korea (the Republic of), 2 Department of Semiconductor Science, Dongguk University, Seoul Korea (the Republic of), 3 Institute of Industrial Science, University of Tokyo, Tokyo Japan

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4:15 PM - I2
BREAK

4:30 PM - I2.6
Compositional and Thermal Characterization of Amorphous Ta-W-Si-B Gates.

Melody Grubbs 1 , Xiao Zhang 2 , Michael Deal 2 , Yoshio Nishi 2 , Bruce Clemens 1
1 Materials Science and Engineering, Stanford University, Stanford, California, United States, 2 Electrical Engineering, Stanford University, Stanford, California, United States

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4:45 PM - I2.7
Controlling Peripheral Leakage Currents in Ultra-narrow MOSFETs Using a Penta-Gate Approach.

Mustafa Akbulut 1 , Faruk Dirisaglik 1 , Helena Silva 1 , Ali Gokirmak 1
1 Electrical Engineering, University of Connecticut, Storrs, Connecticut, United States

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5:00 PM - **I2.8
A Self-aligned Epitaxial Regrowth Process for Sub-100-nm III-V FETs.

Mark Rodwell 1 , Andrew Carter 1 , Greg Burek 1 , Mark Wistey 3 1 , Brian Thibeault 1 , Ashish Baraskar 1 , Uttam Singisetti 1 , Eun Kim 2 , Byungha Shin 2 , Joel Cagnon 1 , Yong-Ju Lee 5 1 , Susanne Stemmer 1 , Paul McIntyre 2 , Arthur Gossard 1 , Chris Palmstrom 1 , Bo Yu 4 , Denns Wang 4 , Peter Asbeck 4 , Yuan Taur 4
1 ECE, UCSB, Santa Barbara, California, United States, 3 Electrical Engineering, Notre Dame, South Bend, Indiana, United States, 2 Materials Department, Stanford University, Palo Alto, California, United States, 5 , Intel, Beaverton, Oregon, United States, 4 Electrical Engineering, UCSD, San Diego, California, United States

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5:30 PM - I2.9
Tuneable CMOS and Current Mirror Circuit with Double-gate Screen Grid Field Effect Transistors.

Yasaman Shadrokh 1 , Kristel Fobelets 1 , Enrique Velazquez-Perez 2
1 Electronic and Electrical Engineering, Imperial College, London United Kingdom, 2 Departmento de Fisíca Aplicada, Universidad de Salamanca, Salamanca Spain

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5:45 PM - I2.10
A New SiGeC Vertical MOSFET: Single-device CMOS (SD-CMOS).

Carlos Augusto 1 , Lynn Forester 1
1 , Quantum Semiconductor LLC, San Jose, California, United States

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2010-04-08   Show All Abstracts

Symposium Organizers

Andrew C. Kummel University of California-San Diego
Heiji Watanabe Osaka University
Iain Thayne University of Glasgow
Prashant Majhi SEMATECH/Intel
I3: Ge MOSFET I
Session Chairs
Heiji Watanabe
Thursday AM, April 08, 2010
Room 2012 (Moscone West)

9:00 AM - I3.1
Epitaxial Dy2O3 Thin Films Grown on Ge(100) Substrates by Molecular Beam Epitaxy.

Md. Nurul Kabir Bhuiyan 1 , Mariela Menghini 1 , Jin Won Seo 2 , Jean-Pierre Locquet 1
1 Department of Physics and Astronomy, Katholieke University Leuven, Celestijnenlaan 200D, B-3001, Leuven Belgium, 2 Department of Metallurgy and Materials Engineering, Katholieke University Leuven, Kasteelpark Arenberg 44, B-3001, Leuven Belgium

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9:15 AM - I3.2
Unique Axial Ge/Si Heterostructure Nanowire Materials and Devices.

Shadi Dayeh 1 , Jianyu Huang 2 , Aaron Gin 2 , S. Picraux 1
1 Center for Integrated Nanotechnologies, Los Alamos National Laboratory, Los Alamos, New Mexico, United States, 2 Center for Integrated Nanotechnologies, Sandia National Laboratory, Albuquerque, New Mexico, United States

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9:30 AM - I3.3
Structure of Hf Based High-k Dielectric Thin Films on Ge Substrates.

Mehmet Sahiner 1 , Michelle Jamer 1 , Jeffrey Serfass 1 , Samuel Emery 1 , Joseph Woicik 2
1 Physics, Seton Hall University, South Orange, New Jersey, United States, 2 , National Institute of Standards and Technology, Gaithersburg, Maryland, United States

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9:45 AM - I3.4
In-situ MEIS Study of Reduction and Desorption of Native Oxides on Ge During Atomic Layer Deposition.

Hang Dong Lee 1 3 , Tian Feng 1 3 , Lei Yu 1 3 , Daniel Mastrogiovanni 2 3 , Alan Wan 2 3 , Torgny Gustafsson 1 3 , Eric Garfunkel 2 3
1 Physics and Astronomy, Rutgers University, Piscataway, New Jersey, United States, 3 Laboratory for Surface Modification, Rutgers University, Piscataway, New Jersey, United States, 2 Chemistry, Rutgers University, Piscataway, New Jersey, United States

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10:00 AM - **I3.5
Strontium Germanide Interlayer for High-k/Ge MISFETs.

Yoshiki Kamata 1 , Akira Takashima 2 , Yuuichi Kamimuta 1 , Tsutomu Tezuka 1
1 , MIRAI-Toshiba, Kawasaki Japan, 2 , Toshiba Corporation, Kawasaki Japan

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10:30 AM - I3.6
Evolution of Interface Properties During Atomic Layer Deposition of Rare Earth-based High-k Dielectrics on Si, Ge and III-V Substrates.

Luca Lamagna 1 , Claudia Wiemer 1 , Silvia Baldovino 1 2 , Alessandro Molle 1 , Michele Perego 1 , Sylvie Schamm-Chardon 3 , Pierre-Eugene Coulon 3 , Marco Fanciulli 1 2
1 Laboratorio MDM, CNR-INFM, Agrate Brianza Italy, 2 Dipartimento di Scienza dei Materiali, Università degli Studi di Milano-Bicocca, Milano Italy, 3 CEMES-CNRS and Université de Toulouse, nMat group, Toulose France

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10:45 AM - I3.7
Schottky Barrier Height of Metal Contacts on n-type Germanium With and Without Ge3N4 Interlayers.

Ruben Lieten 1 2 , Valeri Afanas'ev 3 , N. Thoan 3 , Stefan Degroote 1 , Gustaaf Borghs 1
1 , IMEC, Leuven Belgium, 2 , Lawrence Berkeley National Laboratory, Berkeley, California, United States, 3 Department of Physics, University of Leuven, Leuven Belgium

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11:00 AM - I3:
BREAK

11:15 AM - I3.8
Oxidation Mechanism at Ge/GeO2 interfaces: An ab initio Study.

Shoichiro Saito 1 , Takuji Hosoi 1 , Heiji Watanabe 1 , Tomoya Ono 1
1 Graduate School of Engineering, Osaka University, Suita, Osaka, Japan

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11:30 AM - **I3.9
Quality of GexSi1-x/Oxide Interfaces in Terms of Intrinsic Defects: ESR Probing and Electrical Activity.

Andre Stesmans 1 , Valery Afanas'ev 1
1 , University of Leuven, Leuven Belgium

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12:00 PM - I3.10
Chemical Stability of Lanthanum Germanate Passivating Layer on Ge Upon Metal or High-k Deposition.

Dimitra Tsoutsou 1 , Yerassimos Panayiotatos 1 , Andreas Sotiropoulos 1 , Georgia Mavrou 1 , Sotiria Galata 1 , Evangelos Golias 1 , Athanasios Dimoulas 1
1 MBE Laboratory, NCSR DEMOKRITOS, Athens Greece

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12:15 PM - I3.11
The Ge(100)/ALD-Al2O3 Interface: Physical and Electrical Characterization.

Shankar Swaminathan 1 , Yun Sun 2 , Piero Pianetta 2 , Paul McIntyre 1
1 Materials Science and Engineering, Stanford University, Stanford, California, United States, 2 , Stanford Synchrotron Radiation Laboratory, Menlo Park, California, United States

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12:30 PM - **I3.12
Bonding and Interface Defects at III-V Oxide Interfaces.

John Robertson 1 , Liang Lin 1
1 , Cambridge University, Cambridge United Kingdom

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I4: Ge MOSFET II
Session Chairs
Andrew Kummel
Thursday PM, April 08, 2010
Room 2012 (Moscone West)

2:30 PM - I4.1
Investigation of the Physical Origin of the Improved Electrical Properties of GeO2 Dielectric by Vacuum Annealing.

Shingo Ogawa 1 , Takashi Yamamoto 1 2 , Gaku Okamoto 2 , Katsuhiro Kutsuki 2 , Takuji Hosoi 2 , Takayoshi Shimura 2 , Heiji Watanabe 2
1 Surface Analysis Laboratories, Toray Research Center, Inc., Otsu, Shiga, Japan, 2 Graduate School of Engineering, Osaka University, Suita, Osaka, Japan

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2:45 PM - I4.2
Study of Passivation of Ge(100) Surface Using Scanning Tunneling Microscopy and Density Functional Theory.

Joon Sung Lee 1 2 , Sarah Bishop 1 , Andrew Kummel 1
1 Chemistry and Biochemistry, University of California, San Diego, La Jolla, California, United States, 2 Materials Science and Engineering, University of California, San Diego, La Jolla, California, United States

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3:00 PM - I4.3
Ultimate Ge Passivation: Process and Materials Characterization of Ultrathin Si Cap Layers Grown on Ge Substrates.

Benjamin Vincent 1 , Matty Caymax 1 , Wilfried Vandervorst 1 2 , Ventsislav Valev 3 , Thierry Verbiest 3 , Roger Loo 1
1 , IMEC, Leuven Belgium, 2 Instituut voor Kern- en Stralingsfysica, K. U. Leuven, Leuven Belgium, 3 Institute for Nanoscale Physics and Chemistry (INPAC), K. U. Leuven, Leuven Belgium

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3:15 PM - I4.4
Quantitative Observation of Ge-segregation During the Si-passivation of Ge-surfaces.

Wilfried Vandervorst 1 2 , Benjamin Vincent 1 , Matty Caymax 1 , Bastien Douhard 1 , Sebastian Koelling 1 2 , Matthieu Gilbert 1
1 spdt/mca, imec, leuven Belgium, 2 IKS, KULeuven, leuven Belgium

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3:30 PM - **I4.5
Substrates and Gate Dielectrics: the Materials Issue for sub-22 nm CMOS Scaling.

Matty Caymax 1 , Florence Bellenger 1 2 , Guy Brammertz 1 , Johan Dekoster 1 , Annelies Delabie 1 , Roger Loo 1 , Clement Merckling 1 , N. Nguyen 1 , Laura Nyns 1 , Sonja Sioncke 1 , Benjamin Vincent 1 , Gang Wang 1 4 , Wilfried Vandervorst 1 3 , Marc Heyns 1 4
1 WEA, IMEC vzw, Leuven Belgium, 2 Department of Electrical Engineering, K.U.Leuven, Leuven Belgium, 4 Department of Metallurgy and Materials Engineering, K.U.Leuven, Leuven Belgium, 3 Instituut voor Kern-en Stralingsfysica, K.U.Leuven, Leuven Belgium

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4:00 PM - I4.6
Investigation of the Thermal Stability of Strained Ge Layers Grown at Low Temperature by Reduced-pressure Chemical Vapour Deposition on Si0.2Ge0.8 Relaxed Buffers.

Andy Dobbie 1 , Maksym Myronov 1 , Xue-Chao Liu 1 , Van Nguyen 1 , Evan Parker 1 , David Leadley 1
1 Department of Physics, University of Warwick, Coventry United Kingdom

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4:15 PM - I4
BREAK

4:30 PM - I4.7
High Electron Mobility in Ge nMISFETs With High Quality S/D Formed by Solid Source Diffusions.

Tatsuro Maeda 1 , Yukinori Morita 1 , Shinichi Takagi 2
1 NIRC, AIST, Tsukuba, Ibaraki, Japan, 2 , The University of Tokyo, Bunkyo-ku, Tokyo, Japan

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4:45 PM - I4.8
B Doping in Ge: The Role of Self-interstitial Defects.

Nick Cowern 1 , Chihak Ahn 1 , Nicholas Bennett 1 , Silke Hamm 2 , Pascal Scheiblin 3
1 Electrical, Electronic and Computer Engineering, Newcastle University, Newcastle upon Tyne, Tyne and Wear, United Kingdom, 2 , Mattson Thermal Products GmbH, Dornstadt Germany, 3 CEA-Leti, Minatec, Grenoble France

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5:00 PM - **I4.9
Challenge to High Performance Ge CMOS.

Akira Toriumi 1 2 , Choong Lee 1 , Shengkai Wang 1 , Mahoro Yoshida 1 , Toshiyuki Tabata 1 , Koji Kita 1 2 , Tomonori Nishimura 1 2 , Kousuke Nagashio 1 2
1 , University of Tokyo, Tokyo Japan, 2 , JST-CREST, Tokyo Japan

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5:30 PM - I4.10
Fabrication of La-incorporated Hf-silicate Gate Dielectrics Using PVD-based in-situ Method and its Effective Work Function Modulation of Metal/High-k Stacks.

Heiji Watanabe 1 , Hiroaki Arimura 1 , Yudai Oku 1 , Masayuki Saeki 1 , Naomu Kitano 1 , Takuji Hosoi 1 , Takayoshi Shimura 1
1 Department of Material and Life Science, Osaka University, Suita, Osaka, Japan

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5:45 PM - I4.11
Characterization of Ultra Shallow Arsenic Implants by Grazing Incidence Absorption Spectroscopy.

Florian Meirer 1 5 , Giancarlo Pepponi 2 , Dana Zeelenberg 3 , Damiano Giubertoni 2 , Majeed Foad 4 , Ritimukta Sarangi 5 , Apurva Mehta 5 , Christina Streli 1 , Piero Pianetta 5
1 Institute for Atomic and Subatomic Physics, TU Vienna, Vienna , Vienna, Austria, 5 Stanford Synchrotron Radiation Lightsource, SLAC National Accelerator Laborator, Menlo Park, California, United States, 2 CMM, FBK - irst, Povo, Trento, Italy, 3 Applied Physics, Technical University Delft, Delft Netherlands, 4 , Applied Materials Inc., Sunnyvale, California, United States

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I5: Poster Session
Session Chairs
Friday AM, April 09, 2010
Salon Level (Marriott)

9:00 PM - I5.1
Indium Segregation Mechanisms in MBE and MOVPE-grown InAlN Epilayers.

Suman-Lata Sahonta 1 , Thomas Kehagias 2 , Georgos Dimitrakopulos 2 , Josif Kioseoglou 2 , Holm Kirmse 3 , Wolfgang Neumann 3 , Christoph Giesen 4 , Michael Heuken 4 , Adam Adikimenakis 5 , Alexandros Georgakilas 5 , Philomela Komninou 2
1 Materials Science and Metallurgy, University of Cambridge, Cambridge United Kingdom, 2 Department of Physics, Aristotle University of Thessaloniki, Thessaloniki, Makedonia, Greece, 3 Institute of Physics, Humboldt University of Berlin, Berlin Germany, 4 , AIXTRON AG, Herzogenrath Germany, 5 Department of Physics, University of Crete, Heraklion Greece

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9:00 PM - I5.10
Observation of Hole Tunneling in Work Function Measurements of Metals on O2/SiO2/Si Stacks.

Jonathan Rothschild 1 , Hagit Avraham 1 , Eran Lipp 1 , Moshe Eizenberg 1
1 Materials Engineering, Technion - Israel Institute of Technology, Haifa Israel

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9:00 PM - I5.11
Vapor Pressure Apparatus for Metal-organic Samples.

Robert Berg 1
1 , NIST, Gaithersburg, Maryland, United States

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9:00 PM - I5.12
Nanoscale Study of the Influence of Atomic Oxygen on the Electrical Properties of LaAlO3 Thin High-k Oxide Films Deposited by Molecular Beam Epitaxy.

Wael Hourani 1 , Liviu Militaru 1 , Brice Gautier 1 , David Albertini 1 , Armel Descamps-Mandine 1 , Sylvain Pelloquin 1 , Carole Plossu 1 , Guillaume Saint-Girons 1
1 University of Lyon, Lyon Institute of Nanotechnology, Lyon France

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9:00 PM - I5.13
Impact of Ge Doping on Si Substrate and Diode Characteristics.

Jan Vanhellemont 1 , Johan Lauwaert 1 , Jiahe Chen 1 2 3 , Henk Vrielinck 1 , Joan Marc Rafi 4 , Hidenori Ohyama 5 , Eddy Simoen 6 , Deren Yang 2
1 , Ghent University, Ghent Belgium, 2 , Zhejiang University, Hangzhou China, 3 , TU Dresden, Dresden Germany, 4 , CNM, Barcelona Spain, 5 , KNCT, Kumamoto Japan, 6 , IMEC, Leuven Belgium

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9:00 PM - I5.14
Reliability of DRAM Deep Trench Nitrided SiON Dielectric With Poly and Carbon Electrodes.

Suresh Uppal 1 , Tim Boescke 2
1 , Dublin City University, Dublin Ireland, 2 , Ersol Solar Energy AG, Erfurt Germany

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9:00 PM - I5.16
Effect of Boron Dose on Activation and Solid Phase Epitaxial Regrowth in Germanium.

Brad Yates 1 , Blake Darby 1 , Kevin Jones 1
1 Materials Science, University of Florida, Gainesville, Florida, United States

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9:00 PM - I5.18
Contact Technology Using Pulsed Laser Annealing to Form Ti/Al Ohmic Contacts on n-type GaN With Lower Contact Resistance and Improved Surface Morphology.

Grace Huiqi Wang 1 , Tripathy Sudhiranjan 1 , Xincai Wang 2 , Siew Lang Teo 1 , Debbie Hwee Leng Seng 1 , Poh Chong Lim 1 , Sze Yu Tan 1 , Yong Lim Foo 1
1 , Institute of Materials Research and Engineering (IMRE), Singapore Singapore, 2 , Singapore Institute of Manufacturing Technology, Singapore Singapore

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9:00 PM - I5.19
Modelling the Si(110) Surface.

Veronika Brazdova 1 2 , David Bowler 1 2
1 London Centre for Nanotechnology, University College London, London United Kingdom, 2 Department of Physics & Astronomy, University College London, London United Kingdom

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9:00 PM - I5.2
USJs Formation Combining He and Si Implantation With Plasma Immersion Ion Implantation in Silicon.

Ming Xu 1 3 , Rachid Daneche 2 , Esidor Ntsoenzok 3 , Gabrielle Regula 1 , Bernard Pichaud 1
1 , IM2NP CNRS , Marseille France, 3 , CNRS-CEMHTI, Orleans France, 2 , CIM-PACA , Marseille France

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