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2010 MRS Spring Meeting & Exhibit

April 5-9, 2010 | San Francisco
Meeting Chairs: Anne C. Dillon, Robin W. Grimes, Paul C. McIntyre, Darrin J. Pochan

Symposium P : Semiconductor Nanowires -- Growth, Physics, Devices, and Applications

2010-04-06 Show All Abstracts

Symposium Organizers

Heike Riel IBM Research GmbH

Margit Zacharias University of Freiburg

Michael McAlpine Princeton University

Theresa Mayer Pennsylvania State University

P1: Nitride Nanowires I

Session Chairs

Margit Zacharias

Tuesday PM, April 06, 2010

Room 2016 (Moscone West)

9:30 AM - **P1.1

Optical and Electrical Properties of Single InN Nanowires: Influence of Mg and Si Doping.

Raffaella Calarco ¹, Toma Stoica ¹, Eike Oliver Schaefer-Nolte ¹, Tobias Gotschke ¹, Friederich Limbach ¹, Roberta Caterino ¹, Eli Sutter ², Peter Sutter ², Kulandaivel Jeganathan ³, Thomas Richter ¹, Christian Bloemers ¹, Hans Lueth ¹, Michael Indlekofer ¹, Michel Marso ¹, Ralph Meijers ¹, Sergio Estevez Hernandez ¹, Thomas Schaepers ¹
¹IBN 1, Research Center Juelich, Juelich Germany, ²Center for Functional Nanomaterials, Brookhaven National Laboratory, Upton, New York, United States, ³Centre for Nanoscience and Nanotechnology, Bharathidasan University, Tiruchirappalli India

The growth of high crystalline InN nanowires (NWs) is a challenging task due to the tight growth window limited by the low decomposition temperature of this material. In this work we present the doping effect of Si and Mg on the crystalline, optical and electrical properties of InN NWs in comparison to those of their undoped counterparts. [1,2]High resolution TEM images give evidence of a high crystalline quality for Si doped InN NWs, whereas the presence of stacking faults at higher Mg doping is revealed. Single undoped, Mg and Si doped nanowires are investigated by µ-Raman spectroscopy with a spatial resolution of the order of 400 nm. These studies showed a strong polarization dependency of A1(TO) and EH2 phonon modes in agreement with selection rules. Moreover, the occurrence of an intense symmetry-forbidden LO mode was observed. The mode displays strong excitation wavelength dependency, which is pointing to a resonance enhancement. The effect of magnesium doping is a sharpening of the Raman peaks, while for silicon doping the LO phonon develops an asymmetric line shape with a pronounced low energy-tail of LO mode.Electrical measurements on a large number of single contacted nanowires of different dimensions have shown that the carrier transport mainly takes place in a tube-like surface electron gas. [3] For Si doped wires with a diameter larger than 100 nm a quadratic dependence of conduction on the diameter was found, which is attributed to bulk conductance as the main contribution. [4]This work was financially supported by the German Ministry of Education and Research project “EPHQUAM”. It was performed in part under the auspices of the U.S. Department of Energy, under contract No. DE-AC02-98CH1-886.[1] T. Stoica, R. J. Meijers, R. Calarco, T. Richter, E. Sutter and H. Lüth, Nano Lett. 6, 1541 (2006).[2] T. Richter, C. Blömers, H. Lüth, R. Calarco, M. Indlekofer, M. Marso and T. Schäpers, Nano Lett. 8, 2834 (2008).[3] T. Richter, Ch. Blömers, H. Lüth, R. Calarco, M. Indlekofer, M. Marso, Th. Schäpers, Nano Lett. 8, 2834 (2008).[4] T. Richter, H. Lüth, Th. Schäpers, R. Meijers, K. Jeganathan, S. Estévez Hernández, R. Calarco, M. Marso, Nanotechnology 20, 405206 (2009).

10:00 AM - P1.2

Structural and Electrical Properties of High Quality Narrow Diameter InN Nanowires.

Goutam Koley ¹, Zhihua Cai ¹, Ehtesham Quddus ¹
¹Electrical Engineering, University of South Carolina, Columbia, South Carolina, United States

InN is one of the most interesting materials among all group III-V nitrides for semiconductor device and sensor applications due to its direct band gap in the infrared range, smallest effective mass and highest electron drift velocity. Here we report on high-quality single crystalline InN nanowires synthesized by CVD technique. Growth rate as high as 30 µm/hour was achieved by the vapor-liquid-solid (VLS) mechanism in a horizontal tube furnace. The growth was performed on n+ Si (100) substrate with 100 nm thick SiO2 layer using 2 nm thick Au catalysts deposited by thermal evaporation. The optimum growth parameters reported are background pressure of 50 Torr, temperature of around 700 C and N2 and NH3 flow rates in the range of 60-100 sccm and 40-80 sccm, respectively. NH3 and N2 are passed through separate quartz tubes in order to prevent In vapors from pre-reacting with NH3. High quality single crystalline InN NWs were observed to grow along the plane of the substrate in the [110] direction and diameter and length varying in the range from 15 - 50 nm and 5-15 µm respectively. These NWs exhibited growth redirection either spontaneously defined as spontaneous bending, or when obstructed by barriers (InN NWs or patterned SiO2 barrier) called obstacle induced bending, at angles multiples of 30 degrees. The electrical properties of the NWs were also investigated by fabricating back gated (n+ Silicon substrate as back gate and 100 nm thick SiO2 as gate dielectric) field effect transistors (FETs).The Id-Vd and Id-Vg curves obtained for the device are shown in Fig. 5(a) and 5(b) respectively. The mobility and carrier density obtained from these I-V characteristics are >800 cm2/Vs and few times 10^18 cm-3 (mean values for more than 20 NW FET devices) are much higher than the previously reported measured data on InN NW FETs (mobility ~30 cm2/Vs and carrier concentration ~10^20 cm-3).In conclusion, high-quality and controlled growth of InN NWs have been presented. The NWs bent spontaneously, or were deflected by other NWs or patterned SiO2 barrier at angles multiples of 30 degrees. Also the excellent mobility and carrier density exhibited by the fabricated NW FET is a remarkable improvement. These demonstrations of the barrier induced growth redirection and the improved material property of the NWs can lead to the realization of controllable nanostructures that can be utilized as novel electronic devices and sensors.

10:15 AM - P1.3

InGaN/GaN Nanowire Heterojuctions and p-n Junction Diodes on Si (111) Substrate Grown by Catalyst-free Plasma-assisted Molecular Beam Expitaxy.

Wei Guo ¹, Meng Zhang ¹, Pallab Bhattacharya ¹
¹, University of Michigan, Ann Arbor, Michigan, United States

Future high-speed systems will require monolithic integration of electronic circuits and optoelectronic components on silicon substrates. One critical technology that is still missing is a highly reliable and electrically injected light source on a CMOS chip. This can potentially be achieved by monolithic integration of III-V devices on Si substrates. The progress, however, has been impeded by the generation of dislocations and antiphase domains at the III-V/Si misfit interface. Self-organized nanostructures, such as nanowires, could be grown on Si with defect-free. As one of the most important wide band-gap semiconductors, In(Ga)N nanowires are typically formed by metal-catalyzed vapor-liquid-solid growth process. However, the presence of metal catalyst can create deep level traps in nanowires, which is highly detrimental to device operation. Hence, catalyst-free nanowires grown on Si substrate are desired as a necessity.In the present study, catalyst-free nanowires were grown on Si (111) by plasma-assisted MBE using a radio frequency plasma source to activate the nitrogen. Unlike conventional III-nitride nanostructure growth, a few monolayers of gallium were first deposited onto the substrate and in the absence of N² plasma at 800 C. The InGaN and GaN nanowires were then grown in a highly N-rich ambience. In the case of InGaN/GaN heterostructure growth, the InGaN and GaN were grown alternatively to form nanowires containing InGaN/GaN quantum dot heterostructures. Core-shell nanowires were realized by in-situ annealing InGaN nanowires above the growth temperature at 800 C. Evaporation of indium atoms along the outer edge in the radial direction leads to the formation of In_xGa_1-xN/In_yGa_1-yN core shell nanowires (y〈x).Structural properties of the nanowires grown on Si were studied using SEM. High density GaN nanowires were realized with uniform diameter from 20 to 60nm, and they exhibit almost homogeneous height with tunablility from a few hundred nanometers to a few micrometers depending on the growth time. TEM study also shows that the nanowires are structurally uniform and free of dislocations. Diffraction pattern reveals that the entire wire is single crystal with wurtzite crystal structure. InGaN nanowires with core-shell structure and quantum dots are realized and demonstrated for the first time. The TEM study shows clear strain contrast between layers with different indium compositions. A blue-shift compared with bulk InGaN nanowires is also observed in the photoluminescence study from both heterostructures, which arise from low-dimensional quantum confinement. The electrical properties of the heterojunction between n-type GaN nanowires and p-type Si substrate were studied by applying p and n ohmic contacts on the nanowires and Si substrate. The results of electrically injected nanowire light emitting diodes (LEDs) on silicon substrate emitting at visible wavelengths will also be presented.

10:30 AM - P1.4

Nanoscale Effects on Heterojunction Electron Gases in Core/Shell Nanowires.

Bryan Wong ¹, Francois Leonard ²
¹Materials Chemistry Department, Sandia National Laboratories, Livermore, California, United States, ²Materials Physics Department, Sandia National Laboratories, Livermore, California, United States

10:45 AM - P1.5

Spatial Distribution of Luminescence and Strain-related Compositional Variation in III-Nitride Nanowires.

George Wang ¹, Qiming Li ¹
¹, Sandia National Laboratories, Albuquerque, New Mexico, United States

Given the strong interest in III-nitride-based nanowires for optoelectronic applications, a better understanding of their optical properties is required, particularly at nanoscale spatial resolutions, which could shed light into issues such as the nature and distribution of radiative defects and alloy compositional variations. Here, the spatial distribution of band-edge and defect luminescence in GaN, Al(Ga)N/GaN, and InGaN/GaN core-shell nanowires grown by metal-organic chemical vapor deposition was studied by high resolution cathodoluminescence (CL). For GaN nanowires, a surface layer exhibiting strong yellow luminescence (YL) near 566 nm in the nanowires was directly revealed by cross-section CL imaging, compared to weak YL in the bulk. In contrast, other defect related luminescence near 428 nm (blue luminescence) and 734 nm (red luminescence), in addition to band-edge luminescence (BEL) at 366 nm, were observed in the bulk of the GaN nanowires but were largely absent at the surface. As the nanowire width approaches a critical dimension, the surface YL layer completely quenches the BEL. The surface YL is attributed to the diffusion and piling up of mobile point defects, likely isolated gallium vacancies, at the surface during growth. AlGaN/GaN and AlN/GaN core-shell nanowires were observed to exhibit stronger BEL and weaker YL as compared with bare GaN nanowires, which may relate to the passivation of nanowire surface states. GaN/InGaN single shell and multi-quantum well core-shell nanowires were also investigated by spatially resolved CL and scanning TEM (STEM). The results reveal enhanced In incorporation at the nanowire vertices; 2D finite element strain models show that the strain in the InGaN layers is substantially reduced at the nanowire vertices, leading to the enhanced In incorporation. The results also show a strong dependence of InGaN shell layer growth rate on the GaN nanowire facet orientation. Sandia is a multiprogram laboratory operated by Sandia Corporation, a Lockheed Martin Company, for the United States Department of Energy under contract DE-AC04-94AL85000.

11:00 AM - P1: NW 1

BREAK

11:30 AM - P1.6

Wide Band Gap Semiconductor Nanowires for LED Applications.

Philippe Gilet ¹, Anne-Laure Bavencove ¹, Gabriel Tourbot ¹, Robin Thierry ¹, Pascal Marotel ¹, Bruno Daudin ³, Bruno Gayral ³, Francois Levy ¹, Emilie Pougeoise ¹, Pierre Ferret ¹, Guy Feuillet ¹, Le Si Dang ²
¹, CEA LETI Minatec, Grenoble France, ³INAC, CEA Minatec, Grenoble France, ²Institut Néel, CNRS and Université Joseph Fourier, Grenoble France

Wide-bandgap nanowires are considered as attractive building blocks for solid-state lighting applications. In this paper we present a study of GaN-based and ZnO-based nanowires for light emitting devices (LED) applications. Efficient integration of such one-dimensional semiconductor structures into LEDs requires deep investigation of their optical and electrical properties. Low temperature cathodoluminescence (CL) and photoluminescent (PL) spectroscopy measurements have been carried out to investigate the nanowires optical properties and have been compared to macroscopic electroluminescent (EL) spectra.GaN-based nanodiodes were grown on n-doped silicon (111) substrate by molecular beam epitaxy. The non-intentionally doped (NID) and n-type GaN parts present a strong and narrow excitonic peak emission at 357nm. Structural defects in the p-type GaN region are detected by the deep level emission of the yellow band centered around 580nm.Diode like I-V characteristics of single nanowires using atomic force microscopy in the conductive operating mode have been measured with a threshold voltage of about 2V and serial resistance (including resistance of AFM nanotip) of around 1e5ohms. n-type and p-type doping level evaluation (and carriers mobility) by field effect transistor (FET) measurements are currently under progress. Given the morphology of the p-type region grown at low temperature, autoplanarization process has been performed to obtain macroscopic LEDs (350µmx350µm). The later show rectifying I-V behaviour. In the presence of an AlGaN electron blocking layer (between the p-type region and the quantum wells), EL peak varying from 452 to 412nm has been measured by increasing the current injection from 10 to 100mA. This behaviour is attributed to the quantum confined Stark effect and is suggesting that electron-hole pairs mainly recombine into the InGaN/GaN wells.Concerning ZnO-nanowires based LED, the samples were grown by catalyst free MOCVD on sapphire substrates and As or P were used as p-type dopants. Room temperature I-V characteristic of the devices exhibits a diode like behaviour which unambiguously confirms the achievement of p-type doping in the nanowires. Light emission is clearly visible for low voltage bias (i.e. below 10V). The electroluminescence spectra indicate well resolved room temperature band edge emission at 385nm. Voltage threshold around 3V and serial resistance of 31ohms have been measured for a 350µmx350µm device. One band is present at lower energy but with much lower intensity and is attributed to the defect band of the material. PL and CL measurements will be compared to macroscopic electroluminescence spectra of integrated NWs in order to discuss about the specific signature of p-type doping. We dwell upon the local transport measurements carried out on single nanowire FET devices in order to measure the p-type doping concentration in the nanowires and precisely localize the p-n junction.

11:45 AM - P1.7

Emission Efficiency Enhancement of GaN-based Light-emitting Diodes with MBE Grown Nano-pillar Template Substrate by MOCVD.

Ching-Hsueh Chiu ¹, Zhen-Yu Li ¹, Po-Min Tu ¹, Da-Wei Lin ¹, Jet-Rung Chang ², Tsung-Hsi Yang ², Hao-Chung Kuo ¹, Tien-Chang Lu ¹, Shing-Chung Wang ¹, Chun-Yen Chang ²
¹Department of Photonics, National Chiao Tung University, Hsinchu Taiwan, ²Electronics Engineering, National Chiao Tung University, Hsinchu Taiwan

12:00 PM - P1.8

Nano Arrays of GaN Light-emitting Diode.

Keyan Zang ¹, Soo Jin Chua ¹
¹Materials Growth/Solid State Lighting, Institute of Materials Research and Engineering, Singapore, Singapore, Singapore

12:15 PM - P1.9

Single Nanowire Photodetectors Based on AlN/GaN Multi-quantum Disc Structures.

Andres De Luna Bugallo ¹, Lorenzo Rigutti ¹, Maria Tchernycheva ¹, Gwenole Jacopin ¹, Francois Julien ¹, Franck Fortuna ², Luiz Zagonel ³, Mathieu Kociak ³, Rudeesun Songmuang ⁴
¹Institut d' Electronique Fondamentale, University of Paris Sud XI, Orsay France, ²Centre de Spectroscopie Nucléaire et de Spectroscopie de Masse, University of Paris Sud 11, Orsay France, ³Laboratoire de Physique des Solides, University of Paris Sud 11, Orsay France, ⁴CEA-CNRS groupe "Nanophysique et semiconducteurs", Institut Néel, Grenoble France

III-N nanowires (NWs) are gathering a growing attention as key building blocks for the development of UV nanoscale optoelectronic devices. Their crystalline structure is dislocation-free, and the embedded heterostructures have higher critical thickness than their 2-dimensional counterparts, due to strain relaxation at sidewalls [1]. Their high surface-to-volume ratio strongly influences the carrier recombination dynamics [2], leading to considerably high photoconductive gain values [3]. All these properties can be exploited for fabricating efficient single-wire nano-photodetectors based on III-N heterostructures. We report on the photodetection properties of GaN NWs grown by plasma-assisted MBE on Si(111) substrates, containing a 20 period AlN/GaN multiple quantum disc (MQDisc) structure. The AlN barrier thickness is in the range tb=2–3 nm, while the GaN QDisc thickness is in the range td=1.5–4 nm. The MQDisc structure is embedded between two n+ GaN:Si regions. The total NW length is l~1.2 µm, with the diameter in the range d=25 – 50 nm. The structural and optical properties of dispersed NWs have been investigated by means of transmission electron microscopy (TEM), micro-photoluminescence (µ-PL) and cathodoluminescence (CL) spectroscopy. NW photodetectors were fabricated by means of electron-beam lithography, and their optoelectronic properties were characterized by current-voltage (IV) measurements and photocurrent (PC) spectroscopy in the temperature range T= 4 – 300 K. NWs from two different samples containing AlN/GaN MQDisc systems have been analyzed. In sample 1 the MQDisc is covered by a GaN shell, which is absent in sample 2. The resistance at 0 bias in sample 1 is R0=30 MΩ, between four and five orders of magnitude lower than in sample 2, indicating that the outer GaN shell provides a preferential conductive path. In sample 2 the electron flow passes through the MQDisc, giving rise to tunneling-related phenomena. Sample 2, indeed, exhibits negative differential resistance (NDR), hysteresis and bistability at T ≤ 150K. Illumination with UV light strongly enhances the current level and modifies the negative resistance behavior. The photoconductive gain is of the order of 104. The photoresponse is in both samples higher for light polarized along the NW axis. PC spectroscopy shows that photogenerated carriers originate from transitions taking place in binary GaN for sample 1, while a significant PC signal is found at E~3.0 eV in sample 2, related to e-h transitions involving states confined in the thicker QDiscs. The dependence of photocurrent intensity on the sign of the applied bias is asymmetrical, due to the band bending effect induced by the polarization discontinuity at each AlN-GaN interface. [1] F. Glas, Phys. Rev. B 74, 121302 (2006)[2] R. Calarco et al. Nano Lett. 5, 981 (2005)[3] R.S. Chen, et al., Appl. Phys. Lett. 91, 223106 (2007)

12:30 PM - P1.10

AFM Measurement of the Piezoelectric Properties of GaN and GaN/AlN/GaN Individual Nanowires.

Laurent Montes ¹, Xin Xu ¹, Jae Woo Lee ^{1 2}, Alexis Potie ^{1 3}, Bogdan Bercu ¹, Thierry Baron ³, Rudeesan Songmuang ⁴, Bruno Daudin ⁴
¹, IMEP-LAHC, UMR 5130 Grenoble INP/UJF/U.Savoie/CNRS, Grenoble France, ², Korea University, Seoul Korea (the Republic of), ³, LTM, UMR 5129, CNRS/UJF/Grenoble INP, Grenoble France, ⁴, I. Néel, UPR 5031, CNRS, Grenoble France

We report an innovative method for studying the electro-mechanical properties of GaN nanowires and GaN/AlN/GaN heterostructured nanowires using atomic force microscopy (AFM) with feedback loops and electrical modes. The AFM tip is used to apply a normal force on an as-grown vertical nanowire, thus deforming it in a lateral or vertical direction. Due to the piezoelectric properties of GaN, an electric potential appears in the deformed nanowire which generates a current passing through the AFM tip. This current is simultaneously measured by the AFM tip. We propose compensation and direct measurement methods for measuring the self-generated electrical potential of nanowires made of piezoelectric materials (such as GaN or ZnO) when they are deformed under local mechanical stress. In this way, we can know the resistance of the nanowire. For the compensation method, we measure through the AFM tip self-generated currents from GaN nanowires in closed loop. If an applied electrical potential equals the spontaneous electrical potential, there is no current in the closed-loop circuit. The current can be regarded as a compensated signal. For direct measurement method, we firstly estimate that the resistance of the GaN nanostructure is around 1MΩ. Consequently, in order to obtain an accurate measurement, high-impedance measurement is required in order to reduce the loss of a spontaneous electrical potential in the GaN nanostructure. A differential voltage-to-voltage amplifier with 100MΩ input impedance is used. The gain of the amplifier is set to 10. We have found that the maximum spontaneous electrical potential of a GaN nanowire can be as high as 150 mV. This value should be 30 times larger than the electrical potential generated by a ZnO nanowire. We also investigate the piezoelectric properties of GaN/AlN/GaN heterojunction nanowires. Additionally, in such heterojunction nanowire, the spontaneous electrical potential can be as high as 200mV and it is significantly different from that of a GaN nanowire. Given tip-sample force curves, the force applied by the tip and thus the mechanical stress induced in the nanowire can be precisely known and controlled. Given the self-generated electrical potential and current measurement results as well as the AFM tip-sample force curve, we can demonstrate the relationship between the electrical field that is generated by a nanowire and its deformation. Importantly, our experimental results allow us to estimate the piezoelectric voltage constant of the GaN nanowire to be around 6.52×10-4 Vm/N and that of GaN/AlN nanowire to be around 1.24×10-3 Vm/N. Our study also shows how these nanostructures can be used as transducer elements for NEMS applications or energy harvesting.

12:45 PM - P1.11

InGaN Nanowires for Solar Water Splitting.

Christopher Hahn ^{1 2}, Peidong Yang ^{1 2}
¹Chemistry, University of California Berkeley, Berkeley, California, United States, ²Materials Science Division, Lawrence Berkeley National Laboratory, Berkeley, California, United States

P2: III-V Nanowire Growth

Session Chairs

Heike Riel

Tuesday PM, April 06, 2010

Room 2016 (Moscone West)

2:30 PM - P2.1

Si/III-V Nanowire Heterostructures.

Moira Hocevar ^{1 2}, Rienk Algra ², George Immink ², Marcel Verheijen ², Leo Kouwenhoven ¹, Erik Bakkers ¹
¹Kavli Institute of Nanoscience, TU Delft, Delft Netherlands, ²Philips Research Labs, Philips, Eindhoven Netherlands

2:45 PM - P2.2

Crystal Structure Tuning in InAs Nanowires: Pure WZ, Pure ZB and Structural Superlattices.

Kimberly Dick ^{1 2}, Philippe Caroff ³, Jonas Johansson ¹, Maria Messing ¹, Jessica Bolinsson ¹, Knut Deppert ¹, Lars Samuelson ¹
¹Solid State Physics, Lund University, Lund Sweden, ²Polymer & Materials Chemistry, Lund University, Lund Sweden, ³Institut d'Electronique de Microélectronique et de Nanotechnologie, UMR CNRS 8520, Villeneuve d'Ascq France

Semiconductor nanowires composed of III-V materials such as InAs typically suffer from frequent stacking defects. Although most of these materials exhibit zinc blende (ZB) structure in bulk, nanowires may also be composed of the related wurtzite (WZ) structure. If nanowire growth is not carefully controlled, the resulting structure may consist of a mixture of these two phases, together with twin planes, stacking faults and other polytypes. Various theoretical and experimental works have indicated that uncontrolled structural mixing may be detrimental to electronic and optical properties, and structural variations due to random intermixing may lead to unacceptable variability in material properties. On the other hand, the ability to select between ZB and WZ and to mix these structures in a controlled way may give access to new and exciting physics and applications.In this presentation it will be demonstrated that the crystal structure of InAs nanowires grown using Au seed particles can be tuned between pure WZ and pure ZB by careful control of growth parameters. Structural variation can be induced using growth temperature, pressure, precursor molar fraction and V/III ratio, nanowire density and diameter, and exposure to trace impurity atoms. By precise control of all of these parameters, high-quality WZ and ZB structure can be achieved. It will also be demonstrated that structural superlattices composed purely of InAs can be produced. The influence of growth parameters on crystal structure can be explained in a consistent way by classical nucleation theory. Nanowires are understood to growth layer-by-layer with nucleation at the edge of the interface between the nanowire and Au seed particle. The edge energy of an InAs nucleus will then determine the favourable nucleation position, and through this the nanowire structure. Variations in the surface/edge energies induced by changes in growth parameters or introduction of impurities can then lead to variations in the observed structure. As well, a diameter dependence of crystal structure is expected as the surface area (edge length) increases with decreasing nanowire diameter. It will be shown that theoretical models accurately describe the experimental data.Finally, the effect of structural variation on electrical and thermal properties will be discussed, with examples of device applications considered.

3:00 PM - **P2.3

III-V Semiconductor Core-shell Nanowires Grown by Selective Area MOVPE and Their Device Applications.

Takashi Fukui ¹, Katsuhiro Tomioka ¹, Shinjiroh Hara ¹, Kenji Hiruma ¹, Junichi Motohisa ¹
¹, Hokkaido University, Sapporo Japan

Semiconductor nanowires have stimulated extensive interest in recent years because of their unique properties and potential applications as building blocks for nanoscale electronic and photonic devices. We report on the systematically controlled growth of GaAs and InP and related III-V compound semiconductor nanowire arrays by catalyst-free selective area metalorganic vapor phase epitaxy on partially masked (111) oriented substrates. First, we fabricated single GaAs/GaAsP coaxial core-shell nanowire lasers. Highly uniform GaAs/GaAsP coaxial nanowires were prepared. Photoluminescence spectra from a single nanowire indicate that the obtained heterostructures can produce near-infrared lasing under pulsed light excitation at 4.2K. Lasing wavelength is 816nm. The end facets of a single nanowire form natural mirror surface to create an axial cavity, which realizes resonance and give stimulated emission.We fabricated a photovoltaic device using the core–shell pn junction InP nanowire array on the p-type InP (111)A substrate. After nanowire growth, the space between nanowires was filled with a resin, and an ITO film electrode was then sputtered onto the nanowire array. A comb-shaped Ag electrode was also formed on the transparent ITO electrode. The backside electrode of the substrate was formed by alloying Au–Zn. Photovoltaic performance was measured under Air Mass 1.5 Global illumination. The device exhibited 0.43V of open circuit voltage, 13.72 mA/cm2 of short circuit current, and a fill factor of 0.57 for 3.38% overall efficiency.We also demonstrate vertical InAs and GaAs nanowire growth on Si (111) substrates by modifying initial Si (111) surface. To control the growth direction to vertical direction, we used the specific growth sequence. Typical InAs nanowire growth was carried out at 540 °C, and almost of all nanowires were controlled to vertical direction. We also grew GaAs nanowires on Si(111) substrates using similar method. Cross-sectional transmission electron microscope images showed that misfit dislocation with local strains was accommodated in InAs/Si interface, while no misfit dislocation was observed in GaAs/Si interface. Finally, we fabricated vertical surrounding-gate FETs (VSGFETs), using as-grown InAs NWs on a Si substrate. After the growth, Hafnium alminate was deposited as high-k gate dielectric, followed by the deposition of tungsten by plasma sputtering for gate metal. Then, drain and source metals were evaporated on the top of NWs and backside of the substrate, respectively. Fabricated VSGFET contained 50 NWs parallel in the channel. We observed n-type FET behavior in ID-VDS and ID-VG characteristics. The performances are threshold voltage ~ 0V, Gm,max = 0.26 mS, Ion / Ioff = 100, subthreshold slope, S = 1.87 V/decade.

3:30 PM - P2.4

Direct Integration of GaAs/GaAsSb Nanowires Grown by MBE on Si without Extrinsic Metal Particle.

Sebastien Plissard ¹, Philippe Caroff ¹, Kimberly Dick ², Xavier Wallart ¹
¹Materials and Nanostructures, EPIPHY group, IEMN, UMR CNRS 8520, Villeneuve d'Ascq France, ²Solid State Physics & The Nanometer Structure Consortium, Lund University, FTF, Lund Sweden

III-V nanowires have shown great promises in the recent years thanks to the ability to control their dimensions, position, doping and to design heterostructures, both axially and laterally. This make them ideally suited for fundamental transport physics studies and future electronic nanodevices.Few groups have already achieved steps toward the long-awaited material integration of III-V nanowires onto the well established Si platform, mostly using gold seed precursors and MOVPE. Gold is known to created mid-gap defects in Si, disastrous for the electronic properties of Si-based devices. The Fukui group (Hokkaido University) demonstrated very recently gold-free approach toward nanowire integration on Si, based on an oxide-assisted mechanism and electron beam lithography-defined patterns. This should provide a robust way toward the grail of combination of III-V optimal properties with low-cost and perfectly mastered Si substrates or devices. However some challenges remain. These include the wurtzite/zinc blende polytypism of these nanowires, detrimental for both the optical and electronic properties, and the un-clear role of the oxide played in the nucleation mechanisms of the nanowire growth.Here we show that solid source molecular beam epitaxy (SSMBE), known to provide the highest purity for grown semiconductors, is suitable for controlled growth of gold-free GaAs nanowires on Si, without use of any extrinsic metal particle or oxide. Transmission electron microscopy analyses reveal that these gold-seeded nanowires have a crystalline zinc blende or wurtzite structure with low stacking fault density. We achieve reproducible taper-free, tapered or inversely tapered nanowires with independent control of length and diameter. Such GaAs nanowire should find very interesting applications in photovoltaic and THz applications.The growth temperature and V/III ratio are found to be crucial to allow good yield of perfectly straight and epitaxial GaAs nanowires grown on Si substrates. Having optimized the yield of GaAs nanowires, we have designed growth studies to understand the mechanism leading to these well controlled nanowires. Finally first antimonide heterostructure in gold-free nanowires will be presented.

3:45 PM - P2.5

Influence of Silicon Doping on the SA-MOVPE of InAs Nanowires.

Kamil Sladek ¹, Andreas Penz ¹, Karl Weis ¹, Stephan Wirths ¹, Christian Volk ¹, Shima Alagha ¹, Masashi Akabori ^{2 1}, Steffi Lenk ¹, Martina Luysberg ³, Hans Lueth ¹, Hilde Hardtdegen ¹, Thomas Schaepers ¹, Detlev Gruetzmacher ¹
¹Institute of Bio- and Nanosystems (IBN-1), Forschungszentrum Juelich, Juelich Germany, ²Japan Advanced Institute of Science and Technology (JAIST), Center for Nano Materials and Technology (CNMT), Nomi Japan, ³Institute of Solid State Physics (IFF), Forschungszentrum Juelich, Juelich Germany

InAs nanowires are an attractive candidate for the realization of high-speed and low-power electronic devices due to the material's very high room temperature mobility. By reason of the surface Fermi level pinning the wires are expected to be conductive even without doping, since an electron accumulation layer is induced on the surface. Nevertheless the InAs nanowires are not as conductive as they were predicted to be. Reports on stacking faults [1, 2] and possible material contamination due to their fabrication process may be the reason. In this contribution, we have investigated the influence of Si-doping on the growth and material characteristics of InAs nanowires with the aim to improve their conductivity. The nanowires were deposited by selective area metal organic vapor phase epitaxy (SA-MOVPE) on (111)B GaAs masked substrates in holes with a diameter of about 50 nm. Growth was performed in nitrogen atmosphere according to [3] using trimethylindium (TMIn), arsine (AsH₃) and disilane (Si₂H₆) as the sources. In order to achieve different doping levels the Si₂H₆/TMIn partial pressure ratio was varied from 0 to 3.8×10^-2. The samples were characterized structurally by transmission and scanning electron microscopy. We observed that above a certain partial pressure ratio, doping has an influence on the morphology. The nanowires exhibit better uniformity but decreasing height vs. diameter aspect ratio as the partial pressure ratio increases. The electrical characterization was performed in a 2-terminal as well as in a 4-terminal configuration. It was found that the specific conductance increases with increasing partial pressure ratio. Moreover our electrical measurements showed a transition from semiconducting to metallic behavior in the case of highly doped nanowires.[1] K. Tomioka, J. Motohisa, S. Hara, and T. Fukui, Jpn. J. Appl. Phys. 46, L1102 (2007).[2] H. Paetzelt, V. Gottschalch, J. Bauer, G. Benndorf, and G. Wagner, J. Cryst. Growth 310, 5093 (2008).[3] M. Akabori, K. Sladek, H. Hardtdegen, T. Schäpers, and D. Grützmacher, J. Cryst. Growth 311, 3813 (2009).

4:00 PM - P2: NW

BREAK

P3: III-V Nanowires - Growth and Devices

Session Chairs

Heike Riel

Tuesday PM, April 06, 2010

Room 2016 (Moscone West)

4:30 PM - **P3.1

Development of Compound Nanowire Structures for Device Applications.

Claes Thelander ¹
¹Solid State Physics, Lund University, Lund Sweden

5:00 PM - P3.2

Crystal Phase Quantum Dots.

Nika Akopian ¹, Gilles Patriarche ², Linsheng Liu ², Jean-Christophe Harmand ², Val Zwiller ¹
¹Quantum Transport, TU Delft, Delft Netherlands, ²Laboratoire de Photonique et de Nanostructures, CNRS, Marcoussis France

5:15 PM - P3.3

Room-temperature Coulomb Staircase in Semiconducting InP Nanowires Modulated with Light Illumination.

Hidenori Yamada ¹, Toshishige Yamada ^{2 3}, Andrew Lohn ^{3 4}, Nobuhiko Kobayashi ^{3 4}
¹, UC Berkeley, Berkeley, California, United States, ², Santa Clara Univ, Santa Clara, California, United States, ³, UC Santa Cruz, Santa Cruz, California, United States, ⁴, ASL, UC Santa Cruz and NASA Ames Res Ctr, Moffett Field, California, United States

Detailed electron transport analysis is performed for an ensemble of indium phosphide nanowires (InP NWs) bridging two hydrogenated n⁺-silicon electrodes [1]. The nanowires are cone-shaped, with a base diameter of ~ 0.5 μm and a length of several μm. The current-voltage (I-V) characteristics exhibit a Coulomb staircase [2] in dark with a period of ~ 1 V at room temperature. The staircase is found to disappear under light illumination. This observation can be explained by assuming the presence of a tiny Coulomb island, and its existence is possible due to the large surface depletion region created within contributing nanowires. Electrons tunnel through the Coulomb island, resulting in the Coulomb staircase I-V. Applying light illumination raises the electron quasi-Fermi level and the tunneling barriers are buried, causing the Coulomb staircase to disappear. We realize the following: (i) If InP NWs are unintentionally doped as for bulk InP at level of n ~ 10¹⁵ cm^-3 the surface depletion region is expected to be as wide as 0.3-1 μm, completely depleting the region near the tip of a NW. Therefore, there should exist a mechanism (kinetic or thermodynamic) that should increase the electron carrier density. (ii) There should be two tunneling barriers present along the conducting route in fused InP NWs, which can be expressed by two series-connected capacitors with capacitance values of 0.1 aF. The size of the tunneling barriers is estimated to be a 1-2 nm³ cube. Because of (i), it is highly likely that these small capacitances are associated with the region at which a pair of NWs are fused. (iii) Although there are multiple InP NW pairs connecting the two Si:H electrodes, only the pair that has the lowest tunneling resistance sensitively depending on the barrier widths is expected to determine the entire electrical characteristics. (iv) Under illumination with light intensity 0-5 μW in the experiment, the electron quasi-Fermi level rises by 25-85 meV, and as a result the Coulomb staircase. Thus, the effective height of the tunneling barriers should be comparable to the range within which the electron quasi-Fermi level is modulated by the illumination. ¹N. P. Kobayashi, Logeeswaran VJ, M. S. Islam, X. Li, J. Straznicky, S.-Y. Wang, R. S. Williams, and Y. Chen, Appl. Phys. Lett. 93, 113116 (2007). ²T. Yamada, Chapter 7, "Nanoelectronics Applications" in Carbon Nanotubes ed. M. Meyyappan, (CRC, Boca, Raton, 2004).

5:30 PM - P3.4

Polarization Dependent Photoluminescence Study of InP Nanowires.

Lei Fang ¹, Xianwei Zhao ¹, Dongkyun Ko ¹, Fengyuan Yang ¹, Ezekiel Johnston-Halperin ¹
¹Physics, The Ohio State University, Columbus, Ohio, United States

5:45 PM - P3.5

Semiconductor-ferromagnet Core-shell Nanowires Grown by Molecular Beam Epitaxy.

Maria Hilse ¹, Yukihiko Takagaki ¹, Jens Herfort ¹, Manfred Ramsteiner ¹, Claudia Herrmann ¹, Steffen Breuer ¹, Lutz Geelhaar ¹, Henning Riechert ¹
¹, Paul-Drude-Institut für Festkörperelektronik, Berlin Germany

A crucial advantage of nanowires (NWs) is that both axial and radial heterostructures can be grown within these nanostructures. Thus, entire device structures can be fabricated within a single nanowire. When a ferromagnet is incorporated into these heterostructures, spin-dependent functionalities can be introduced to NW devices. MnAs is one of the attractive materials for spintronics applications as the Curie temperature (about 40 °C) is above room temperature. In this study, semiconductor-ferromagnet core-shell NWs were realized by depositing MnAs layers wrapped around GaAs NWs. The GaAs NWs were grown by molecular beam epitaxy (MBE) using the Au-assisted vapor-liquid-solid mechanism on GaAs(111)B substrates. The average diameter of the nanowires was 26 nm, and their average length 1.7 µm. They had the wurtzite structure and were epitaxially oriented to the substrate. Subsequently, MnAs was deposited under the typical conditions for planar growth on GaAs. While the nanowire length remained almost unchanged, the radius increased by 20% of the nominal thickness of a planar MnAs layer that would have grown in the same time. The reduced growth rate in the radial direction was caused by geometry and showed that Mn was directly deposited on the NW sidewalls. The cross section of the nanowires was hexagonal. Since MnAs has a hexagonal crystal structure, this observation indicated that the c-axis was oriented along the NW axis. By taking into account the lattice mismatch MnAs-GaAs and the NW facet alignment with respect to the substrate orientations, we deduced that the MnAs shell facets were most likely (1-100), i.e. m-plane or possibly (1-101) oriented. The magnetic properties of the GaAs-MnAs core-shell nanowires were studied with a superconducting quantum interference device (SQUID) magnetometer. The nanowires exhibited hard-axis behaviour when the external field was applied normal to the substrate. This measurement confirmed that the c-axis of the MnAs shell was aligned along the nanowire axis, because the hard axis of MnAs is oriented in the c-direction. Magnetic force microscopy of dispersed NWs showed that the magnetic easy axis was perpendicular to the nanowire axis, which is also in accord with the c-direction of MnAs being along the nanowire axis. The saturation magnetization was at 10 K 400-500 emu/cm^3, which is a reasonable value for MnAs. Temperature-dependent magnetization measurements proved that the Curie temperature was not degraded by the NW geometry. Very interestingly, the phase transition was abrupt, i.e. bulk-like for a thick (~43 nm) MnAs shell but smooth, i.e. thin-film-like for a thin (~13 nm) shell. The smooth transition for thin shells and planar films is caused by the GaAs-induced strain. The above difference implied that the thick MnAs shell imposed its lattice constant on the GaAs core, which is only possible due to the special NW geometry and has not been observed for thin films on a rigid planar substrate.

P4: Poster Session: Nanowire

Session Chairs

Theresa Mayer

Michael McAlpine

Heike Riel

Margit Zacharias

Tuesday PM, April 06, 2010

Exhibition Hall (Moscone West)

6:00 PM - P4.1

New Approaches in Design of Photovoltaic Cells Exploiting Arrays of Sensitized ZnO Nanowires.

Zhenhua Chen ¹, Hong-en Wang ¹, Chaoping Liu ¹, Yongbing Tang ¹, Ofeksandr Kutsay ¹, Igor Bello ¹, Chun-Sing Lee ¹, Shuit-Tong Lee ¹
¹Department of Physics and Materials Science, City University of Hong Kong, Hong Kong China

6:00 PM - P4.12

Nucleation Kinetics of Epitaxial and Non-epitaxial Si Nanowire Growth.

Xueni Zhu ¹, Ken Ogata ¹, Stephan Hofmann ¹, William Milne ¹
¹Department of Engineering, University of Cambridge, Cambridge United Kingdom

6:00 PM - P4.13

Field-effect Transistors Fabricated using Silicon Nanowires Prepared by Metal-catalysed Wet-chemical Etching.

Michal Zaremba-Tymieniecki ¹, Chuanbo Li ¹, Kristel Fobelets ¹, Mino Green ¹, Zahid Durrani ¹
¹Electrical and Electronic Engineering, Imperial College London, London United Kingdom

Silicon nanowires (SiNWs) are highly promising materials for nanoscale field-effect transistor, molecular sensor, solar-cell and thermoelectric applications^1-3. Si nanowires may be prepared by ‘bottom-up’ material synthesis techniques such as vapour-liquid solid growth, oxide-assisted growth, or by ‘top-down’ high-resolution lithographic techniques. Si nanowires may also be prepared by a metal-catalysed chemical etching process, without the need for lithographic or epitaxial techniques.In this work, we discuss the fabrication and electrical characterisation of SiNW field effect transistors (FETs) using single, highly-doped, p-type NWs. The NWs were fabricated using a metal-catalysed chemical etching process that allows for rapid, low-cost fabrication of large numbers of long (~300 μm) NWs, with controlled doping levels.The etching process uses a Si wafer, heavily-doped p-type with resistivity ~0.01 Ωcm. Here, a Si sample is immersed in a HF/AgNO₃ solution. The etching process involves the deposition of a network of nanoscale Ag dendrites on the Si surface. This acts as a catalyst for the etching of an array of SiNWs underneath, via an electrochemical ‘redox’ reaction. Finally, all remaining Ag is removed using nitric acid.Scanning electron microscopy of the SiNW array shows vertical NWs with packing density ~10⁹ /cm². Transmission electron microscopy of individual NWs shows that they consist of a ~30-200 nm diameter crystalline core, covered by amorphous shells ~10-50 nm in thickness. The NW diameter/length ratio is extremely high, up to 1:1500.We fabricated FETs on individual NWs as follows. The NWs are transferred from the etched sample into isopropyl alcohol by ultrasonic agitation, and then dispersed onto a SiO₂-on-Si wafer by evaporation of the solution. Individual NWs are selected for device fabrication using optical lithography. We develop successfully a titanium silicide contact formation process for SiNWs, using thermal evaporation and high-temperature (700°C) rapid thermal annealing. An Al capping layer is used to improve the contact. Four-terminal and transmission-line measurements are used to estimate the NW resistivity, ρ ~ 0.03 Ωcm. We measure Ids-Vds and Ids-Vgs characteristics for the SiNW FET using the underlying substrate as a back-gate. The device is operated in depletion-mode. The field-effect hole mobility μ_h, estimated using a simple long-channel MOSFET approximation and including the effect of parasitic resistances, is μ_h ~ 2 cm²/Vs. This is ~10 times lower than the ideal hole mobility for a corresponding Si wafer of the same resistivity.1. Y. Cui, Z. Zhong, D. Wang, W. U. Wang, and C. M. Lieber, Nano Letters 3, 149 (2003).2. Jiansheng Jie, Wenjun Zhang, Kuiqing Peng, Guodong Yuan, Chun Sing Lee, and Shuit-Tong Lee, Advanced Functional Materials 18, 3251 (2008).3. Allon I. Hochbaum, Renkun Chen, Raul Diaz Delgado, Wenjie Liang, Erik C. Garnett, Mark Najarian, Arun Majumdar, and Peidong Yang, Nature 451, 163 (2008).

6:00 PM - P4.14

Ensemble Effects on the Optical Properties of Indium Phosphide Nanowires at Various Temperatures.

Andrew Lohn ^{1 2}, Milo Holt ^{1 2}, Noel Dawson ^{1 2}, Nobuhiko Kobayashi ^{1 2}
¹Baskin School of Engineering, University of California Santa Cruz, Santa Cruz, California, United States, ²Nanostructured Energy Conversion Technologies and Research (NECTAR) of Advanced Studies Laboratories (ASL), NASA AMES Research Center, Moffett Field, California, United States

Optical devices such as photodetectors and solar cells utilizing nanowires as the optically active material are becoming interesting alternatives to traditional thin-film technologies. Many of these devices will need to employ ensembles of nanowires but the majority of reports on optical characterization still focus on nanowires in isolation despite the fact that the effects inherent to ensembles, particularly those prepared on amorphous substrates, are of our interests. We used a quartz substrate for the growth of indium phosphide (InP) nanowires by metal-organic chemical vapor deposition. A hydrogenated microcrystalline silicon (mc-Si:H) layer that acts as a template, was deposited on the quartz and formed the base on which the nanowires were grown. InP nanowires having either zincblende (ZB) or wurtzite (WZ) crystal structures coexist in the samples. The lack of long-range atomic order in the Si:H resulted in nanowires randomly oriented with respect to the surface normal of the quartz substrate and in combination with the large areal density frequently led to physical interaction between neighboring nanowires. Micro-photoluminescence (µ-PL) and micro-Raman were used to study the optical properties of ensembles of InP nanowires at various cryogenic temperatures. The µ-PL spectra showed rich spectroscopic features due to the presence of the two types of crystal structures, random growth orientation, shape, size of the nanowires and physical interactions among the nanowires. The µ-PL spectra were deconvoluted into five peaks attributed to emission from: excitons in bulk, quantum-confined (QC) WZ band-edge, QC ZB band-edge, QC ZB excitons and an impurity state. The temperature dependence of emission wavelength for the five mechanisms was observed to follow the Varshni equation with the exception of the QC WZ band-edge which only weakly varied with temperature. Further study analyzed each peak’s contribution to the total intensity as a function of temperature from which a unique energy transfer mechanism is proposed to explain variation in intensity of the QC ZB band-edge and QC ZB exciton peaks with changing temperature. Raman spectra were collected from the ensemble of InP nanowires in both the ZB and WZ crystal structures co-existing in an ensemble. The Raman spectra are particularly rich because no modes are symmetry forbidden for an ensemble of nanowires randomly oriented. The longitudinal optical (LO) and transverse optical (TO) components were identified for the ZB crystal and the six Raman modes of the WZ crystal were related to the ZB modes by folding the ZB phonon dispersion along [111] to approximate that of WZ along [0001]. Observation of similar vibrational frequencies in ZB and WZ was attributed to their structural similarity. The optical properties of nanowires are much more complicated in ensembles than in isolation. This study progresses our understanding of the effect of ensembles on the optical properties of nanowires.

6:00 PM - P4.15

Effects of SiCl₄/H₂ Ratio and Growth Pressure on Tapering and Vertical Alignment of Si Nanowires.

Sergiy Krylyuk ¹, Albert Davydov ¹, Igor Levin ¹
¹, NIST, Gaithersburg, Maryland, United States

Tapered silicon nanowires (SiNWs) are promising candidates for numerous device applications including field emitters, tip-enhanced Raman (TERS) and electromagnetic sensors, nanomanipulation tools, etc. Therefore, reliable technological approaches for fabricating SiNW arrays with controlled tapering have to be developed. Silane-based CVD process is problematic for fabrication of vertically aligned NW arrays and often results in formation of detrimental polycrystalline silicon layer. These drawbacks can be avoided by using SiCl₄ precursor instead of SiH₄. Earlier studies showed that the degree of tapering for the SiCl₄-grown SiNWs is governed by the interplay between the catalyzed vapor-liquid-solid (VLS) and uncatalyzed vapor-solid (VS) growth mechanisms. Therefore, establishing the growth conditions that promote one of these paths for Si deposition is important for obtaining vertically-oriented arrays of SiNWs with controlled tapered morphology.In this contribution, Au nanoparticles-catalyzed SiNWs were grown at 800 °C – 900 °C and a reactor pressure of 300 Torr - 700 Torr using SiCl₄/H₂/N₂ mixtures. Tapering of SiNWs due to uncatalyzed silicon deposition on the wire sidewalls, i.e. radial growth of NWs, was studied as a function of SiCl₄/H₂ molar ratio, gas flow rate, and growth pressure. We found that the radial growth rate of SiNWs can be enhanced in several ways: by lowering SiCl₄/H₂ molar ratio, applying higher gas flow rate, or reducing growth pressure. The axial growth rate of SiNWs exhibited a non-monotonic dependence on the SiCl₄ molar fraction and decreased at lower growth pressures. Distinct dependences of the axial and radial growth rates on the process conditions were used to produce SiNWs with a tapering degree (i.e. a ratio of the radial/axial growth rates) varying by more than an order of magnitude. The results were explained by an interplay between the thermodynamic and kinetic effects on the vertical and radial growth rates. Growth conditions leading to a large tapering of SiNWs due to high radial growth rates severely deteriorate vertical alignment of the NWs with respect to the Si(111) substrate. The established correlations between the SiCl₄/H₂ molar ratio and vertical alignment of nanowires were used to develop a two-stage growth procedure for producing tapered SiNWs with a predominantly vertical orientation.

6:00 PM - P4.16

Epitaxial Growth of Horizontally Aligned Zinc Oxide Nanonecklace Arrays on R-plane Sapphire.

Xin Sun ¹, Jian Shi ¹, Hao Li ¹
¹Mechanical and Aerospace Engineering, University of Missouri-Columbia, Columbia, Missouri, United States

6:00 PM - P4.17

Nanoscale Imaging of ZnO Nanowires and Their Chemical Reactions.

Robert Shaw ¹, K. Meyer ¹, K. Ng ², W. Whitten ¹
¹Chemical Sciences Division, Oak Ridge National Laboratory, Oak Ridge, Tennessee, United States, ²Department of Chemistry, California State University - Fresno, Fresno, California, United States

6:00 PM - P4.18

Strain-versus-Dislocation Model for Understanding the Heteroepitaxial Growth of Nanowires.

Jian Shi ¹, Xudong Wang ¹
¹Materials Science and Engineering, University of Wisconsin-Madison, Madison, Wisconsin, United States

6:00 PM - P4.19

Aligned Silicon Nanowire-polymer Composites for Transparent and Non-planar Electronics.

Kwangsoo Son ¹, Dong Hyun Lee ¹, Won Il Park ¹
¹Material Science and Engineering, Hanyang Univ., Seoul Korea (the Republic of)

A new concept of electronics implemented on uneven, three-dimensionally curved surfaces can provide the significant opportunities to develop new types of device applications ranging from bio-inspired optoelectronics to nano-bio interfacing. Meanwhile, most of current electronic and optoelectronic devices are fabricated on planar substrates, mainly due to the difficulty in fabricating exquisite patterns on non-planar, curved surfaces. An alternative method for overcoming the limitation of current rigid and planar electronic systems utilizes the flexible electronic components, such as organic semiconductors, deposited on foldable substrates. However, this approach can only be applied to the elastomeric substrates that can be transformed to planar configuration by an external tension and restored to original shape upon release the load, and thus it cannot be applicable universally to more complex, arbitrary-shaped curvilinear surfaces. Moreover, organic semiconductor films exhibit low carrier mobility due to the scattering caused by defects, such as grain boundaries in the materials, and thus thin-film devices have poor electrical characteristics. Here we introduce a general strategy for the fabrication of electronic devices on three-dimensional objects by use of inorganic single crystalline materials embedded in flexible organic matrixes. In our approach, the inorganic-organic composites were synthesized by sandwiching the uniformly aligned silicon nanowires (SiNWs) between thin polymer layers, and then transferred to other substrates with various surface morphologies. Especially, the use of photo-sensitive films, such as photoresist or e-beam resist, as the polymer matrix led to the direct pattering of submicrometer features on curved surfaces, which, combined with hybridizing SiNW-polymer composite, enables the formation of non-planar SiNW device arrays. We further fabricated fully transparent thin-film transistors (T-TFTs) by implementing the aligned SiNWs and Ga-doped ZnO thin films as transparent channels and transparent conducting electrodes, respectively. The SiNWs aligned on the glass substrates are highly transparent in the visible spectral range, with a transmittance of ~90 % for the NW density of ~2−3 µm-1. Gate dependent transport measurements demonstrated that the boron-doped SiNW devices behaved as p-type TFTs with good characteristics in terms of transconductance and switching behavior.

6:00 PM - P4.2

Improved p-type Electrical Properties of Ag Doped ZnTe Nanowires.

Cao Yulin ¹, Lee Chun-Sing ¹
¹Department of Physics and Materials Science, City University of Hong Kong, Hong Kong China

6:00 PM - P4.20

Phonon Transport in Integrated Silicon Nanowires.

Baoling Huang ¹, Renkun Chen ¹, Karma Sawyer ¹, Kedar Hippalgaonkar ¹, Arun Majumdar ¹
¹Mechanical Engineering, UC Berkeley, Berkeley, California, United States

6:00 PM - P4.21

First-principles Study of the Electronic Properties of Silicon/Germanium Nanowires.

Matthew Shelley ¹, Fabiano Corsetti ¹, Arash Mostofi ¹
¹Department of Materials (The Thomas Young Centre), Imperial College London, London United Kingdom

6:00 PM - P4.22

Controlled Si Nanowire Oxidation and Silicidation.

Ken Ogata ¹, Toru Iijima ², Bongyong Jang ², Yasuhiko Hayashi ², Alan Colli ⁴, Tomoharu Tokunaga ³, Xueni Zhu ¹, Shu-Pei Oei ¹, Stephan Hofmann ¹
¹Engineering, University of Cambridge, Cambridge United Kingdom, ²Frontier Materials, Nagoya Institute of Technology, Nagoya Japan, ⁴Nokia Research Centre / Nanoscience Centre, University of Cambridge, Cambridge United Kingdom, ³Quantum Engineering, Nagoya University, Nagoya Japan

6:00 PM - P4.24

Electrochemical Synthesis and Characterization of Cuprous Oxide Semiconductor Nanowires for Photovoltaic and Photoelectrochemical Applications.

Tyler Matthews ^{1 2}, Alvin Tang ¹, Ramamoorthy Ramesh ¹, Joel Ager ², Junqiao Wu ^{1 2}
¹Materials Science and Engineering, University of California at Berkeley, Berkeley, California, United States, ²Materials Science Division, Lawrence Berkeley National Laboratory, Berkeley, California, United States

Research into semiconductor nanowires has experienced tremendous growth over the past decade owing to their great promise for a variety of applications, including photovoltaics, thermoelectrics, chemical sensing, and nanoelectronics, among others. The use of anodic aluminum oxide (AAO) template masks for the growth of nanowire arrays offers a number of distinct advantages over catalyst-assisted nanowire growth. The diameter, highly-ordered spacing, and length of the AAO nanopores can easily be controlled through careful choice of anodization conditions. The resultant amorphous alumina mask is highly insulating, allowing for the electrochemical deposition of materials that cannot be grown using traditional vapor phase deposition. Selective etching of the alumina layer is readily achieved, either partially or completely, exposing the nanowires for further processing after growth. In this way, a systematic study of nanowire array dimensions can be achieved for a number of device applications by simply tuning the AAO processing conditions. In this work we produce Cu2O nanowire arrays using the AAO template method for photovoltaic applications. Cuprous oxide (Cu2O) is a p-type semiconductor with a band gap of ~2 eV. The theoretical maximum efficiency for this bandgap is around 19%; however, the best efficiency obtained for thin film Cu2O p-n junctions is 2%, perhaps owing to the typically low carrier diffusion length in this system. The availability, cost of production, and environmentally-friendly nature of Cu2O makes it an attractive system for further efficiency optimization. The simplest method for producing thin film Cu2O photovoltaic devices is via the thermal oxidation of polished copper sheets. Owing to the low mobilities in these systems, photoexcited charge carriers need to be collected close to the charge-separation interface. To improve upon this collection mechanism we have grown vertically-aligned Cu2O nanowire arrays via electrochemical deposition through AAO template masks. Surrounding the nanowire arrays with an n-type transparent conducting oxide produces a photovoltaic device. The device characteristics are then compared to traditional thin-film Cu2O systems for a number of array dimensions.

6:00 PM - P4.28

Use of Group IV and III-V Semiconductors for Solar Fuels Production.

Nicholas Strandwitz ¹, Gregory Kimball ¹, Nathan Lewis ¹
¹, California Institute of Technology, Pasadena, California, United States

6:00 PM - P4.29

Ultraviolet Photodetector Made From P-type ZnO:Sb Nanowires.

Jyh Ming Wu ¹, Chiung-Wan Fang ², Lin-Tsang Lee ², Hsien-Hsin Yeh ³, Yu-Hung Lin ⁴
¹Department of Material Science and Engineering, , Feng Chia University, , Taichung Taiwan, ²Department of Applied Mathematics, National Chung-Hsing University, Taichung Taiwan, ³Material and Chemical Research Laboratories, Industrial Technology Research Institute, HsinChu Taiwan, ⁴Department of Materials Science and Engineering, National Tsing Hua University, HsinChu Taiwan

6:00 PM - P4.3

Photoluminescence Properties of Silicon Nanowires Produced by Wet Chemical Etching Using Varying Etching Conditions (Times, Temperatures).

Felix Voigt ^{1 2}, Gottfried Bauer ², Vladimir Sivakov ¹, Andreas Berger ^{1 3}, Silke Christiansen ^{1 3}
¹, Institute of Photonic Technology, Jena Germany, ²Institute of Physics, Carl-von-Ossietzky University, Oldenburg Germany, ³, Max Planck Institute of Microstructure Physics, Halle Germany

6:00 PM - P4.30

Tuning the Thermal Conductivity of InAs Nanowires With Carrier Density.

Mandar Deshmukh ¹, Sajal Dhara ¹, Hari Solanki ¹, Arvind Ravikumar ¹, Vibhor Singh ¹, Arnab Bhattacharya ¹
¹Department of Condensed Matter Physics and Material Science, Tata Institute of Fundamental Research, Homi Bhabha Road, Colaba, Mumbai, Maharashtra, India

6:00 PM - P4.31

Three-dimensionally Directional Growth of Semiconductor Nanowires.

Geunhee Lee ¹, Yun Sung Woo ¹, Gil-Sung Kim ¹, Donghun Lee ¹, Kibum Kang ¹, Cheol-Joo Kim ¹, Moon-Ho Jo ^{1 2}
¹Materials Science and Engineering, POSTECH, Pohang, Gyungbuk, Korea (the Republic of), ²Graduate Institute of Advanced Materials Science, POSTECH, Pohang, Gyungbuk, Korea (the Republic of)

6:00 PM - P4.33

ZnO Nanowire Light-emitting Diodes Fabricated by Dielectrophoresis Technique on a Flexible Plastic Substrate.

Kwangeun Kim ¹, Myeongwon Lee ¹, Jeongmin Kang ¹, Changjoon Yoon ¹, Sangsig Kim ^{1 2}
¹Department of Electrical Engineering , Korea University, Seoul Korea (the Republic of), ²Department of Nano Semiconductor Engineering, Korea Unversity, Seoul Korea (the Republic of)

6:00 PM - P4.34

Asymmetric Electrical Contacts of SnO2 Nanowire Device Consistently Analyzed by AC and DC Characterization.

Junghwan Huh ^{1 2}, Junhong Na ^{1 2}, Yonha Kim ¹, Jeong Sook Ha ³, Sangtae Kim ², Gyu Tae Kim ¹
¹Electrical Engineering, Korea University, Seoul Korea (the Republic of), ²Department of Chemical Engineering and Materials Science, University of California Davis, Davis, California, United States, ³Department of Chemical and Biological Engineering, Korea University, Seoul Korea (the Republic of)

6:00 PM - P4.35

Germanium Nanowires Below 20nm in Diameter: Structure and Mechanical Properties.

Dorothee Almecija ^{1 3}, Gillian Collins ^{2 3}, Markus Boese ³, John Sader ⁴, Justin Holmes ^{2 3}, John Boland ^{1 3}
¹School of Chemistry, Trinity College Dublin, Dublin Ireland, ³, Centre for Research on Adaptive Nanostructures and Nanodevices, Dublin Ireland, ²Department of Chemistry, University College Cork, Cork Ireland, ⁴Department of Mathematics and Statistics, University of Melbourne, Melbourne, Victoria, Australia

6:00 PM - P4.36

Anomaly Enhancement of the Magnetoresistance and Magnetothermopower in Semiconductor Wires Bi_1-x Sb_x.

Albina Nikolaeva ^{1 2}, Pavel Bodiul ¹, Leonid Konopko ^{1 2}, Eugen Moloshnik ¹, Ivan Popov ¹
¹, Institute of Electronic Engineering and Industrial Technology, Chisinau Moldova (the Republic of), ², International Laboratory of High Magnetic Fields and Low Temperatures, Wroclaw Poland

6:00 PM - P4.37

Electrical Characterization of Phosphorus Doped Silicon Nanowires.

Jose Alvarez ¹, Irene Ngo ¹, Marie-Estelle Gueunier-Farret ¹, Jean-Paul Kleider ¹, Simon Perraud ², Christine Morin ², Pascal Faucherand ², David Kohen ², Michel Levis ², Caroline Celle ², Celine Mouchet ², Emmanuelle Rouviere ², Jean-Pierre Simonato ²
¹, Laboratoire de Genie Electrique de PAris, CNRS UMR8507, Gif-sur-Yvette France, ², CEA, Laboratoire des Composants pour la Récupération d’Energie, Grenoble France

6:00 PM - P4.38

Recrystallization, Strain and Charge Transport in Ion Implanted Nanowires Patterned on Strained SOI.

Renato Minamisawa ¹, Stefan Habicht ¹, Dan Buca ¹, Reinhard Carius ², Stefan Trellenkamp ¹, Bruno Ghyselen ³, Siegfried Mantl ¹
¹Institute of Bio and Nanosystems (IBN-1), Forschungszentrum Juelich, Juelich, NRW, Germany, ²Institute of Energy Research (IEF), Forschungszentrum Juelich, Juelich, NRW, Germany, ³, SOITEC, Bernin France

Strained Si nanowires (sSi NW) on insulator are attractive for deeply-scaled CMOS devices since the advanced material shows enhanced carrier mobility, and combined with gate all around, optimal electrostatic gate control can be achieved. However, the integration difficulty of strained Si NWs resides in a precise control of the processing technique in order to conserve the essential property of this material: the elastic strain. Critical issues are wire patterning and source/drain formation through ion implantation and annealing. The capability to simultaneously dope and conserve strain in ion implanted sSi NWs is still a key requirement to maintain the strain benefits, particularly, in short channel devices. In this work we report the effects of As+ ion implantation and annealing on the strain relaxation and resistivity of different types of sSi NWs. Wires with diameter down to 35 nm and implantation dose ranging from 5E14 to 2E15 cm-2 are investigated. A detailed comparison between SSOI layers, NWs patterned on doped layers and, directly doped NWs, is performed in order to determine the influence of processing on the wires structural and electrical properties. Pseudomorphic epitaxial regrowth, meaning full strain recovery, is observed for 25 nm SSOI layers independent of the implanted dose, in the investigated range. However, for the implanted NWs only for low As+ implantation dose total relaxation can be avoided. The change in the wire resistivity with the decrease of the NWs width is explained by uniaxial strain relaxation and dielectric confinement effect. In the latter case, dielectric confinement increases the dopant ionization energy inducing dopant deactivation, and decreases the effective conduction cross section of the nanostructures. This effect is reduced if high implantation doses are used. We show that strain conservation and low sheet resistivity close to the specific resistivity of a doped SSOI layer can be obtained only if the NWs are patterned from doped layers. Using this approach, we obtained 35 nm wide strained Si NWs patterned on 25 nm thin SSOI layer doped up to the solubility limit.

6:00 PM - P4.39

Three Synthesis Routes of Single-crystalline PbS Nanowires and Their Electrical Transport Properties.

So Young Jang ¹, Yun Mi Song ¹, Han Sung Kim ¹, Young Suk Seo ¹, Jeunghee Park ¹
¹Materials Chemistry, Korea University, Jochiwon Korea (the Republic of)

6:00 PM - P4.4

Growth Mechanism of Zinc Oxide Nanowires - Geometrical Selection and the Effects of ZnO Binding Peptides.

Tammy Olson ¹, Alexander Chernov ¹, Joe Satcher ¹, T. Yong-Jin Han ¹
¹, Lawrence Livermore National Laboratory, Livermore , California, United States

6:00 PM - P4.40

Epitaxial Silicon Nanowire Growth Catalyzed by Gold Dot Arrays from Electron Beam Lithography Patterning using Silane Precursors.

Bjoern Hoffmann ¹, Gerald Broenstrup ¹, Uwe Huebner ¹, Silke Christiansen ^{1 2}
¹Semiconductor Nanostructures, Institute of Photonic Technology, Jena Germany, ², Max Planck Institute of Microstructure Physics, Halle Germany

Ordered arrays of silicon nanowires (SiNWs) are promising building blocks for a variety of photonic, photovoltaic and sensor applications. In our approach to create SiNWs we use electron beam lithography (EBL) to nano-pattern a positive resist that resides on a native oxide layer (SiO2) on top of a Si(111) wafer which serves as the substrate for epitaxial SiNW growth. This patterned resist serves as a shadow mask for the subsequent thermal evaporation (in ultra high vacuum) of gold (Au) layers of various thicknesses. Thus, defined Au nano-dot arrays are created with varying diameters and pitch. These Au dots are subsequently used to catalyze the bottom-up growth of SiNWs that follows the vapor-liquid-solid (VLS) growth mechanism using silane in a chemical vapor deposition (CVD) reactor. While silane is used as the precursor gas for SiNW growth, diborane and phosphine are used for p- and n- co-doping. The grown nanowires are characterized structurally using scanning electron microscopy (SEM) and transmission electron microscopy (TEM) and electrically using I-V measurements in a 4-point-probe configuration of individual SiNWs using EBL to realize ohmic contacts on the wires. We observe epitaxial growth of the SiNWs on the Si(111) wafer and we are able to control the growth direction to be either dominated by <111> or <112> directions by just changing the silane partial pressure. The lengths as well as the diameters of the wires are precisely controlled by the EBL Au dot patterning and CVD parameters so that diameters from 50 to 300 nm and lengths from 1 to 50 µm can be prepared.To predict wire diameters modelling is carried out that takes into account the EBL- and CVD-parameters and describes the observed experimental results very well.Furthermore we observed an influence of the wafer miscut on the preferential growth of SiNWs in certain of the <112> directions.To make SiNWs well suited for their applications, doping is needed, which is done by adding diborane or phosphine during CVD growth.

6:00 PM - P4.46

Optical Properties of Shape Controlled and Epitaxially Grown GaN Nanostructures.

Taeseup Song ¹, Kichun Kil ², Jeong Hyun Kim ¹, Won Il Park ¹, Ungyu Paik ^{1 2}
¹Division of Materials Science Engineering, Hanyang University, Seoul Korea (the Republic of), ²Department of Energy Engineering, Hanyang University, Seoul Korea (the Republic of)

6:00 PM - P4.47

Vertically Aligned ZnO Nanorods Grown by Elemental Vapor-phase Synthesis on Different Substrates and p-n Junctions Fabricated on the Basis of Them.

Oleg Kononenko ¹, A. Red'kin ¹, G. Panin ^{1 2}, D. Matveev ⁵, A. Kovalenko ³, A. Baranov ⁴
¹, Institute of Microelectronics Technology and High Purity Materials, RAS, Chernogolovka, Moscow region, Russian Federation, ²Quantum-functional Semiconductor Research Center, Department of Physics, Dongguk University, Seoul Korea (the Republic of), ⁵, Institute of Solid State Physics, RAS, Chernogolovka, Moscow region, Russian Federation, ³Department of Materials Science, Moscow State University, Moscow Russian Federation, ⁴Chemistry Department, Moscow State University, Moscow Russian Federation

6:00 PM - P4.48

Selective Epitaxial Growth of InGaN Nanowires on Patterned Templates.

Yi Shi ^{1 2}, Ruihua Cao ^{1 2}, Peng Chen ^{1 2}, Xugao Cui ^{1 2}, Xin Li ^{1 2}, Yin Hao ^{1 2}, Lin Pu ^{1 2}, Lijia Pan ^{1 2}, Rong Zhang ^{1 2}, Youdou Zheng ^{1 2}
¹Department of Physics , Nanjing University, Nanjing China, ²Jiangsu Provincial Key Laboratory of Advanced Photonic and Electronic Materials, Nanjing University, Nanjing China

6:00 PM - P4.49

A New Approach for Fixing SnO₂ Nanowires on Microarray Chips for Sensing Purposes.

Jaswinder Mann ¹, Thomas Schneider ², Udo Geckle ^{2 1}, Michael Jacob ¹, Martin Sommer ¹
¹Karlsruhe Institute of Technology (KIT), Institute of Microstructure Technology (IMT), Karlsruhe Germany, ² Karlsruhe Institute of Technology (KIT), Institute of Materials Research (IMF III), Karlsruhe Germany

Metal oxide semiconductor gas sensors based on the change in resistance can exhibit sensory advantages. The most important aspect of investigation in the field of gas sensors is 3 ”S”, i.e. sensitivity, selectivity and stability. Besides many efforts stability of the sensors still needs to be taken care of. The extra ordinary properties of one-dimensional nanostructured materials are beneficial for the fabrication of novel analytical devices that have advantages over traditional ones. In continuation with the aim to improve the properties of gas sensor devices a new approach is adopted to prepare nanowire based micro sensor arrays (micronose). SnO₂ nanowires were grown on silicon substrates (with 130 nm sputtered layer) using thermal evaporation method in a quartz tubular furnace at 950 °C. The grown nanostructures are characterized using scanning electron microscopy (SEM), field emission scanning electron microscopy (FESEM), X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS) and high resolution transmission electron microscopy (HRTEM). SEM micrographs show a uniform and high density growth of nanowires on SnO₂ sputtered substrates. FESEM results reveal the growth of wire like structures of about 100-800 µm in length and diameter ranging from 50 nm to 200 nm. The XRD pattern confirms the growth of crystalline nanowires with typical rutile phase of SnO₂ on these sputtered SnO₂ silicon substrates. The grown nanowires are transferred to the standard micro chip, 9x10 mm², consisting of 39 platinum strips (38 sensor segments) along with two platinum temperature sensors on the front side of the chip. These shadow mask depositions have been carried out using RF sputtering system. Four platinum heaters are sputter deposited on the rear side of the chip so as to provide a temperature gradient on the chip. In order to fix the nanowires on the substrates a thin porous layer of silicon dioxide (20 nm) has been deposited using ion beam assisted deposition. Furthermore, the Gaussian-shaped deposition layer leads to individual changes of the sensor-segment resistances resulting in individual resistance patterns for different gases. To the best of our knowledge, this is a new approach of fixing nanowire without influencing its properties.The first prototype micronose is mounted on a ceramic base with gold wires and is tested using Karlsruhe Micronose (KAMINA) equipment for 2-propanol. The nanowire chip based microsensors are found to be sensitive towards 2-propanol at room temperature. The measurements are performed at higher temperatures as well. The resistance of the nanowire based micronose lies in the range of 2 MΩ to 10 MΩ. Both quantitative and qualitative analyses of the gas components present in the test environment have been done simultaneously. Reference[1]. “Nanobelts, Nanowires, and Nanodiskettes of semiconducting oxides- from Materials to Nanodevices” Zhong Lin Wang, Adv. Mater.2003, 15, 432-436.

6:00 PM - P4.5

P-type Arsenic-doped ZnSe Nanowire Field Effect Transistors.

Song Haisheng ¹, Zhang Wenjun ¹, Tang Youbing ¹, Lee Chunsing ¹, Lee Shuit Tong ¹
¹Department of physics & material science, faculty of science, Hong Kong China

6:00 PM - P4.51

Characterization of the Surface at the Initial Stage of Silicon Nanowires Growth.

Irene Ngo ¹, Jose Alvarez ¹, Guenier-Farret Marie-Estelle ¹, Jean-Paul Kleider ¹, Benedict O'Donnell ², LinWei Yu ², Pere Roca i Cabarrocas ²
¹, Laboratoire de Génie Electrique de Paris, CNRS UMR8507, Gif sur Yvette France, ², LPICM, Ecole Polytechnique, CNRS, Palaiseau France

6:00 PM - P4.52

Doped ZnO Nano-wires and Nano-ribbons by Vapor Phase Transport.

Shumaila Karamat ¹, Eslam Ghareshabani ¹, Zhenying Pan ¹, Zheyang He ¹, Paul Lee ¹, Tan tuck lee Augustine ¹, Rajdeep singh Rawat ¹
¹Natural Science and Science education, National Institute of Education, Nanyang Technological University, Singapore, Singapore, Singapore, Singapore

6:00 PM - P4.53

Growth of Highly Doped Silicon Nanowires and Axial p-i-n Heterostructures in Nanowires by Pulsed Laser Deposition.

Bjoern Eisenhawer ¹, Andreas Berger ², Dongfeng Zhang ³, Bjoern Hoffmann ¹, Johann Michler ³, Silke Christiansen ^{1 2}
¹Semiconductor Nanostructures, Institute of Photonic Technology, Jena Germany, ², Max Planck Institute of Microstructure Physics, Halle Germany, ³, EMPA - Swiss Federal Laboratories for Materials Testing and Research, Thun Switzerland

6:00 PM - P4.55

Detailed Investigation of the Growth Kinetics and Mechanism of ZnO Nanorods in Methanol.

Michael Voigt ¹, Martin Klaumuenzer ¹, Wolfgang Peukert ¹
¹, Institute of Particle Technology, Erlangen Germany

ZnO nanorods were prepared by a precipitation route in methanol. The growth kinetics and growth mechanism of the rods are investigated by a combination of scanning and high resolution transmission electron microscopy as well as x-ray diffraction analysis. The growth of the rods occurs in three consecutive stages. In stage I nucleation and growth of quasi-spherical particles of 5 nm to 8 nm diameter is observed. In stage II oriented attachment of a limited number of the “spheres” along the c-axis occurs. This leads to the formation of rod-like aggregates with an aspect ratio of 2. In stage III further increase of the aspect ratio is observed, which is explained by ripening. Hexagonal shaped ZnO nanorods of up to 100 nm in length and up to 20 nm in diameter were obtained. The rods were elongated along the c axis of wurtzite ZnO. Epitaxial formation of doublets from the rods is observed occasionally. Similar to the results of Bell et al. the rods exhibit one cone-like end and one flat end. This indicates that the growth occurs predominantly against the c axis. Our main finding is that the growth follows a power law as a function of the ripening time with exponents of n = 0.32 to n = 0.39 for the length of the rods and n = 0.17 to n = 0.21 for the diameter of the rods. These exponents are in consistence with the model of Kitayama et al. for anisotropic Ostwald ripening in the case that the growth is controlled by volume diffusion. In addition, the kinetic constant for the growth is found to be independent on the crystal direction, as expected for growth that is limited by volume diffusion. In contrast to former studies on the growth of ZnO nanorods in alcohols our results indicate that the growth is dominated rather by anisotropic Ostwald ripening that is limited by volume diffusion than by isotropic Ostwald ripening within the classical Lifshitz-Slyozov-Wagner model. From the comparison of the SEM data with the XRD data it can be derived, that a significant number of structural defects are formed during growth which reduce the (002) coherence length. In particular, the reduction of the (002) coherence length might be due to the insertion of stacking faults.

6:00 PM - P4.56

MBE Growth of IV-VI Quantum Wires on a Self-organized Template.

Lee Elizondo ^{1 2}, Patrick McCann ², Matthew Johnson ³, Joel Keay ³
¹, Raytheon Vision Systems, Goleta, California, United States, ²School of Electrical and Computer Engineering and CSPIN: Center for Semiconductor Physics in Nanostructures, University of Oklahoma, Norman, Oklahoma, United States, ³Homer L. Dodge Department of Physics and Astronomy and CSPIN: Center for Semiconductor Physics in Nanostructures, University of Oklahoma, Norman, Oklahoma, United States

6:00 PM - P4.57

Implementation of Silicon Nanowire Arrays in Microfabricated Devices for Thermoelectric Generation.

Diana Davila ¹, Albert Tarancon ^{1 2}, Marta Fernandez-Regulez ¹, Marc Sansa ¹, Neus Sabate ¹, Alvaro San Paulo ¹, Isabel Gracia ¹, Carles Cane ¹, Luis Fonseca ¹
¹Department of Micro and Nanosystems, National Center of Microelectronics - CSIC, Bellaterra, Barcelona, Spain, ²Department of Advanced Materials for Energy Applications, Catalonia Institute for Energy Research (IREC), Barcelona, Barcelona, Spain

6:00 PM - P4.6

Defect Free Vertical InP NWs Grown on SrTiO3 (STO) Substrates by VLS-MBE.

Khalid Naji ¹, Herve Dumont ¹, Guillaume saint Girons ¹, Gilles Patriarche ², Michel Gendry ¹
¹, INL-UMR5270/CNRS, Ecully France, ², LPN-UPR20/CNRS, Marcoussis France

In recent years, the monolithic integration of III-V semiconductors on silicon (Si) has motivated a variety of research works. This integration could allow combining superior optoelectronic properties of direct band gap III-V semiconductor materials with silicon technology. The growth of nanowires (NWs) by Vapor Liquid Solid mechanism on silicon substrate would allow this integration without fundamental issues such as lattice mismatch and thermal expansion. The integration of semiconductors like InP, InAs, GaAs, GaP must be realized on (001) oriented silicon substrate which is the standard choice as substrate for the electronic industry. It is also reported that III-V NWs have usually a wurtzite structure and contain stacking faults with cubic phase defects . An actual challenge is to control the crystalline quality and to obtain defect free III-V NWs. Our main goal is to obtain vertical and defect-free III-V NWs on Si(001). Thus, we will use a few nanometers thick SrTiO3 buffer layer as template to grow vertical InP nanowires on Si(001). This idea is taken from recent results from J. Cheng et al. study on crystalline orientation and structural quality of InP quantum dots grown on SrTiO3 substrate .In this work, we present preliminary results obtained on the growth of InP NWs on SrTiO3(001) substrates by VLS method with gold catalyst. We will show wurzite-type InP NWs obtained on SrTiO3 substrate which a majority of them are vertical. We will explain the role of the indium supersaturation of the gold catalyst droplet in the first stage of the growth on the orientation of InP NWs. We also present the effect of the substrate on the crystalline quality of the InP NWs .we compare TEM images of InP NWs obtained in the same conditions on InP(111), Si(001), and SrTiO3(001) substrates. We observe defect free InP NWs grown on SrTiO3(001) and InP(111) substrates. The effect of the composition of the catalyst droplets before the growth on the NWs crystalline quality and on the origin of stacking faults and/or cubic phases will be explained.

6:00 PM - P4.7

Facet-selective Epitaxial Growth of Heterogeneous Nanostructures: ZnO Nanorods on Ag Nanocrystals.

Fengru Fan ^{1 2}, Yong Ding ¹, Deyu Liu ², Zhongqun Tian ², Zhong Lin Wang ¹
¹, School of Materials Science and Engineering, Georgia Institute of Technology, Atlanta, Georgia, United States, ², State Key Laboratory of Physical Chemistry of Solid Surfaces, Department of Chemistry, College of Chemistry and Chemical Engineering, Xiamen University, Xiamen China

The construction of functional heterogeneous nanocrystals is an important frontier in nanomaterials synthesis and the unique properties of heterostructures can be tuned by controlling the size, shape, chemical composition, surface and interfacial structure. Recently, the special attention has been paid on the rational design and synthesis of metal-semiconductor heterogeneous nanostructures because of their potential applications in developing future optoelectronic devices in nanosystems. Owing to the anisotropic property of metal nanocrystal, the selective growth of one nanomaterial on a specific crystal surface of Ag nanoparticles can be achieved through reasonable design and control of the growth environment. We have demonstrated the facet-selective growth of ZnO nanorods on {111} rather than {100} facets of Ag nanocrystals. By relying on systematic characterization, we have identified the fine structures and explained the formation mechanism of these nanostructures. The low-magnification SEM and TEM images show that a majority of the prepared structures adopt a combination of a Ag seed and ZnO nanorods. ZnO nanorods can grow directly on the facets of Ag without any other ancillary seed-assisted process. The crystal structures of the as-prepared nanocrystals were characterized by X-ray diffraction (XRD) and energy-dispersive X-ray spectroscopy (EDS), which showed that there are two separate phases, fcc Ag and wurtzite ZnO. The head and tails of the heterogeneous nanostructures are composed of a pure Ag nanoparticle and ZnO nanorods, respectively. The CBED data indicates that Zn atoms are the first layer bonded to the surface of Ag seeds and that the growth front of the nanorod is an oxygen layer. From SAED analysis, the {111} facet of Ag nanoparticles has a better structure match is more favorable for the nucleation and growth of ZnO. The growth mechanism of the facet-selective growth is attributed to two factors. The first factor is a good lattice and symmetry match between ZnO and Ag in the corresponding planes. The other is the direct interfacing of the Zn layer with Ag that initiates the formation of the ZnO lattice. The approach and mechanism proposed here could be applicable to other possible combinations of metal-semiconductor heterojunctions. The heterogeneous nanostructures are of special interest for studying electrical contacts, functional devices, biological sensors, and catalysis using metal-semiconductor heterostructures.[1] Zhong Lin Wang, J. Phys. Chem. B 2000, 104, 1153.[2] Feng-Ru Fan, Yong Ding, De-Yu Liu, Zhong-Qun Tian and Zhong Lin Wang, J. Am. Chem. Soc. 2009, 131, 12036–12037

6:00 PM - P4.9

Three-dimensional ZnO/ZnTe Heterostructure: Growth and Characterization.

Sang Hyun Lee ¹, D. Barton Smith ¹, Sung Seok A. Seo ¹, Jun Xu ¹
¹, Oak Ridge National Laboratory, Oak Ridge, Tennessee, United States

Hetero-semiconductor nanostructures with quasi one-dimensionality are of great interest due to their potential usefulness in electronic and photonic devices, such as LEDs, solar cells, and radiation detectors. In particular, the growth and modulation of hetero-nanowires in core-shell, longitudinal, and branched shapes have demonstrated feasibility in a variety of applications. In this presentation we will report on the fabrication of three-dimensional heterostructures based on vertically aligned nanowires. We used pulsed laser deposition (PLD) to deposit a ZnTe shell layer on an arrangement of ZnO nanowires. ZnO and ZnTe, are, respectively, intrinsic n- and p-type II-VI semiconductors, each with a direct band gap. Both materials have been intensively studied for use in optoelectric devices. In this work, ZnO/ZnTe heterojunction was fabricated by the following procedures. Vertically aligned ZnO nanowires with 180 nm diameter and 3 μm lengths were grown on a Si(100) substrate using chemical vapor deposition at 600oC. Prior to the growth, the substrate was repeatedly coated with zinc acetate dihydrate solution to form seeds of ZnO. The substrate with ZnO nanowires was placed into a PLD chamber that was evacuated to a pressure of 10-7 torr. The substrate was then heated to growth temperature of 450 C. The ZnTe deposition target was ablated using KrF laser radiation (248 nm), producing a plume of ZnTe directed normal to the substrate surface. The ZnTe deposition rate was 0.2 ~ 0.4 Å/pulse. The nanowires were merged by increasing the thickness of ZnTe shell, which led to the formation of the hybrid structure. The deposition of ZnTe on ZnO nanowires was confirmed using EDS and XRD measurements. We will present details of the properties of the ZnO/ZnTe nanowire heterojunction that were obtained using TEM, photoluminescence, and electrical measurements.The research was sponsored by the US Department of Energy, National Nuclear Security Administration, Office of Nonproliferation Research and Engineering, under contract No. DE-AC05-00OR22725 with Oak Ridge National Laboratory.

2010-04-07 Show All Abstracts

Symposium Organizers

Heike Riel IBM Research GmbH

Margit Zacharias University of Freiburg

Michael McAlpine Princeton University

Theresa Mayer Pennsylvania State University

P5: Growth of Si and Ge Nanowires I

Session Chairs

Theresa Mayer

Wednesday AM, April 07, 2010

Room 2016 (Moscone West)

9:30 AM - P5.1

Vapor-solid Solid Growth of Ultra-thin Silicon Nanowires by Silver and Palladium.

Joerg Wittemann ¹, Andreas Kipke ¹, Ulrich Goesele ¹, Volker Schmidt ¹
¹2, Max Planck Institute of Microstructure Physics, Halle [Saale] Germany

Recently it became clear that silicon nanowires (SiNWs) grown by gold face distinct problems when considering the requirements of semiconductor industry. First, because incorporated Au acts as a highly effective recombination center; and second, because Au removal after SiNW growth is quite challenging. Therefore, alternative catalyst materials for SiNW growth have to be identified. These substitutes, however, have to be capable of low temperature SiNW growth if considered for implementation in electronics fabrication. Ag and Pd seem to be feasible replacements corresponding to their reduced effectivity as recombination centers. Both metals have their lowest eutectic point with Si at roughly 800°C. Below the eutectic temperature: Pd forms several stable silicides with Si [1]; Ag, however, forms with Si a solid-solution on the Ag rich side [2]. We demonstrate with two different approaches the low temperature synthesis [T<500°C] indicating SiNW growth via the vapor-solid-solid (VSS) mechanism of ultra-thin SiNWs by means of chemical vapor deposition using:A) Pd nanocolloids:To circumvent a high temperature annealing step in order to crack a deposited metal film into particles, we utilized colloids for SiNW catalysis. Metallic colloids are usually stabilized with an organic shell to prevent clustering after colloid fabrication. One group of Pd colloids with an average diameter of 4 nm were stabilized by trioctylphosphine in an organic solution. The other group was stabilized by citrate in an aqueous solution with an average diameter of 13 nm. In the experiments only the latter group induced a one-to-one-colloid-to-SiNW growth with SiNW diameters averaging 15 nm. We demonstrated that the growth of SiNWs was catalyzed by a dipalladium silicide supersaturated with Si. Morphological analysis showed epitaxy of the SiNWs with the substrate and a high density of stacking faults.B) Solid Ag particles:The experiments were performed far below the eutectic temperature as well. No high temperature annealing step was needed as Ag particles were deposited onto the Si substrate insitu the ultra high vacuum setup. We could show that the nanowires were grown epitaxially, were mostly single-crystalline, and had diameters of about 10 nm. The preferred growth direction was identified with <110>. We furthermore confirmed an effective method to remove the Ag catalyst remnants by wet etching with potassium ferricyanide and sodium thiosulfate. Only very few experiments on low temperate growth of Ag catalyzed SiNWs were reported so far, as older Ag-Si phase diagrams indicate the impossibility VSS growth. However, a recently revised version of the Ag-Si phase diagram [2] explains our results consistently.[1]H. Okamoto, J. Phase. Equilib. Diff., 2007, 28, 231.[2]L. Weber, Metall. Mater. Trans. A-Phys. Metall. Mater. Sci., 2002, 33, 1145.

9:45 AM - P5.2

Fundamental Understanding of Gold Catalyzed Silicon Nanowire Growth from First Principles-based Atomistic Modeling.

Soo-Hwan Lee ¹, Gyeong Hwang ¹
¹Department of Chemical Engineering, University of Texas at Austin, Austin, Texas, United States

10:00 AM - P5.3

Catalyst Oxidation for Silicon Nanowire Growth.

Vincent Renard ¹, Michael Jublot ¹, Peter Cherns ¹, Patrice Gergaud ¹, Denis Rouchon ¹, Amal Chabli ¹, Vincent Jousseaume ¹
¹, CEA/Leti-Minatec, Grenoble France

10:15 AM - P5.4

Fabrication and Characterization of Large (>10µm) Diameter VLS Si Microwire Arrays from Electrodeposited Catalysts.

Emily Warren ¹, Jessie Ku ², Shannon Boettcher ¹, Josh Spurgeon ¹, Michael Kelzenberg ², Harry Atwater ², Nathan Lewis ¹
¹Division of Chemistry and Chemical Engineering, California Institute of Technology, Pasadena, California, United States, ²Division of Engineering and Applied Science, California Institute of Technology, Pasadena, California, United States

Silicon wire arrays grown by the vapor-liquid-solid (VLS) mechanism are a promising material for the creation of low cost and efficient photovoltaic and photoelectrochemical devices. A radial junction geometry decouples the direction of light absorption and carrier collection, allowing inexpensive materials with short diffusion lengths to efficiently convert photons to do useful work. Wire diameter and pitch are critical factors which determine the attainable voltage of a radial junction since the dark current is proportional to the increased surface area of the wire arrays. We have developed a fabrication process using electrodeposited Cu catalysts to grow arrays of VLS Si microwires with tunable diameter. Electrodepositing the catalyst material increases the versatility of array geometries that can be fabricated, and is a much more scaleable technology than evaporation and lift-off of the metal catalyst. To design an efficient device, the increased ability to collect carriers from the radial geometry must be balanced against the attainable voltage. Our group has recently measured minority carrier diffusion lengths >10µm in Cu-catalyzed VLS Si microwires grown from SiCl₄ with diameters of ~2 µm. Modeling suggests that wire radius should be on the order of the diffusion length to maximize both the current and voltage of a radial junction, which motivates an investigation of large (>10 µm) diameter wire arrays. The Cu catalyst was electrodeposited from a dilute solution of CuSO₄ and H₂SO₄ onto p⁺ Si with a thermal oxide layer patterned by photolithography and HF etching. Since the pattern of metal deposition is controlled by the electrically active p⁺ Si and not the photoresist, the diameters of the catalyst islands, and hence the wires, can be controlled by varying the etch time of the thermal oxide. Wires with diameters ranging from 1 to 15 µm and pitches ranging from 7 to 30 µm were grown in a mixture of H₂, SiCl₄, and BCl₃ at 1000°C and atmospheric pressure as reported previously. The arrays were electrochemically characterized using a methyl viologen (MV)^2+/+ redox couple in water which produces a conformal large barrier height contact to p-Si. Open circuit voltages and quantum efficiencies were studied over a range of wire diameters and pitches. 10 µm diameter wires with a length of 100µm and a filling fraction of 0.1 produced open circuit voltages of 0.42 ± 0.03 V and maximum external quantum yields of 0.26 ± 0.08 at 6 0mW cm^-2 808 nm illumination. In addition the effect of electrodepositing vs. evaporating the VLS catalyst was studied using ICPMS elemental analysis. Our results demonstrate that highly ordered wire arrays with good electrical properties can be grown without any high vacuum processing, and provide a tool to systematically study the effect of increased surface area for wire array solar cells. The relationship between wire diameter, open circuit voltage, and light absorption will be discussed in detail.

10:30 AM - P5.5

SiGe Nanowires Grown by LPCVD: Morphological and Structural Analysis.

Andres Rodriguez ¹, Jesus Sangrador ¹, Tomas Rodriguez ¹, Carmen Ballesteros ², Angel Carmelo Prieto ³, Jimenez Juan ³
¹Tecnología Electrónica, ETSI de Telecomunicación, Universidad Politécnica de Madrid, Madrid, Madrid, Spain, ²Física, EPS, Universidad Carlos III, Leganés, Madrid, Spain, ³GdS Optronlab, Edificio I+D, Universidad de Valladolid, Valladolid, Valladiolid, Spain

SiGe nanowires (NWs) present high interest since their band gap can be modulated within the wire, allowing their electronic properties being tailored over a wide range. In spite of the potential relevance of these alloyed NWs, their growth is still not well controlled; therefore, one needs to explore ways of improvement, together with characterization methods allowing to supplying the necessary data about the main morphologic, structural and composition features of the NWs. In this work, SiGe nanowires were grown by the VLS method using a LPCVD reactor. Si wafers with 3 nm thick Au films deposited on top by thermal evaporation were used as substrates. An annealing step at 500 °C for 1 hour was carried out in H2 atmosphere (400 mTorr, 100 sccm) inside the LPCVD reactor to break the Au film allowing Au and Si to alloy forming a distribution of Au-Si drops on the Si surface. During the subsequent growth process, carried out at 400 °C for 30 minutes, Si2H6 and GeH4 were used as precursor gases for Si and Ge with flows ranging from 2 to 20 sccm for the GeH4 and from 8 to 2 sccm for the Si2H6, in such way that the GeH4:Si2H6 flow ratio (F) was varied from 0.25 to 10. The flow of H2 was changed from run to run to achieve a total flow of 100 sccm and the total pressure was kept constant at 400 mTorr. The morphological features, the average length and diameter and the density of the NWs were studied by Scanning Electron Microscopy. As F increases, the density of NWs increases from 106 cm-2 to 108 cm-2. For F < 5 the NWs are straight and cylindrical in shape, with diameters increasing from 30 to 50 nm as the flow ratio does and their average length is around 4 micrometers in all cases but with a large dispersion. For F ≥ 5 the NWs are shorter, less than 1 micrometer in length, tapered, with a diameter at the base of around 70 nm, and their outer surface is rough. In the case of F = 10, the highest flow ratio considered, the NWs are curled up into small balls. The internal structure and defects of the NWs grown with F < 5 were analyzed by Transmission Electron Microscopy. Dark contrast areas were observed in both low resolution TEM images and Z-contrast STEM images. HREM images show that this dark contrast is related to densely packed planes of the diamond structure oriented with respect to the electron beam. EDX mappings associated to the Z-contrast images indicate that the Ge fraction increases with the flow ratio up to a value of x = 0.45, but do not give a clear indication of compositional differences along the nanowires. MicroRaman maps were carried out in order to study the composition of the NWs and its axial homogeneity. The Raman data suggests that the Ge fraction increases from the base to the top of the NWs.

10:45 AM - P5.6

The Benefits of HCl in the Growth of Silicon Nanowires by Chemical Vapour Deposition: Growth of Small Diameter Nanowires and Controlled Facet Evolution.

Fabrice Oehler ¹, Pascal Gentile ¹, Thierry Baron ², Pierre Ferret ³, Martien Den Hertog ¹, Jean-Luc Rouviere ¹
¹INAC, CEA, Grenoble France, ²LTM, CNRS, Grenoble France, ³LETI, CEA, Grenoble France

During the past ten years, semiconducting nanowires have been the subject of intensive research projects for the future 1D electronic or the next generation of solar cells. However to succeed as the cornerstone of high frequency FET or multi-jonction cells, the dimensions and the electronic properties of the wires must be tightly controlled. As nanowires present a high surface to volume ratio, both the volume and the surface contributes to the electronic properties. Surface control is therefore of great importance. In the case of silicon nanowires (SiNWs), the Chemical Vapour Deposition (CVD) technique has shown interesting results, mostly using gold as the liquid catalyst. However the wire surface is often polluted by gold clusters, metallic impurities that diffuse from the main catalyst. The wire surface also presents uncontrolled facets which are potential scatterers for the carriers. Another interesting challenge is the controlled growth of small diameter SiNWs. These structures potentially exhibit quantum effects could find applications both in nanoelectronics or photovoltaics. Most of the time, this type of growth is not trivial and requires specific experimental conditions that can affect the structural quality (low temperature and high silane partial pressure). We present a unique method to control both the surface state and the low diameter growth by adding a reactive gas in the gas phase.At 650°C, 20 mbar Hydrogen and 0.1 mbar Silane, SiNWs larger than 70 nm diameter are typically obtained. Smaller diameter nanowires do not grow or present catalyst poisoning. By the sole addition of HCl, without modifying other experimental parameters, we are able to grow SiNWs free of structural issues down to 20 nm diameter. This reduction of the minimum wire diameter is linked to the surface chlorination that takes place on the substrate in the presence of HCl. This chlorination reduces the gold surface migration which is found to be the main limiting parameter for the growth of small diameter SiNWs in our experimental conditions[1]. The chlorination also takes places on the sidewalls of the wire. On this surface it changes both the lateral growth speed and the gold migration. Hence using HCl prevents the diffusion of Au on the NWs sidewalls and eliminates or limits the gold cluster formation. The variation of HCl partial pressure also probes the lateral growth speed. Depending on the experimental conditions, wires with 12, 6 or 3 facets are obtained. Hybrid wires, which present several types of cross-section, are investigated. Both the cross-section shape and the facets orientations are found to evolve with the amount of deposited Si on the sidewalls. The use of HCl reduces here the non-catalytic lateral growth speed, which hinders the facet evolution and produces wires with smooth sidewalls. It provides a robust method for growing nanowires with a reproducible and controlled shape.[1] F. Oehler et al, Nanotechnology 2009, 20 475307

11:00 AM - P5: NW

BREAK

P6: Si and Ge Nanowire Devices I

Session Chairs

Theresa Mayer

Wednesday PM, April 07, 2010

Room 2016 (Moscone West)

11:30 AM - **P6.1

Silicon Nanowires – Growth Conditions, Doping Strategies and Critical Processing Steps for Tunnel Field Effect Transistors.

Mikael Bjoerk ¹, K. Moselund ¹, H. Schmid ¹, H. Ghoneim ¹, S. Karg ¹, W. Riess ¹, H. Riel ¹
¹, IBM Research Zurich, Ruschlikon Switzerland

12:00 PM - P6.2

Quantitative Two-dimensional Carrier Mapping in Silicon Nanowire-based Tunnel-field Effect Transistors With Sub-3nm Resolution.

Andreas Schulze ^{1 2}, Thomas Hantschel ¹, Pierre Eyben ¹, Anne Vandooren ¹, Rita Rooyackers ¹, Jay Mody ^{1 2}, Anne Verhulst ¹, Wilfried Vandervorst ^{1 2}
¹, IMEC, Leuven Belgium, ²Dept. of Physics and Astronomy, KU Leuven, Leuven Belgium

Semiconductor nanowires are one of the most promising building blocks for future nanoelectronic devices. Due to reduced short channel effects and no limitation of the subthreshold-swing to 60mV/dec, nanowire-based tunnel-field effect transistors (TFETs) are potential successors of standard MOSFETs [1,2]. However, a major challenge is the controlled doping of the source and drain regions. To support the development of adequate doping processes, various techniques for the quantitative analysis of the dopant distribution in semiconductor nanowires are currently being investigated. While atom probe tomography can map the 3D distribution of dopant atoms, it does not reveal any information about their electrical activation [3,4]. On the other hand, techniques used at present to determine carrier profiles inside nanowires show low sensitivity or insufficient spatial resolution [5-8]. By contrast, high-vacuum scanning spreading resistance microscopy (HV-SSRM) has shown the capability of measuring 2D carrier concentration maps with sub-3nm resolution and high sensitivity in planar MOS structures [9]. First measurements have demonstrated that SSRM is also a promising technique for the characterization of Si nanowires [10]. In this work, we demonstrate for the first time the quantitative analysis of the 2D carrier distribution in Si nanowire-based TFETs with sub-3nm resolution using HV-SSRM. The device structures were fabricated by a top-down approach. The gate electrode consists of a wrap around high-k/metal gate configuration. The top section of the nanowires were doped using ion implantation (BF₂, 3E15 ions/cm², 5keV, 4Q) at 45° and spike annealing (1050°C) [11]. Mapping the local resistivity by HV-SSRM and a subsequent quantification allows us to obtain 2D carrier profiles for different nanowire diameters down to 50nm. Besides measuring the carrier concentration, we gain insight in critical device parameters like carrier distribution conformality, junction abruptness and gate overlap. These results deliver significant input for the process development of nanowire-based TFETs. [1] A.S. Verhulst et al., IEEE Elec. Dev. Lett. 29, 1398 (2008).[2] Z.X. Chen et al., IEEE Elec. Dev. Lett. 30, 754 (2009).[3] D.E. Perea et al., Nature Nanotechnology, 4, 315 (2009).[4] R.A. Schlitz et al., Applied Physics Letters, 95, 162101 (2009).[5] J.E. Allen et al., Advanced Materials, 21, 1 (2009). [6] M. I. den Hertog et al., Nano Letters, DOI: 10.1021/nl902024h (2009).[7] E.C. Garnett et al., Nature Nanotechnology, 4, 311 (2009).[8] E. Koren et al., Applied Physics Letters, 95, 092105 (2009).[9] P. De Wolf et al., Applied Physics Letters, 66, 1530 (1995).[10] T. Hantschel et al., Mater. Res. Soc. Symp. Proc. Vol. 1178, 1178-AA05-03 (2009).[11] A. Vandooren et al., Proc. Silicon Nanoelectronic Workshop, 21, (2009).

12:15 PM - P6.3

Electrical Characterization of Axially-doped Silicon Nanowire p-n Junctions Grown by the Vapor Liquid Solid Technique.

Aaron Vallett ¹, Sharis Minassian ², Huichu Liu ¹, Suman Datta ¹, Joan Redwing ^{2 1}, Theresa Mayer ¹
¹Electrical Engineering, Pennsylvania State University, University Park, Pennsylvania, United States, ²Materials Science and Engineering, Pennsylvania State University, University Park, Pennsylvania, United States

The growth of axially-doped silicon nanowire p-n junctions by the vapor liquid solid (VLS) technique has received considerable attention for advanced nanoelectronic devices such as one-dimensional MOSFETs and tunnel transistors. However, questions remain regarding the ability to accurately control the doping concentration on both sides of the junction as well as the junction abruptness, which are critical parameters in the operation of these devices. In this work, silicon nanowires with a nominal diameter of 60 nm were synthesized from Au nanoparticles using silane (SiH₄) as the source gas. Axial doping was accomplished by abruptly switching the dopant gas from trimethylboron (TMB), the p-type dopant source, to phosphine (PH₃), the n-type dopant source, during VLS growth. The dopant gas to SiH₄ flow ratios used to grow the p⁺ and n⁺ segments correspond to resistivities of ~6x10^-2 (TMB) and ~4x10^-3 (PH3) Ω-cm, respectively. Following growth, the silicon nanowires were passivated by an ~4nm SiO₂ shell grown by thermal-oxidation at 800°C for 15 minutes in dry O₂. Individual silicon nanowires were integrated into globally-back-gated two-contact and multiple-contact test structures for electrical characterization. Current-voltage (I-V) measurements across the p⁺-n⁺ junctions showed clear rectifying characteristics with a turn-on voltage of ~0.7 V and an ideality factor of ~2. The forward-bias currents were in the 10 to 100 nA range at 1V, while reverse-bias currents were in the fA range. The doping type and relative doping level along the length of the nanowires was studied by scanning capacitance microscopy (SCM) and also using the multiple-contact electrical test structure. The SCM measurement revealed a heavily-doped n⁺ segment and a less heavily doped p segment at the two ends of the nanowire, consistent with electrical measurements of uniformly-doped SiNWs. Although the dopant gas was switched abruptly between the p and n segments, the SCM showed an ~4 µm long n^- segment between the uniformly-doped n⁺ and p end segments, with an abrupt junction between the n^- and n⁺ segments. This axial variation in doping type and concentration was also confirmed by global back-gated I-V measurements at 1 µm increments along the nanowire. Using the global back-gate, it was possible to invert the n^- segment to p⁺, enabling gate-controlled band-to-band reverse-biased diode tunneling current from the p⁺ valence band to the n⁺ conduction band. Although the source of the graded doping profile is not well understood at this time, these results show that the VLS technique can be used to produce abrupt junctions that allow characterization of band-to-band tunneling in silicon nanowires.

12:30 PM - P6.4

Effect of Material Choice on the Interband Tunneling Currents in Nanowire and CNT Band-to-Band Tunneling Transistors.

Roger Lake ¹, Md. Abul Khayer ¹
¹Electrical Engineering, University of California Riverside, Riverside, California, United States

12:45 PM - P6.5

High Performance Single Nanowire Tunnel Diodes.

Jesper Wallentin ¹, Johan Persson ², Jakob Wagner ², Knut Deppert ¹, Lars Samuelson ¹, Magnus Borgstrom ¹
¹Solid State Physics, Lund University, Lund Sweden, ²Center for Electron Nanoscopy, Technical University of Denmark, Kgs. Lyngby Denmark

P7: Growth of Si and Ge Nanowires II

Session Chairs

Volker Schmidt

Wednesday PM, April 07, 2010

Room 2016 (Moscone West)

2:30 PM - P7.1

Growth, Structure and Electronic Properties of Sn Seeded, PECVD Grown, Si Nanowires.

Somilkumar Rathi ¹, Jeremy Fields ¹, Bhavin Jariwala ¹, Joseph Beach ¹, Sumit Agarwal ¹, Pauls Stradins ^{1 2}, P.Craig Taylor ¹, Reuben Collins ¹
¹, Colorado School of Mines, Golden , Colorado, United States, ², National Renewable Energy Laboratory, Golden, Colorado, United States

In advanced photovoltaic, electronic, sensing, and optical device applications, semiconductor nanowire (NW) arrays offer the potential for tunable properties through radial quantum confinement effects and large surface to volume ratios while simultaneously maintaining a topology consistent with efficient carrier transport and collection. Amongst the different group IV NW growth techniques, CVD-based, metal catalyzed vapor-liquid-solid (VLS) growth has received considerable attention with Au as the most commonly studied seed metal. Au, however, can limit minority carrier lifetimes in Si. Similarly, lowering growth temperature below the Au-Si eutectic temperature is an important goal both for cost and substrate selection. A possible approach to address these issues is through the use of an amphoteric metal seed catalyst with a lower melting point, such as Sn, also a column IV element, combined with plasma-enhanced growth to further lower the process temperature. Here we report systematic study of plasma enhanced chemical vapor deposition (PECVD) growth of Si NWs from SiH4 using Sn as the metal catalyst. Sn nano-island seed layers were prepared on Si and glass substrates from metal nanoparticles and by thermal evaporation and direct decomposition of SnO2 in hydrogen plasma. Anneals of the seed layers under NW growth conditions are shown to impact seed morphology and, hence, affect the dimensional properties of subsequently grown NWs. Sn seeded wires are thicker, up to 200 nm, and exhibit much less taper than Au seeded wires grown under identical conditions. For Sn seeds, NW growth is also observed at temperatures approaching the Sn-Si eutectic of 232 °C. Systematic studies of the NW diameter as a function of the process variables are reported. In general, lower pressure and greater hydrogen dilution result in narrower wires but also lower growth rates. Transmission electron microscopy and Raman spectroscopy confirm that NWs are largely crystalline with some amorphous phase. Electron spin resonance (ESR) spectra exhibit paramagnetic defect states consistent with amorphous Si but also exhibit an additional defect which is potentially associated with the crystalline Si. Minority carrier lifetime and photoluminescence measurements were also performed and will be discussed in the context of surface passivation of the NWs. *Support of the NSF Renewable Energy Materials Research Science and Engineering Center and Center for Revolutionary Solar Photoconversion is gratefully acknowledged.

2:45 PM - P7.2

Epitaxial Growth of Highly p-doped Si Nanowires by Al Catalyzed Vapor-liquid-solid Growth.

Yue Ke ¹, Xiaojun Weng ¹, Joan Redwing ¹, Chad Eichfeld ¹, Thomas Swisher ¹, Suzanne Mohney ¹, Youssef Habib ²
¹Material Science and Engineering, Penn State University, State College, Pennsylvania, United States, ², Illuminex Corporation, Lancaster, Pennsylvania, United States

Metal atom incorporation in Si is believed to occur during the vapor-liquid-solid (VLS) growth of Si nanowires (NW) using metal catalysts. While used as the most popular VLS catalyst, Au forms deep level states within the bandgap of Si, which are undesirable for photovoltaic devices that are dependent on minority carrier transport. Alternative metal catalysts are therefore desired. Al is a good choice since it can serve as both a catalyst and p-type dopant for Si NW growth.In this work, we report an effort to grow Si NWs using Al as an alternative catalyst. The Al-Si binary diagram is similar to Au-Si with a higher eutectic point (577 ^oC vs. 363 ^oC). The relatively low eutectic temperature of Al-Si makes VLS growth of Si NW possible using SiH₄. Prior studies of Al-catalyzed Si NW growth have focused on low temperature, ultra-high vacuum conditions where the Al catalyst is believed to be in a solid state [1]. While high quality Si NWs were obtained, the low growth rate (~20 nm/min) is undesirable for the fabrication of devices, particularly solar cells. Our studies have focused instead on the growth of Si NWs by low pressure chemical vapor deposition (LPCVD) at higher temperatures where the Al-Si is likely in a liquid state so that a higher growth rates can be achieved.The growth substrates were consisted of (111) Si wafers with a 10 nm Al film coating. Si NW growth was studied over a temperature range from 525 to 600 ^oC with reactor pressures between ~30 and 600 Torr. Under these conditions, epitaxially-oriented Si NWs were obtained with diameters of 100-400 nm at growth rates greater than 1 µm/min. Transmission electron microscope (TEM) was used to study the structural properties of NWs. Chemical analysis was also carried out by X-ray energy dispersive spectroscopy (XEDS) in the scanning TEM mode. TEM studies revealed that the Si NWs are single crystal with a predominant <111> growth direction. An Al metal particle is at the tip of the Si NWs with a distinct interface. Preliminary four point probe measurements indicated NW resistivity of about 0.05 Ω-cm, which suggests an Al concentration on the order of 10¹⁸ cm^-3 (neglecting any surface depletion, assuming a mobility of 65 cm² V^-1 s^-1 from Al-mediated solid phase epitaxy of Si films [2], and complete ionization of acceptors). The measured resistivity is much lower than that (10⁴-10⁵ Ω-cm) of nominally undoped Au catalyzed Si NWs. The estimated Al concentration is close to the values in the mid-10¹⁸ cm^-3 range extrapolated from a solubility diagram for Al-Si at 550 ^oC [3]. These results demonstrate that Al-catalyzed Si NW growth is a practical and promising approach to obtain high aspect ratio, single crystal p-type Si NWs for photovoltaic applications.[1] Y. Wang, V. Schmidt, S. Senz and U. Gösele, Nature Nanotechnology 1, p. 186 (2006)[2] G. Majni and G. Ottaviani, Applied Physics Letters 31, p. 125 (1977)[3] F. A. Trumbore, Bell Systems Technical Journal 39, p. 205 (1960)

3:00 PM - P7.3

Elimination of Au Diffusion in Ge-based Core/Shell Nanowires for High Performance Photodetectors and FETs.

Shadi Dayeh ¹, Ian Campbell ², Jianyu Huang ³, Aaron Gin ³, S. Picraux ¹
¹Center for Integrated Nanotechnologies, Los Alamos National Laboratory, Los Alamos, New Mexico, United States, ²Material Physics and Applications, Los Alamos National Laboratory, Los Alamos, New Mexico, United States, ³Center for Integrated Nanotechnologies, Sandia National Laboratory, Albuquerque, New Mexico, United States

3:15 PM - P7.4

Seedless Growth of Sub-10 nm Diameter Ge Nanowires.

Richard Hobbs ^{1 2}, Sven Barth ^{1 2}, Nikolay Petkov ³, Michaela Zirngast ⁴, Christoph Marschner ⁴, Justin Holmes ^{1 2}
¹Materials and Supercritical Fluids Group, Department of Chemistry, and the Tyndall National Institute, University College Cork, Cork Ireland, ²Centre for Research on Adaptive Nanostructures and Nanodevices (CRANN), Trinity College Dublin, Dublin 2 Ireland, ³Electron Microscopy and Analysis Facility (EMAF), Tyndall National Institute, Lee Maltings, Prospect Row, Cork Ireland, ⁴, Institut für Anorganische Chemie der Technischen Universität Graz, Stremayrgasse 16, A-8010 Graz Austria

Bottom-up grown semiconductor nanowires are a promising route toward future miniaturisation of microelectronic devices.[1] Nanowires grown by this approach can show superior structural perfection relative to their top-down produced counterparts. In addition, bottom-up grown nanowires can be produced at lower cost than single-crystal wafer materials used in lithography-based device fabrication. Conventionally, bottom-up grown Ge and Si nanowires rely on catalytic seed metals to initiate and sustain nanowire growth. However, seed metals such as gold can have many drawbacks, preventing their use on an industrial scale.[2] Herein, we report the self-seeded growth of single-crystalline Ge nanowires, with a mean diameter as small as 6 nm without the need for a metal catalyst. The nanowires, synthesised in supercritical toluene and in solution, using the purpose-built precursor hexakis(trimethylsilyl)digermane, exhibit high aspect ratios (> 1000) whilst maintaining a uniform diameter along their length. The nanowires synthesised, are encased in an amorphous shell of material derived from the precursor, which acts to passivate the nanowire surface and to separate the Ge seed particles from which the nanowires grow. The diameter of the nanowires generated depends on the synthesis temperature employed. Specifically, there is an inverse relationship between the radius of the Ge nanowires and the synthesis temperature, which can be explained by a model for the size-dependent melting temperature of cubic Ge. This relationship suggests that a liquid phase of Ge is involved in nanowire growth.A study of the early stages of nanowire growth using transmission electron microscopy (TEM) revealed that crystalline Ge nanoparticles exist as an intermediate phase between precursor decomposition and nanowire formation. The presence of this intermediate phase coupled with the observed temperature dependence of the Ge nanowire diameters indicates that an unconventional nanowire growth mechanism underpins this present work.[3][1]International Technology Roadmap for Semiconductors, 2007 Executive Summary http://www.itrs.net/.[2]Volker, S.; Joerg, V. W.; Stephan, S.; Ulrich, G. Adv. Mater. 2009, 21, 2681.[3]Hobbs, R. G.; Barth, S.; Petkov, N.; Zirngast, M.; Marschner, C.; Holmes, J. D. Submitted.

3:30 PM - P7.5

Catalyst Phase Changes and Ledge-flow Controlled Interface Dynamics for Sub-eutectic Ge Nanowire Growth.

Andrew Gamalski ¹, Renu Sharma ², See-Wee Chee ², Caterina Ducati ³, Stephan Hofmann ¹
¹Dep. of Engineering, University of Cambridge, Cambridge United Kingdom, ²LeRoy Eyring Center for Solid State Science, Arizona State University, Tempe, Arizona, United States, ³Dep. of Materials Science and Metallurgy, University of Cambridge, Cambridge United Kingdom

3:45 PM - P7.6

Homogeneous and Heterogeneous Nucleation of Epitaxial Ni and Co Silicides in Nanowires of Si.

Yi-Chia Chou ¹, Wen-Wei Wu ², Lih-Juann Chen ³, King-Ning Tu ¹
¹, University of California, Los Angeles, Los Angeles, California, United States, ², National Chiao Tung University, Hsinchu Taiwan, ³, National Tsing Hua University, Hsinchu Taiwan

4:00 PM - P7: NW

BREAK

P8: Si and Ge Nanowire Devices II

Session Chairs

Mikael Bjoerk

Wednesday PM, April 07, 2010

Room 2016 (Moscone West)

4:30 PM - P8.1

Controlling the Shape and Dimensional Variability of Top-down Fabricated Silicon Nanowires by Hydrogen Annealing.

Guy Cohen ¹, Sarunya Bangsaruntip ¹, Tymon Barwicz ¹, Lynne Gignac ¹, Surbhi Mittal ¹
¹, IBM T.J. Watson Research Center, Yorktown Heights, New York, United States

For short channel MOSFETs, scaling theory dictates that the nanowire (NW) channel diameter be in a range that now approaches the scale of imperfections present in typical top-down processing techniques. Photoresist line edge roughness (LER), line width roughness (LWR) and image-transfer by reactive-ion etching (RIE), can introduce substantial structural variations in NWs defined by top-down methods. Variations in the NW’s dimensions degrade the charge transport and affects threshold voltage. Reducing variability is therefore a key challenge in making NW FETs a viable technology.In this work, we demonstrated the top-down fabrication of NWs with reduced overall variability in LER, LWR and cross-sectional shapes by using a controlled hydrogen annealing. Although the use of hydrogen annealing to reduce LER is well-establish, it also leads to Si agglomeration and NW fragmentation at small dimensions. For the first time, we extended this technique to produce facet-smooth NWs with diameters down to 13 nm. Subsequent oxidation allowed us to further thin the NWs down to 3 nm while maintaining the same LER level.Nanowires were fabricated by patterning thin silicon-on-insulator (SOI) films using e-beam lithography and RIE. Nanowires with different crystal orientations were formed by appropriate rotation of the mask and by the use of (100) and (110) SOI wafers. Nanowires were patterned with and without large SOI pads attached at their ends. Fully suspended NWs were made from the attached structure by etching buried oxide under the NWs, while maintaining the buried oxide under the SOI pads. Various annealing conditions were studied on the fabricated structures by varying temperature in the range of 600 to 1000°C and pressure from 7 torr to 600 torr. The NW structures were characterized by top-down and cross-sectional SEM and TEM.The stability and agglomeration of NWs strongly depends on the crystal orientation of the NW. Nanowires oriented along <110> were found to be the most stable while NWs oriented along <100> were found the least stable. Agglomeration in <100> NWs consisted of forming roughly equally spaced necking points along the NWs, yielding a structure that resembles a standing wave pattern. The agglomeration mechanism may suggest a Raleigh instability.Electrical characteristics were tested by building MOSFETs in which the NWs served as the device channel. Gate-All-Around N- and P-MOSFETs built with <110>-orientated NWs made with this method showed near-ideal sub-threshold Id-Vg characteristics, confirming the good quality of the NWs surfaces.In conclusion, we showed that hydrogen annealing is a useful tool for reducing variability in top-down silicon NWs. Very low LER and LWR were obtained experimentally, helping to meet future technology requirements.

4:45 PM - P8.2

Atomically Sharp Germanium Nanowire-metal Heterostructures for Ω-gated High Performance MOSFETs and Quantum Devices.

Thomas Burchhart ¹, Clemens Zeiner ¹, Alois Lugstein ¹, Jonathan Silvano De Sousa ¹, Juergen Smoliner ¹, Emmerich Bertagnolli ¹
¹Institut of solid state electronic, Technical Univercity of Vienna, Vienna Austria

After more than four decades of classical integrated electronic circuit technology which followed Moore’s famous law, particularly semiconducting nanowires (NWs) are in the centre of interest as alternative building blocks for metal oxide field effect transistors (MOSFETs) as well as novel quantum devices. For both applications germanium appeared to be a favourable material for two reasons. First, the high carrier mobility enables high performance devices, and second, the large exciton Bohr radius implies, that quantum confinement effects of Ge nanostructures will be more prominent. We synthesized epitaxial Ge nanowires on Si substrates by a low-pressure chemical vapour deposition process using germane as a precursor, and Au as catalyst. Investigations of the morphology and the crystallographic orientations of the as grown NWs and the dependence on the vapor-liquid-solid (VLS) growth parameters temperature and pressure were performed. The effects of substrate orientation and catalyst thickness and the influence of different sample pre-treatments were also investigated. Further we explored a method for copper-germanide/germanium NW heterostructures formation with atomically sharp interfaces. The copper-germanide (Cu3Ge) formation process is enabled by a thermal induced chemical reaction between metallic Cu and the Ge-NWs. The atomic scale aligned formation of the Cu3Ge segments is controlled by in situ SEM monitoring at 310°C thereby enabling length control of the intrinsic Ge-NW down to a few nm. Successive EDX and TEM investigations exhibited the atomic sharp interfaces. The single crystal Cu3Ge/Ge/Cu3Ge heterostructures were used to fabricate Ω-gated Ge-NW field effect transistors with Schottky Cu3Ge source/drain contacts. Temperature dependent I/V measurements revealed the metallic properties of the Cu3Ge contacts with a maximum current carrier density of 5*10^7 A/cm^2. Prior the gate deposition the intrinsic Ge-NW was modified with a focussed Ga ion beam to increase the saturation current by a few orders of magnitude. According to the thermoionic emission theory we determined an effective Schottky barrier height reduction from 218meV to about 115meV due to Ga implantation.

5:00 PM - **P8.3

Epitaxial Ge-SixGe1-x Core-shell Nanowire Heterostructures and High Performance Field Effect Transistors.

Emanuel Tutuc ¹, Junghyo Nah ¹, Kamran Varahramyan ¹, En-Shao Liu ¹, Domingo Ferrer ¹, Sanjay Banerjee ¹
¹Electrical and Computer Engineering, University of Texas-Austin, Austin, Texas, United States

5:30 PM - P8.4

First Complementary Inverter Shown without Dopants as Implemented With Silicon Nanowires.

Andre Heinzig ¹, Walter Weber ^{1 5}, Monika Emmerling ², Martin Kamp ², Thorsten Roessler ³, Daniel Grimm ⁴, Thomas Mikolajick ¹
¹, Namlab gGmbH, Dresden Germany, ⁵, Qimonda AG, Munich Germany, ²Technische Physik, Universitaet Wuerzburg, Wuerzburg Germany, ³Institut für Halbleiter- und Mikrosystemtechnik (IHM), TU Dresden, Dresden Germany, ⁴, Leibniz Institute for Solid State and Materials Research (IFW), Dresden Germany

For the last 40 years most of the digital electronic applications have been based on complementary logic circuits. To this end, p- and n-type field effect transistors (FET) have been combined to exclusively consume significant power while switching. As the transistor scaling evolves, and sub-35 nm feature sizes will soon be implemented, an accurate and reproducible adjustment of the charge carrier concentration as required for p- and n-FETs has proven to be a difficult task. In this respect an alternative approach to doping that renders complementary digital circuits with low power consumption is presented here for the first time by implementing undoped Si nanowires (NW). Abrupt metal (NiSi₂) to semiconductor (Si) heterostructures have been created along the length of a NW, confining the Schottky contact area to the NW's diameter. Local electric field coupling over the nanometer size Schottky contact rendered an accurate control over the charge carrier injection as shown by temperature activation measurements. An improved gate coupling was enabled by the integration of ALD deposited HfO₂ and Al₂O₃ high-k dielectrics and subsequent anneal in forming gas. Double top-gate structures were used to couple independently to each Schottky junction of the FET. Thereby, one Schottky junction was used to block the undesired carriers while the other one tuned the injection of the carriers with the inverse polarity. Consequently, the same transistors could be programmed as p- and n-type FETs depending on the biasing of the individual top-gates. By combining p- and n-type programmed Si NW FETs the first complementary inverter circuits without doping were built. Indeed, the transfer characteristics (input voltage vs. output voltage) showed a clear and steep inversion behavior. Also, time resolved measurements showed stable inverted states over several periods without slope and bit-level degradation. Finally, in order to assess the principal scalability of the Si NW Schottky FETs single gated devices with reduced dimensions of the active region were studied. Successful gate control and saturation of the subthreshold characteristics were achieved for devices with gate lengths as short as 36 nm. Moreover, the effect of scaling different NW diameters ranging from 35 nm down to 7 nm will be presented. In synthesis, these results imply that all types of complementary digital functions can be performed using undoped Si NWs at a low power consumption.

5:45 PM - P8.5

Role of Geometry on Ion-implantation Into Nanowires.

Sarunya Bangsaruntip ¹, Guy Cohen ¹, Matthew Laurent ¹, Mikael Bjoerk ², Hesham Ghoneim ², Heinz Schmid ², Heike Riel ²
¹, IBM T.J. Watson Research Center, Yorktown Heights, New York, United States, ², IBM Zurich Research Lab, Zurich Switzerland

Ion implantation into nanowires requires additional considerations from those applied to implantation into continuous films, as the non-planar geometry and the small cross-section of nanowires strongly affect the resulting dopant dose and profile. For example, the small cross-section of a nanowire leads to implanted ions escaping through the nanowire’s sidewalls due to lateral straggle. These ions are not being replaced by ions escaping from adjacent material as would be the case if the nanowire was embedded in a film. The result is a net dopant loss in implanted, free-standing nanowires. Moreover, the dopant profile in nanowires is also affected by geometry, as the nanowire sidewalls form many facets at different angles with respect to the ion beam. The incident angle by which the ion enters the nanowire will substantially change the resulting projected range. Implantation damage can also be controlled and reduced by exploiting the nanowire geometry. This is done by spreading the total needed ion dose over the entire perimeter of the nanowire. By performing multiple, low dose ion implantations at multiple orientations - rather than a single, full dose ion implantation at one orientation- implantation damage can be significantly reduced.In this work, we have examined these geometrical effects. To better model ion-implantation into nanowires, we have expanded the established SRIM code to accommodate for geometrical effects. The enhanced code, SRIM 2D, rasters the ion beam to account for the nanowire’s non-planar surfaces and automatically calculates the angle of incidence by which the ions enter the nanowire. Similarly to the original, one-dimensional SRIM program, SRIM 2D tracks each ion trajectory in the nanowire, yet now allows for the ion to escape from any facet. Using the SRIM 2D program, we quantitatively estimated the effect of dopant loss as a function of the nanowire diameter. SRIM 2D also enabled us to obtain the cross-sectional dopant profile in implanted nanowires without the need to use expensive and computationally intensive simulation tools.To experimentally study damage reduction in ion implanted nanowires, we implanted vertical VLS grown Si nanowires using multiple orientations and compared the ion-implantation damage to a single orientation implant with the same total dose. Using TEM analysis, we found that the use of multiple orientations reduces damage. This approach is also expected to yield a more uniform junction formation in nanowires.

2010-04-08 Show All Abstracts

Symposium Organizers

Heike Riel IBM Research GmbH

Margit Zacharias University of Freiburg

Michael McAlpine Princeton University

Theresa Mayer Pennsylvania State University

P9: Nanowires - Mechanical and Thermal Properties

Session Chairs

Michael McAlpine

Thursday AM, April 08, 2010

Room 2016 (Moscone West)

9:30 AM - **P9.1

Exploring Fundamental Physical Limits With Nanowires and Nanomesh Films.

Ke Xu ¹, Peigen Cao ¹, Lidong Qin ¹, Ruo Gu ¹, James Heath ¹
¹Chemistry and Chemical Engineering, California Institute of Technology, Pasadena, California, United States

10:00 AM - P9.2

Effect of Uniaxial Strain on Transport Properties of Silicon Nanowires.

Emanuel Loertscher ¹, Giorgio Signorello ¹, Sigfried Karg ¹, Gotsmann Bernd ¹, Martin Enderlein ¹, Heinz Schmid ¹, Mikael Bjoerk ¹, W. Riess ¹, Kirsten Moselund ¹, Dirk Obergfell ¹, Heike Riel ¹
¹Science & Technology, IBM Research - Zurich, Rueschlikon Switzerland

Strain effects in Silicon thin-films were demonstrated to increase the performance of transistor devices. In Silicon nanowires (Si NW) strain engineering is even more important because of their one-dimensional geometry and high surface-to-volume ratio. We have developed a measurement technique that enables tensile and compressive stress, σ, to be applied to an individual Si NW while simultaneously measuring its electrical transport properties and performing Raman microscopy in-situ. Si NWs are grown by vapor-liquid-solid (VLS) method in <111> crystal direction at a pressure of 25 Torr and a temperature of 460 degree C from a Si substrate using Au colloidal particles (20, 40 and 60 nm diameter). By adding PH3 during growth, Phosphorus (P) is incorporated in the Si NW with a Si:P ratio of roughly 333:1, yielding a n-doping concentration of ca. 2 x 10E19 cm-3. A liquid flow alignment technique is used to align the Si NW (after being released from the Si substrate) in strain direction on a flexible, transparent polymer/metal substrate. Subsequently, the NW is contacted in a four-point geometry using electron-beam lithography. Without strain, the Si NWs reveal ohmic current-voltage characteristics with a measured four-probe resistance of typically 12 kΩ. The Raman shift was measured for electrically contacted NWs to range between (520.4 - 520.9) cm-1 (632 nm excitation), corresponding reasonably well to unstrained bulk Si. The application of mechanical stress to the crystalline structure of Si NWs results in a change in electrical conductivity. A symmetric strain effect on the NW four-probe resistance reveals an increase of 25% for compressive strain and -23% for tensile strain (supply voltage 100 mV), for ε = 1.0 % (measured Raman shift, Δλ = ± 8 cm-1). Strain effects on the electrical contacts can be excluded when measuring in four-probe configuration, hence the strain effect is intrinsic to the Si NW as confirmed by the Raman shift. Furthermore, the Si NW is strained in its elastic bending regime and no plastic deformation took place as can be proven by the in-situ measurement. We will report on the dependence of mechanical strain effects on the Si NW diameter, and doping concentration (n- and p-type charge-carrier concentration). Furthermore, effects of oxide layers surrounding the Si NW will be discussed and compared to standard CMOS fabrication.

10:15 AM - P9.3

Controllable Deformation and Mobility Measurement of Silicon Nanowires With Strain Up To 24%.

Sameer Walavalkar ¹, Andrew Homyk ², David Henry ¹, Axel Scherer ¹
¹Applied Physics , Caltech, Pasadena, California, United States, ²Electrical Engineering, Caltech, Pasadena, California, United States

10:30 AM - P9.4

Tuning of the Crystal Phase in III-V Nanowires Grown byAu-assisted Molecular Beam Epitaxy .

D. Dheeraj ¹, A. van Helvoort ¹, A. Moses ¹, T. Hoang ¹, B. Fimland ¹, H. Weman ¹
¹Department of Electronics and Telecommunications and Department of Physics, Norwegian University of Science and Technology, Trondheim Norway

10:45 AM - P9.5

Si Nanowires for Ultra-high Performance Nanoelectromechanical Systems.

Marta Fernandez-Regulez ¹, Marc Sansa ¹, Jose Plaza ¹, Francesc Perez-Murano ¹, Alvaro San Paulo ¹
¹, Instituto de Microelectronica de Barcelona, IMB-CNM (CSIC), Bellaterra Spain

The catalytic growth of semiconductor nanowires offers the possibility of achieving otherwise unfeasible structural conformations and material combinations at the nanoscale that result in unique physical properties. In consequence, nanowire devices based upon such bottom-up nanofabrication approach have the potential to go beyond not only the size reduction limits, but also the device functionality constraints of top-down lithography based technologies. This is particularly significant for nanoelectromechanical systems (NEMS) because their basic properties are greatly influenced by scaling-laws, thus resulting in completely extreme or different behaviour at the nanoscale.Among the wide variety of semiconductor materials and growth methods explored so far for bottom-up nanowire device research, Silicon nanowires obtained via the vapour-liquid-solid (VLS) mechanism remain as a central issue due to both their unique properties and their dominant relevancy in the electronics industry. In particular, VLS Si nanowires offer exceptional perspectives for applications in NEMS. Their structural quality and unique electromechanical properties (high stiffness and resonance frequencies, giant piezoresistance) together with recent advances in growth control, promise to achieve unprecedented performance of wide variety of NEMS, ranging from simple ultrasmall nanocantilevers to nanomechanical resonators.In this presentation we will describe several results concerning the fabrication, characterization and performance optimization of several Si NW based NEMS. By combination with top-down micro/nano fabrication methods, the VLS synthesis can be used to produce horizontally suspended nanowires between the sidewalls of prefabricated Si microstructures. This approach can be applied to obtain single nanowire or nanowire array based beam-like structures, which serve as basic building blocks for nanomechanical devices. In particular, we will describe the development of nanomechanical resonators and piezoresistive cantilevers as devices that would directly benefit from the extraordinary properties of Si nanowires. Specifically, it will be discussed how nanomechanical resonators based on individual, extremely small nanowires can contribute to approach the performance characteristics required for single-atom resolution mass spectrometry. Also, we will show the application of piezoresistive strain gauges based on highly dense nanowire arrays to obtain cantilevers with a detection limit for displacement sensing up to ten times better than that provided by state-of-the-art Si thin film piezoresistive cantilevers.

11:00 AM - P9: NW

BREAK

P10: Nanowire Characterization

Session Chairs

Raffaella Calarco

Thursday PM, April 08, 2010

Room 2016 (Moscone West)

11:30 AM - P10.1

Measuring Strength of VLS-grown Si Nanowires: AFM Bending vs. Nanoindentation.

Yong-Jae Kim ¹, Kwangsoo Son ¹, Jeung-hyun Jeong ², Won Il Park ¹, Jae-il Jang ¹
¹Division of Materials Science and Engineering , hanyang universty, Seoul Korea (the Republic of), ², Korea Institute of Science and Technology, Seoul Korea (the Republic of)

11:45 AM - P10.2

Strain Fields in Si/Ge axial Nanowire Heterostructures With Abrupt Interfaces.

Cheng-Yen Wen ¹, Mark Reuter ², Jerry Tersoff ², John Bruley ², Eric Stach ¹, Frances Ross ²
¹School of Materials Engineering and Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana, United States, ², IBM T. J. Watson Research Center, Yorktown Heights, New York, United States

Theoretical studies have demonstrated that one-dimensional Si/Ge heterostructures have the potential for applications in which band gap and carrier confinement are tailored near the interfaces. These applications are limited in planar growth because of the unavoidable effects of lattice mismatch, which include misfit dislocations and surface roughening. In heterostructure nanowires, grown for example by the vapor-liquid-solid (VLS) mechanism, lattice mismatch plays a much smaller role because elastic relaxation is easy in these nanoscale structures. However, the use of VLS nanowires creates a different problem, which is that abrupt interfaces can not be formed between Si and Ge. This limitation is due to the nature of the VLS growth process itself: the liquid phase catalyst acts as a reservoir for the growth species making it difficult to change composition rapidly. We have recently shown that compositional abruptness across the Si/Ge interface can instead be achieved by using the vapor-solid-solid (VSS) growth method. Here, we use the VSS technique to fabricate ultra-thin Ge layers in Si nanowires in order to understand the properties of the Si/Ge interface in band-gap engineering. The nanowires are grown by chemical vapor deposition using an AlAu₂ solid catalyst. By modulating the gas precursors disilane and digermane during growth, structures such as Si/Ge/Si or double-Ge layers are formed. We first describe the overall morphology of wires having Ge layers around ten atomic planes in thickness, as well as wires in which, in principle, less than one atomic plane of Ge has been included. We then show measurements of compositional abruptness using analytical microscopy, and quantification of the strain fields around the Ge layers using lattice imaging and geometric phase analysis. We will discuss the strain fields in the context of both finite element elastic calculations and calculations of band shifting near the interface, and consider possible applications of these ultra-thin quantum dots and barriers.

12:00 PM - P10.3

Direct Measurement of Minority Carrier Diffusion Length in Semiconductor Nanowires: Dependence on Temperature and Nanowire Diameter.

Afsoon Soudi ¹, Prabodh Dhakal ¹, Robert Dawson ¹, Yi Gu ¹
¹Physics and Astronomy, Washington State University, Pullman, Washington, United States

12:15 PM - P10.4

Characterization of Surface and Volume Electronic Properties of Passivated Silicon Nanowires.

Olivier Demichel ¹, Vincent Calvo ¹, Fabrice Oehler ¹, Pierre Noe ¹, Nicolas Pauc ¹, Bassem Salem ², Pascal Gentile ¹
¹, INAC/SP2M, Grenoble France, ², CNRS-LTM, grenoble France

In recent years, significant progress has been made in integration of silicon nanowires (SiNWs) into devices, and demonstrators have been presented in nano-electronics, nano-sensing, photovoltaics and thermoelectricity. Vapor-liquid-solid mechanism using gold as catalyst is the most commonly developed and studied SiNW growth method, even if gold is known to be a deep level defects which damages the electronic properties of contaminated silicon devices. Furthermore, as dimensions are scaling down, understanding and control of surface electronic properties become critical when realizing high-performance devices based on nanowires. Up to now, the characterization of the SiNW electronic properties were essentially performed by electrical measurements like EBIC, photo-conductance or capacitance-voltage experiments. Due to the difficulty to carefully manipulate NWs, and to perform efficient electrical contacts, especially once surfaces are passivated, measurements were essentially achieved on non-passivated NWs. On the contrary, photoluminescence (PL) experiments can be really useful to access to the NW electronic properties without any manipulation, and we already demonstrated by low temperature PL that carrier can be free in gold and copper catalyzed well-passivated SiNWs [1-2].Here, we demonstrate how a curious electron-hole thermodynamic phase : the electron-hole liquid (EHL) can be useful to characterize volume and surface electronic properties. The thermodynamic stability of the EHL allows to measure surface recombination velocities (SRV) of core-shell Si-SiO2 gold-catalyzed nanowires. This method allows also to study the influence of each passivation parameters, and SRV as low as 20 cm.s-1 are measured. Volume recombination rate of gold-catalyzed SiNWs is found to be similar to that of bulk silicon: the influence of the gold-catalyst is negligible even for extremely low SRV. These results advance the knowledge of SiNW surface passivation and provide essential guidance to the development of nanowire-based devices.1.O. Demichel et al, Applied Physics Letters 2008, 93 (21), 213104.2.O. Demichel et al, Nano Letters 2009, 9 (7), 2575.

12:30 PM - P10.5

Photogenerated Carrier Dynamics in Group IV Semiconductor Nanowires: Drift vs. Diffusion by Scanning Optical Probes.

Cheol-Joo Kim ¹, Yong-Jun Cho ¹, Hyun-Seung Lee ¹, Moon-Ho Jo ^{1 2}
¹Department of Materials Science and Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Gyungbuk, Korea (the Republic of), ²Division of Advanced Materials Science, Pohang University of Science and Technology (POSTECH), Pohang, Gyungbuk, Korea (the Republic of)

12:45 PM - P10.6

Transition Metal Doped Ge Nanowires and Co-axial Heterostructures.

Sven Barth ^{1 2}, Richard Hobbs ^{1 2}, Sonia Estrade ³, Olga Kazakova ⁴, Francesca Peiro ³, Justin D. Holmes ^{1 2}
¹Materials and Supercritical Fluids Group, Department of Chemistry and the Tyndall National Institute, University College Cork, Cork Ireland, ²Centre for research on Adaptive Nanostructures and Nanodevices (CRANN), Trinity College Dublin, Dublin Ireland, ³Dept. d'Electronica, University of Barcelona, Barcelona Spain, ⁴, National Physical Laborator, Teddington United Kingdom

P11: Nanowires - Thermal and Optical Properties

Session Chairs

Claes Thelander

Thursday PM, April 08, 2010

Room 2016 (Moscone West)

2:30 PM - **P11.1

Chemical Beam Epitaxy of InSb Nanowires.

Volker Schmidt ¹, Alexander Vogel ¹, Samuel Mensah ¹, Johannes de Boor ¹, Ulrich Goesele ¹
¹, MPI of Microstructure Physics, Halle Germany

3:00 PM - **P11.2

Novel Size-dependent Chemical Reactivity, Light-matter Interaction and Phase Change Properties of Semiconductor Nanowires.

Ritesh Agarwal ¹
¹Materials Science and Engineering, University of Pennsylvania, Philadelphia, Pennsylvania, United States

3:30 PM - P11.3

Improving Light Absorption in Thin Silicon Nanowire Photovoltaics.

Erik Garnett ¹, Mark Brongersma ¹, Yi Cui ¹, Mike McGehee ¹
¹Materials Science, Stanford University, Stanford, California, United States

3:45 PM - P11.4

Probing Efficiency Limits for Nanowire Photovoltaics.

Thomas Kempa ¹, James Cahoon ¹, Bozhi Tian ¹, Yajie Dong ¹, Charles Lieber ^{1 2}
¹Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts, United States, ²School of Engineering and Applied Sciences, Harvard University, Cambridge, Massachusetts, United States

4:00 PM - P11: NW

BREAK

P12: Nanowire Solar Cells

Session Chairs

Guy Cohen

Thursday PM, April 08, 2010

Room 2016 (Moscone West)

4:30 PM - P12.1

Efficient Single-wire Si Solar Cells.

Michael Kelzenberg ¹, Daniel Turner-Evans ¹, Morgan Putnam ¹, Shannon Boettcher ¹, Claire Baek ¹, Harry Atwater ¹
¹, California Institute of Technology, Pasadena, California, United States

Photovoltaic devices based on arrays of VLS-grown Si nano- or micro-wires are being investigated as potential low-cost alternatives to wafer-based Si solar cells. [1] Single-wire solar cells have been demonstrated with efficiencies of 3.4%, showing promise as nano-electronic power sources. [2] Device physics simulations have predicted that single-wire efficiencies exceeding 17% are achievable, based on experimentally-observed diffusion lengths within VLS-grown Si wires. Reaching such efficiencies, however, will require thorough understanding and control of the material quality and structure of such devices.We have developed a process to produce high-quality, radial diffused p-n junctions within single Si wires, ranging in diameter from 1.5 to 3.0 µm, yielding single-wire diodes and JFET devices. Under photovoltaic operation, these single-wire diodes behave as relatively efficient solar cells. They exhibit ideality factors of 1.1 – 2.0 in the dark; and up to 500 mV Voc with 75% FF under AM 1.5G illumination. Normalized to active device area, this yields photovoltaic efficiencies exceeding 6%, which we believe to be a record for this type of single-wire device. We will present the details of the fabrication and characterization of these devices, including the determination of: Doping level, junction profile, minority-carrier lifetime, diffusion length, surface recombination velocity, impurity distribution, and junction capacitance. We will also present a comprehensive 3D, coupled full-field-electromagnetic / device-physics model which has been leveraged to improve device geometry, as well as to extract physical parameters from experimental data such as the cell’s spectral response.Presently, the efficiency of these devices is limited by bulk and surface recombination mechanisms, as well as incomplete absorption of light. As grown, wires exhibit a surface-limited effective minority-carrier collection length of << 1µm, as observed by scanning photocurrent microscopy. By passivating the wire surfaces with a thin a-Si:H film, we have already increased this collection length to 10 µm, which has yielded devices with Voc > 550 mV, FF > 80%, and photovoltaic efficiencies exceeding 8%. We have also shown that the limiting bulk minority-carrier diffusion length is >> 20 µm, thus, we hope to achieve even greater efficiencies by using a thin Si3N4 film to simultaneously act as a passivating and anti-reflective layer to enhance absorption. We will present the results of these studies, and discuss the key factors for further improving the efficiency of radial-junction, Si wire solar cells. [1] Kayes, B. M., Atwater, H. A. & Lewis, N. S. Comparison of the device physics principles of planar and radial p-n junction nanorod solar cells. J. Appl. Phys. 97, 114302-114311 (2005).[2] Tian, B. et al. Coaxial silicon nanowires as solar cells and nanoelectronic power sources. Nature 449, 885-889 (2007).

4:45 PM - P12.2

Effects of Surface Preparation on the Diode Characteristics of Radial P-N Junction Silicon Wire Array Solar Cells.

Chito Kendrick ¹, Sarah Eichfeld ¹, Joan Redwing ^{1 2 4}, Yu Yuwen ², Heayoung Yoon ², Theresa Mayer ^{2 4}, Greg Barber ^{3 4}, Thomas Mallouk ^{3 4}
¹Material Science and Engineering, Pennsylvania State University, State College, Pennsylvania, United States, ²Department of Electrical Engineering, Pennsylvania State University, State College, Pennsylvania, United States, ⁴Materials Research Institute, Pennsylvania State University, State College, Pennsylvania, United States, ³Department of Chemistry, Pennsylvania State University, State College, Pennsylvania, United States

Radial p-n junction silicon wire arrays are of interest as a potential pathway to increase the efficiency and reduce the cost of crystalline silicon photovoltaics. In these structures, the p-n junction is formed along the outer surface of the wires yielding a short junction length which is beneficial for improving the efficiency of solar cells fabricated using lower purity Si material. Bottom-up techniques such as vapor-liquid-solid (VLS) growth are of interest for the fabrication of Si wire arrays, however, the use of gold catalysts is potentially problematic since gold forms deep level electronic states in silicon that reduce the lifetime of minority carriers. Furthermore, gold has been shown to diffuse rapidly on the surface of silicon nanowires during VLS growth forming nanoscale clusters. Effective surface cleaning strategies are therefore needed prior to radial p-n junction fabrication in order to reduce the effect of gold contaminants on solar cell performance.In this study, radial p-n junction silicon wire array solar cells were fabricated on lithographically patterned Si substrates using gold-catalyzed VLS growth. Si (111) substrates with a resistivity of 0.005 Ω-cm were prepared for patterning with a 300 nm thick SiO₂ layer. Areas of 2.5×2.5 mm were patterned with a GCA 8000 stepper; the patterns consisted of 0.5-5 µm diameter circles in a hexagonal array. Reactive ion etching was used to remove the oxide to expose the underlying silicon, which allows for a higher wire density compared to a wet etch. Gold was then thermally evaporated onto the patterned substrate, after which the excess gold was lifted off. Silicon wire growth was then carried out in an atmospheric pressure chemical vapor deposition system using SiCl₄ in an H₂ carrier gas at 1050°C to fabricate large area epitaxial wire arrays.Prior to radial junction fabrication, the gold catalyst was first removed from the wire tips using a commercial gold etchant, however, analysis of the tip surface revealed the presence of residual gold. A series of thermal oxidation and oxide etching steps were then used to remove the surface contamination layer. Thermal diffusion of POCl₃ at 1000°C for 13 mins was used to produce an n+ surface layer. An aluminum contact was deposited on the back surface of the p-type silicon substrate and indium was used for the top contact to the n+ silicon. Silicon wire array devices fabricated with the gold etchant only exhibited large reverse leakage currents, however, the rectifying properties of the diodes improved significantly after oxidation and etching. Photovoltaic measurements were carried out under AM1.5g illumination using a silicon aperture to confine the light to the wire array area of the device. The radial junction solar cells exhibited an efficiency of 2.3% for 3 μm diameter wires with an Voc of 0.5 V, Jsc of 8 mA/cm² and fill factor of 57%. The effect of wire diameter, spacing and length on solar cell performance will also be reported.

5:00 PM - P12.3

Semiconductor Nanowire Optical Antenna Solar Absorbers.

Linyou Cao ¹, Mark Brongersma ¹
¹Materials Science and Engineering, Stanford University, Stanford, California, United States

5:15 PM - P12.4

Tuning the Shape of Semiconductor Nanowires for Advanced Photovoltaics.

Jia Zhu ¹, Zongfu Yu ¹, Ching Mei Hsu ¹, Shanhui Fan ¹, Hailin Peng ¹, Ann Marshall ¹, David Barnett ¹, William Nix ¹, Yi Cui ¹
¹, Stanford University, Stanford, California, United States

Tuning the shape of nanostructures can have a strong effect on photon management and charge carrier collection for photovoltaics. Here we demonstrate two examples of nanowire shape designing: nanocones and branched nanowires.Compared to uniform diamter nanowires, nanocones have been shown for absorbing light with much reduced reflection due to near perfect impedance match. Here we demonstrate that nanocone arrays could absorb light with great enhancement beyond the Yablonovitch Limit, due to increased guiding modes and inter-mode coupling. One step further, we demonstrate a new concept of nanodome solar cells, with nanocone arrays as the center piece of this design. The nanodome solar cells will not only greatly reduce light reflection, but also efficiently couple light into propagating wave, which dramatically enhance light travelling path. This new design provides another approach to decouple the direction of light absorption and charge collection, but with much reduced surface area and material usage, compared to nanowire radial p-n junction structure. Amorphous Si solar cell was used as a demonstration of concept. Nanodome solar cells can absorb 46% more sunlight than flat film devices with the same thickness. We demonstrate nanodome devices with a power efficiency of 5.9%, which is 25% higher than flat film one. The large short circuit current of 17.5 mA/cm2 in nanodome devices exceeds that in world record single junction a-Si:H solar cells of the substrate configuration. This nanodome designs can be applied to a variety of other solar cell technologies, such as poly-Si and dye-sensitized devices. Preliminary results will also be presented. PbSe nanocrystals have shown greatly enhanced multi exciton generation (MEG) effect, one important step toward third generation solar cells. However, it is difficult o extract generated carriers from nanocrystals without good transport pathways. Three dimensional branched nanowire or nanotube networks, with strong quantum confinement within two dimensions, and the connected third dimension as an efficient charge carrier pathway, can be ideal for enhanced MEG effect, light absorption, and carrier collection. We demonstrate successfully a large area growth of PbSe Hyperbranced and Chiral Branched Nanowires on several different substrates. More excitingly, Chiral Branched Nanowires reveal a new nanowire growth mechanism, dislocation driven growth, which can be applied to a variety of materials.

5:30 PM - P12.5

Harvesting Light Using Nanostructured Surfaces.

Silke Diedenhofen ¹, Grzegorz Grzela ¹, Rienk Algra ², Erik P.A.M. Bakkers ², Jaime Gomez Rivas ¹
¹Center for Nanophotonics, FOM-Institute for Atomic and Molecular Physics (AMOLF), Eindhoven Netherlands, ², Philips Research Laboratories, Eindhoven Netherlands

5:45 PM - P12.6

GaP on Si Radial Junction Wire Array Solar Cells: Optical and Photovoltaic Properties.

Daniel Turner-Evans ¹, Michael Kelzenberg ¹, Adele Tamboli ¹, Manav Malhotra ¹, Nate Lewis ¹, Harry Atwater ¹
¹, Caltech, Pasadena, California, United States

VLS-grown Si microwire solar cells offer the possibility of efficient energy generation at low cost due to the decoupling of the light absorption and carrier collection directions. Light is absorbed along the length of the wires while carriers are collected radially, allowing for the use of inexpensive, relatively low diffusion length materials. We have grown Cu catalyzed, <111> oriented, Si microwire array solar cells that have attained diffusion lengths of > 20 microns, open circuit voltages of > 550 mV, and efficiencies of > 6% in single wire measurements and large area array energy conversion efficiencies of 2-3% in photochemical reactions[1]. Additionally, device physics simulations suggest potential efficiencies of over 17% [2,3]. These promising results have led us to consider a next generation GaP on Si wire array device. In addition to being nearly lattice matched to Si, GaP’s wide, indirect bandgap of 2.26 eV makes it a good candidate for forming a multi-junction wire cell with Si. We have already demonstrated the successful epitaxial growth of up to 2 microns of GaP on 1 micron diameter arrays of Si wires.Thus, we have set out to computationally explore the optical and electronic properties of GaP on Si wire array devices. Full field electromagnetic simulations predict that the GaP layer alone can absorb well over half of the incident above bandgap solar radiation without an AR coating and considering wires that are only 10 microns long with 7 micron spacing. Additionally, we have used a device physics solver to model the characteristics of both a GaP shell photovoltaic cell on Si support and a true multi-junction cell with diffused junctions in both the Si wire core and the GaP shell. A tunnel junction serves to connect the two. The former model suggests that we can reach efficiencies of greater than 10% in the GaP cell alone for diffusion lengths of only 1 micron with open circuit voltages of >1.6V. We will present the details of our models, explore current matching considerations, discuss the optimization of important parameters such as shell width and doping profiles to attain high tandem cell efficiencies, and delve into the cells’ IV behavior, spectral response, 2D carrier transport characteristics, and other physical characteristics.[1] S.W. Boettcher et al, Science, in review[2] M. D. Kelzenberg et al, Proceedings of the 33rd IEEE PVSC (2008)[3] B. M. Kayes, J.A.P. 97, 114302 (2005)[4] E.E. Barton et al., J. Am. Chem. Soc. 130, 6342 (2008)

P13: Poster Session: Nanowire

Session Chairs

Theresa Mayer

Michael McAlpine

Heike Riel

Margit Zacharias

Friday AM, April 09, 2010

Salon Level (Marriott)

9:00 PM - P13.1

Dielectrophoretically Aligned Nanowires for Large Area Electronics.

Sourobh Raychaudhuri ¹, William Wong ¹, Rene Lujan ¹, Robert Street ¹
¹, PARC, Palo Alto, California, United States

9:00 PM - P13.10

Growth and Analysis Optoelectronic Properties of Sn Doped ZnO Nanowires.

Yi-Ju Chen ¹, Chien-Lin Kuo ¹, Chuan-Pu Liu ¹
¹Department of Material Science and Engineering, National Cheng Kung University, Tainan Taiwan

9:00 PM - P13.11

Growth of Aligned Single-crystalline Rutile TiO2 Nanowires on Arbitrary Substrates and Their Application in Dye Sensitized Solar Cells.

Akshay Kumar ¹, Anuj Madaria ¹, Chongwu Zhou ²
¹Materials Science, USC, Los Angeles, California, United States, ²Electrical Engineering, University of Southern California, Los Angeles, California, United States

9:00 PM - P13.12

Growth of Periodic Arrays of Nanowires With Uniform Diameter.

Haeyeon Yang ¹, Seong-Nam Lim ¹
¹Physics, Utah State University, Logan, Utah, United States

9:00 PM - P13.13

Fabrication and Morphology Control of ZnO Nanowires by Hydrothermal.

Yung-kuan Tseng ¹, Yu-Hau Feng ²
¹Cultural Heritage Conservation, National Yunlin University of Science and Technology, Douliu, Yunlin, Taiwan, ²Graduate School of Materials Science, National Yunlin University of Science and Technology, Douliu, Yunlin, Taiwan

9:00 PM - P13.14

Fabrication and Characterization of the Cubic Phase CuS Nanowires.

Yen Chih Chen ¹, Chuan-Pu Liu ¹
¹, National Cheng Kung University, Tainan Taiwan

9:00 PM - P13.15

Zinc-catalyzed, Rapid Synthesis of Ultra Long Silica Nanofibers by Inductive Heating.

Kwok Siong Teh ¹, Joachim Pedersen ¹
¹School of Engineering, San Francisco State University, San Francisco, California, United States

Silica nanofibers are an interesting nanostructure for their variety of novel applications. The ultrahigh surface-to-volume ratio of 1-D nano-diamerter SiO2 makes it an ideal substrate for functionalized filtration media, catalyzed hydrogen scavenging, pumped lasing cavities when mesoporous, and at this scale, single-mode evanescent coupled light transport.We present a method for rapid synthesis of SiO2 nanofibers on a superheated Si(100) surface. Using a 13.56MHz inductive heating device we are able to reach a process temperature of approximately 1200°C in 2 minutes with 400WRF power. We flow a mass ratio of 99:1 Ar:O2 as a purge for 15min and process gas under a rough vacuum for 5 minutes.The inductive system is kept on for 5 minutes, and is then allowed to cool to room temperature. Our inductive heating apparatus heats a nickel heating element to a temperature of approximately 700°C. This heating element secondarily heats our undoped, silicon growth wafer to a temperature at which there is substantial charge mobility. Once this temperature is reached the Si wafer then continues to increase in temperature due to direct Joule heating from the applied magnetic flux. Due to the high frequency of the applied flux, 90% of the Joule heating occurs at a skin depth within 10µm of the surface. This allows superheating of the wafer surfaceUsing scanning electron microscopy (SEM). The cross section of a cleaved wafer clearly shows the base of the nanofibers growing from the wafer surface. The SiO2 nanofibers appear to be amorphous due to their round shape and arbitrary growth directions. In addition, the silica fibers tend also to randomly change growth direction while maintaining consistent diameters. Most common diameters are about 30nm. There are some fibers with diameters of several hundred nanometers and these fibers tend to change growth directions often. Our nanofibers have been observed to form bundles of thousands of fibers all growing parallel, as well as single fibers which grow independently within a mat of thousands of fibers. Lengths approach 500µm.Energy dispersive x-ray spectroscopy (EDS) has shown the presence of only zinc, silicon and oxygen. With the regions of the sample with what we believe to be SiO2 nanofibers having much more prominent signals for Si and O than for Zn. We have run several experiments without zinc present, and with graphite, and not seen the formation of any structures without the presence of zinc.We hypothesize the growth mechanism to be the following: conditions starve oxidation of zinc due to the higher electro-negativity of silicon. With Si being the sink for a majority of the O2 in the critical region nearest the wafer surface liquid zinc is able to function as a catalyst for a vapor liquid solid (VLS) SiO2 growth mechanism. At lower temperatures, for example ~1000°C, we do not see the formation of the silica nanofibers. With an increased Ar:O2 ratio there is no formation of nanofibers.

9:00 PM - P13.17

Growth from Melt and Phase Change Oscillations in Silicon Micro- and Nano-wires.

Ali Gokirmak ¹, Gokhan Bakan ¹, Adam Cywar ¹, Kadir Cil ¹, Faruk Dirisaglik ¹, Niaz Khan ¹, Nicholas Williams ¹, Mustafa Akbulut ¹, Helena Silva ¹
¹Electrical and Computer Engineering , University of Connecticut, Storrs, Connecticut, United States

Lithographically defined highly doped nanocrystalline silicon micro/nanowires are self-heated through single, large amplitude, microsecond voltage pulses, resulting in melting and growth from the melt upon termination of the pulse [1]. Voltage-pulse induced self-heating leads to significant conductance improvement, suggesting crystallization of the wires. Current-voltage characteristics of the wires during the voltage pulses are extremely non-linear, due to thermal runaway and melting of the wires (transitioning to a very low resistance state) in short time scales. Minimum resistivity of 75.0 ± 4.6 µΩ.cm, during the pulse, is extracted from systematic electrical characterization of wires with different dimensions, matching with previously reported liquid silicon resistivity values. SEM analysis of suspended wires anchored between two contact regions show very smooth wire surfaces after the voltage pulses compared to as-fabricated nanocrystalline texture, suggesting two single-crystal grain growth starting from the ends.

A load resistor can be used to self-terminate the crystallization process. However, addition of a parallel capacitor results in relaxation oscillations in the current as the wire repeatedly transitions from solid to liquid state as the parallel capacitor charges up and discharges over the melting wire. Two distinct oscillations have been observed for slightly different geometries: First leading to ~1 MHz oscillations limited by RC charge up and discharge times with very high current levels (~ 5 mA to 20 mA, corresponding to ~ 108 A/cm²) [2], second leading to ~ 10 ns current spikes with ~ 7 mA amplitudes, rise and fall times < 350 ps and ~ 9 MHz repletion rate. The first type of oscillations correspond to wire changing between liquid and solid phases, the second type of oscillations (current spikes) are due to mechanical connection and disconnection of the wire in liquid state, possibly due to expansion and contraction of the wire as it partially melts and resolidifies at the two ends.

Significant thermoelectric effects [3-4] are observed in the melting and solidification of these structures.

[1] G. Bakan, A. Cywar, H. Silva and A. Gokirmak, "Melting and crystallization of nanocrystalline silicon microwires through rapid self-heating," Appl. Phys. Lett., vol. 94, pp. 251910, 2009.

[2] A. Cywar, G. Bakan, C. Boztug, H. Silva and A. Gokirmak, "Phase-change oscillations in silicon microwires," Appl. Phys. Lett., vol. 94, pp. 072111, 2009.

[3] D. K. C. MacDonald, Thermoelectricity: An Introduction to the Principles. Mineola, N.Y.: Dover Publications, Inc., 2006.

[4] D. M. Rowe, Thermoelectrics Handbook:Macro to Nano. DRC, 2006.

9:00 PM - P13.19

Transport Measurements Through Metal and Semiconductor Nanowires With Multi-probe STM.

Kevin Critchley ², Marcin Gorzny ², Bishnu Khanal ³, Eugene Zubarev ³, Nicholas Kotov ¹, Stephen Evans ²
²School of Physics and Astronomy, University of Leeds, Leeds United Kingdom, ³Dept of Chemistry, Rice University, Leeds, Texas, United States, ¹Chemical Engineering, University of Michigan, Ann Arbor, Michigan, United States

9:00 PM - P13.2

Template-assisted Electrodeposition of Bismuth Nanowires for Electronic Applications.

Andrew Monica ¹, Lesly McAnelly ¹, Lance Baird ¹, Ryan Deacon ¹, Stergios Papadakis ¹, Joan Hoffmann ¹
¹, Johns Hopkins University Applied Physics Laboratory, Laurel, Maryland, United States

9:00 PM - P13.20

Annealing Effects on Ion-implanted ZnO Nanorods.

Sang-Wook Han ¹, Byunghyuk Kim ¹, Changin Park ¹, Zhenlan Zin ¹, Changha Kwak ², Soo Young Seo ², Sun-Hyo Kim ², Sun Hong Park ³
¹Physics Education, Chonbuk National University, Jeonju Korea (the Republic of), ², Pohang University of Science and Technology , Jeonju Korea (the Republic of), ³, Reach Institute of Industrial Science & Technology, Pohang Korea (the Republic of)

9:00 PM - P13.22

Structural Transition from MgZnO Nanowires to Nanowalls by Phase Separation Introduced by Mg Injection.

Dong Chan Kim ¹, Young Sook Bae ¹, Hyung Koun Cho ¹
¹School of Advanced Materials Science & Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do, Korea (the Republic of)

Among the nanostructures, low-dimensional ZnO nanowires have been the subject of intense research for applications in short-wavelength light-emitting devices and ultraviolet field emitters on account of their wide band gap and high exciton binding energy. However, in order to achieve excellent device performance and easy fabrication, it is essential to develop vertically aligned catalyst-free nanowires of suitable density with high crystallinity and optical quality. Among all the synthesis methods, metalorganic chemical vapor deposition (MOCVD) has been demonstrated to be a promising tool with particular advantages of large area and catalyst-free epitaxial growth, accurate doping, and in-situ compositional modulation for nano-device fabrication. However, the ZnO based nanowires grown by MOCVD had several principal problems such as (i) broad diameter (~100 nm), (ii) high density, (iii) formation of interfacial layers between substrate and nanowires, and (iv) critical evaporation temperature of Zinc precursors. The high temperature growth of nanowires by MOCVD provides an effective path of achieving slim nanowires with high crystallinity and optical quality. In the recently reported research, the ultra slim and vertically aligned ZnO nanowires were grown on Si substrates by MOCVD using low-temperature homo-buffer and high-temperature growth for nanowires [1]. But, the interfacial layers between the nanowires and substrates should be eliminated because it has internal defect sites such as dislocation, vacancy, stacking faults, etc [2].In this work, we reported a method for fabricating slim and vertically aligned MgZnO nanowires or nanowalls through size competition of two phases composing of single crystal MgZnO seeds (Zn-rich phase) and amorphous MgZnO layers (Mg-rich phase), which was induced by phased separation at relatively high Mg fluxes. The phase-separated Zn-rich single crystal MgZnO seed layers allowed the growth of slim MgZnO nanowires or nanowalls, while the Mg-rich amorphous-like thin layers around the single crystal MgZnO seeds hindered the formation of nanowires. This study presented that the phase separation formed at initial growth stage by incorporating Mg can control the shape of nanostructures without interfacial layers in bottom-up process for the fabrication of Si based optoelectronic nano-devices.Reference[1] D. C. Kim, S. K. Mohanta, and H. K. Cho, "Vertically aligned ultra-slim ZnO nanowires formed by homo-buffer: growth evolution and emission properties", Crystal Growth & Design. in press[2] D. J. Park, J. Y. Lee, D. C. Kim, S. K. Mohanta, and H. K. Cho, Appl. Phys. Lett. 91, 143115 (2007)

9:00 PM - P13.23

A Novel in situ Uniaxial Testing Methodology for Mechano-Electrical Measurements of Micro/Nano-scale Specimens.

Wonmo Kang ¹, Taher Saif ¹
¹, University of Illinois, Urbana, Illinois, United States

We present a MEMS based micro-apparatus that allows mechano-electrical testing of nano-micro scale samples in situ in SEM and TEM. In situ observation of samples at high resolution reveals fundamental mechanism of deformation of materials and their size dependence at small scale. The sample can be fabricated separately from the apparatus, a significant advance from the existing methods. Hence, samples from a wide range of materials and sizes can be tested. As a test of the apparatus, it is employed to measure stress-strain response, fracture strength, and electrical resistivity as a function of strain of single crystal silicon with sample cross sectional dimensions from ~10² down to ~10¹ μm². We recover the known elastic modulus, and piezoresistive properties of SCS within 99.99% accuracy.Materials behavior strongly depends on their structural and micro structural size scale. Hence their bulk properties cannot be extrapolated to small scale that are of interest to MEMS and NEMS. Previously, we developed a MEMS stage that allowed testing of thin films in situ in SEM and TEM. The stage revealed unusual properties and new fundamental mechanisms of deformation at nano scale. Due to cofabrication of the stage and the sample, the choice of the materials and sample dimensions were limited. Though these limitations were addressed by an assembly approach which mimics standardized marco-scale tensile test, this stage was limited to mechanical measurements only. The new MEMS apparatus overcomes this limitation and allows concurrent measurement of mechanical and electrical properties to explore their coupled interactions.Single crystal silicon specimens, one of the most commonly used piezoresistive materials, were fabricated and tested to demonstrate the capability of the new stage. Stress-strain response, fracture strength, and electrical resistivity as a function of strain are independently and simultaneously measured. The uniform loading was confirmed by the equality of strain at top and bottom of the specimen. From the stress-strain response of two SCS samples with cross sectional areas of ~100µm² and ~1µm², the elastic modulus of both the samples is 173±2GPa, close to the expected value of 169GPa for SCS along <110> direction. However, the fracture strain and stress are size dependent, 2.07% and 3.18% for the larger and the smaller samples respectively. Finally, piezoresistance measurement from two independent specimens and stages agrees not only with each other, but also with previously reported data in the literature.

9:00 PM - P13.24

Planar <110>-oriented GaAs and InGaAs Nanowires Laterally Grown on GaAs (311)B Substrates by Au-catalyzed Vapor-liquid-solid Mode.

Guoqiang Zhang ¹, Kouta Tateno ¹, Hideki Gotoh ¹, Hidetoshi Nakano ¹
¹, NTT Basic Research Laboratories, Atsugi Japan

Recently, semiconductor nanowires (NWs) have become the center of attention due to their exceptional versatility and a wide range of potential applications, from electronics and photonics to biochemistry and medicine [1]. Integration of the NWs-based devices has been problematic and usually uses vertically aligned NW array for devices with a vertical structure [2] or ex-situ assembly techniques to align the NWs for devices with a planar structure [3]. It is very advantageous for the integration of NW-based devices and development of new applications to grow NWs laterally on substrates with a planar structure by an in-situ process. In this work, we developed a new approach to grow <110>-oriented lateral GaAs and InGaAs NWs on GaAs (311)B substrates via Au-particle-catalyzed vapor-liquid-solid (VLS) mode and show that the lateral NWs have high controllability in terms of size, site, position, cross-sectional shape, and composition. Au colloidal particles dispersed on GaAs substrate were used to conduct the growth of GaAs NWs in a low-pressure metalorganic vapor phase epitaxy system [4]. We grew lateral GaAs NWs with the <110> orientation on (311)B substrate via the Au-catalyzed VLS mode under an optimized growth condition. The NWs can be controlled in terms of the size and density by using size- and density-selective Au colloidal particles. The site-specific growth of the lateral NW array was also achieved by using Au dot array defined by electron-beam lithography. Regarding the growth mechanism of the lateral NWs, we clarified that the lateral NW growth is significantly dependent on the polarity of substrates. The lateral NWs must be faceted by the faces with low surface energies such as (111)B and (001). Therefore, the lateral NWs only along the <110> direction can be faceted by the stable faces. The optical properties of NWs can also be tuned by changing the cross-sectional shape such as triangle and rectangle [5]. We controlled the cross-sectional shape of the lateral NWs by modifying their side facet structure. This was achieved by using substrates with different crystalline orientations. The lateral NW grown on (311)B exhibits a triangular cross-sectional shape with only two side facets, while the NW grown on (001) exhibits a trapezoidal one with a large top (001) facet and two small side high-index facets. In addition, we successfully grew InGaAs lateral NWs on GaAs (311)B substrate by introducing In source during GaAs NW growth. [1] Mater. Today 9(10) (2006) 18-45. [2] T. Bryllert, et al.: Nanotechnology 17 (2006) S227. [3] Y. Huang, et al., Science 291 (2001) 630. [4] K. Tateno, et al.: Appl. Phys. Lett. 89 (2006) 033114; G. Zhang, et al.: J. Appl. Phys. 103 (2008) 014301; K. Tateno, et al.: Nano Lett. 8 (2008) 3645. [5] H. Ando, et al., J. Appl. Phys. 74 (1993) 6383; Sogawa, et al., Appl. Phys. Lett. 67 (1995) 1087.

9:00 PM - P13.25

Growth and Electrical Characterization of Branched Nanowire Heterostructures.

Florian Schmid ¹, Alois Lugstein ¹, Mathias Steinmair ¹, Emmerich Bertagnolli ¹
¹Institute of Solid State Electronics, Vienna University of Technology, Vienna, Vienna, Austria

9:00 PM - P13.27

Vertically Aligned p-type Single-crystalline GaN Nanorod Arrays on n-type Si for Heterojunction Photovoltaic Cells.

Yongbing Tang ¹, Zhenhua Chen ¹, Haisheng Song ¹, Chunsing Lee ¹, Hongtao Cong ¹, Huiming Cheng ¹, Wenjun Zhang ¹, Igor Bello ¹, Shuit-Tong Lee ¹
¹Department of Physics and Materials Science, City University of Hong Kong, Hong Kong China

9:00 PM - P13.28

Doping and Electrical Characterization of Individual Silicon Nanowires.

Pratyush Das Kanungo ¹, Xin Ou ^{2 1}, Reinhard Koegler ², Nikolai Zakharov ¹, Peter Werner ¹, Wolfgang Skorupa ², Ulrich Goesele ¹
¹, Max Planck Institute of Microstructure Physics, Halle Germany, ²FWIM, Forschungszentrum Dresden-Rossendorf, Dresden Germany

9:00 PM - P13.29

Preparation and Characterization of Highly Conductive Sn-doped In2O3 Nanowires for Optoelectronic Devices.

Kyung-Soo Park ^{1 2}, Young-Jin Choi ¹, Kyoung Jin Choi ¹, Yun-Mo Sung ², Wonjoo Lee ³, Sung-Hwan Han ³, Jae-Gwan Park ¹
¹, Korea institute of science and technology, Seoul Korea (the Republic of), ², Korea University, Seoul Korea (the Republic of), ³, Hanyang University, Seoul Korea (the Republic of)

9:00 PM - P13.3

Muscle Driven in-vivo Nanogenerator.

Guang Zhu ¹, Zhou Li ¹, Rusen Yang ¹, Zhonglin Wang ¹
¹, Georgia Institute of Technology, Atlanta, Georgia, United States

Harvesting energy from environment is crucial for independent, wireless and sustainable operation of nanodevices. This is a key technology for building self-powered nanosystems. A single piezoelectric-fine-wire based alternative current nanogenerator has been applied for harvesting biomechanical energy under in-vivo conditions. We demonstrated the implanting of the nanogenerator in a living rat to harvest energy generated by its breathing and heart beating. We first converted the mechanical deformation due to the periodic expansion and contraction of the diaphragm of a rat into electricity. The single wire generator (SWG) was attached to the diaphragm surface of the rat, to which a respirator was used as a life-sustaining technique. The inhalation and exhalation of the mouse resulted in the alternative expansion and contraction of the diaphragm, which in turn produced periodical stretching and releasing of the SWG, respectively. The piezoelectric potential created in the piezoelectric wire drove the electrons to flow back and forth through an external circuit in response to the physical expansion and contraction of the diaphragm. The short-circuit current (Isc) and open-circuit voltage (Voc) were measured to exam the performance of a SWG. On average, the magnitude of the voltage and current signals are ~1 mV and ~1 pA, respectively. Also, control group was conducted, in which the rat breathed in an autonomous manner without the help of the respirator. Electric power output of similar pattern as that of the respirator-sustained breath was recorded with larger magnitude and wider electric signal peaks, which are due to physiological characteristics of the autonomous breath. The second group of experiments was to apply a SWG to harvest mechanical energy from the heart beating of a living rat. On average, the voltage and current outputs were ~3 mV and ~30 pA, respectively. This study shows the potential of applying nanogenerators for scavenging low-frequency dynamic muscle stretching energy created by very small-scale physical motion for possible application of driving in-vivo nanodevices.

9:00 PM - P13.31

Growth Mechanisms of (0001) Zinc Oxide Nanowires on (11-20) Sapphire.

Suman-Lata Sahonta ¹, Angelica Lee ², Jonathan Barnard ¹, Mark Welland ²
¹Materials Science and Metallurgy, University of Cambridge, Cambridge United Kingdom, ²Nanoscience Centre, University of Cambridge, Cambridge United Kingdom

Zinc oxide is well-known for its ability to form a variety of nanostructures such as wires, rings and belts. Nanowires are particularly promising owing to their potential for use in solar cells, one–dimensional transistors and field emitters. Due to the relative ease of ZnO crystal growth by various methods including chemical vapour deposition (CVD), hydrothermal synthesis and physical vapour deposition (PVD), a vast number of reports detailing the engineering of ZnO-based devices have been made, with relatively few studies dedicated to basic mechanisms. This work presents the detailed study of growth mechanisms in [0001]-aligned ZnO nanowires by transmission electron microscopy (TEM) and X-ray diffraction (XRD). The PVD method has been employed in this case for nanowire growth, which involves the use of catalytic Au droplets to guide the condensation of ZnO vapour onto the growth facet of the nanowires, and allows large arrays of strain-free identical 4 µm-long nanowires to be synthesised quickly and reproducibly on (11-20)–plane sapphire. TEM studies show that all wires are defect-free save one or two planar defects close to the catalyst/ZnO interface. The defects are always located approximately ten monolayers from the catalyst interface, parallel to the (0001) plane, and are revealed to be I₁-type stacking faults, analogous to single zinc blende units embedded in a wurtzite matrix. The origin of these defects is attributed to the presence of a reservoir of reactant Zn remaining in the supersaturated eutectic catalyst droplet after the vapour pressure of adatoms is reduced. XRD rocking curves show a single (002) peak with high diffraction intensity corresponding to growth with the c-axis of ZnO perpendicular to the sapphire (0001) surface. The full width at half maximum (FWHM) value is 0.22 °, indicating a high crystalline quality. The presence of a single interfacial step at the Au/ZnO interface confirms that growth of the (0001) facets of the nanowires is two-dimensional and by step-flow. The small size of the alloy droplets results in their remaining in the liquid state below the eutectic temperature, allowing VLS growth to be maintained for some minutes after cooling below the eutectic point, until the sublimation temperature of the ZnO/graphite mixture is reached. On cooling, the reduction in the reactant gas vapour pressure limits the available zinc in the eutectic droplet reservoir, leading to the formation of the stacking fault, and causing an accompanying reduction in the nanowire thickness at the top facet interface. Such observations confirm the VLS mechanism of nanowire growth and are consistent with the observed interfacial strain. The results suggest that careful control of the growth temperature may allow the introduction of stacking faults at will. Given that stacking faults are known to confine carriers in the same way as quantum wells, this allows potential for band gap engineering in one-dimensional optoelectronic devices.

9:00 PM - P13.32

Straight and Helical In2Se3/SiO2 Core-shell Nanowires: Synthesis, Structure and Growth Mechanism.

Congjian Pei ¹, Quan Li ¹
¹Department of Physics, The Chinese University of HongKong, HongKong China

9:00 PM - P13.33

Polarization-resolved Micro-photoluminescence Study of Nanowires Containing AlGaN/GaN Quantum Disc Structures.

Lorenzo Rigutti ¹, Maria Tchernycheva ¹, Andres De Luna Bugallo ¹, Gwenole Jacopin ¹, Francois Julien ¹, Franck Fortuna ², Florian Furtmayr ³, Martin Stutzmann ³, Martin Eickhoff ⁴
¹Institut d' Electronique Fondamentale, University of Paris Sud 11, Orsay France, ²Centre de Spectroscopie Nucléaire et de Spectroscopie de Masse, University of Paris Sud 11, Orsay France, ³Walther Schottky Institut, Technical University Munich, Munich Germany, ⁴I. Physikalisches Institut, Justus Liebig University, Giessen Germany

GaN/AlGaN nanowires (NWs) are subject of intense study due to their appealing applications for nanoscale optoelectronic devices [1,2]. The NW geometry allows to incorporate single- and multi-quantum discs (SQDiscs, MQDiscs) with emission properties overcoming the limitations of Stranski-Krastanov quantum dots [3] and potential application to UV single photon sources. In the recent years, the role of the shape of these nanoscale systems and its influence on the polarization anisotropy of optical absorption and emission spectra have been thoroughly studied. However, the polarization of emission of NW quantum structures has not been investigated so far.We report a systematic study of the luminescence properties of AlGaN/GaN S- and MQDisc structures in single NWs with varying Al content. We demonstrate that the emission from the NW body is polarized along the NW axis (π polarization), while the QDisc emission is polarized perpendicularly to the NW axis (σ polarization). The quantum structures are situated on the top of GaN NWs grown in the polar [0001] direction. Nanowires are synthesized by plasma-assisted molecular beam epitaxy under nitrogen rich growth conditions at a substrate temperature of T = 780°C on Si (111) substrates. Single NWs are studied by means of micro-photoluminescence (µ-PL) and transmission electron microscopy (TEM). The PL energy of single and multi-quantum disc systems is explained in terms of Al content in the barriers, band bending at the upper polar surface, and strain relaxation in the heterostructure region. The polarization-resolved µ-PL study has been carried out on different QDisc samples.Single NWs exhibit at T=4K two main luminescence contributions: one is peaked at E=3.45 – 3.48 eV related to near-band edge (NBE); the other, lying at higher energy, is related to excitonic transitions confined in the MQDisc. The NBE PL peak is π polarized due to the dielectric index contrast between the wire and the surrounding medium [4]; it contains contributions from both XA and XB exciton states (related to heavy and light holes, respectively) and blue shifts when the polarization is rotated from σ to π. The MQDisc PL is σ polarized according to the selection rules for the XA exciton transition in wurtzite quantum structures [5], which is the only populated state at T=4K. The same polarization-resolved analysis performed at T=300K shows that thermal population of light hole states in the MQDisc induces the blue shift of the PL peak upon rotation of the polarization from σ to π. This shift reflects the energy split between XA and XB levels in the quantum structure, and is in good agreement with the predictions of a 1D effective mass model.[1] Kikuchi, A., et al., Express Letters, 43, L1524 (2004)[2] S. Gradečak, et al. Appl Phys Lett 87, 173111 (2005)[3] J. Renard, et al. Nano Lett 8 (7), 2092 (2008)[4] H. E. Ruda and A. Shik, Phys Rev B 72, 115308 (2005)[5] S. L. Chuang and C. S. Chang, Phys Rev B 54, 2491 (1996)

9:00 PM - P13.34

Shift of Vth in Doped ZnO Nanowire Field Effect Transistors.

Kyoungwon Kim ^{1 2}, Pulak Debnath ¹, Dong-Hoon Park ¹, Sangsig Kim ², Sang Yeol Lee ¹
¹Center for Energy Materials Research, KIST, Seoul Korea (the Republic of), ²Department of Electrical Engineering, Korea Univ., Seoul Korea (the Republic of)

9:00 PM - P13.35

General Synthesis and Atom-probe Mapping of Semiconducting Boride Nanowires.

Joseph Brewer ¹, Robert Jacobberger ¹, Chin Li Cheung ¹, David Diercks ²
¹Chemistry, University of Nebraska-Lincoln, Lincoln, Nebraska, United States, ², Center for Advanced Research & Technology, Denton, Texas, United States

9:00 PM - P13.36

Solar Hydrogen Generation Using Titania Nanotube Arrays.

Sergey Pronkin ¹, Thomas Cottineau ¹, Yeuk Ting Law ¹, Nicolas Keller ¹, Valerie Keller ¹, Elena Savinova ¹
¹Laboratoire des Matériaux, Surfaces et Procédés pour la Catalyse-European Laboratory for Catalysis and Surface Sciences, CNRS-Louis Pasteur University, Strasbourg France

In recent years, the increasing concern for climate changes and the diminution of fossil fuels reserve increase the interest for a hydrogen economy [1]. Hydrogen is an interesting energy carrier but another energy source is needed for its production. For a sustainable development, a renewable energy source is needed, and solar energy appears as an interesting choice. The first demonstration of water photocatalysis with titanium dioxide by Fujishima and Honda [2] initiate numbers of investigations in order to improve the water photosplitting using a semiconductor.In spite of is large band gap (3.1 eV) TiO2 appears as a good photocalysis material with an excellent chemical stability. New hydrothermal [3] or electrochemical [4] synthesis method appears in the last decade leading to the formation of TiO2 nanofibers or nanotubes. Using nano-structurated TiO2 electrodes enhance the photogeneration of hydrogen through the high surface area of the particles, the improved charge separation and the low recombination of the photogenerated carriers. The modifications of the titanium dioxide energy band structure by doping with different elements appears as a key challenge to reduce the energy band gap and increase the light absorption of the titanium.The preparation of TiO2 nanotube arrays by anodic oxidation of Ti foil was performed by anodization of Ti foil in flouride-containing electrolyte. The stucture and morphology of TiO2 layers were varied by changing the preparation conditions. In particular, anodization time and voltage, composition and viscosity of electrolyte were adjusted. The titanium nanotube array are tested as prepared and after a thermal treatment in different conditions. The morphology of formed TiO2 nanotubes (nanotubes inner/external diameter, length) is characterized by scanning and transmission electron microscopy. Electronic structure of nanotubes is studied by electrochemical methods (electron transfer polarization curves, electrochemical impedance spectroscopy), reflection UV-vis spectroscopy and XPS.Dependence of structure, composition and morphology of synthesized TiO2 layers on preparation conditions is explored. Correlation between the characteristic electronic and morphologic parameters of TiO2 layers and their performance in water photosplitting is discussed.[1] C.A. Grimes, O.K. Varghese, S. Ranjan; Light, Water, Hydrogen; Springer Editor (2008).[2] A. Fujishima, K. Honda; Nature; 238 (1972) 37.[3] T. Kasuga, M. Hiramatsu, A. Hoson, T. Sekino, K. Niihara; Langmuir; 14 (1998) 3160.[4] D. Gong, C.A. Grimes,O.K. Varghese, W. Hu, R.S. Singh, Z. Chen, E.C. Dickey; J. Mater. Res.; 16 (2001) 3331.

9:00 PM - P13.37

Mechanisms and Kinetics of Negative Nanowire Formation in GaN and ZnO Layers Using in-situ Transmission Electron Microscopes.

Bong-Joong Kim ¹, Jerry Tersoff ², Eric Stach ¹
¹Materials Engineering, Purdue University, West Lafayette, Indiana, United States, ²Research Division, IBM T.J. Watson Research Center, Yorktown Heights, New York, United States

Crucial to nanotechnology is the creation of nanoscale building blocks of various sizes and shapes. Nanostructures of wide band-gap gallium nitride and zinc oxide are of particular interest because of their applications in short-wavelength optoelectronic devices and high-power/high-temperature electronics. Here, we report the results of in-situ microscopy studies of negative nanowire formation and kinetics in the temperature regime where GaN and ZnO are spontaneously decomposed. We first used the thin GaN layers removed from their sapphire growth substrates using laser lift-off method. The layers contain a high density of crystalline defects such as dislocations (typically on the order of 10^8 ∼ 10^10 cm^-2). The samples were annealed at temperatures between 850 and 1100 °C within the objective lens of transmission electron microscopes. Above 925 °C nitrogen desorption first becomes visible at the thinnest edges of the TEM sample. Concomitant with this is the preferential dissociation of GaN along the cores of pure screw dislocations and defect free surface, resulting in the formation of hexagonal "nano-pipes" in [0001]. The pipes range from 10 nm to 50 nm in diameter. In regions with small residual stresses, liquid Ga drops are formed and they lead to create hollow "nano-tubes" in the three close-packed <10-10> on the basal plane by SLV (Solid-Liquid-Vapor) mechanism. Reflecting their shapes, we consider the two different features as "negative nanowires." By directly measuring the growth of the lateral negative wires, we found that the growth rate is constant and it is independent of wire diameter. This indicates that the rate-limiting step is dissociative decomposition of GaN on the gallium droplet's surface. We compare the above with evaporation of defect free ZnO layers at the annealing temperatures between 500 and 850 °C. Above 600 °C, the samples start to evaporate. Similar to GaN, we found the development of vertical nano-pipes ranging from 10 nm to 20 nm in diameter but no lateral negative nanowires, which could be related to the absence of liquid-forming catalyst during evaporation. We believe that the formation of negative nanowires reported here could potentially be used as nano-templates and patterns in several applications such as solar cells, LEDs, and FETs.

9:00 PM - P13.38

Raman Studies on the Dopant Incorporation into GaAs:Si Nanowires.

Bernt Ketterer ¹, Carlo Colombo ¹, Emanuele Uccelli ¹, Anna Fontcuberta i Morral ¹
¹Laboratory of Semiconductor Materials (Institute of Materials), Ecole Polytechnique Federale de Lausanne, Lausanne Switzerland

The preeminent role of semiconductors in modern technology is essentially due to the fact that the electrical and optical properties of these materials can be controlled and manipulated through the incorporation of doping atoms. However, many characterization methods that have been successfully employed in bulk semiconductors in the past cannot be applied to nanostructures like nanowires. Therefore, Raman spectroscopy is due to its contactless nature and its high spatial resolution an essential alternative for the determination of impurity concentrations and their spatial distribution inside the material. Impurities can be observed in the Raman spectrum of semiconductors either via scattering by internal electronic excitations [1] or via scattering by localized vibrational modes associated with motions of the impurity atoms [2] . In this study we report about GaAs nanowires grown by Molecular Beam Epitaxy (MBE) via a self-catalytic vapor-liquid-solid (VLS) process [3]. During the growth, silicon atoms, known as amphoteric dopants in GaAs, are incorporated into the host lattice under different growth conditions. The basic mechanisms of the doping process, which are either incorporation of silicon atoms through the liquid catalyst into the core or onto the surface by uncatalysed decomposition, are addressed in this study. Key issues for the direct synthesis with dopants, like the atomic position and the homogeneity of the distribution of these dopants inside the nanowire are investigated by means of a local vibrational mode (LVM) analysis. Among the Raman active elementary excitations, the coupling of electron or hole plasmons with the longitudinal optical phonon, moderated by the macroscopic field created by both types of excitations, hold important information on the free carrier system of doped semiconductors. Raman measurements of these coupled LO phonon-plasmon modes are compared with the results of the LVM analysis to complete our picture of the dopant incorporation during nanowire growth. References:[1]D. Olego, M. Cardona, Phys. Rev. B 24, 7217 (1981)[2]M.J. Ashwin, M.R. Fahy, R.C. Newman, J. Wagner,D.A. Robbie, M.J.L. Sangster, I.Silier, E. Bauser, W. Braun, K. Ploog, J. appl. Phys. 76, 7839 (1994)[3]A. Fontcuberta i Morral, C. Colombo, J. Arbiol, J.R. Morante, G. Abstreiter, Appl. Phys. Lett. 92 063112 (2008)

9:00 PM - P13.39

Kinked Semiconductor Nanowire Superstructures.

Bozhi Tian ¹, Ping Xie ¹, Thomas Kempa ¹, Yongjie Hu ¹, Charles Lieber ^{1 2}
¹Department of Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts, United States, ²School of Engineering and Applied Sciences, Harvard University, Cambridge, Massachusetts, Harvard University, Cambridge, Massachusetts, United States

9:00 PM - P13.4

Nanostructured Si Arrays by Colloidal Lithography and Metal-assisted Chemical Etching for Antireflection Coatings.

Hsin-Ping Wang ¹, Yi-Ruei Lin ¹, Chin-An Lin ¹, Jr-Hau He ¹
¹Electrical Engineering, Photonics and Optoelectronics, Taipei Taiwan

9:00 PM - P13.40

Electrochemical Fabrication of Porous Ge Nanowires.

Xuezhen Huang ¹, Jeffrey Coffer ¹
¹Chemistry, Texas Christian University, Fort Worth, Texas, United States

Porous semiconductors elicit extensive interest as a consequence of their increased surface area and nanostructured features, thereby creating materials with opportunities for enhanced performance in optics, solar energy, and drug delivery/biosensing platforms. Traditional fabrication methods for semiconductors such as silicon (Si) have emphasized anodic or open circuit electrochemistry from bulk single crystals, thereby producing supported thin films or freestanding microparticles of the given matrix. The notion of creating one dimensional (1D) structures of even higher surface areas/porosities by porosifying nanowires is a difficult challenge, and has only recently been addressed in the case of etching silicon NWs.1-3Given its reactivity (both with and without bias), elemental germanium (Ge) presents an even more challenging case. Thus this presentation describes the fabrication of porous Genanowires by the anodization of Genanowires (grown on Si substrates) using ethanolic HCl as an electrolyte. An initial cathodic Cu electrodeposition step is found to provide useful kinetic control of the pore morphology and stabilizing the nanowires attached to the Si surface. A systematic evaluation of the role of electrolyte composition, current/voltage density, and its duration on the resultant Ge NW morphology and structure have been carried out. High resolution transmission electron microscopy (HREM), energy dispersive x-ray analysis, and selected area electron diffraction (SAED) have been employed for this purpose. In terms of fundamental photophysical properties, preliminary photoluminescence (PL) measurements using HeCd laser excitation at 325 nm suggest strong emission in the visible region. 1. J. Coffer, S. Dunkle, J. Wu, A. Loni, and L. Canham, 5th International Conference - Porous Semiconductor Science and Technology, 2006, Extended Abstract, O3-03.2.A.I. Hochbaum, D. Gargas, Y.J. Hwang, and P. Yang, Nano Lett.2009, doi: 10.1021/nl9017594 .3.Y. Qu, L. Liao, Y. Li, H. Zhang, Y. Huang, and X. Duan, Nano Lett.2009, doi: 10.1021/nl903030h.

9:00 PM - P13.41

Engineering Light Absorption in Semiconductor Nanowire Devices.

Linyou Cao ¹, Justin White ², Mark Brongersma ¹
¹Materials Science and Engineering, Stanford University, Stanford, California, United States, ²Department of Applied Physics, Stanford University, Stanford, California, United States

9:00 PM - P13.42

Surfactant-templated Mesoporous Metal Oxide Nanowires.

Qianglu Lin ¹, Stacy Baber ¹, Mahesh Naalla ¹, Hongmei Luo ¹
¹Chemical Engineering, New Mexico State University, Las Cruces, New Mexico, United States

9:00 PM - P13.43

Phase Transitions, Melting Dynamics, and Diffusion in a Nano Test Tube.

Vincent Holmberg ¹, Matthew Panthani ¹, Brian Korgel ¹
¹Chemical Engineering, The University of Texas at Austin, Austin, Texas, United States

9:00 PM - P13.44

Growth and Physical Properties of Manganese Silicide Nanowires - Signature of Helimagnetism.

Jeremy Higgins ¹, Ruihua Ding ¹, John DeGrave ¹, Song Jin ¹
¹Department of Chemistry, University of Wisconsin - Madison, Madison, Wisconsin, United States

9:00 PM - P13.45

Aharonov-Bohm Eeffect in Bi Nanowires.

Leonid Konopko ^{1 2}, Tito Huber ³, Albina Nikolaeva ^{1 2}
¹Institute of Electronic Engineering and Industrial Technologies, Academy of Sciences of Moldova, Chisinau Moldova (the Republic of), ², International Laboratory of High Magnetic Fields and Low Temperatures, Wroclaw Poland, ³, Howard University, Washington, District of Columbia, United States

In the presence of magnetic flux, Aharonov-Bohm (AB) oscillations [1] may occur in doubly connected systems. For a normal metal, the period of these oscillations is h/e (the flux quantum). For the disordered cylindrical samples with a short mean free path (compared with the circumference of the cylinder) the AB oscillations with the period proportional to h/2e was predicted by Al’tshuler, Aronov, and Spivak (AAS) [2]. This effect arises from the interference of pairs of coherent electron waves circumscribing the cylinder.Here we present our results for observation of Aharonov-Bohm (AB) oscillations in Bi nanowires with a diameter d<80 nm. The nanowire samples with glass coating were prepared by improved Ulitovsky technique and represented cylindrical single crystals with (1011) orientation along the wire axis. Semimetal Bismuth has electrons and holes with very low effective masses, as a result, electronic quantum confinement effects induce a semimetal-to-semiconductor transformation (SMSC) for wires with diameters below 50 nm. Angle-resolved photoemission spectroscopy (ARPES) studies of planar Bi surfaces have shown that it supports surface states with strong spin-orbit interactions. The surface carriers become majority in nanowires with diameters below 100 nm at low temperatures; the ratio of surface carrier density to bulk electrons or holes is 12 for 55 nm wires. At that point, the Bi nanowire should effectively become a conducting tube. The oscillations of longitudinal magnetoresistance (MR) of Bi nanowires with two periods proportional to h/e and h/2e were observed. We propose an interpretation of the observed h/e oscillations of MR in terms of oscillations in the density of surface states [3]. The oscillating contribution to the MR with the period h/2e is due to the AAS effect. From B~8 T down to B=0 the extremums of h/2e oscillations are shifted up to 3π at B=0 which is the manifestation of the Berry phase shift due to electron moving in a nonuniform magnetic field. In contrast to experiments with rings of 2D holes in GaAs where the phase shift for h/e oscillation was equal to ±π, in our case we obtained 3π shift for h/2e oscillation only in one direction. The period of equidistant oscillation of MR was measured at various inclined angles of magnetic fields relative to nanowire axis up to 90^o. Obtained results allow us to propose Bi nanowires for spintronic applications.This work was supported by the Academy of Sciences of Moldova, Grant No. 09.808.05.02A.1. Y. Aharonov and D. Bohm, Phys. Rev., 115, 485, (1959).2. B. L. Altshuler, A. G. Aronov, and B. Z. Spivak, Zh. Eksp. Teor. Fiz., Pis. Red., 33, 101, (1981). [JETP Lett., 33, 94, (1981).]3. A. Nikolaeva, T. Huber, D. Gitsu, L. Konopko, Phys. Rev. B 77, 075332 (2008).

9:00 PM - P13.46

Synthesis of CdSe and CdS Nanowires Arrays via Epitaxially Growing on CdSe Nanoribbons: Optical and Electronic Properties.

Guohua Li ^{1 2}, Yang Jiang ¹, Jiansheng Jie ³
¹School of materials and Science, Hefei University of Technology, Hefei, Anhui, China, ²Chemical Engineering , University of California, Berkeley, Berkeley, California, United States, ³Applied physics department, Hefei University of Technology, Hefei, Anhui, China

9:00 PM - P13.47

Experimental Study of Structural, Electrical, and Optical Properties of Zinc Oxide Nanostructures.

Sung Kyu Lee ¹, Daqing Zhang ¹, Christine Berven ², Robert Devitt ¹, Vanvilai Katkanant ¹
¹Physics, California State University, Fresno, Fresno, California, United States, ²Physics, University of Idaho, Moscow, Idaho, United States

9:00 PM - P13.48

Metal Contacts, Passivation Effects, and Device Stability for Si Nanowire FETs.

William Wong ¹, Sourobh Raychaudhuri ¹, Sanjiv Sambandan ¹, Rene Lujan ¹, Robert Street ¹
¹Electronic Materials and Devices Laboratory, Palo Alto Research Center, Palo Alto, California, United States

9:00 PM - P13.49

Structuring Silicon Wire Photocathode Arrays to Increase Light Absorption.

Matthew Bierman ¹, Shannon Boettcher ¹, Bruce Brunschwig ¹, Nathan Lewis ¹
¹Chemistry and Chemical Engineering, California Institute of Technology, Pasadena, California, United States

9:00 PM - P13.50

Piezoresistive Strain Gauges Based on Si Nanowire Array.

Marta Fernandez-Regulez ¹, Jose Antonio Plaza ¹, Alvaro San Paulo ¹
¹, IMB-CNM, CSIC, Bellaterra, Barcelona, Spain

The use of integrated piezoresistive sensors for electromechanical transduction in micro and nano electromechanical systems(MEMS and NEMS) implies important advantages with respect to other approaches such as optical or magnetomotive transduction. Piezoresistive readout of motion of nanomechanical structures enables applications where difficulties in laser alignment make optical detection inconvenient, or when the restrictive experimental conditions needed for magnemotive detection make device testing impractical. Unfortunately, typical detection limits obtained with conventional Si thin film piezoresistive strain gauges are still below the values provided by these other methods. In this contribution we present the development of ultrasensitive piezoresistive strain gauges that exploit the exceptional mechanical and piezoresistive properties of catalytic grown Si nanowires. We have developed a fabrication process that allows the implementation of nanowire-based strain gauges in MEMS and NEMS, which is demonstrated here for piezoresistive cantilever sensors. The cantilever design is based on the standard double-leg piezoresistive cantilever sensor and we found that the array must be located at the base of the cantilever and only in one side of the neutral axis to ensure that only compressive or tensile stress occurs when the cantilever is deflected. Fabrication of such structure has been achieved by lithography guided growth of Si nanowires via VLS mechanism. Guided growth was possible by using a selective area catalytic deposition method that ensures nanoparticle deposition only in Si exposed areas but not on oxidize one. The diameter, density and doping concentration of the nanowire array are all controlled by tuning the growth conditions.Piezoresistive characterization of the device sensitivity was made by applying a force on the tip of the cantilever with an AFM and simultaneously measuring the relative change of the array resistance. We have studied the sensitivity with the array in compression and tension and taking into account possible buckling effects for nanowires with smaller diameters. The resulting analysis reveals that the high piezoresistive coefficients and the effect of stress accumulation in the nanowires produce a device sensitivity around two orders of magnitude higher than values reported for cantilevers based on bulk Si. On the other hand, noise is important in determining the detection limit. Experimental results about the characterization of electrical noise will be discussed and compared with theoretical estimations. We found that Hooge noise (1/f) is the dominant source due to the reduced volume of the nanowires array resistor and thus the low number of carriers. Our results determine that piezoresistive strain gauges based on Si nanowire arrays can reach a detection limit that improves in more that one order of magnitude that of state of the art of piezoresistive cantilevers based on bulk Si.

9:00 PM - P13.51

Dislocation-driven Growth of ZnO Nanowires.

Stephen Morin ¹, Matthew Bierman ², Jonathan Tong ¹, Song Jin ¹
¹Department of Chemistry, University of Wisconsin - Madison, Madison, Wisconsin, United States, ²Department of Chemistry, California Institute of Technology, Pasadena, California, United States

9:00 PM - P13.53

Heterostructure GaAs/InGaAs/GaAs Nanowires Grown Using An Alternative Patterning Pathway on Etched GaAs Substrates.

Aloysius Gunawan ¹, Smitha Jha ³, T. Kuech ^{1 2}
¹Chemical and Biological Engineering, University of Wisconsin-Madison, Madison, Wisconsin, United States, ³Chemistry Department, University of Wisconsin Madison, Madison, Wisconsin, United States, ²Chemical and Biological Engineering, University of Wisconsin Madison, Madison, Wisconsin, United States

An alternative method towards a controlled vapor-liquid-solid (VLS) growth of heterostructure nanowires was carried out using anodic alumina assisted etching of GaAs as the patterned substrates. As opposed to the more common patterning mechanism which incorporates the presence of the anodized alumina membrane (AAM) during the growth of nanowires as templates, this alternative process uses AAM to etch GaAs substrates before nanowire synthesis. The AAM was synthesized using chemical anodization of 500 nm evaporated Al film on GaAs substrates. After the entire Al layer has been converted to alumina, substrate etching occurred on regions in contact with the electrolyte through the pores in the AAM. This resulted in the formation of indentations on the substrates with controllable shapes and sizes, which serves as pinning sites to prevent coalescence during the critical annealing step of Au catalysts in VLS nanowire growth. Au films were deposited using thermal evaporation on the etched GaAs substrates after the AAM has been removed. Anodization at 40 V in 0.3 M oxalic acid immediately followed by 6 min substrate etching with 2 nm thick evaporated Au islands was an optimal set of process parameters used to subsequently obtain dense (~500 µm^-2) 16.8 ± 4.7 nm diameter gold particles. This is about twice the density typically achieved when employing annealed Au films to form Au nanoparticles on bare GaAs substrates. Prolonged substrate etching resulted in a disordered indentation arrangement that eliminated the size uniformity of the annealed gold nanoparticles. Varying the thickness of the Au films to 1 and 3 nm altered the average diameter of the annealed Au nanoparticles to 13.5 ± 3.4 and 18.9 ± 5.8 nm. The Au nanoparticles were then used as the seed catalysts to grow GaAs/InGaAs/GaAs nanowires using metal organic vapor phase epitaxy (MOVPE). The nanowires retain similar size and density distributions as the initial seed particles. The length of the nanowires was 750 nm - 1 µm on average with 50 nm In_xGa_1-xAs layer as observed in high angle annular dark field-scanning transmission electron microscopy (HAADF-STEM). Photoluminescence spectroscopy was used to determine the composition (x) in the In_xGa_1-xAs layer using Ar-ion laser at 30 K. The In composition, x, was calculated to be 10 at. % using Varshni formula fitted with the observed InGaAs peak at 1.35 eV. The presence of In was verified by energy dispersive x-rays using a combined STEM (EDX-STEM). The patterning of the GaAs using this template approach suppresses the lateral surface diffusion of Au allowing for the control size and density of the heterostructure nanowires. Au diffusion can limit the narrowness of the wire distribution in other approaches. The technique described and demonstrated here is a practical and cost-effective way to fabricate uniform GaAs/In_xGa_1-xAs/GaAs nanowires over large areas.

9:00 PM - P13.54

Large-area Si Microwire Array Solar Cell Design and Fabrication.

Morgan Putnam ¹, Shannon Boettcher ¹, Daniel Turner-Evans ¹, Michael Kelzenberg ¹, Emily Warren ¹, Joshua Spurgeon ¹, Nathan Lewis ¹, Harry Atwater ¹
¹, California Institute of Technology, Pasadena, California, United States

Arrays of Si microwires provide a promising pathway for the development of efficient, crystalline Si photovoltaics with thin-film fabrication costs[1]. Recently, we have fabricated absorption-limited, single-wire photovoltaic devices with a Voc of 550 mV, Jsc of 10. mA/cm², FF of 0.81, and overall efficiency of greater than 4 % when normalized to the entire wire area (measured under a simulated AM 1.5G spectrum). To utilize these wires in a large-area, low-cost solar cell with moderate to high efficiencies (as compared to wafer-based crystalline Si technologies), a low-cost fabrication scheme will be presented for integrating microwires in an aligned array without inducing shunts, large series resistances or significant contact shadowing losses.As a first step in the development of a transparent top-contact, opaque Al top-contacts have been evaporated onto wire arrays in order to evaluate the dark IV characteristics of Si microwires connected in parallel. Top-contact areas were defined with either a shadow mask during the Al evaporation or a physical isolation step post-evaporation. For a representative contact with a contact area of 0.00084 cm² (~ 1300 wires), dark IV curves exhibited diode behavior with an ideality factor of 1.6 and dark current of 4×10^-9 A. These results are in good agreement with the dark IV characteristics obtained from single wire measurements, where ideality factors range from 1.1 to 1.6 and dark current is ~ 5 pA/wire. Thus the quality of our large-area diodes suggests that our fabrication process for producing arrays of Si microwire diodes is capable of yielding efficient photovoltaics with the development of a transparent top-contact.Though the Al top-contact was optically thick at the wire tip, the contact was not optically thick along the sidewalls of the wire. This allowed for preliminary measurements of a Si microwire array’s photovoltaic properties under a simulated AM 1.5G spectrum. A Voc of 110 mV, Jsc of 0.10 mA/cm² and FF of 0.41 were measured (η = 0.0045%) . As expected the η and Jsc are low; Voc however is quite high given the low Jsc. This relatively high Voc further indicates the high-quality of the large-area, Si microwire array diode.[1] M. D. Kelzenberg, M. C. Putnam, D. B. Turner-Evans, N. S. Lewis, and H. A. Atwater, Proceedings of the 34th IEEE PVSC, 2009.

9:00 PM - P13.55

Pulsed VLS and ALD Growth of Antimony Chalcogenide Nanowires and Heterostructures.

Ren Bin Yang ¹, Julien Bachmann ², Nikolai Zakharov ¹, Oussama Moutanabbir ¹, Ulrich Goesele ², Kornelius Nielsch ¹
¹Experimental Department II, MPI-Halle, Halle, Saxony Anhalt, Germany, ²Institute of Applied Physics, University of Hamburg, Hamburg Germany

9:00 PM - P13.6

Terahertz Emission from Vertically-aligned Silicon Nanowires.

Yong Jae Cho ¹, Gyeong Bok Jung ¹, Yoon Myung ¹, Han Sung Kim ¹, Jeunghee Park ¹, Chul Kang ²
¹, Korea University, Jochiwon Korea (the Republic of), ², Advanced Photonics Research Institute, Gwangiu Korea (the Republic of)

9:00 PM - P13.8

Direct Observation and Analysis of the Gibbs-Thomson Effect in Germanium Nanowires.

Shadi Dayeh ¹, Eli Sutter ², S. Picraux ¹
¹Center for Integrated Nanotechnologies, Los Alamos National Laboratory, Los Alamos, New Mexico, United States, ²Center for Functional Nanomaterials, Brookhaven National Laboratory, Upton, New York, United States

Progress in the synthesis of semiconductor nanowires (NWs) has prompted intensive discussions of the science of their growth and the technological applications they promise. The diversity in synthesized materials and synthesis techniques has lead to improvising previously accepted models in some cases, and contradicting them in others. Contradictory diameter-dependent growth rates can be explained for III-V NWs due to the interplay of gas phase reactions, surface diffusion, and heterogeneous reactions that limit mass transport[1,2] but are not expected to apply for elemental semiconductors (Si,Ge) whose growth is limited by the vapor-liquid and liquid-solid reactions directly at the growth seed. [3,4,5] Ge, the increasingly important electronic counterpart of Si, has received less attention in terms of detailed studies on growth kinetics, and related effects of doping species – necessary for making useful devices – have never been explored before. In this contribution, we present systematic characterization of the diameter-dependent growth behavior in doped and undoped Ge NWs and provide the first experimental evidence of the Gibbs-Thomson effect by correlating growth rates to the measured Ge solubility fraction in different diameter Au nanoparticles/NWs from in-situ TEM measurements. Our experimental results can be summarized as follows: (i) Ge NW growth rate decreases for small diameters with and without the presence of PH3 and B2H6 dopants that vary supersaturation requirements (growth rates) but have negligible effects on the NW morphology. (ii) There are no synergetic effects with lateral spacing for the case of Ge NWs. (iii) The observed growth rates at different temperatures can be accurately modeled by the classical empirical model of Givargizov,3 and that of Schmidt et al.[6] providing a predictive growth capability (iv) The liquidus temperature for Ge in Au is shown by in situ TEM to be significantly depressed and size-dependent, consistent with lower supersaturations and our observed lower growth rates. These results affirm the applicability of the Gibbs-Thomson effect for elemental semiconductor nanowires and provide new insights on thermodynamic aspects of nanoscale alloys. [1] Borgstrom, M. T., Immink, G., Ketelaars, B., Algara, R., & Bakkers, E. P. A. M. Nature Nano. 2, 541 (2007). [2] Dayeh, S. A., Yu, E. T., Wang, D. Nano Lett. 9, 1967 (2009). [3] Givargizov, E. I. J. Cryst. Growth 31, 20 (1975). [4] Weyher, J. J. Cryst. Growth 43, 235 (1978). [5] Kodambaka, S., Tersoff, J., Reuter, M. C., Ross, F. M. Phys. Rev. Lett. 96, 096105 (2006). [6] Schmidt, V., Senz, S., Gosele, U. Phys. Rev. B 75, 045335 (2007).

9:00 PM - P13.9

Effects of Surface Passivation on Gate Hyteresis of Si Nanowire Field-effect Transistor.

Jeong-Hoon Heo ¹, Kyung-Soo Park ¹, Jae-Gwan Park ¹, Gyu-Tae Kim ², Kyoung Jin Choi ¹
¹Nano-Materials Research Center, Korea Institute of Science and Technology (KIST), Seoul Korea (the Republic of), ²Department of Electrical Engineering, Korea University, Seoul Korea (the Republic of)

2010-04-09 Show All Abstracts

Symposium Organizers

Heike Riel IBM Research GmbH

Margit Zacharias University of Freiburg

Michael McAlpine Princeton University

Theresa Mayer Pennsylvania State University

P14: Nanowire Applications: Solar Cells and Sensing

Session Chairs

Friday AM, April 09, 2010

Room 2016 (Moscone West)

9:30 AM - P14.1

The Optical Properties of Coated Nanowires for Solar Cells.

Robert Street ¹, William Wong ¹
¹, Palo Alto Research Center, Palo Alto, California, United States

9:45 AM - P14.2

Numerical Simulation of Single- and Multi-junction Nanowire Solar Cells.

Evan Pickett ¹, Anjia Gu ², James Harris ¹
¹Materials Science , Stanford University, Stanford, California, United States, ²Applied Physics, Stanford University, Stanford, California, United States

Nanowire and nanopillar array solar cells have the potential to be more efficient than traditional planar cells. However, laboratory cells have been limited to efficiencies of less than 6%. Single nanowires of Si or GaAs have efficiencies that are lower still. Here, we use Sentaurus Device, a numerical device simulator, to examine the potential efficiencies of single- and multi-junction (MJ) nanowire solar cells (SCs) consisting of Si, Ge, GaAs, and InGaP, in differing arrangements. In order to check simulation accuracy, devices published in the literature were also simulated, and the simulation parameters adjusted to match real devices as closely as possible, while identifying sources of loss in nanowire SCs. The AM1.5G spectrum was most frequently used.Several types of cells are examined. The first is the “radial cell,” in which the wire has a pn structure grown radially on a core-shell wire. The other is the “vertical” MJ nanowire SC, which mirrors the vertical arrangement of planar MJ SCs, with one absorber stacked on top of another. A single-junction cell usually consists of a hetero- or homo-junction pn radial cell.In addition to simple device design and geometry, Sentaurus is used to identify optimal materials choices, layer widths, and doping levels. In nanowires, surface recombination plays a large role in efficiency, due to the large surface are to volume ratio; the effect of surface recombination in single- and MJ nanowire SCs will be explored. Initial results show that surface recombination is not a dominant factor if traditional surface passivation methods, such as InGaP windows on GaAs, are used. Completely unpassivated surfaces do significantly reduce efficiency, usually to 1-2% or less. The applicability of tunnel junctions to nanowire SCs, as opposed to planar MJSCs exposed to >500 suns concentration, will also examined.Initial results show a lower efficiency for simulated nanowire cells of any geometry, usually ~5%, versus optimal planar designs using similar materials. For InGaP/GaAs multi-junction nanowires, Jsc, Voc, FF, and efficiency are higher than for single-junction GaAs or InGaP nanowire SCs. For simulated GaAs/Ge cells, performance is decreased compared to individual GaAs wires, but is better than Ge nanowire SCs.

10:00 AM - P14.3

Heterogeneous Assembly of Nanowires for Vertically-integrated 3D CMOS Circuits and Multiplexed Biosensor Arrays.

SungWoo Nam ¹, Xiaocheng Jiang ², Lu Wang ², Donhee Ham ¹, Charles Lieber ^{1 2}
¹School of Engineering and Applied Sciences, Harvard Univ., Cambridge, Massachusetts, United States, ²Department of Chemistry and Chemical Biology, Harvard Univ., Cambridge, Massachusetts, United States

10:15 AM - P14.4

Self-assembly of Powdered and Oriented Titania-based Nanotube Arrays for Solar Photoconversion Applications.

Shankar Muthukonda Venkatakrishan ¹, Nicolas Keller ¹, Valerie Keller ¹, Thomas Cottineau ¹, Sergey Pronkin ¹, Elena Savinova ¹
¹Laboratoire des Matériaux, Surfaces et Procédés pour la Catalyse-European Laboratory for Catalysis and Surface Sciences, CNRS-Louis Pasteur University, Strasbourg France

Recently, the synthesis and applications of one-dimensional titanate-based nanostructures in powdered or arrays form in renewable energy technologies has attracted increasing attention. There is a growing awareness that nanostructured materials can provide solutions for a wide range of energy problems including solar electricity, hydrogen generation and fuel cells applications [1]. In photocatalysis, titania nanotubes (TiNTs) showed enhanced photocatalytic efficiency enabled by tubular structure with high charge carriers generation and transfer efficiency. However, together with visible light activation, higher efficiency is challenging task. The fundamental challenges are to develop entangled or oriented, controlled and self-assembled 1D-TiO2-based nanostructures for improving the light absorption, generation and transfer of electrons and specific surface area. Additionally, oriented self-assembled nanostructures bonded with substrate/or detach-transferable to any kinds of substrates, whatever their nature and morphology, are much more encouraging for a broad range of applications. Here, we report on the use of hydrothermal synthesis method for driving both powdered and oriented self-assembly nanoarrays of titanate nanotubes (TiNTs) for efficient H2 production through water-splitting and solar cells applications, respectively. The report will discuss different parts: Hydrothermal synthesis of TiNTs and tuning band-gap by N-doped TiNTs, composite semiconductor (WO3-TiNTs) and oxygen deficient sites. Powdered TiNTs was synthesized by hydrothermal method at 150°C starting from commercial TiO2 (P25 Degussa) suspension (7g of TiO2 powder in 10M NaOH solution) in a teflon fitted steel autoclave. After 24 h of synthesis, the white precipitate was washed consequently with water, dil.HCl solution and ethanol and then dried in vacuum desiccator at 50°C. For band-gap tuning dried TiNTs were mixed with appropriate precursors (urea for N-doping, tungstic acid for WO3) before calcinations. Otherwise, oxygen deficient structure of TiNTs was prepared by calcinations under H2 flow.The oriented TiNTs nanoarrays can be driven by dissolution either of a titanium foil or of a sputtered Ti film in concentrated alkaline solution by tuning both temperature and duration of the synthesis, providing oriented arrays in a spatially confined manner. We demonstrate the possibility of obtaining these oriented arrays strongly anchored to a Ti-based (foil or sputtered film) substrate or detachable in a self-standing way (to eventually further deposit them on a Ti-free substrate) by post-synthesis treatment. The solar photo-conversion efficiencies shown by these TiNTs arrays are also compared with a fluffy powder in a classical Graetzel cell. These oriented TiNTs arrays could be a promising way for a new generation of solar cells or photosensors.[1] Bavykin, D.V., Friedrich J.M., Walsh F.C., Advanced Materials, 18, (2006) 2807

10:30 AM - P14.5

A Portable Multiplexed Biosensing Platform Based on Assembled Complementary Nanowire Transistor Arrays.

Lu Wang ¹, SungWoo Nam ², Sirui Zou ¹, Quan Qing ¹, Charles Lieber ^{1 2}
¹Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts, United States, ²School of Engineering and Applied Sciences, Harvard University, Cambridge, Massachusetts, United States

10:45 AM - P14.6

Interpenetrated Silicon Nanopartical - Silicon Nanowire Structure for Li-ion Anodes.

Liangbing Hu ¹, Hui Wu ¹, Lifeng Cui ¹, Seung Sae Hong ¹, Yi Cui ¹
¹, Stanford, Stanford, California, United States

11:00 AM - P14: NW

BREAK

P15: ZnO Nanowires I

Session Chairs

Hongjin Fan

Friday PM, April 09, 2010

Room 2016 (Moscone West)

11:30 AM - P15.1

Polarization-dependent Photoluminescence of Oblique-aligned ZnO Nanowire Arrays.

Cheng-Ying Chen ¹, Jun-Han Huang ², Chuan-Pu Liu ², Jr-Hau He ¹
¹Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taipei Taiwan, ²Department of Materials Science and Engineering, National Cheng Kung University, Taipei Taiwan

ZnO has a direct band gap of 3.37 eV with a large exciton binding energy (60 meV) at room temperature. Due to the strong binding energy of excitons, ZnO are recognized as a promising material for optoelectronic applications in the UV region. [1–5] One-dimensional nanoscale semiconductor materials have attracted considerable attention due to the ultrahigh surface-to-volume ratio, which results in the tailored electronic and optical properties. [6–8] In this work, we report a polarization-dependent behavior of optical property arising from oblique-aligned ZnO nanowire arrays. The oblique-aligned ZnO nanowires were grown on bent ZnO columns using hydrothermal process and oblique-angle sputtering. The structural characterization of the ZnO nanowires arrays was performed using scanning electron microscopy, transmission electron microscopy, and x-ray diffraction analysis, demonstrating that the direction of the nanowires and c-axis (0002) of ZnO were oblique-aligned. Photoluminescence measurements show that the intensity of deep level emission (DLE) from ZnO nanowires is strongly polarized while near band-edge emission (NBE) shows the weak dependence on polarization. As the electrical field is perpendicular to the c axis of the ZnO, the intensity of DLE (green emission) and NBE (UV emission) exhibits the maximum and minimum, respectively. The correlation between polarized photon and deep level states was discussed. This study paves the way to develop ZnO nanowire-based polarization-LEDs.References[1] H. J. Ko, Y. F. Chen, Z. Zhu, T. Yao, I. Kaobayyashi, and H. Uchiki, Appl. Phys. Lett. 76, 1905 (2000)[2] W. I. Park, Y. H. Jun, S. W. Jung, and G.-C. Yi, Appl. Phys. Lett. 82, 964 (2003)[3] D. M. Bagnall, Y. F. Chen, Z. Zhu, T. Yao, S. Koyama, M. Y. Shen, and T. Goto, Appl. Phys. Lett. 70, 2230 (1997)[4] P. Zu, Z. K. Tang, G. K. L. Wong, M. Kawasaki, A. Ohtomo, H. Koinuma, and Y. Segawa, Solid State Commun. 103, 459 (1997)[5] H. Co, J. Y. Xu, E. W. Seelig, and R. P. H. Chang, Appl. Phys. Lett. 76, 2997 (2000)[6] D. Snoke, Science 273, 1351 (1996).[7] J. D. Joannopoulos, P. R. Villeneuve, and S. Fan, Nature (London) 386,143 (1997)[8] C. W. Chen, K. H. Chen, C. H. Shen, A. Ganguly, L. C. Chen, J. J. Wu, H. I. Wen, and W. F. Pong, Appl. Phys. Lett. 88, 241905 (2006)

11:45 AM - P15.2

Fast Reset ZnO Nanowire UV Sensor.

Jun Zhou ^{1 2 3}, Gang Bao ³, Zhong Lin Wang ²
¹Wuhan National Laboratory for Optoelectronics and College of Optoelectronic Science and Engineering, Huazhong University of Science and Technology, Wuhan China, ²School of Materials Science and Engineering, Georgia Institute of Technology, Atlanta, Georgia, United States, ³ Department of Biomedical of Engineering, Georgia Institute of Technology and Emory University, Atlanta, Georgia, United States

12:00 PM - P15.3

Optical Properties of Doped ZnO Nanowires Obtained by Electrodeposition Method.

Athavan Nadarajah ¹, Robert Word ¹, Rolf Koenenkamp ¹
¹Physics, Portland State University, Portland, Oregon, United States

ZnO nanowires have been studied over the last decade because of their promising properties for applications in nanoscale optoelectronic devices and waveguides. ZnO is a direct wide bandgap semiconductor and possessing a large exciton binding energy of 60meV, which allows efficient excitonic light-emission processes, even at room temperature. However, efficient device application would require effective doping of these nanowires, which is known to modify their electronic structure and hence the luminescence properties. In this work we report a detailed study of optical and structural properties of ZnO nanowires grown from solution at 80^oC, the incorporation of impurities introduced during the growth process and the annealing behavior of selected optical and structural properties. Doping of the ZnO nanostructures was achieved electrochemically using solvable chloride compounds as precursors. Doped zinc oxide nanowires were grown on a transparent, fluorinated SnO₂/glass substrate in oxygen-saturated aqueous solutions at 80^oC with KCl as a supporting electrolyte and ZnCl₂ as the precursor for ZnO. SIMS measurements and TEM-EDX line profiles indicate impurity incorporation and doping in the bulk of the nanowires. In order to measure the room-temperature photoluminescence spectra the third harmonic of a pulsed Nd:YAG laser was used as an excitation source. We have observed that the excitonic luminescence is preferentially guided while the green defect emission is more isotropically emitted. In addition, we performed the room-temperature electroluminescence in a hybrid p-n junction arrangement consisting of a hole-conducting polymer and either annealed or unannealed ZnO nanowires. The observed electroluminescence spectra showed an excitonic emission peak and a defect-related broad emission band in the visible range. After annealing at 380^oC the defect related electroluminescence displays a peak shift from 620nm to higher wavelengths. The magnitude of the shifts depends on the type of dopant. However, the defect luminescence band for unannealed samples is virtually same for all dopants. Aluminum incorporation leads to the emergence a narrow excitonic luminescence peak close to the bandgap of ZnO around 393nm. Furthermore, temperature-dependent photoluminescence measurements were carried out on as-grown doped and un-doped ZnO nanowires in the temperature range of 4K-300K using the 325nm line of a He-Cd laser. The comparison of spectra obtained before and after thermal annealing indicates that the electrical and optical activity of impurities change noticeably upon annealing. Strong blue and ultra-violet photo-and electroluminescence are obtained from Al-doped samples annealed at 380^oC. The internal quantum efficiency for photoluminescence was measured to be as high as 16% from Al-doped samples annealed at 380^oC.

12:15 PM - P15.4

Electrical Transport Phenomena of Single ZnO Nanowire Device Directly Measured Using Nano Manipulator.

Sang Won Yoon ^{1 2}, Jong-Hyun Seo ^{1 2}, Tae-Yeon Seong ², Kon Bae Lee ³, Woon Kwon ³, Jae-Pyoung Ahn ¹
¹Nano Materials Analysis Center, Korea Institute of Science and Technology (KIST), Hawolkok-dong, Sungbuk-ku, Seoul Korea (the Republic of), ²Department of Materials Science and Engineering, Korea University, Seoul Korea (the Republic of), ³School of Advanced Materials Engineering, Kookmin University, Seoul Korea (the Republic of)

ZnO nanowire (NW) has potential applications for transparent electrodes, gas sensors, nanoscale optoelectronic devices, piezoresponse force microscopy (PFM) and field effect transistors. In general, we have evaluated the electrical properties of nanowire device from I-V curves measured mainly from the bundle-like ensemble structure of ZnO, not individual ZnO NWs. Most applications require details on the electrical mobility of ZnO NWs. Recently, the electrical transport of single ZnO NWs has been studied only from several devices fabricated by electron-beam lithography. However their I-V curves categorized into three types of resistance, i.e., symmetrical, rectifying and linear shapes due to contact problems between ZnO NWs and electrodes, results in contradictory.In this paper, we manufactured single NW device using an individual ZnO nanowire, of which the junctions were made by Pt deposition using a focused ion beam (FIB), and performed RTA processes. The single ZnO NW device consists of ZnO-Pt, ZnO-Au and Au-Pt junctions. The electrical transport of the single ZnO NW device was investigated by directly measuring the electrical resistance using nano manipulators from cross-sectioned devices. The device showed a typical Ohmic contact in I-V curves and the resistance was decrease with the RTA temperature. The CL (Cathodoluminescence) and EDS in TEM (Energy dispersive spectroscopy in transmission electron microscopy) measurements were also performed to evaluate the crystallinity (defect level) and chemical composition at the center and edge of the cross-sectioned ZnO NWs. From the results, we found that lots of defects were stored at the surface of ZnO NW and impurities at the junction were abruptly reduced. Therefore, the electrical transport of the single ZnO NW device depends strongly on the crystallinity of the ZnO NW and the C content at the Pt junction. From the electrical transport measured on the cross sectioned device, the ZnO-Au junction acted as the fastest transport path among ZnO-Pt, ZnO-Au and Au-Pt junctions in the single ZnO NW device.

12:30 PM - P15.5

ZnO Nanowire-based Visible Transparent UV Detectors Fabricated on Flexible Substrates.

Tej Belagodu ¹, Sandwip Dey ², Hongbin Yu ¹
¹Electrical Engineering, Arizona State University, Tempe, Arizona, United States, ²School of Materials, Arizona State University, Tempe, Arizona, United States

ZnO has recently been explored intensively as a semiconductor material for ultraviolet (UV) detection due to its large direct energy bandgap of 3.4 eV at room temperature. Conventionally, such UV detectors are fabricated on opaque and rigid substrates due to processing convenience. However, UV detectors fabricated on transparent substrates, such as glass or polymer, with both active and contact materials being transparent in the visible spectral range, could enable many novel applications. Such an all-visible transparent UV detector could be attached to windows, or on top of other devices which need visible light. Additional challenge lies in the process compatibility when a polymer substrate is involved, as it would typically not be able to sustain the process temperature typically used for semiconductor device processing. In this work, we report the fabrication of ZnO nanowires UV detectors on polymer substrate using a two-step process: high temperature growth of ZnO nanowires using VLS method followed by low temperature UV detector fabrication on polymer substrate. First, high quality, single crystal ZnO nanowires were grown on Si or sapphire substrate by heating ZnO powder in a tube furnace to around 1000 degree C. This high temperature growth ensures high quality of ZnO nanowires. Such ZnO nanowires were then transferred to device substrate, in this case, pre-baked PEN (poly ethylene 2,6-naphthalate), which is flexible and transparent, through a mechanical transfer technique performed at room temperature. Routine photolithography process was then used to define electrodes, followed by metal deposition and liftoff. Both Au and indium tin oxide (ITO) are used as electrode material. UV detectors fabricated here have metal-semiconductor-metal (MSM) structure with UV detection realized by Ohmic contact photoconductive principle. UV detectors fabricated in this fashion are characterized by shining light with tunable wavelengths ranging from UV to visible while monitoring electrical current through the nanowire devices. It is shown that there is significant current increase through the device under UV illumination whereas no response was seen to incident visible light. Currently, detection sensitivity and enhancement of resolution by surface functionalization of the nanowires are being explored.

12:45 PM - P15.6

Flexible and Transparent Electronics Based on Nanowires.

PoChiang Chen ^{1 2}, Haitian Chen ¹, Yue Fu ¹, Sanghyun Ju ⁵, Antonio Facchetti ⁴, Jun Liu ⁴, Young-geun Ha ⁴, Fumiaki Ishikawa ², Hsiaokang Chang ¹, Chao Wu ², David Janes ⁵, Tobin Marks ⁴, Mark Thompson ³, Chongwu Zhou ^{1 2 3}
¹Mork Family of Chemical Engineering and Material Science, USC, Los Angeles, California, United States, ²Ming-Hsieh Department of Electrical Eng., USC, Los Angeles, California, United States, ⁵School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana, United States, ⁴Department of Chemistry and the Materials Research Center, Northwestern University, Evanston, Illinois, United States, ³Department of Chemistry, USC, Los Angeles, California, United States

The concept of transparent electronics was first proposed in 1997, and offers the attraction of optical transparency and, in principle, low temperature processing. There are currently numerous research efforts on transparent electronics, due to its great potential to make significant commercial impact. The core technology to realize the transparent electronics requires the development of high-performance transparent thin film transistors (TTFTs), with high device mobilities, low threshold voltages, and steep subthreshold slopes. Currently, TTFTs fabricated with amorphous or polycrystalline transparent conducting oxide (TCO) thin films have been widely studies. However, TTFTs made from these materials usually exhibit rather low mobilities (0.2-120 cm2V-1sec-1) and high threshold voltages (Vth: 10-20 V). Recently, one-dimensional nanostructured materials, including single-walled carbon nanotubes and semiconductor metal oxide nanowires, have been considered as another material choice for TTFT fabrications. In comparison to conventional TCO-based TTFTs, nanomaterials synthesized through a simple chemical vapor deposition method can easily provide high-quality single-crystalline nanostructures, which are highly desirable in most electronic and optoelectronic devices. In addition, nanostructured material-based TTFTs have added advantages, such as versatile compatibility with a variety of device substrates, which thereby extends their applicability to flexible electronics. In considering the enablers of next-generation displays, having good optical transparency and/or mechanical flexibility, high performance transparent and/or flexible TFTs will be essential. Currently, polycrystalline silicon and amorphous silicon are widely used as the “back-panel” electronics for AMOLED displays. However, these back-panels are usually optically opaque, not compatible with flexible substrates, and have drawbacks of low mobilities, high threshold voltages, and in the case of a-Si, poor current-carrying capacity. In this talk, we report the synthesis of undoped and doped In2O3 nanowires, and then fabricate TTFTs by transferring nanowires to glass and PET substrates with pre-patterned transparent gate electrodes and a gate insulator, followed by patterning transparent ITO source and drain electrodes. It will be seen that the as-fabricated nanowire TTFTs perform as typical n-type FETs with a high device mobility (1,490 cm2V-1sec-1 for doped In2O3 TTFTs) and optical transparency of near 81% in the visible wavelength regime. We further examine the AC gain of these nanowire TTFTs. The results indicate good frequency response, ~1.5 kHz with a unity-gain frequency of ~18.8 GHz. Moreover, we then show that these In2O3 nanowire TTFTs can be used to drive organic light-emitting diodes with tunable emitting intensities, including a seven-segment AMOLED display enabled by a nanowire TTFT “back-panel”.

P16: ZnO Nanowires II

Session Chairs

Heike Riel

Friday PM, April 09, 2010

Room 2016 (Moscone West)

2:30 PM - **P16.1

Selective Growth of ZnO-based Nanostructures and Their Light Emitting Device Applications.

Gyu-Chul Yi ¹
¹Dept. of Physics, Seoul National University, Seoul Korea (the Republic of)

3:00 PM - P16.2

Intentional Modification of ZnO Nanowire Growth and Related Electrical Properties.

Kittitat Subannajui ¹, Niranjan Ramgir ¹, Yang Yang ², Margit Zacharias ¹
¹Nanotechnology, IMTEK Technical faculty, Freiburg Germany, ², MPI of Microstructure Physics, Halle Germany

3:15 PM - P16.3

MOCVD Growth Mechanism of ZnO Nanorods for UV Emission Devices.

Robin Thierry ¹, Guillaume Perillat-Merceroz ^{1 2}, Pierre Ferret ¹, Matthieu Lafossas ¹, Francois Levy ¹
¹LETI, CEA, Grenoble France, ²INAC, CEA, Grenoble France

Zinc oxide is a very promising material for optoelectronic applications due to its direct band gap of 3.37 eV and its high exciton biding energy (60meV). This material is considered as a challenger to GaN based LEDs for solid state lighting applications. Furthermore, nanorods enable the use of substrates with large lattice mismatch for the growth of defect free material, by relaxing strain on free surfaces of nanorods.In this study, we present results on ZnO nanorods and ZnO/ZnMgO heterostructures grown by catalyst free MOCVD in commercial Epigress reactor using diethylzinc and nitrous oxide as precursors grown onto c-sapphire. SEM images indicate well-aligned ZnO nanorods with uniform diameters, length and density, grown perpendicularly to the substrate surface with c-orientation as confirmed by X ray diffraction measurement.Samples prepared with various deposition times (20s, 1, 2, 3, 5min) are used to investigate the growth mechanism. It is found out that after 20s a thin wetting layer (few nm thick) and nanorods (around dozens of nm long) are presents. In some cases nanorods are surrounded by small pyramids. By pursuing the deposition, we mainly observe the growth of the nanorods. TEM measurements are carried out to gain some insight into the growth as well as the strain relaxation mechanisms Nanorods are of Zn polarity and the surrounding pyramids are of O-polarity. Lateral facets of the hexagonal nanorods are {1-100}, suggesting that surface energies play a role in the nanorod growth. Strain relaxation occurs first in the wetting layer (WL) with the creation of numerous dislocations. These dislocations bend over at the WL / pyramid interface but we do not observe any dislocation in the nanorod itself. We shall discuss the nanorod growth mechanisms in the light of these observations.We also report on the growth of ZnMgO/ZnO radial heterostructure nanowires using two different temperatures for the ZnMgO growth. It turns out that a low temperature is needed to avoid Mg diffusion in ZnO. Furthermore, SEM images and EDX measurement have shown rich Mg clusters at the sidewall of nanowires. Photoluminescence spectra confirm the very good crystalline quality of both ZnO and ZnMgO/ZnO nanorods, with high intensity of the UV near-band-edge peak. Green luminescence band usually observed for ZnO nanorods is not observed on our spectra, demonstrating the low deep defect density.

3:30 PM - P16.4

Programmed Nanowire Synthesis in a Microfluidic Device.

Jaebum Joo ^{1 2}, Brian Chow ¹, Edward Boyden ¹, Joseph Jacobson ¹, Manu Prakash ¹
¹The Center for Bits and Atoms, Media Laboratory, MIT, Cambridge, Massachusetts, United States, ²Materials Science and Engineering, MIT, Cambridge, Massachusetts, United States

3:45 PM - P16.5

Antimony-doped Zinc Oxide Nanowires Grown from Aqueous Solution.

Fei Wang ¹, Xudong Wang ¹
¹Materials Science and Engineering, University of Wisconsin - Madison, Madison, Wisconsin, United States

4:00 PM - P16: NW

BREAK

P17: Nanowires - Properties and Applications

Session Chairs

Michael McAlpine

Friday PM, April 09, 2010

Room 2016 (Moscone West)

4:30 PM - P17.1

Fabrication and Optical Characteristics of Vertical Aligned ZnCdO/ZnO Coaxial Nanowires MQW Heterostructures.

Chuanwei Cheng ¹, Bo Liu ¹, Edbert Sie ¹, Weiwei Zhou ¹, Alfred Cheng Hon Huan ¹, Handong Sun ¹, Tze Chien Sum ¹, Hongjin Fan ¹
¹Physics and Applied Physics, Nanyang Technological University, Singapore Singapore

4:45 PM - P17.2

Gas-sensing Properties of Defect-controlled ZnO-nanowire Gas Sensor.

Myoung-Won Ahn ¹, Kyung-Soo Park ¹, Jeong-Hoon Heo ¹, Jae-Gwan Park ¹, Dong-Wan Kim ¹, Kyoung Jin Choi ¹
¹Nano-Materials Research Center, Korea Institute of Science and Technology (KIST), Seoul Korea (the Republic of)

5:00 PM - P17.3

Size-dependent Reset Time of a Single ZnO Nanowire Photodetector.

Ming-Wei Chen ¹, Cheng-Ying Chen ¹, Jr-Hau He ¹
¹Institute of Photonics and Optoelectronics, & Department of Electrical Engineering, National Taiwan University , Taipei Taiwan

5:15 PM - P17.4

Photoresponse Properties of Polycrystalline CdSe Nanowires Photodetectors.

Sheng-Chin Kung ^{1 2}, Wytze van der Veer ^{1 2}, Fan Yang ^{1 2}, Keith Donavan ^{1 2}, Reginald Penner ^{1 2}
¹Department of Chemistry, University of California, Irvine, Irvine, California, United States, ²Institute for Surface and Interface Science, University of California, Irvine, Irvine, California, United States

5:30 PM - P17.5

Giant Zeeman Splitting in Nucleation-controlled Doped CdSe:Mn2+ Quantum Nanoribbons.

Jung Ho Yu ¹, Xinyu Liu ², Kyoung Eun Kweon ³, Taeghwan Hyeon ¹, Gyeong S. Hwang ³, Jacek Furdyna ²
¹School of Chemical and Biological Engineeing, Seoul National University, Seoul Korea (the Republic of), ²Department of Physics, University of Notre Dame, Notre Dame, Indiana, United States, ³Department of Chemical Enginering, University of Texas Austin, Austin, Texas, United States