Volker Schmidt Max Planck Institute of Microstructure Physics
LincolnJ. Lauhon Northwestern University
Takashi Fukui Hokkaido University
GeorgeT. Wang Sandia National Laboratories
Mikael Bjoerk IBM Research GmbH
IBM Research Zurich
EE1: Group IV Nanowires I
Tuesday AM, April 26, 2011
Room 3001 (Moscone West)
9:00 AM - **EE1.1
Nucleation and Early-stage Vapor-liquid-solid Growth of Epitaxial Group IV Nanowires.
Paul McIntyre 1 Show Abstract
1 , Stanford University, Stanford, California, United States
This presentation will provide an overview of results both from our laboratory and from others on the nucleation and early-stage growth of metal-catalyzed Ge and Si nanowires (NWs). Given the importance of growth temperature for integration of nanowires in Si-compatible devices and systems, particular attention will be devoted to the topic of deep sub-eutectic vapor-liquid-solid (VLS) growth of Ge NWs. Attention will focus on capillary phenomena that cause non-uniformity of nanowire dimensions and defective growth (surface nanowire formation, early-stage kinking) during early-stage VLS growth in which epitaxy is used to control the orientation of NW arrays. The effects of substrate surface condition, catalyst diameter and catalyst phase (VSS vs. VLS) on defective nanowire growth will be discussed briefly.
9:30 AM - EE1.2
Growth of Ge Nanowires from Compositionally Controlled Au-Cu Alloy Nanoparticle Catalysts.
Justin Connell 1 , Zakaria Al Balushi 1 , Kwonnam Sohn 1 , Jiaxing Huang 1 , Lincoln Lauhon 1 Show Abstract
1 Materials Science and Engineering, Northwestern University, Evanston, Illinois, United States
Catalyst-mediated growth of semiconductor nanowires provides useful control over aspect ratio and doping, both of which are important for device applications. One drawback the vapor-liquid-solid process, however, is the “reservoir effect;” dopant junctions are not abrupt if a significant amount of the dopant is dissolved in the catalyst and continues to be incorporated into the nanowire even after the dopant precursor flow is stopped. The solubility of dopants should be lower in solid than liquid catalysts, leading to more abrupt junctions. The development of alloy catalysts with intermediate eutectic temperatures can provide opportunities to compare liquid and solid-catalyzed nanowire growth under comparable conditions, and can thereby serve as a useful platform to explore the influence of catalyst phase and chemistry on nanowire growth mechanisms. Towards that end, we developed a simple aqueous synthesis of Au-Cu2O core-shell nanoparticles to produce Au-Cu alloy nanoparticles of controlled size and composition by vacuum annealing. Colloidal Au nanoparticles were used as size-controlled seeds, and fine control of the Cu2O shell thickness enabled tuning of the resulting Au:Cu ratio to produce distinct populations of 1:1 and 1:3 Au:Cu nanoparticles. Annealing at 450°C revealed that both AuCu and AuCu3 alloy nanoparticles were formed, as expected from the distribution in nanoparticle sizes. The alloy nanoparticles were found to catalyze Ge nanowire growth in a low-pressure chemical vapor deposition environment. Energy-dispersive x-ray spectroscopy and electron diffraction analysis of catalysts at the tips of Ge nanowires confirmed that growth proceeds from an alloy and not simply the constituent metals. The growth temperature of 320°C is well below the Au-Ge and Cu-Ge eutectic temperatures, suggesting that the catalyst was solid during growth. Consistently, the nanowire growth rate for AuCu alloy nanoparticles was intermediate to that of Cu (slowest) and Au (fastest) nanoparticles under identical conditions. We conclude that synthesis of core-shell metal nanoparticles is a valid approach to alloy nanocatalysts of controlled size and composition, which in turn may provide enhanced control of doping and junction abruptness in the catalyst-mediated growth of semiconductor nanowires.
9:45 AM - EE1.3
In Situ Stability Study of Initially Coherent Ge-core/SiGe-shell Nanowires.
Shu Hu 1 , Irene Goldthorpe 1 , Shruti Thombare 1 , Marika Gunji 1 , Ann Marshall 2 , Paul McIntyre 1 2 Show Abstract
1 Materials Science and Engineering, Stanford University, Stanford, California, United States, 2 , Geballe Laboratory for Advanced Materials, Stanford, California, United States
Group IV coaxial nanowire heterostructures can significantly improve the performance of nanoelectronic and nanophotonic devices. We have previously reported that by inhibiting surface roughening of a Si or SiGe shell around a Ge nanowire during growth, highly strained, dislocation-free, coherent core-shell nanowires are obtained. These as-grown nanowires with large Si composition gradient and core-shell lattice mismatch are not in thermodynamic equilibrium. The effects of thermal annealing on atomic motion leading to core-shell strain relaxation, including Si-Ge interdiffusion, stress-driven surface roughening, and associated dislocation formation, are not yet understood. As it is challenging to observe these phenomena during growth, we focus on in situ studies of core-shell nanowire surfaces during post-growth annealing in a transmission electron microscope (TEM).In this work, Au-catalyzed, chemical vapor deposited Ge nanowires are first synthesized, followed by heteroepitaxial deposition of a SiGe shell. These dislocation-free nanowires can be synthesized with controlled coherency strains in the core and shell, and with various core and shell radii. In situ TEM is employed to characterize the time evolution of nanowire surface roughness and dislocation density at temperatures as high as 700°C. Composition variation across the core/shell nanowires are quantified using energy-dispersive x-ray spectroscopy before and after in situ annealing. Results are compared to model predictions for stress-driven roughening, dislocation-mediated relaxation and interdiffusion in strained coaxial heterostructures.
10:00 AM - EE1.4
In-situ TEM Observation of the Growth of Si Nanowires by Catalysts of Ag-Au Alloy.
Yi-Chia Chou 1 2 , Cheng-Yen Wen 1 2 , Mark Reuter 2 , Eric Stach 1 3 , Frances Ross 2 Show Abstract
1 Materials Science and Engineering, Purdue University , West Lafayette, Indiana, United States, 2 , IBM T. J. Watson Center, Yorktown Heights, New York, United States, 3 , Brookhaven National Lab, Upton, New York, United States
We report the vapor-liquid-solid (VLS) and vapor-solid-solid (VSS) growth of Si nanowires by catalysts of Ag-Au alloys, observed by in situ TEM. Recent experimental and theoretical studies have shown that the VSS growth mode is important because, in metal-catalyzed nanowire growth, sharp interfaces can be achieved by using solid catalysts that have low solubility for the growth species and hence do not act as a reservoir when switching between materials. Ag and Au have simple eutectic reactions with Si but different eutectic temperatures. Furthermore, Ag is completely miscible with Au. Thus, the eutectic temperature of an Ag-Au alloy with Si can be tuned by adjusting the Ag/Au ratio. This can be expected to determine whether the growth mode will be VLS or VSS, and to affect the growth rate of the nanowires at a given temperature. It also allows us to synthesize heterostructures such as Si/Ge/Si in a single nanowire by using the VSS growth mode. We will discuss in situ TEM observations of VLS and VSS growth of Si nanowires using disilane as the source and with different ratio of Au and Ag in the catalysts. Increasing the Ag proportion results in slower nanowire growth rates, perhaps because of the rise in the the eutectic temperature in the system with more Ag. Using a fixed catalyst composition of AgAu2, we find about four times faster growth for the VLS mode compared to the VSS. We will discuss transition temperatures and morphology changes for the Ag-Au catalysts and nanowires during the transition between VLS and VSS growth, and finally we will discuss Si nucleation in pure Ag and alloy particles above and below the eutectic temperature. We believe that alloy catalysts are a promising route towards control of nanowire and heterostructure growth and morphology.
10:15 AM - EE1.5
Novel In Situ Catalyst Alloying Enables Abrupt Interfaces without Kinking in VLS Growth of Si-Ge Axial Nanowire Heterostructures.
Daniel Perea 1 , Nan Li 1 , Amit Misra 1 , S. Tom Picraux 1 Show Abstract
1 Center for Integrated Nanotechnologies, Los Alamos National Laboratory, Los Alamos, New Mexico, United States
Vapor-liquid-solid (VLS) grown axial semiconductor heterostructures have garnered much attention due to their potential for novel or enhanced optical, electronic, and thermoelectric properties compared to conventional planar technology. Of particular interest are Si-SiGe and Si-Ge axial superlattice heterostructures which are being explored for thermoelectric and tunnel field-effect transistor applications. However, it is commonly found that due to the VLS growth process, the interfaces are significantly broadened and also that a high percentage of Si-Ge heterostructured nanowires form undesired structural kinks by changing growth direction shortly after the change in composition. Here we report recent results in which the interfaces are much more abrupt and kinking is significantly reduced. The new process involves in situ alloying of the liquid Au catalyst with Ga by the introduction of trimethylgallium. This resulting novel liquid alloy catalyst significantly reduces the solubility of Si and Ge in the liquid which sharpens the interface, while at the same time reduces the growth rate at the higher precursor partial pressures favorable to nanowire growth, thus promoting a significant reduction in kinking. For example, considering a ~65nm diameter nanowire, for the transition from Ge to Si, the solubility of Ge is significantly decreased and the interface sharpness increases from a width of 45 nm to 22 nm for growth at 380 C using a Au0.67Ga0.33 alloy, as compared to growth from a pure Au catalyst. At the same time, the growth rate decreases from 2.8 nm/s for kinked Si segments grown from a pure Au catalyst, to 0.2 nm/s with a decrease from approximately 95% to <10% kinking, a 10X increase in unkinked Ge/Si heterostructure growth. While the underlying mechanisms for kinking which drive a nanowire to change growth direction requires additional study, it is known that this effect is sensitive to the kinetics of growth and becomes a significant issue when changing the growth precursors or temperature. In this presentation we will provide detailed results for this new approach to achieving high quality nanowire heterostructure interfaces, discuss the underlying mechanisms, and propose future directions for tailoring high quality VLS-grown compositional and doped interfaces based on this new understanding.
10:30 AM - EE1.6
Size Effects in Ni Catalyzed Germanium Nanowire Growth.
Shruti Thombare 1 , Ann Marshall 2 , Paul McIntyre 1 2 Show Abstract
1 Materials Science Engineering, Stanford University, Stanford, California, United States, 2 Geballe Laboratory for Advanced Materials, Stanford University, Stanford, California, United States
The great majority of literature studies of Ge nanowire growth have used Au as a catalyst. In most cases, growth is said to have occurred by the VLS mechanism. Gold has been a popular choice as a catalyst in part because of its ability to form a eutectic with Ge, allowing nanowire growth at a temperature below 400 C. However, Au induces trap levels deep in the Si and Ge bandgaps. In order to make deposited Ge nanowires compatible with silicon-based electronics and useful for photovoltaic applications, an electronically benign metal catalyst may be required. We report an investigation of low temperature Ge nanowire growth using Ni, which is electronically more benign than Au. Ni nanoparticles in colloidal solution were drop-cast on Ge (111) substrates. Ge nanowires were grown at temperatures as low as 375°C in a cold-wall CVD reactor with hydrogen diluted Germane as reactive precursor. Nanowire growth is expected to occur by the vapor-solid-solid (VSS) mechanism with a germanide of Ni as the catalyst phase, because the growth temperature is depressed by greater than 300° C relative to the lowest eutectic temperature in the Ni-Ge binary system. We observed a great difference in the morphology of the nanowires as a function of their diameter. Their length and preferred crystallographic orientation were strongly dependent on nanowire diameter. Nanowires with diameter greater than 25-35 nm are <111>-oriented and have a high density of grown-in defects such as twins and stacking faults and exhibit frequent kinking. Transmission electron microscopy showed that nanowires with diameter smaller than 25-35 nm, which grow preferentially in the <110> direction, appear to have no kinks despite having a substantial density of crystal defects. The observed size-dependence of Ge wire morphology will be discussed in terms of wire surface energies and the structure of the catalyst/nanowire growth facet interface.
10:45 AM - EE1.7
An in-situ Chemical Study of the Influence of Hydrogen on Si Nanowire Crystal Orientation, Catalyst Diffusion, and Faceting.
Naechul Shin 1 , Michael Filler 1 Show Abstract
1 School of Chemical & Biomolecular Engineering, Georgia Institute of Technology, Atlanta, Georgia, United States
An understanding of the atomic-scale chemistry that governs semiconductor nanowire growth is crucial for the precise control of nanoscale physical properties, especially in highly confined systems. Despite its importance, critical chemical information is currently lacking with respect to the factors that influence basic structural features such as crystal orientation and sidewall faceting. For example, hydrogen is prevalent during the hydride-based vapor-liquid-solid growth of semiconductor nanowires, but its role is largely unknown. To this end, we systematically studied the effect of hydrogen during the growth of Si nanowires and confirmed its influence on growth orientation, catalyst ripening, and sidewall faceting for the first time. In-situ transmission infrared (IR) spectroscopy was used to identify the presence and bonding of hydrogen on Si nanowires as a function of growth conditions. Si(111) substrates were cleaned via high temperature flashing to 1250oC in a ultra-high vacuum (UHV) chamber. After cooling to room temperature, a thin Au catalyst film was thermally evaporated in-situ. Si nanowires were subsequently grown via a two-step process: (1) brief nucleation at high temperature (550oC) and low pressure (5x10-5 torr) followed by (2) elongation under different conditions (400 - 500oC, 5x10-5 - 5x10-4 torr). Vertically-oriented epitaxial Si nanowires with uniform lengths were obtained with this method. In-situ IR data recorded in real-time reveals the evolution of surface Si-H stretching modes near 2090 cm-1 as a function of growth conditions. Our data indicates that surface-bound hydrogen is responsible for changes in crystal orientation even when nanowire diameter remains constant. More specifically, a clear increase of Si-H peak intensity is observed when the growth orientation shifts from <111> to <112>. The adsorption-desorption kinetics of hydrogen on the sidewall at each growth temperature and pressure will be discussed in detail. Furthermore, nanowire sidewalls frequently exhibit a rough region near the base due to conformal deposition of Si during extended growths. Observed increases of Si-H mode intensity at constant temperature are attributed to this sidewall roughening. This fundamental chemical understanding is an important step toward the rational design and controllable synthesis of semiconductor nanowires.
11:30 AM - **EE1.8
New Directions for Wire Arrays in High Efficiency Photovoltaics and Solar Fuel Synthesis.
Harry Atwater 1 , Dan Turner-Evans 1 , Morgan Putnam 3 , Michael Kelzenberg 1 , Nathan Lewis 2 , Emily Warren 3 , Chris Chen 4 , Adele Tamboli 1 Show Abstract
1 Applied Physics, California Institute of Technology, Pasadena, California, United States, 3 Chemical Engineering, California Institute of Technology, Pasadena, California, United States, 2 Chemistry, California Institute of Technology, Pasadena, California, United States, 4 Materials Science, California Institute of Technology, Pasadena, California, United States
Semiconductor photovoltaic wire array technology has progressed rapidly in the last year, with demonstrated Si wire array photovoltaic efficiencies of 8% in array-fabricated cells and single wire measurements indicating efficiencies higher than 17% can be achieved. Beyond Si, multijunction wire array structures offer the possibility of achieving even higher photovoltaic efficiencies through epitaxial heterostructure synthesis of III-V/Si materials. Conformal GaP on Si wire array heterostructures have been synthesized by metallorganic chemical vapor deposition and offer an opportunity for a lattice-matched wide bandgap top cell for series-connected tandem multijunction wire array photovoltaics. The large surface area and high aspect ratio of Si and other semiconductor wire arrays also offers an attractive architecture for solar-driven photoelectrochemical reduction and oxidation of water and carbon dioxide to generate solar fuels. I will describe results for photoelectrochemical reduction of water to hydrogen and prospects for integrated photoreduction and photo-oxidation wire array heterostructures.
12:00 PM - EE1.9
Wafer-scale Growth of Silicon Microwire Arrays.
Adele Tamboli 1 , Christopher Chen 1 , Daniel Turner-Evans 1 , Michael Kelzenberg 1 , Harry Atwater 1 Show Abstract
1 Applied Physics, California Institute of Technology, Pasadena, California, United States
Microwire arrays present a nearly optimal geometry for solar energy conversion in materials with limited minority carrier diffusion lengths, as they decouple the absorption length and minority carrier diffusion distance. This geometry allows for absorption of nearly all of the incident light while enabling efficient extraction of carriers. Previous reports have shown Si microwire arrays to be promising materials for photovoltaics[1,2] and solar fuel generation using small (~1 cm2) samples grown in tube furnaces of limited size. For microwire array devices to be economically viable, however, the development of wafer-scale growth techniques will be necessary and growth yield will need to be high.We have grown Si microwires over entire 6 inch wafers using SiCl4-based CVD and vapor-liquid-solid (VLS) growth with a Cu catalyst. Our reactor uses RF induction heating to reach a growth temperature of 1000 C, above the Si-Cu eutectic temperature. This cold-wall geometry allows microwires to be grown reproducibly over 6 inch wafers, with growth rates of approximately 10 μm/min. We have grown more than one square meter or Si wire array material, demonstrating good growth yield and ability to scale up growth to commercially viable levels. We are also able to control growth parameters more precisely than previously possible, allowing for a more detailed understanding of the factors influencing growth. We have found that the presence of even small amounts of oxygen has a detrimental impact on microwire fidelity and growth rate control, while small amounts of BCl3 used for p-type doping dramatically improve growth fidelity and controllably increase growth rate. We have investigated the effects of susceptor angle on wafer uniformity to account for gas depletion along the length of the tube as well.After wire growth is complete, we can embed the wire arrays in a polymer, such as PDMS, and remove them from the substrate, resulting in a 6 inch diameter flexible array of Si microwires that can be used for flexible solar conversion devices, while the substrate can be re-used for further growths, recycling the most expensive component. For fabrication of high performance photovoltaics, microwire arrays also need to have controllable doping profiles and good electrical properties. Using BCl3, we can dope the microwires p-type with carrier concentrations up to 5*1019 cm-3. Diffusion doping then allows us to fabricated radial junctions in the wires. Using electrical and photoelectrochemical characterization of these large area arrays, we can compare their properties to earlier small-scale arrays of Si microwires and assess their viability as an emerging photovoltaic technology.References M.C. Putnam et al., Energy & Environmental Science 3, 1037 (2010). C.E. Kendrick et al., Appl. Phys. Lett. 97, 143108 (2010). S.W. Boettcher et al., Science 327, 185 (2010). J.M. Spurgeon et al., Appl. Phys. Lett. 93, 032112 (2008).
12:15 PM - EE1.10
Optical Absorption in Si Heterojunction Wire Arrays.
Andrey Poletayev 1 3 , Hal Emmer 2 3 , Michael Deceglie 2 3 , Daniel Turner-Evans 2 3 , Michael Kelzenberg 2 3 , Morgan Putnam 2 3 , Nathan Lewis 1 3 , Harry Atwater 2 3 Show Abstract
1 Chemistry, California Institute of Technology, Pasadena, California, United States, 3 Kavli Nanoscience Institute, California Institute of Technology, Pasadena, California, United States, 2 Applied Physics, California Institute of Technology, Pasadena, California, United States
Wire array photovoltaics have demonstrated the potential to obtain efficiencies comparable to those of planar crystalline Si cells in flexible configurations.  However, higher open-circuit voltages are necessary to achieve these efficiencies in wire arrays. One method to obtain higher open circuit voltages would be to incorporate heterojunctions to amorphous Si, as has been done in planar HIT cells.  Amorphous silicon contributes to excellent junction passivation and near-record open-circuit voltages in HIT cells due to the favorable band edge alignment with c-Si. However, inclusion of a-Si carries the risk of photocurrent loss to parasitic absorption and photodegradation. Since the extinction coefficient of a-Si is much higher than that of c-Si, understanding the distribution of optical absorption in a-Si/c-Si wires will be critical for making efficient use of a-Si. In order to characterize optical absorption in a-Si/c-Si wire arrays, we have modeled c-Si/a-Si radial heterojunctions using 2D FDTD full-field electromagnetic simulations. Spatial carrier photogeneration profiles were calculated from electric fields throughout the simulation volume, integrated in wavelength and weighted by the AM 1.5G spectrum. The geometry of the amorphous shell was chosen to mimic the deposition of a-Si on c-Si microwires using PECVD,  and was optimized with respect to junction length, presence of light-trapping structures, and illumination direction. For wire arrays illuminated through the a-Si shell, over 40% of the photogeneration occurs in the a-Si. However, for illumination on the crystalline Si side, the incident light is directed into the crystalline part of the wire array, reducing the a-Si absorption to 0.1% of the total with only a 3.8% overall loss in photogeneration. Under such “inverted” illumination, the amorphous shell is sandwiched between the c-Si wire and the reflecting back contact. At wavelengths above the a-Si bandgap, our model predicts up to a ten-fold optical concentration in the exposed part of the crystalline microwires relative to the same structures under illumination through a-Si, attributable to increased light-trapping efficiency. Changing the wire end shape from circular to conical gives an additional minimization of reflection, and then we observe simulated photocurrent densities above 34.5 mA/cm2 in the c-Si part of the wire arrays. We will also discuss the fabrication and optical characterization of a-Si/c-Si heterojunction wire arrays, as well as device-physics modeling used to estimate the energy conversion efficiency in a-Si/c-Si wire photovoltaics based upon the calculated absorption profiles.  M.D. Kelzenberg et al, D.B. Turner-Evans et al, submitted. Y. Tsunomura et al, Solar Energy Mater. and Solar Cells, 93, 6, 670. (2009)
12:30 PM - EE1.11
Radial Junction Silicon Microwire Photocathodes.
Emily Warren 1 , Shannon Boettcher 1 2 , Michael Walter 1 , Harry Atwater 2 , Nathan Lewis 1 Show Abstract
1 Division of Chemistry and Chemical Engineering, Caltech, Pasadena, California, United States, 2 Divison of Engineering and Applied Science, California Institute of Technology, Pasadena, California, United States
Silicon microwires are promising materials for driving the cathodic (hydrogen producing) component of the overall photoelectrochemical water-splitting reaction. The radial geometry of microwire arrays decouples the direction of light absorption and carrier collection, enabling the use of materials with shorter minority-carrier diffusion lengths than would be acceptable in a planar geometry liquid junction. Unfortunately, bare silicon has band positions that are strongly influenced by pH, which limits the attainable photovoltage from p-Si/aqueous systems. Introduction of an n+
-doped emitter layer, to create a “buried junction”, should decouple the band banding, and thus the photovoltage, of the photoelectrode from the energetics of the semiconductor/liquid contact. The ability to decouple the photovoltage of a Si photocathode from the pH of the contacting aqueous solution should increase the versatility of these materials for use in photoelectrochemical fuel-forming systems.The effects of introducing a doped emitter layer have been evaluated for both planar Si photoelectrodes and for radial junction Si microwire-array photoelectrodes. In contact with the pH-independent, one-electron, outer-sphere, methyl viologen redox system (MV2+/+
), the pH dependence of the band-edge positions of Si in contact with aqueous electrolytes yielded open-circuit voltages, Voc
, for both planar and wire array Si photoelectrodes that varied as the pH of the solution was changed. Increases in the pH of the electrolyte produced a decrease in Voc
by approximately -44 mV/pH unit for both planar electrodes and Si microwire array electrodes. In contrast, introduction of a highly doped, n+
emitter layer produced Voc
= 0.56 V for planar Si electrodes and Voc
= 0.52 V for Si microwire array electrodes, with the photoelectrode properties in each system being essentially independent of pH over six pH units (3+ emitter layer not only improved the photovoltages for planar and Si microwire array photoelectrodes, but decoupled the band energetics of the semiconductor (and hence the obtainable photovoltage) from the value of the redox potential of the solution.1 The formation of radial junctions on Si microwire arrays thus provides an approach to obtaining high-photovoltage Si-based photoelectrodes that can be used for a variety of photoelectrochemical processes, regardless of the intrinsic barrier height and flat-band properties of the Si/liquid contact. This presentation will also report on progress that has been made on integrating hydrogen evolution catalysts onto n+-p Si microwire arrays towards the fabrication of photocathodes for the overall water-splitting reaction. S. W. Boettcher et al., “Energy-Conversion Properties of Vapor-Liquid-Solid-Grown Silicon Wire-Array Photocathodes,” Science, 327(5962), 185-187 (2010).
12:45 PM - EE1.12
Measurement of Minority Carrier Diffusion Lengths in VLS-grown p-n Junction Silicon Nanowires.
Aditya Mohite 1 2 , Daniel Perea 1 , Sanjeev Singh 1 2 , Shadi Dayeh 1 , Samuel Picraux 1 , Han Htoon 1 2 Show Abstract
1 Center for Integrated Nanotechnologies, Los Alamos National Lab, Los Alamos, New Mexico, United States, 2 Chemistry Division, Los Alamos National Lab, Los Alamos, New Mexico, United States
VLS-grown semiconductor nanowires have emerged as a viable prospect for future solar energy applications. Despite tremendous efforts invested in all areas of nanowire research, the fundamental processes critical to the functioning of a nanowire photovoltaic device such as charge dissociation, collection and recombination processes of photo-generated carriers in NWs is still poorly understood. A direct measurement of the minority carrier diffusion lengths and quantitative assessment of the impact of doping, diameter, operating bias, virtual gating and heterostructing is of critical importance in understanding and designing efficient 1D photovoltaic devices. To date, there have been a few published studies which report minority carrier diffusion lengths and carrier lifetimes in semiconductor nanowires1,2, however to our knowledge no measurement has been reported for a VLS grown axial p-n junction nanowires. Here, we report a scanning photocurrent microscopy study of VLS-grown p-n junction silicon nanowires to measure the minority carrier diffusion length, mobility and lifetime of the photo-generated carriers.Photocurrent measurement studies were performed on in-situ doped Si nanowire p-n junctions and devices with Ni ohmic contacts probed separately to the p- and n–segments of the devices for p-n junction assessment as well as the field-effect properties of either segments of the junction. The measured photoresponse shows an exponential increase in the photocurrent by an orders of magnitude as the laser spot (λ=532 nm, spot size ~400 nm) is scanned across the p-n junction with a peak photocurrent at the center of the junction and an exponential decrease on either side as the laser spot departs from the junction. With increasing reverse bias, the central photocurrent plateau width increases indicative of increased depletion width. By fitting the function to the exponential decay in the photocurrent for a 40 nm diameter nanowire, we calculated a minority carrier diffusion length of Ln=1.842 µm and Lp=1.45 µm for electrons and holes, respectively. Such relatively long minority carrier diffusion lengths are indicative of low dopant incorporation for the gas ratios we used, consistent with LEAP analysis and suggest that the measured lengths scale with doping concentration despite the impact of surface states for 1D systems. We will further discuss the dependence of the minority carrier diffusion length, mobility and lifetime as a function of diameter, doping concentrations, and back-gating. 1)Quantitative measurement of electron and hole mobility-lifetime products in semiconductor nanowires Yi Gu et al. Nano Letters 6, 948, (2006)2)Photovoltaic measurements in single-nanowire silicon solar cells; Michael D. Kelzenberg et al, Nano Letters 8, 710-714, (2008).3)Direct measurement of dopant distribution in an individual vapour–liquid–solid nanowire Daniel E. Perea et al., Nature Nanotechnology 4, 315, (2009).
Volker Schmidt Max Planck Institute of Microstructure Physics
LincolnJ. Lauhon Northwestern University
Takashi Fukui Hokkaido University
GeorgeT. Wang Sandia National Laboratories
Mikael Bjoerk IBM Research GmbH
IBM Research Zurich
EE6: Poster Session: III-V and II-IV (Non-Oxide) Nanowires
Wednesday PM, April 27, 2011
Salons 7-9 (Marriott)
1:00 AM -
EE6.38 Transferred to EE11.8
EE5: III-V (Non-Nitride) Nanowires I
Wednesday PM, April 27, 2011
Room 3001 (Moscone West)
2:30 PM - **EE5.1
Periodic Nanowire Structures.
Erik Bakkers 1 2 3 , Rienk Algra 1 4 , Marcel Verheijen 1 3 , Lou-Fe Feiner 1 , Elias Vlieg 4 , Willem van Enckevort 4 , Moira Hocevar 2 Show Abstract
1 , TU Eindhoven, Eindhoven Netherlands, 2 , TU Delft, Delft Netherlands, 3 , Philips Research, Eindhoven Netherlands, 4 , Radboud University, Nijmegen Netherlands
We show recent advances on inducing periodicity on both intra- and interwire level, such to obtain 3 dimensional position control. The nanowire position is determined by that of the catalyst particle. We have developed a generic soft nano-imprint lithography process to fabricate arrays of metal particles. From these structures nearly defect free arrays of InP and GaP nanowires have been grown. This approach gives in-plane periodicity. Next, we demonstrate control of the crystal structure of indium phosphide (InP) and gallium phosphide (GaP) nanowires by impurity dopants. More importantly, we demonstrate that we can, once we have enforced the zinc blende crystal structure, induce twinning superlattices with long-range order in the z-direction in the nanowires. The spacing of the superlattices is tuned by the wire diameter and the zinc dopant concentration. These findings have been quantitatively modelled based on the cross-sectional shape of the zinc-blende nanowires.
3:00 PM - EE5.2
Combinatorial Approaches to Understanding Polytypism in III-V Nanowires.
Jonas Johansson 1 , Jessica Bolinsson 1 , Martin Ek 2 , Kimberly Dick 1 2 Show Abstract
1 Solid State Physics and the Nanometer Structure Consortium, Lund University, Lund Sweden, 2 Polymer & Materials Chemistry, Lund University, Lund Sweden
Metal particle seeded III–V semiconductor nanowires are currently being investigated for a wide range of applications in electronics, photonics, and life sciences. Many of these applications require a well-defined crystal structure. However, nanowire growth at arbitrary conditions often results in a poorly defined crystal structure, which can be described as a mixture of twinned zinc blende structure and wurtzite structure with stacking faults.Existing models of polytypism (the occurrence of different crystal structures that differ in stacking sequence only) in nanowires are strongly focused on explaining the occurrence of wurtzite (2H) in materials that have zinc blende (3C) as the bulk stable crystal structure. Recent observations of higher polytypes, such as 4H and 6H, motivates the consideration of more polytypes than just 2H and 3C when predicting the influence of experimental and materials parameters on the crystal structure of III–V nanowires.In this investigation we first calculate the limits for phase purity in materials where the inter-layer interactions are limited to next nearest neighboring layers only. Using combinatorics, we express the formation probabilities for the 2H, 4H, 6H, and 3C polytypes as functions of the nucleation probabilities for hexagonal and cubic type stacking. Next, we relate these nucleation probabilities to supersaturation and we show that for low supersaturation the 3C polytype dominates. As the supersaturation is increased, 6H starts to dominate and the probability for 4H reaches its maximum. If the supersaturation is further increased, 2H dominates more and more. This combinatorial approach is new and offers unexpected insights into the polytypism in III–V nanowires.We also consider longer range inter-layer interactions by applying an Ising model, which has been used to explain the polytypism in SiC, in our classical nucleation framework. Considering up to third nearest neighbor, this approach enables us to express the nucleation probabilities for the 3C, 4H, and 2H polytypes. We demonstrate that formation of the 4H polytype can dominate in a small supersaturation interval even if it is not the energetically favorable phase.We discuss both the short range and the longer range models in light of recent nanowire growth experiments, both our own and from the literature. In some nanowire materials systems, for instance GaAs, it seems very hard to control the crystal structure. In other nanowires, typically containing antimony, it seems to be easier to achieve pure phases. The former class of materials shows good qualitative agreement with the short range model, whereas the latter class agrees well with the longer range model. Finally, we briefly discuss possible reasons for the apparently different inter-layer interaction ranges during nanowire growth.
3:15 PM - EE5.3
Unit Cell Deformations of Hexagonal Polytypes in III-V Semiconductor Nanowires.
Dominik Kriegner 1 , Christian Panse 2 , Bernhard Mandl 1 3 , Kimberly Dick 3 4 , Mario Keplinger 1 , Johan Persson 5 , Philippe Caroff 6 , Daniele Ercolani 7 , Lucia Sorba 7 , Friedhelm Bechstedt 2 , Julian Stangl 1 , Guenther Bauer 1 Show Abstract
1 Institute of Semiconductor and Solid State Physics, Johannes Kepler University Linz, Linz Austria, 2 Institut fuer Festkoerpertheorie und -optik, Friedrich-Schiller-Universität Jena, Jena Germany, 3 Solid State Physics, Lund University, Lund Sweden, 4 Polymer & Materials Chemistry, Lund University, Lund Sweden, 5 Center for Electron Nanoscopy, Technical University Denmark, Kgs Lyngby Denmark, 6 IEMN, UMR CNRS 8520, Villeneuve d'Ascq France, 7 NEST, Scuola Normale Superiore and CNR-INFM, Pisa Italy
In contrast to bulk crystals and 2D layers, where only the zinc blende (ZB) structure is stable, in InAs and InSb nanowires (NWs) the formation of hexagonal wurtzite (WZ) and 4H segments is a common phenomenon, which strongly affects their electronic and optical properties.Only recently, control over the different NW crystal structures [1,2,3] has been achieved. As this offers a new degree of freedom for NW device design, like polytypic multi quantum well structures, an understanding of the structural properties of different polytypes is urgently needed.Here we present precise systematic studies of the variations of the unit cell parameters of InAs and InSb NWs for ZB, WZ, and 4H crystal structure in NWs. We employ high-resolution synchrotron x-ray diffraction (XRD) studies on NW samples with controlled crystal phases, which were selected by transmission electron microscopy (TEM) investigations. We compare the obtained lattice parameters for the InAs and InSb polytypes to results of density functional theory (DFT) calculations. Experiment and theory consistently show that the occurrence of hexagonal bilayers tends to stretch the distances of atomic layers parallel to the c-axis, and to reduce the in-plane distances compared to those in zinc blende. The change of the lattice parameters scales linearly with the hexagonality of the polytype, which is defined as the fraction of bilayers with hexagonal character within one unit cell. Quantitative agreement between experimental and theoretical results is found. The DFT calculations not only reveal the change of the unit cell dimensions, but describe also deformations of the bonding tetrahedra, which lead to displacements of the atom positions within the unit cell. Therefore the comparison with numerical data contributes a better understanding of the geometric variations as a function of the bilayer stacking.Our analysis shows that the often used simple geometric conversion of the ZB bulk lattice constants in order to obtain those of the hexagonal polytypes is not correct since this procedure neglects the distortions of the bonding tetrahedra in the hexagonal polytypes. Furthermore our precise results will enable accurate calculations of the band structure of the hexagonal polytypes as well as of the corresponding band alignments in InAs and InSb nanowires. Caroff, P.; et al. Nature Nanotech. 2009, 4, 50-55. Dick, K. A.; et al. Nano Lett. 2010, 10, 3494-3499. Kitauchi, Y.; et al. Nano Lett. 2010, 10, 1699-1703.
3:30 PM - EE5.4
Growth and Characterization of InSb Nanowires by Chemical Beam Epitaxy.
Alexander Vogel 1 , Johannes de Boor 1 , Joerg Wittemann 1 , Samuel Mensah 1 , Peter Werner 1 , Volker Schmidt 1 Show Abstract
1 , Max Planck Institute of Microstructure Physics, Halle (Saale) Germany
There is growing interest in antimony based III-V semiconductor materials, due to their intriguing physical properties. For example, InSb is very promising candidate for high-speed, low-power electronics due to the extremely high bulk electron mobility of 77000 cm2V-1s-1. Also, InSb has a good hole mobility of 850 cm2V-1s-1.However, heteroepitaxial growth of InSb is not easily achieved due to the large lattice constant (a0 = 0.648 nm) of InSb as compared to other semiconductor materials. A large lattice mismatch exists between InSb and typical semiconductor substrate materials like InAs (7%), GaAs (15%) and Si (19%). Compared to thin films, nanowires can potentially relax part of the strain energy by elastically deforming its shape. Concerning the growth of InSb nanowires, not much is known about such relaxation mechanisms.We are going to present detailed growth studies and structural characterization of InSb nanowires grown directly on InSb and InAs substrates using Chemical Beam Epitaxy. CBE has some decisive advantages over other epitaxial growth techniques like MOCVD or MBE. In general, using CBE one is able to grow at lower temperatures compared to MOCVD, which is particularly important when it comes to the growth of materials with very low melting points like InSb. Trimethylindium and triethylantimony were used as precursors to grow InSb nanowires. Both Au and Ag containing seed particles were used for nanowire growth.We identified two very different growth regimes. In the low temperature growth regime, around 350°C, nanowire growth was promoted by a (most likely liquid) indium-rich alloy. In the high temperature growth regime, around 430°C, post-growth characterization suggested that an AuIn2 alloy promoted nanowire growth.(HR)TEM investigations showed that wires grown at lower temperatures exhibited a large number of stacking faults and twin-planes. However, the stacking fault density could be heavily reduced by gradually increasing the growth temperature. Completely stacking fault-free InSb nanowires were grown at temperatures above 415°C. Those nanowires had a length of up to 2,8 µm with diameters as small as 35 nm.By combining CBE nanowire growth and laser interference lithography ordered arrays of InSb nanowires were grown. Those arrays have good homogeneity over a large area with a density of up to 8 wires per square micron. Temperature dependant electrical characterization (150K to 300K) was conducted by embedding the nanowires in polyimide and contacting those using Cr/Au top contacts. The InSb nanowires investigated showed good electrical conductivity and the temperature dependence suggested intrinsic behavior.
3:45 PM - EE5.5
Growth of Antimony-containing Heterostructure Nanowires by Molecular Beam Epitaxy: Crystal Phase Control, Surfaces and Interfaces.
Philippe Caroff 1 , Tao Xu 2 , Kimberly Dick 3 5 , Sébastien Plissard 1 4 , Thanh Nguyen 2 , Bruno Grandidier 2 , Xavier Wallart 1 Show Abstract
1 , Institut d’Electronique, de Microélectronique et de Nanotechnologie (IEMN), UMR CNRS 8520, Villeneuve d'Ascq France, 2 ISEN, Institut d’Electronique, de Microélectronique et de Nanotechnologie (IEMN), UMR CNRS 8520, Villeneuve d'Ascq France, 3 Solid State Physics / the Nanometer Structure Consortium, Lund University, Lund Sweden, 5 Polymer & Materials Chemistry, Lund University, Lund Sweden, 4 Department of Applied Physics, Photonics and Semiconductor Nanophysics, Eindhoven University of Technology, Eindhoven Netherlands
Growth of III-V nanowires has now gained some maturity and fundamental understanding of the growth mechanisms has dramatically progressed. However, there are only three families of III-Vs which have been extensively explored: nitrides, arsenides and phosphides. The growth and understanding of binary or ternary antimonides is only emerging now. The main motivation for developing antimonide nanowires is to link the intrinsic advantages of the nanowire geometry (possibility to relax strain very efficiently without creation of dislocations, quantum confinement, control of crystal phase), with the exceptional bulk properties of these semiconductors, such as small bandgaps, huge electron (InSb) or hole (GaSb) mobilities, the largest Landé g factor (InSb), a high thermoelectric figure of merit (InSb) and vast possibilities of bandstructure engineering, both in type I or type II/III alignments.Here we present advanced nanowire structures containing antimony and grown by molecular beam epitaxy. Structural characteristics are analyzed using scanning electron microscopy, transmission electron microscopy, and scanning tunneling microscopy. Nanowire heterostructures have been grown by a vapour-liquid-solid mechanism, using either gold seed particles or a gold-free “self-catalyzed” approach. We report the achievement, for the first time, of InSb nanowires by molecular beam epitaxy. We then show ternary GaAs/GaAsxSb1-x, InAs/InAsxSb1-x abrupt nanowire heterostructures, of controlled composition. It is demonstrated that crystal structure of ternary nanowires can be tuned with high control from defected to perfect phases, by inclusion of just a few atomic percent of antimony. Due to an overgrowth process, both wurtzite and zinc-blende InAsSb sidewall facets occur, and are revealed by low temperature STM with atomic resolution.
4:30 PM - **EE5.6
III-V Semiconductor Nanowires on Si: Selective Area MOVPE and Their Device Applications.
Katsuhiro Tomioka 1 2 , Junichi Motohisa 1 , Shinjiroh Hara 1 , Kenji Hiruma 1 , Takashi Fukui 1 Show Abstract
1 Graduate School of Information Science and Technology, and Research Center for Integrated Quantum Electronics (RCIQE), Hokkaido University, Sapporo Japan, 2 PRESTO, Japan Science and Technology Agency (JST), Saitama Japan
Integration of III-V nanowires on Si has attracted much attention for further advancing Si-based CMOS and optoelectronics. Recent advances in epitaxial techniques such as Vapor-Liquid-Solid (VLS) and selective-area growth (SAG) have enabled us to integrate III-V nanowires on Si without considering mismatches in lattice constant and thermal expansion coefficient. The nm-scaled heteroepitaxy reveals specific properties in III-V/Si heterojunctions, which have been screened with degradations due to the mismatches. We report on the systematically controlled growth of III-V compound semiconductor nanowire arrays by catalyst-free selective area metalorganic vapor phase epitaxy on partially masked Si(111) substrates. First, we present the growth of III-V (GaAs, InAs, and InP) nanowires on partially masked (111) oriented substrate, and demonstrate core-multishell nanowire-based devices, such as GaAs nanowire-based light-emitting diode (LED), InP nanowire-based solar cell, light-pumped laser operation from GaAs/GaAsP core-shell nanowire. Next, we present the SAG of vertical InAs and GaAs nanowire on Si (111) substrates by modifying initial Si (111) surface. We used the specific growth sequence to align the growth directions into vertical direction. We explain the growth of InAs, GaAs, and InGaAs nanowires on Si substrate. Cross-sectional transmission electron microscope images revealed that misfit dislocation with local strains was accommodated in InAs/Si interface, while no misfit dislocation was observed in GaAs/Si interface in case of thin nanowire diameter. Then, we demonstrate integration of III-V nanowire-based optical devices on Si for solid-state-lightning.Finally, we demonstrate vertical surrounding-gate FETs (VSGFETs) using as-grown InAs and InGaAs NWs on a Si substrate. After the growth, Hafnium alminate was deposited as high-k gate dielectric, followed by the deposition of tungsten by plasma sputtering for gate metal. Then, drain and source metals were evaporated on the top of NWs and backside of the substrate, respectively. Fabricated VSGFET contained single NW in the channel. In case of the InGaAs-based VSGFET, we observed n-type enhancement-mode FET behavior in ID-VDS and ID-VG characteristics. The performances are threshold voltage ~ 0.2 V, Gm,max = 0.96 S/mm, Ion / Ioff ~ 106, subthreshold swing, SS = 120 mV/decade. In addition, we present device concept for tunnel FET using III-V nanowire/Si heterojunctions.
5:00 PM - EE5.7
Control of Nanowire Morphology by Choice of Precursor Chemistry.
Omid Salehzadeh 1 , Simon Watkins 1 Show Abstract
1 Physics, Simon Fraser University, Burnaby, British Columbia, Canada
Metalorganic vapour phase epitaxy (MOVPE) is a key technology for the growth of III-V nanowires (NW) by the vapour liquid-solid (VLS) mechanism. The ability to grow axial and core shell heterostructures is an important requirement for NW device applications. The selection of shell growth over axial growth is usually achieved by using higher growth temperatures where the lateral growth is favoured over VLS growth. In this work we show that enhanced lateral growth can be achieved by using lower temperature precursors. Most prior work on GaAs NW growth using the VLS mechanism has involved the growth precursor trimethylgallium (TMGa) as the group III source. In this work we compare the growth of GaAs NWs grown using the ethyl-based precursor triethylgallium (TEGa), with TMGa growth over the temperature range of 360-480°C. Gold nanoparticles were formed by evaporation of thin Au films (0.5-2nm) followed by annealing under As vapor. Detailed measurements of the nanowire morphology were realized using scanning electron microscopy (SEM) and transmission electron microscopy. TEGa decomposes at approximately 100°C lower than TMGa based on the measurement of growth rates for planar films on (100) GaAs substrates. Growth with TEGa results in highly tapered NWs for growth temperatures above 370°C. Under these conditions, the catalyst free planar growth rate is still mass transport limited. NWs grown with TEGa are highly tapered due to the fact that planar growth on the substrate and nanowire sidewalls competes with the VLS mechanism for incoming Ga flux. As a result, as wires increase in length, the sidewall portion of the wire grown at earlier times receives a larger Ga flux. In contrast, TMGa decomposes very little below 450°C in the absence of Au catalyst. The Au catalyst permits the growth of nontapered GaAs NWs using TMGa at temperatures as low as 370°C, where the planar growth rate is essentially zero. Little tapering is observed using TMGa until approximately 460°C under the present growth conditions. The use of carbon dopants such as CBr4 results in a similar reduction in tapering for TEGa growth of GaAs NWs. At high carbon flows, planar growth is also suppressed by surface reactions. As a result NWs grown in the presence of large amounts of carbon become untapered and have greatly enhanced axial growth rates compared with undoped wires grown with TEGa. In contrast, NWs grown using TMGa and carbon are unchanged since the planar growth is already strongly suppressed at low growth temperatures.NWs grown under conditions which suppress tapering have predominantly zincblende structure with a low density of stacking faults, while tapered wires have high densities of stacking faults and domains of wurtzite phase material. These conclusions are supported by Raman measurements showing pure zincblende lattice modes for the nontapered wires, and mixtures of zincblende and wurtzite modes for the tapered ones.
5:15 PM - EE5.8
Measuring Surface Energies and Chemical Potential during Nanowire Growth.
Marcel Verheijen 1 4 , Rienk Algra 3 4 5 , Lou-Fe Feiner 4 2 , George Immink 4 , Willem van Enckevort 5 , Elias Vlieg 5 , Erik Bakkers 2 4 Show Abstract
1 Plasma & Materials Processing, Eindhoven University of Technology, Eindhoven Netherlands, 4 , Philips Research Laboratories, Eindhoven Netherlands, 3 , Materials Innovation Institute, Delft Netherlands, 5 Institue of Molecules and Materials, Radboud University, Nijmegen Netherlands, 2 Photonics and Semiconductor Nanophysics, Eindhoven University of Technology, Eindhoven Netherlands
For all applications and to fully use the potential of nanowires it is important to understand and control their structural properties. The defect density and crystal structure of nanowires grown by the vapor-liquid-solid (VLS) growth mechanism can be tuned by impurity atoms, temperature, diameter, III-V ratio or by a combination of these external parameters. It has been argued that these parameters can affect the chemical potential in the droplet, Δμ, the nanowire surface energy, γSV, and the solid-liquid or the liquid-vapor interface energies, γSL or γLV,which in turn drive the formation of planar defects and/or specific crystal structures. However, these energies have not been determined experimentally and their effect on nanowire growth is not clear. Here we present an approach to quantitatively determine the variation of Δμ, γSL, and γLV upon variation of the group III partial pressure by using GaP twinning superlattice (TSL) nanowires. We show that γLV is the main quantity determining the twin density, its influence being more than five times stronger than the combined effect of Δμ and γSL. This unexpected result implies that surfactants could be used during nanowire growth to engineer the nanowire defect structure and crystal structure.
5:30 PM - EE5.9
The Role of In Droplets in the Spontaneous Formation of InAs Nanowires on Bare Si(111).
Emmanouil Dimakis 1 , Jonas Laehnemann 1 , Uwe Jahn 1 , Steffen Breuer 1 , Maria Hilse 1 , Lutz Geelhaar 1 , Henning Riechert 1 Show Abstract
1 , Paul-Drude-Institut für Festkörperelektronik, Berlin Germany
Probably the most popular approach to grow semiconductor nanowires (NWs) is the vapor-liquid-solid mechanism which relies on tiny droplets of a foreign metal, typically Au. However, a drawback of this technique is that Au may be incorporated into the NWs. Recently, we showed that the internal quantum efficiency of GaAs NWs fabricated without Au is two orders of magnitude higher than that of their Au-induced counterparts. Thus, for optoelectronic applications it is essential to pursue alternative approaches to NW synthesis that do not rely on Au or any other foreign metal. InAs NWs can be fabricated without Au by employing masks, coatings, or thin oxide layers, but so far the details of the underlying mechanism are unclear. The crucial question is whether the formation of these NWs is induced by In droplets or not. Ex-situ measurements are inconclusive as In droplets might evaporate or be consumed by As after nominal growth termination. Here, we investigate the spontaneous growth of InAs nanowires by molecular-beam epitaxy (MBE) on Si(111). The effect of substrate inhomogeneities such as oxide openings is excluded by the chemical removal of the native oxide. InAs nanowires form