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Symposium EL03-Next-Generation Interconnects (Materials, Processes and Integration)—Toward Sustainable Microelectronics

Even as conventional Cu/Ultra-low-k interconnect technology has slowed in recent years due to challenges in both ultra-low k integration and metal barrier scaling, a plethora of options are being investigated for technology nodes below 10 nm, including new conductors, dielectrics, barrier layers, and process integration methods. In parallel, emerging packaging technology such as 2.5D/3D Integrated circuit integration are demonstrating means to improve circuit density and performance. Technologies including Through Silicon Vias are increasingly utilizing recent interconnect material and process advances to further packaging innovations. Moreover, using interconnects as a backbone, the introduction of additional functionality in the back-end of line (BEOL) has constituted new areas of research and opportunity. At the same time, a fundamental trend is emerging with the growing awareness of the environmental impacts of technologies. In this context, increasing performance is no longer the only driver of innovation with sustainability and supply chain resiliency for BEOL materials, additives, and processes receiving increased consideration.

This session will focus on both continued advances in conventional interconnect technology and novel interconnect integration and architecture schemes. Topics will include advances in dielectric materials and integration, novel etch stop and hard-mask materials, advanced metallization materials and processes, area selective deposition and supervia scaling boosters, alternatives to conventional interconnect technology (3D, optical interconnects), the introduction of additional functionalities in the BEOL and interconnect developments for flexible electronics and wearables devices. This symposium will also looks at advances to simplify or economize for materials, processes and tools for a sustainable microelectronic.

Topics will include:

  • Materials, processes and tools for sustainable microelectronics
  • Inter layer dielectric Materials : ULK synthesis, spin-on, sol-gel, fillable, flowable, PECVD precursors, Metal-organic and covalent-organic frameworks (MOF/COF), periodic mesoporous silica, iCVD and VDP, photo-patternable low-k
  • Novel Etch Stop and Hardmask Materials
  • Metallization for advanced interconnects, CVD, PVD, ALD, ECD, ELD, advances in liner, Cu seed, and fill
  • Barrier-free metallization and self-forming barriers, bottom-up metallization schemes
  • Selective Depositions, Metal on Metal (MoM), Metal on Dielectric (MoD), Dielectric on Dielectric (DoD), Dielectric on Metal (DoM)
  • Surface modification for ALD/CVD/ELD and self-assembled monolayer (SAM)/polymer deposition
  • RIE, plasma processing, bonding, planarization, and cleaning technologies
  • Reliability and failure analysis methods and techniques, electromigration, TDDB
  • Directed assembly technology and molecular self-assembling technologies
  • Alternative to Cu/ULK interconnects, 2.5/3D ICs integration, Through Silicon Vias, Optical interconnect, RF, Carbon-based, beyond Cu, use of 1D or 2D materials, Flexible interconnects
  • Introduction of additional functionality in the back-end of line (BEOL) : BEOL capacitors, transistors, resistive RAM, and sensors: materials, integration and electrical testing and reliability
  • A tutorial complementing this symposium is tentatively planned.

Invited Speakers (tentative):

  • Andy Antonelli (Onto Innovations, USA)
  • Masahisa Fujino (National Institute of Advanced Industrial Science and Technology, Japan)
  • Patrick Hopkins (University of Virginia, USA)
  • Seonhee Jang (University of Louisiana at Lafayette, USA)
  • Simon Jeannot (STMicroelectronics, France)
  • Joshua Knobloch (University of Colorado Boulder, USA)
  • Mauro Kobrinsky (Intel Corporation, USA)
  • Gayle Murdoch (imec, Belgium)
  • Michelle Paquette (University of Missouri–Kansas City, USA)
  • Jean-Philippe Soulie (imec, Belgium)
  • Nick Strandwitz (Lehigh University, USA)
  • Kazumasa Tanida (Tower Partners semiconductor, Japan)
  • Dina Triyoso (Tokyo Electron Limited, USA)
  • Latha Venkataraman (Columbia University, USA)
  • Fabien Volpi (Université Grenoble Alpes, France)

Symposium Organizers

Vincent Jousseaume
Commissariat à l’énergie atomique et aux énergies alternatives
France

Serena Iacovo
imec
Belgium
No Phone for Symposium Organizer Provided , Serena.Iacovo@imec.be

Sean King
Intel
USA
No Phone for Symposium Organizer Provided , sean.king@intel.com

Eiichi Kondoh
University of Yamanashi
Japan

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