Low-Barrier Heterojunction of Layered Sb₂Te₃ on Si for Low Resistance n-Type Contacts

In advanced CMOS, the transistor performance is becoming highly dependent on the contact resistance at the source/drain with recent extreme scaling. To reduce the specific contact resistivity, a low Schottky barrier height at the metal/semiconductor interface is required; however, it is well known that most metal/Si junctions always show a high electron Schottky barrier height to n-Si owing to the Fermi-level pinning in the range between the mid gap and the valence band edge. This fact imposes a fundamental difficulty in obtaining low contact resistance and further high performance in Si n-FET.<br/>We have recently demonstrated van der Waals stacking of Sb₂Te₃ on MoS₂, and additionally achieved significant device performance enhancement of MoS₂n-FET using the Sb₂Te₃ contact at source/drain thanks to the significant reduction of the contact resistance [1]. These findings motivated us to investigate the junction properties of Sb₂Te₃ on Si. In this work, we demonstrate the low barrier height of the Sb₂Te₃/n-Si junction. To evaluate potentials of Sb₂Te₃as the source/drain contacts in n-FET and p-FET, we prepared the W/Sb₂Te₃/Si junctions. Here, the Sb₂Te₃ with a thickness of 20 nm was prepared by magnetron sputtering in pure Ar onto the n- and p-type Si substrates (~1-10 Ωcm), and then the W electrode with a thickness of 30 nm was successively formed onto Sb₂Te₃ in the same deposition system. The formed Sb₂Te₃ films have a layered structure on Si, and they are stable against annealing up to 400 °C. Control samples of W/Si direct junctions showed a high electron barrier height of 0.65 eV and hole barrier height of 0.41 eV, owing to the Fermi-level pinning at the Si surface. These resulted in rectifying behavior both for n- and p-Si. In contrast, the current-voltage characteristics of Sb₂Te₃/n-Si junction was found to become ohmic, while the only Sb₂Te₃/p-Si junction was rectifying with the hole barrier height of 0.81 eV. These results suggest that the Fermi level in the Sb₂Te₃/Si junction is close to the conduction band edge of Si.<br/>In conclusion, a clear reduction in an electron barrier height was obtained by the insertion of Sb₂Te₃ between W electrodes and n-Si substrates. This low electron barrier height will be useful in the n-FET. Thus, the Sb₂Te₃ film is a promising contact material for the source/drain in the advanced Si CMOS transistors.<br/>Reference: [1] W. H. Chang et al., <i>Adv. Electron. Mater.</i> 2201091 (2023).