Atomic Layer Etch of Tungsten Disulfide Semiconductor using Downstream Plasma Treatment and Wet Etch Removal

Silicon has been used as a channel material for field-effect transistor (FET), driving the growth of the semiconductor industry. However, in modern technology where the channel size has been reduced to several nanometers, silicon has shown limitations such as short channel effects. Since numerous defects such as dangling bonds exist on the surface of silicon, the movement of carriers is hindered by the defects in channel with atomic-scale thickness. High-performance transistors with smaller form factor require the next-generation semiconductors to replace silicon. Recently, two-dimensional (2D) materials have drawn considerable attention due to their unique layered structure. Since layer-to-layer bonding is achieved through van der Waals (vdW) interaction, layer-to-layer separation can be easily achieved with relatively weak force. The separated monolayer has a complete structure and no defects on surface compared to silicon. Several semiconductor chip manufacturers have reported results of applying 2D materials as channels in various structures of next-generation transistors.<br/>Transition-metal dichalcogenides (TMDCs) are one of the most actively studied 2D materials. Among them, WS₂ has a very high electron mobility of ~234 cm²V^-1s^-1 and generally exhibits n-type behavior due to its sulfur vacancy. WS₂ can also be used as a p-channel through p-doping and it is possible to implement a single semiconductor-based complementary metal–oxide–semiconductor (CMOS). Thickness-dependent energy band gap and excellent mechanical properties of WS₂ enable multiple device applications such as photo detectors and wearable devices. However, various problems exist in the fabrication process of electrical devices using TMDCs. In general, the mechanical exfoliation is used for interlayer separation of TMDCs and it is difficult to obtain the materials with accurate thickness due to its randomness. Photoresists or contaminants may also remain on the surface of TMDCs, which can cause interface defects and reduce device reliability. WS₂ can be oxidized in atmosphere and the oxide layer gives an unwanted doping effect. The fabricated devices exhibit different electrical properties from those originally designed because of the above problems.<br/>In this study, we propose a method to accurately control the thickness and restore the contaminated surface to the pristine state through atomic layer etching of WS₂. Only the outermost layer of WS₂ can be oxidized by self-limiting reaction using downstream O₂ plasma. Subsequent KOH solution treatment selectively removes only the oxide layer (WO_X) for layer-by-layer control of thickness. A back-gate FET using WS₂ as a channel material was fabricated to confirm the changes of physical and electrical properties by atomic layer etching. The etch rate of WS₂ channel measured with atomic force microscope (AFM) was approximately 0.65 nm/cycle, equivalent to the thickness of WS₂ monolayer. Micro-Raman spectroscopy and high-resolution transmission electron microscopy (HR-TEM) showed that atomic layer etching had a minor effect on the crystallinity of WS₂. Finally, the n-type behavior was recovered through the surface cleaning effect and the recessed-channel WS₂ FET with improved output current on/off ratio higher than 10⁶ was realized. This method, which provides a facile approach to thickness control and surface cleaning, allows TMDCs to be precisely engineered, increasing their potential as channel materials for next-generation transistors.